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sys/dev/fxp/rcvbundl.h
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1 /*- 2 Copyright (c) 1999-2001, Intel Corporation 3 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright notice, 13 this list of conditions and the following disclaimer in the documentation 14 and/or other materials provided with the distribution. 15 16 3. Neither the name of Intel Corporation nor the names of its contributors 17 may be used to endorse or promote products derived from this software 18 without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 23 DISCLAIMED. IN NO EVENT SHALL CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 24 INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 25 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 26 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 27 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 28 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 29 EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /* 32 * $FreeBSD: releng/8.4/sys/dev/fxp/rcvbundl.h 145368 2005-04-21 19:34:57Z mux $ 33 */ 34 /* 35 rcvbundl.h 36 37 Author: Patrick J Luhmann (PJL) 38 Date: 05/30/2000 39 Version: 3.28 40 41 This file contains the loadable micro code arrays to implement receive bundling on the 42 D101 A-step, D101 B-step, D101M (B-step only), D101S, D102 B-step, 43 D102 B-step with TCO work around, D102 C-step and D102 E-step. 44 45 Each controller has its own specific micro code array. The array for one controller 46 is totally incompatible with any other controller, and if used will most likely 47 cause the controller to lock up and stop responding to the driver. Each micro 48 code array has its own parameter offsets (described below), and they each have 49 their own version number (which should not be confused with the version of the 50 rcvbundl.h file given above). 51 52 */ 53 54 55 56 /************************************************************************* 57 * CPUSaver parameters 58 * 59 * All CPUSaver parameters are 16-bit literals that are part of a 60 * "move immediate value" instruction. By changing the value of 61 * the literal in the instruction before the code is loaded, the 62 * driver can change algorithm. 63 * 64 * CPUSAVER_DWORD - This is the location of the instruction that loads 65 * the dead-man timer with its inital value. By writing a 16-bit 66 * value to the low word of this instruction, the driver can change 67 * the timer value. The current default is either x600 or x800; 68 * experiments show that the value probably should stay within the 69 * range of x200 - x1000. 70 * 71 * CPUSAVER_BUNDLE_MAX_DWORD - This is the location of the instruction 72 * that sets the maximum number of frames that will be bundled. In 73 * some situations, such as the TCP windowing algorithm, it may be 74 * better to limit the growth of the bundle size than let it go as 75 * high as it can, because that could cause too much added latency. 76 * The default is six, because this is the number of packets in the 77 * default TCP window size. A value of 1 would make CPUSaver indicate 78 * an interrupt for every frame received. If you do not want to put 79 * a limit on the bundle size, set this value to xFFFF. 80 * 81 * CPUSAVER_MIN_SIZE_DWORD - This is the location of the instruction 82 * that contains a bit-mask describing the minimum size frame that 83 * will be bundled. The default masks the lower 7 bits, which means 84 * that any frame less than 128 bytes in length will not be bundled, 85 * but will instead immediately generate an interrupt. This does 86 * not affect the current bundle in any way. Any frame that is 128 87 * bytes or large will be bundled normally. This feature is meant 88 * to provide immediate indication of ACK frames in a TCP environment. 89 * Customers were seeing poor performance when a machine with CPUSaver 90 * enabled was sending but not receiving. The delay introduced when 91 * the ACKs were received was enough to reduce total throughput, because 92 * the sender would sit idle until the ACK was finally seen. 93 * 94 * The current default is 0xFF80, which masks out the lower 7 bits. 95 * This means that any frame which is x7F (127) bytes or smaller 96 * will cause an immediate interrupt. Because this value must be a 97 * bit mask, there are only a few valid values that can be used. To 98 * turn this feature off, the driver can write the value xFFFF to the 99 * lower word of this instruction (in the same way that the other 100 * parameters are used). Likewise, a value of 0xF800 (2047) would 101 * cause an interrupt to be generated for every frame, because all 102 * standard Ethernet frames are <= 2047 bytes in length. 103 *************************************************************************/ 104 105 106 107 /********************************************************/ 108 /* CPUSaver micro code for the D101A */ 109 /********************************************************/ 110 111 /* Version 2.0 */ 112 113 /* This value is the same for both A and B step of 558. */ 114 #define D101_CPUSAVER_DWORD 72 115 116 117 #define D101_A_RCVBUNDLE_UCODE \ 118 {\ 119 0x03B301BB, \ 120 0x0046FFFF, \ 121 0xFFFFFFFF, \ 122 0x051DFFFF, \ 123 0xFFFFFFFF, \ 124 0xFFFFFFFF, \ 125 0x000C0001, \ 126 0x00101212, \ 127 0x000C0008, \ 128 0x003801BC, \ 129 0x00000000, \ 130 0x00124818, \ 131 0x000C1000, \ 132 0x00220809, \ 133 0x00010200, \ 134 0x00124818, \ 135 0x000CFFFC, \ 136 0x003803B5, \ 137 0x00000000, \ 138 0x00000000, \ 139 0x00000000, \ 140 0x00000000, \ 141 0x0010009C, \ 142 0x0024B81D, \ 143 0x00130836, \ 144 0x000C0001, \ 145 0x0026081C, \ 146 0x0020C81B, \ 147 0x00130824, \ 148 0x00222819, \ 149 0x00101213, \ 150 0x00041000, \ 151 0x003A03B3, \ 152 0x00010200, \ 153 0x00101B13, \ 154 0x00238081, \ 155 0x00213049, \ 156 0x0038003B, \ 157 0x00000000, \ 158 0x00000000, \ 159 0x00000000, \ 160 0x00000000, \ 161 0x00000000, \ 162 0x00000000, \ 163 0x00000000, \ 164 0x00000000, \ 165 0x00000000, \ 166 0x00000000, \ 167 0x00000000, \ 168 0x00000000, \ 169 0x00000000, \ 170 0x00000000, \ 171 0x00000000, \ 172 0x00000000, \ 173 0x0010009C, \ 174 0x0024B83E, \ 175 0x00130826, \ 176 0x000C0001, \ 177 0x0026083B, \ 178 0x00010200, \ 179 0x00134824, \ 180 0x000C0001, \ 181 0x00101213, \ 182 0x00041000, \ 183 0x0038051E, \ 184 0x00101313, \ 185 0x00010400, \ 186 0x00380521, \ 187 0x00050600, \ 188 0x00100824, \ 189 0x00101310, \ 190 0x00041000, \ 191 0x00080600, \ 192 0x00101B10, \ 193 0x0038051E, \ 194 0x00000000, \ 195 0x00000000, \ 196 0x00000000, \ 197 0x00000000, \ 198 0x00000000, \ 199 0x00000000, \ 200 0x00000000, \ 201 0x00000000, \ 202 0x00000000, \ 203 0x00000000, \ 204 0x00000000, \ 205 0x00000000, \ 206 0x00000000, \ 207 0x00000000, \ 208 0x00000000, \ 209 0x00000000, \ 210 0x00000000, \ 211 0x00000000, \ 212 0x00000000, \ 213 0x00000000, \ 214 0x00000000, \ 215 0x00000000, \ 216 0x00000000, \ 217 0x00000000, \ 218 0x00000000, \ 219 0x00000000, \ 220 0x00000000, \ 221 } 222 223 224 /********************************************************/ 225 /* CPUSaver micro code for the D101B */ 226 /********************************************************/ 227 228 /* Version 2.0 */ 229 230 #define D101_B0_RCVBUNDLE_UCODE \ 231 {\ 232 0x03B401BC, \ 233 0x0047FFFF, \ 234 0xFFFFFFFF, \ 235 0x051EFFFF, \ 236 0xFFFFFFFF, \ 237 0xFFFFFFFF, \ 238 0x000C0001, \ 239 0x00101B92, \ 240 0x000C0008, \ 241 0x003801BD, \ 242 0x00000000, \ 243 0x00124818, \ 244 0x000C1000, \ 245 0x00220809, \ 246 0x00010200, \ 247 0x00124818, \ 248 0x000CFFFC, \ 249 0x003803B6, \ 250 0x00000000, \ 251 0x00000000, \ 252 0x00000000, \ 253 0x00000000, \ 254 0x0010009C, \ 255 0x0024B81D, \ 256 0x0013082F, \ 257 0x000C0001, \ 258 0x0026081C, \ 259 0x0020C81B, \ 260 0x00130837, \ 261 0x00222819, \ 262 0x00101B93, \ 263 0x00041000, \ 264 0x003A03B4, \ 265 0x00010200, \ 266 0x00101793, \ 267 0x00238082, \ 268 0x0021304A, \ 269 0x0038003C, \ 270 0x00000000, \ 271 0x00000000, \ 272 0x00000000, \ 273 0x00000000, \ 274 0x00000000, \ 275 0x00000000, \ 276 0x00000000, \ 277 0x00000000, \ 278 0x00000000, \ 279 0x00000000, \ 280 0x00000000, \ 281 0x00000000, \ 282 0x00000000, \ 283 0x00000000, \ 284 0x00000000, \ 285 0x00000000, \ 286 0x0010009C, \ 287 0x0024B83E, \ 288 0x00130826, \ 289 0x000C0001, \ 290 0x0026083B, \ 291 0x00010200, \ 292 0x00134837, \ 293 0x000C0001, \ 294 0x00101B93, \ 295 0x00041000, \ 296 0x0038051F, \ 297 0x00101313, \ 298 0x00010400, \ 299 0x00380522, \ 300 0x00050600, \ 301 0x00100837, \ 302 0x00101310, \ 303 0x00041000, \ 304 0x00080600, \ 305 0x00101790, \ 306 0x0038051F, \ 307 0x00000000, \ 308 0x00000000, \ 309 0x00000000, \ 310 0x00000000, \ 311 0x00000000, \ 312 0x00000000, \ 313 0x00000000, \ 314 0x00000000, \ 315 0x00000000, \ 316 0x00000000, \ 317 0x00000000, \ 318 0x00000000, \ 319 0x00000000, \ 320 0x00000000, \ 321 0x00000000, \ 322 0x00000000, \ 323 0x00000000, \ 324 0x00000000, \ 325 0x00000000, \ 326 0x00000000, \ 327 0x00000000, \ 328 0x00000000, \ 329 0x00000000, \ 330 0x00000000, \ 331 0x00000000, \ 332 0x00000000, \ 333 0x00000000, \ 334 } 335 336 337 /********************************************************/ 338 /* CPUSaver micro code for the D101M (B-step only) */ 339 /********************************************************/ 340 341 /* Version 2.10 */ 342 343 /* Parameter values for the D101M B-step */ 344 #define D101M_CPUSAVER_DWORD 78 345 #define D101M_CPUSAVER_BUNDLE_MAX_DWORD 65 346 #define D101M_CPUSAVER_MIN_SIZE_DWORD 126 347 348 349 #define D101M_B_RCVBUNDLE_UCODE \ 350 {\ 351 0x00550215, \ 352 0xFFFF0437, \ 353 0xFFFFFFFF, \ 354 0x06A70789, \ 355 0xFFFFFFFF, \ 356 0x0558FFFF, \ 357 0x000C0001, \ 358 0x00101312, \ 359 0x000C0008, \ 360 0x00380216, \ 361 0x0010009C, \ 362 0x00204056, \ 363 0x002380CC, \ 364 0x00380056, \ 365 0x0010009C, \ 366 0x00244C0B, \ 367 0x00000800, \ 368 0x00124818, \ 369 0x00380438, \ 370 0x00000000, \ 371 0x00140000, \ 372 0x00380555, \ 373 0x00308000, \ 374 0x00100662, \ 375 0x00100561, \ 376 0x000E0408, \ 377 0x00134861, \ 378 0x000C0002, \ 379 0x00103093, \ 380 0x00308000, \ 381 0x00100624, \ 382 0x00100561, \ 383 0x000E0408, \ 384 0x00100861, \ 385 0x000C007E, \ 386 0x00222C21, \ 387 0x000C0002, \ 388 0x00103093, \ 389 0x00380C7A, \ 390 0x00080000, \ 391 0x00103090, \ 392 0x00380C7A, \ 393 0x00000000, \ 394 0x00000000, \ 395 0x00000000, \ 396 0x00000000, \ 397 0x0010009C, \ 398 0x00244C2D, \ 399 0x00010004, \ 400 0x00041000, \ 401 0x003A0437, \ 402 0x00044010, \ 403 0x0038078A, \ 404 0x00000000, \ 405 0x00100099, \ 406 0x00206C7A, \ 407 0x0010009C, \ 408 0x00244C48, \ 409 0x00130824, \ 410 0x000C0001, \ 411 0x00101213, \ 412 0x00260C75, \ 413 0x00041000, \ 414 0x00010004, \ 415 0x00130826, \ 416 0x000C0006, \ 417 0x002206A8, \ 418 0x0013C926, \ 419 0x00101313, \ 420 0x003806A8, \ 421 0x00000000, \ 422 0x00000000, \ 423 0x00000000, \ 424 0x00000000, \ 425 0x00000000, \ 426 0x00000000, \ 427 0x00000000, \ 428 0x00000000, \ 429 0x00080600, \ 430 0x00101B10, \ 431 0x00050004, \ 432 0x00100826, \ 433 0x00101210, \ 434 0x00380C34, \ 435 0x00000000, \ 436 0x00000000, \ 437 0x0021155B, \ 438 0x00100099, \ 439 0x00206559, \ 440 0x0010009C, \ 441 0x00244559, \ 442 0x00130836, \ 443 0x000C0000, \ 444 0x00220C62, \ 445 0x000C0001, \ 446 0x00101B13, \ 447 0x00229C0E, \ 448 0x00210C0E, \ 449 0x00226C0E, \ 450 0x00216C0E, \ 451 0x0022FC0E, \ 452 0x00215C0E, \ 453 0x00214C0E, \ 454 0x00380555, \ 455 0x00010004, \ 456 0x00041000, \ 457 0x00278C67, \ 458 0x00040800, \ 459 0x00018100, \ 460 0x003A0437, \ 461 0x00130826, \ 462 0x000C0001, \ 463 0x00220559, \ 464 0x00101313, \ 465 0x00380559, \ 466 0x00000000, \ 467 0x00000000, \ 468 0x00000000, \ 469 0x00000000, \ 470 0x00000000, \ 471 0x00000000, \ 472 0x00000000, \ 473 0x00000000, \ 474 0x00130831, \ 475 0x0010090B, \ 476 0x00124813, \ 477 0x000CFF80, \ 478 0x002606AB, \ 479 0x00041000, \ 480 0x003806A8, \ 481 0x00000000, \ 482 0x00000000, \ 483 0x00000000, \ 484 0x00000000, \ 485 } 486 487 488 /********************************************************/ 489 /* CPUSaver micro code for the D101S */ 490 /********************************************************/ 491 492 /* Version 1.20 */ 493 494 /* Parameter values for the D101S */ 495 #define D101S_CPUSAVER_DWORD 78 496 #define D101S_CPUSAVER_BUNDLE_MAX_DWORD 67 497 #define D101S_CPUSAVER_MIN_SIZE_DWORD 129 498 499 500 #define D101S_RCVBUNDLE_UCODE \ 501 {\ 502 0x00550242, \ 503 0xFFFF047E, \ 504 0xFFFFFFFF, \ 505 0x06FF0818, \ 506 0xFFFFFFFF, \ 507 0x05A6FFFF, \ 508 0x000C0001, \ 509 0x00101312, \ 510 0x000C0008, \ 511 0x00380243, \ 512 0x0010009C, \ 513 0x00204056, \ 514 0x002380D0, \ 515 0x00380056, \ 516 0x0010009C, \ 517 0x00244F8B, \ 518 0x00000800, \ 519 0x00124818, \ 520 0x0038047F, \ 521 0x00000000, \ 522 0x00140000, \ 523 0x003805A3, \ 524 0x00308000, \ 525 0x00100610, \ 526 0x00100561, \ 527 0x000E0408, \ 528 0x00134861, \ 529 0x000C0002, \ 530 0x00103093, \ 531 0x00308000, \ 532 0x00100624, \ 533 0x00100561, \ 534 0x000E0408, \ 535 0x00100861, \ 536 0x000C007E, \ 537 0x00222FA1, \ 538 0x000C0002, \ 539 0x00103093, \ 540 0x00380F90, \ 541 0x00080000, \ 542 0x00103090, \ 543 0x00380F90, \ 544 0x00000000, \ 545 0x00000000, \ 546 0x00000000, \ 547 0x00000000, \ 548 0x0010009C, \ 549 0x00244FAD, \ 550 0x00010004, \ 551 0x00041000, \ 552 0x003A047E, \ 553 0x00044010, \ 554 0x00380819, \ 555 0x00000000, \ 556 0x00100099, \ 557 0x00206FFD, \ 558 0x0010009A, \ 559 0x0020AFFD, \ 560 0x0010009C, \ 561 0x00244FC8, \ 562 0x00130824, \ 563 0x000C0001, \ 564 0x00101213, \ 565 0x00260FF8, \ 566 0x00041000, \ 567 0x00010004, \ 568 0x00130826, \ 569 0x000C0006, \ 570 0x00220700, \ 571 0x0013C926, \ 572 0x00101313, \ 573 0x00380700, \ 574 0x00000000, \ 575 0x00000000, \ 576 0x00000000, \ 577 0x00000000, \ 578 0x00000000, \ 579 0x00000000, \ 580 0x00080600, \ 581 0x00101B10, \ 582 0x00050004, \ 583 0x00100826, \ 584 0x00101210, \ 585 0x00380FB6, \ 586 0x00000000, \ 587 0x00000000, \ 588 0x002115A9, \ 589 0x00100099, \ 590 0x002065A7, \ 591 0x0010009A, \ 592 0x0020A5A7, \ 593 0x0010009C, \ 594 0x002445A7, \ 595 0x00130836, \ 596 0x000C0000, \ 597 0x00220FE4, \ 598 0x000C0001, \ 599 0x00101B13, \ 600 0x00229F8E, \ 601 0x00210F8E, \ 602 0x00226F8E, \ 603 0x00216F8E, \ 604 0x0022FF8E, \ 605 0x00215F8E, \ 606 0x00214F8E, \ 607 0x003805A3, \ 608 0x00010004, \ 609 0x00041000, \ 610 0x00278FE9, \ 611 0x00040800, \ 612 0x00018100, \ 613 0x003A047E, \ 614 0x00130826, \ 615 0x000C0001, \ 616 0x002205A7, \ 617 0x00101313, \ 618 0x003805A7, \ 619 0x00000000, \ 620 0x00000000, \ 621 0x00000000, \ 622 0x00000000, \ 623 0x00000000, \ 624 0x00000000, \ 625 0x00000000, \ 626 0x00000000, \ 627 0x00000000, \ 628 0x00130831, \ 629 0x0010090B, \ 630 0x00124813, \ 631 0x000CFF80, \ 632 0x00260703, \ 633 0x00041000, \ 634 0x00380700, \ 635 0x00000000, \ 636 } 637 638 639 /********************************************************/ 640 /* CPUSaver micro code for the D102 B-step */ 641 /********************************************************/ 642 643 /* Version 2.0 */ 644 645 /* 646 This version of CPUSaver is different from all others in 647 a different way. It combines the CPUSaver algorithm with 648 fixes for bugs in the B-step hardware (specifically, bugs 649 with Inline Receive). 650 Thus, when CPUSaver is disabled, this micro code image will 651 still need to be loaded. Before this happens, the hit addresses 652 for the CPUSaver algorithm must be set to 0x1FFFF. The hit 653 addresses for CPUSaver are (starting with 0, and remember that 654 655 */ 656 657 /* Parameter values for the D102 B-step */ 658 #define D102_B_CPUSAVER_DWORD 91 659 #define D102_B_CPUSAVER_BUNDLE_MAX_DWORD 115 660 #define D102_B_CPUSAVER_MIN_SIZE_DWORD 70 661 662 663 #define D102_B_RCVBUNDLE_UCODE \ 664 {\ 665 0x006F0276, \ 666 0x02BF0E93, \ 667 0x1FFF0ED9, \ 668 0x0D2508FA, \ 669 0x04D21FFF, \ 670 0x0EA10892, \ 671 0x00300001, \ 672 0x0140D871, \ 673 0x00300008, \ 674 0x00E00277, \ 675 0x01406C57, \ 676 0x00816073, \ 677 0x008700FA, \ 678 0x00E00070, \ 679 0x00E00E94, \ 680 0x00200004, \ 681 0x01410000, \ 682 0x014B6F6F, \ 683 0x0030FFFF, \ 684 0x01486F72, \ 685 0x00E81F9B, \ 686 0x00E00EA3, \ 687 0x003C0040, \ 688 0x00380920, \ 689 0x00C02000, \ 690 0x0150ED38, \ 691 0x0150EE39, \ 692 0x0150EF3A, \ 693 0x003C0040, \ 694 0x01506F0D, \ 695 0x01600E72, \ 696 0x00380AE0, \ 697 0x00E002C0, \ 698 0x00300001, \ 699 0x014C0000, \ 700 0x008404DC, \ 701 0x014C6F72, \ 702 0x00E01F9D, \ 703 0x01406C51, \ 704 0x0080DFC2, \ 705 0x01406C52, \ 706 0x00815FC2, \ 707 0x01406C57, \ 708 0x00917FD5, \ 709 0x00E01FE6, \ 710 0x00000000, \ 711 0x01406C57, \ 712 0x00919FAD, \ 713 0x00038800, \ 714 0x00300000, \ 715 0x00E81FF2, \ 716 0x014D6FC4, \ 717 0x00E008FB, \ 718 0x00000000, \ 719 0x00822D30, \ 720 0x01406C51, \ 721 0x0080CD26, \ 722 0x01406C52, \ 723 0x00814D26, \ 724 0x01406C57, \ 725 0x00916D26, \ 726 0x014C6FD7, \ 727 0x00300000, \ 728 0x00841FDB, \ 729 0x00300001, \ 730 0x0140D772, \ 731 0x00E012B3, \ 732 0x014C6F91, \ 733 0x0150710B, \ 734 0x01496F72, \ 735 0x0030FF80, \ 736 0x00940EDD, \ 737 0x00102000, \ 738 0x00E00EDA, \ 739 0x01406C57, \ 740 0x00917FFD, \ 741 0x00001000, \ 742 0x00E01FFD, \ 743 0x00138800, \ 744 0x00300001, \ 745 0x00E81FF2, \ 746 0x00202500, \ 747 0x00E81F9B, \ 748 0x01600EC5, \ 749 0x00E00893, \ 750 0x00000000, \ 751 0x01406CD5, \ 752 0x0091EEA3, \ 753 0x00904EA3, \ 754 0x00901F89, \ 755 0x00E00EA3, \ 756 0x00200600, \ 757 0x0140D76F, \ 758 0x00138400, \ 759 0x01406FD8, \ 760 0x0140D96F, \ 761 0x00E01FE6, \ 762 0x00038400, \ 763 0x00102000, \ 764 0x00971FE0, \ 765 0x00101000, \ 766 0x00050200, \ 767 0x00E804D2, \ 768 0x014C6FD8, \ 769 0x00300001, \ 770 0x00840D26, \ 771 0x0140D872, \ 772 0x00E00D26, \ 773 0x014C6FD9, \ 774 0x00300001, \ 775 0x0140D972, \ 776 0x00941FBD, \ 777 0x00102000, \ 778 0x00038400, \ 779 0x014C6FD8, \ 780 0x00300006, \ 781 0x00840EDA, \ 782 0x014F71D8, \ 783 0x0140D872, \ 784 0x00E00EDA, \ 785 0x00340020, \ 786 0x014C6FED, \ 787 0x01603472, \ 788 0x016035EE, \ 789 0x016036EF, \ 790 0x00300004, \ 791 0x01611C71, \ 792 0x00300014, \ 793 0x00200A00, \ 794 0x00E810B9, \ 795 0x00600000, \ 796 0x01496F50, \ 797 0x00E004D3, \ 798 0x00000000, \ 799 } 800 801 802 803 804 /********************************************************/ 805 /* TCO micro code for the D102 B-step */ 806 /********************************************************/ 807 808 /* Version 2.0 */ 809 810 /* 811 This version is a fix to TCO bug. This version can be loaded instead 812 the CPUSaver version by modifing the registry key "LoadTcoUCodeInsteadOfCpuSaver" 813 814 */ 815 816 817 #define D102_B_TCO_UCODE \ 818 {\ 819 0x1FFF0ED3, \ 820 0x02BF0E93, \ 821 0x1FFF1FFF, \ 822 0x1FFF08FA, \ 823 0x1FFF1FFF, \ 824 0x0EA10892, \ 825 0x00906ED8, \ 826 0x01406C55, \ 827 0x00E00ED4, \ 828 0x00000000, \ 829 0x00000000, \ 830 0x00000000, \ 831 0x00000000, \ 832 0x00000000, \ 833 0x00E00E94, \ 834 0x00200004, \ 835 0x01410000, \ 836 0x014B6F6F, \ 837 0x0030FFFF, \ 838 0x01486F72, \ 839 0x00E81F9B, \ 840 0x00E00EA3, \ 841 0x003C0040, \ 842 0x00380920, \ 843 0x00C02000, \ 844 0x0150ED38, \ 845 0x0150EE39, \ 846 0x0150EF3A, \ 847 0x003C0040, \ 848 0x01506F0D, \ 849 0x01600E72, \ 850 0x00380AE0, \ 851 0x00E002C0, \ 852 0x00300001, \ 853 0x014C0000, \ 854 0x008404DC, \ 855 0x014C6F72, \ 856 0x00E01F9D, \ 857 0x00000000, \ 858 0x00000000, \ 859 0x00000000, \ 860 0x00000000, \ 861 0x00000000, \ 862 0x00000000, \ 863 0x00000000, \ 864 0x00000000, \ 865 0x01406C57, \ 866 0x00919FAD, \ 867 0x00038800, \ 868 0x00300000, \ 869 0x00E81FD5, \ 870 0x014D6FC4, \ 871 0x00E008FB, \ 872 0x00000000, \ 873 0x00000000, \ 874 0x00000000, \ 875 0x00000000, \ 876 0x00000000, \ 877 0x00000000, \ 878 0x00000000, \ 879 0x00000000, \ 880 0x00000000, \ 881 0x00000000, \ 882 0x00000000, \ 883 0x00000000, \ 884 0x00000000, \ 885 0x00000000, \ 886 0x00000000, \ 887 0x00000000, \ 888 0x00000000, \ 889 0x00000000, \ 890 0x00000000, \ 891 0x00000000, \ 892 0x00000000, \ 893 0x00000000, \ 894 0x00000000, \ 895 0x00000000, \ 896 0x00000000, \ 897 0x00138800, \ 898 0x00300001, \ 899 0x00E81FD5, \ 900 0x00202500, \ 901 0x00E81F9B, \ 902 0x01600EC5, \ 903 0x00E00893, \ 904 0x00000000, \ 905 0x01406CD5, \ 906 0x0091EEA3, \ 907 0x00904EA3, \ 908 0x00901F89, \ 909 0x00E00EA3, \ 910 0x00340020, \ 911 0x014C6FED, \ 912 0x01603472, \ 913 0x016035EE, \ 914 0x016036EF, \ 915 0x00300004, \ 916 0x01611C71, \ 917 0x00300014, \ 918 0x00200A00, \ 919 0x00E810B9, \ 920 0x00600000, \ 921 0x00000000, \ 922 0x00000000, \ 923 0x00000000, \ 924 0x00000000, \ 925 0x00000000, \ 926 0x00000000, \ 927 0x00000000, \ 928 0x00000000, \ 929 0x00000000, \ 930 0x00000000, \ 931 0x00000000, \ 932 0x00000000, \ 933 0x00000000, \ 934 0x00000000, \ 935 0x00000000, \ 936 0x00000000, \ 937 0x00000000, \ 938 0x00000000, \ 939 0x00000000, \ 940 0x00000000, \ 941 0x00000000, \ 942 0x00000000, \ 943 0x00000000, \ 944 0x00000000, \ 945 0x00000000, \ 946 0x00000000, \ 947 0x00000000, \ 948 0x00000000, \ 949 0x00000000, \ 950 0x00000000, \ 951 0x00000000, \ 952 0x00000000, \ 953 } 954 955 956 957 /********************************************************/ 958 /* Micro code for the D102 C-step */ 959 /********************************************************/ 960 961 /* Parameter values for the D102 C-step */ 962 #define D102_C_CPUSAVER_DWORD 46 963 #define D102_C_CPUSAVER_BUNDLE_MAX_DWORD 54 964 #define D102_C_CPUSAVER_MIN_SIZE_DWORD 133 /* not implemented */ 965 966 967 968 969 970 #if 0 971 // this uCode include the CPU Saver and the TCO work around 972 //for IP fregments. 973 #endif 974 #define D102_C_RCVBUNDLE_UCODE \ 975 { \ 976 0x00700279, \ 977 0x0E6104E2, \ 978 0x02BF0CAE, \ 979 0x1519150C, \ 980 0x1FFF0E5B, \ 981 0x1FFF1FFF, \ 982 0x00E014D8, \ 983 0x00000000, \ 984 0x00000000, \ 985 0x00000000, \ 986 0x00E014DC, \ 987 0x00000000, \ 988 0x00000000, \ 989 0x00000000, \ 990 0x00E014F4, \ 991 0x00000000, \ 992 0x00000000, \ 993 0x00000000, \ 994 0x00000000, \ 995 0x00000000, \ 996 0x00000000, \ 997 0x00000000, \ 998 0x00E014E0, \ 999 0x00000000, \ 1000 0x00000000, \ 1001 0x00000000, \ 1002 0x00000000, \ 1003 0x00000000, \ 1004 0x00000000, \ 1005 0x00000000, \ 1006 0x00000000, \ 1007 0x00000000, \ 1008 0x00000000, \ 1009 0x00000000, \ 1010 0x00000000, \ 1011 0x00000000, \ 1012 0x00000000, \ 1013 0x00000000, \ 1014 0x00E014E7, \ 1015 0x00000000, \ 1016 0x00000000, \ 1017 0x00000000, \ 1018 0x00141000, \ 1019 0x015D6F0D, \ 1020 0x00E002C0, \ 1021 0x00000000, \ 1022 0x00200600, \ 1023 0x00E0150D, \ 1024 0x00000000, \ 1025 0x00000000, \ 1026 0x00000000, \ 1027 0x00000000, \ 1028 0x00000000, \ 1029 0x00000000, \ 1030 0x00300006, \ 1031 0x00E0151A, \ 1032 0x00000000, \ 1033 0x00000000, \ 1034 0x00000000, \ 1035 0x00000000, \ 1036 0x00000000, \ 1037 0x00000000, \ 1038 0x00000000, \ 1039 0x00000000, \ 1040 0x00000000, \ 1041 0x00000000, \ 1042 0x00000000, \ 1043 0x00000000, \ 1044 0x00000000, \ 1045 0x00000000, \ 1046 0x00906E65, \ 1047 0x00800E60, \ 1048 0x00E00E5D, \ 1049 0x00000000, \ 1050 0x00000000, \ 1051 0x00000000, \ 1052 0x00000000, \ 1053 0x00000000, \ 1054 0x00000000, \ 1055 0x00000000, \ 1056 0x00000000, \ 1057 0x00000000, \ 1058 0x00000000, \ 1059 0x00000000, \ 1060 0x00000000, \ 1061 0x00000000, \ 1062 0x00000000, \ 1063 0x00000000, \ 1064 0x00000000, \ 1065 0x00000000, \ 1066 0x00000000, \ 1067 0x00000000, \ 1068 0x00000000, \ 1069 0x00000000, \ 1070 0x00000000, \ 1071 0x00000000, \ 1072 0x00000000, \ 1073 0x00000000, \ 1074 0x00000000, \ 1075 0x00000000, \ 1076 0x00000000, \ 1077 0x00000000, \ 1078 0x00000000, \ 1079 0x00000000, \ 1080 0x00000000, \ 1081 0x00000000, \ 1082 0x00000000, \ 1083 0x00000000, \ 1084 0x00000000, \ 1085 0x00000000, \ 1086 0x00000000, \ 1087 0x00000000, \ 1088 0x00000000, \ 1089 0x00000000, \ 1090 0x00000000, \ 1091 0x00000000, \ 1092 0x00000000, \ 1093 0x00000000, \ 1094 0x00000000, \ 1095 0x00000000, \ 1096 0x00000000, \ 1097 0x00000000, \ 1098 0x00000000, \ 1099 0x00000000, \ 1100 0x00000000, \ 1101 0x00000000, \ 1102 0x00000000, \ 1103 0x00000000, \ 1104 0x00000000, \ 1105 0x00000000, \ 1106 0x00000000, \ 1107 0x00000000, \ 1108 0x00000000, \ 1109 0x00000000, \ 1110 } 1111 1112 /********************************************************/ 1113 /* Micro code for the D102 E-step */ 1114 /********************************************************/ 1115 1116 /* Parameter values for the D102 E-step */ 1117 #define D102_E_CPUSAVER_DWORD 42 1118 #define D102_E_CPUSAVER_BUNDLE_MAX_DWORD 54 1119 #define D102_E_CPUSAVER_MIN_SIZE_DWORD 46 1120 1121 #define D102_E_RCVBUNDLE_UCODE \ 1122 {\ 1123 0x007D028F, \ 1124 0x0E4204F9, \ 1125 0x14ED0C85, \ 1126 0x14FA14E9, \ 1127 0x0EF70E36, \ 1128 0x1FFF1FFF, \ 1129 0x00E014B9, \ 1130 0x00000000, \ 1131 0x00000000, \ 1132 0x00000000, \ 1133 0x00E014BD, \ 1134 0x00000000, \ 1135 0x00000000, \ 1136 0x00000000, \ 1137 0x00E014D5, \ 1138 0x00000000, \ 1139 0x00000000, \ 1140 0x00000000, \ 1141 0x00000000, \ 1142 0x00000000, \ 1143 0x00000000, \ 1144 0x00000000, \ 1145 0x00E014C1, \ 1146 0x00000000, \ 1147 0x00000000, \ 1148 0x00000000, \ 1149 0x00000000, \ 1150 0x00000000, \ 1151 0x00000000, \ 1152 0x00000000, \ 1153 0x00000000, \ 1154 0x00000000, \ 1155 0x00000000, \ 1156 0x00000000, \ 1157 0x00000000, \ 1158 0x00000000, \ 1159 0x00000000, \ 1160 0x00000000, \ 1161 0x00E014C8, \ 1162 0x00000000, \ 1163 0x00000000, \ 1164 0x00000000, \ 1165 0x00200600, \ 1166 0x00E014EE, \ 1167 0x00000000, \ 1168 0x00000000, \ 1169 0x0030FF80, \ 1170 0x00940E46, \ 1171 0x00038200, \ 1172 0x00102000, \ 1173 0x00E00E43, \ 1174 0x00000000, \ 1175 0x00000000, \ 1176 0x00000000, \ 1177 0x00300006, \ 1178 0x00E014FB, \ 1179 0x00000000, \ 1180 0x00000000, \ 1181 0x00000000, \ 1182 0x00000000, \ 1183 0x00000000, \ 1184 0x00000000, \ 1185 0x00000000, \ 1186 0x00000000, \ 1187 0x00000000, \ 1188 0x00000000, \ 1189 0x00000000, \ 1190 0x00000000, \ 1191 0x00000000, \ 1192 0x00000000, \ 1193 0x00906E41, \ 1194 0x00800E3C, \ 1195 0x00E00E39, \ 1196 0x00000000, \ 1197 0x00906EFD, \ 1198 0x00900EFD, \ 1199 0x00E00EF8, \ 1200 0x00000000, \ 1201 0x00000000, \ 1202 0x00000000, \ 1203 0x00000000, \ 1204 0x00000000, \ 1205 0x00000000, \ 1206 0x00000000, \ 1207 0x00000000, \ 1208 0x00000000, \ 1209 0x00000000, \ 1210 0x00000000, \ 1211 0x00000000, \ 1212 0x00000000, \ 1213 0x00000000, \ 1214 0x00000000, \ 1215 0x00000000, \ 1216 0x00000000, \ 1217 0x00000000, \ 1218 0x00000000, \ 1219 0x00000000, \ 1220 0x00000000, \ 1221 0x00000000, \ 1222 0x00000000, \ 1223 0x00000000, \ 1224 0x00000000, \ 1225 0x00000000, \ 1226 0x00000000, \ 1227 0x00000000, \ 1228 0x00000000, \ 1229 0x00000000, \ 1230 0x00000000, \ 1231 0x00000000, \ 1232 0x00000000, \ 1233 0x00000000, \ 1234 0x00000000, \ 1235 0x00000000, \ 1236 0x00000000, \ 1237 0x00000000, \ 1238 0x00000000, \ 1239 0x00000000, \ 1240 0x00000000, \ 1241 0x00000000, \ 1242 0x00000000, \ 1243 0x00000000, \ 1244 0x00000000, \ 1245 0x00000000, \ 1246 0x00000000, \ 1247 0x00000000, \ 1248 0x00000000, \ 1249 0x00000000, \ 1250 0x00000000, \ 1251 0x00000000, \ 1252 0x00000000, \ 1253 0x00000000, \ 1254 0x00000000, \ 1255 0x00000000, \ 1256 0x00000000, \ 1257 }
Cache object: 738339f01672f70a80dcd7411827312b
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