if_gem_pci.c

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    1 /*-
    2  * Copyright (C) 2001 Eduardo Horvath.
    3  * Copyright (c) 2007 Marius Strobl <marius@FreeBSD.org>
    4  * All rights reserved.
    5  *
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR  ``AS IS'' AND
   17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR  BE LIABLE
   20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   26  * SUCH DAMAGE.
   27  *
   28  *      from: NetBSD: if_gem_pci.c,v 1.7 2001/10/18 15:09:15 thorpej Exp
   29  */
   30 
   31 #include <sys/cdefs.h>
   32 __FBSDID("$FreeBSD: releng/8.4/sys/dev/gem/if_gem_pci.c 242909 2012-11-12 07:47:19Z dim $");
   33 
   34 /*
   35  * PCI bindings for Apple GMAC, Sun ERI and Sun GEM Ethernet controllers
   36  */
   37 
   38 #include <sys/param.h>
   39 #include <sys/systm.h>
   40 #include <sys/bus.h>
   41 #include <sys/kernel.h>
   42 #include <sys/lock.h>
   43 #include <sys/malloc.h>
   44 #include <sys/module.h>
   45 #include <sys/mutex.h>
   46 #include <sys/resource.h>
   47 #include <sys/rman.h>
   48 #include <sys/socket.h>
   49 
   50 #include <net/ethernet.h>
   51 #include <net/if.h>
   52 
   53 #include <machine/bus.h>
   54 #if defined(__powerpc__) || defined(__sparc64__)
   55 #include <dev/ofw/ofw_bus.h>
   56 #include <dev/ofw/openfirm.h>
   57 #include <machine/ofw_machdep.h>
   58 #endif
   59 #include <machine/resource.h>
   60 
   61 #include <dev/gem/if_gemreg.h>
   62 #include <dev/gem/if_gemvar.h>
   63 
   64 #include <dev/pci/pcireg.h>
   65 #include <dev/pci/pcivar.h>
   66 
   67 #include "miibus_if.h"
   68 
   69 static int      gem_pci_attach(device_t dev);
   70 static int      gem_pci_detach(device_t dev);
   71 static int      gem_pci_probe(device_t dev);
   72 static int      gem_pci_resume(device_t dev);
   73 static int      gem_pci_suspend(device_t dev);
   74 
   75 static device_method_t gem_pci_methods[] = {
   76         /* Device interface */
   77         DEVMETHOD(device_probe,         gem_pci_probe),
   78         DEVMETHOD(device_attach,        gem_pci_attach),
   79         DEVMETHOD(device_detach,        gem_pci_detach),
   80         DEVMETHOD(device_suspend,       gem_pci_suspend),
   81         DEVMETHOD(device_resume,        gem_pci_resume),
   82         /* Use the suspend handler here, it is all that is required. */
   83         DEVMETHOD(device_shutdown,      gem_pci_suspend),
   84 
   85         /* MII interface */
   86         DEVMETHOD(miibus_readreg,       gem_mii_readreg),
   87         DEVMETHOD(miibus_writereg,      gem_mii_writereg),
   88         DEVMETHOD(miibus_statchg,       gem_mii_statchg),
   89 
   90         DEVMETHOD_END
   91 };
   92 
   93 static driver_t gem_pci_driver = {
   94         "gem",
   95         gem_pci_methods,
   96         sizeof(struct gem_softc)
   97 };
   98 
   99 DRIVER_MODULE(gem, pci, gem_pci_driver, gem_devclass, 0, 0);
  100 MODULE_DEPEND(gem, pci, 1, 1, 1);
  101 MODULE_DEPEND(gem, ether, 1, 1, 1);
  102 
  103 static const struct gem_pci_dev {
  104         uint32_t        gpd_devid;
  105         int             gpd_variant;
  106         const char      *gpd_desc;
  107 } gem_pci_devlist[] = {
  108         { 0x1101108e, GEM_SUN_ERI,      "Sun ERI 10/100 Ethernet" },
  109         { 0x2bad108e, GEM_SUN_GEM,      "Sun GEM Gigabit Ethernet" },
  110         { 0x0021106b, GEM_APPLE_GMAC,   "Apple UniNorth GMAC Ethernet" },
  111         { 0x0024106b, GEM_APPLE_GMAC,   "Apple Pangea GMAC Ethernet" },
  112         { 0x0032106b, GEM_APPLE_GMAC,   "Apple UniNorth2 GMAC Ethernet" },
  113         { 0x004c106b, GEM_APPLE_K2_GMAC,"Apple K2 GMAC Ethernet" },
  114         { 0x0051106b, GEM_APPLE_GMAC,   "Apple Shasta GMAC Ethernet" },
  115         { 0x006b106b, GEM_APPLE_GMAC,   "Apple Intrepid 2 GMAC Ethernet" },
  116         { 0, 0, NULL }
  117 };
  118 
  119 static int
  120 gem_pci_probe(device_t dev)
  121 {
  122         int i;
  123 
  124         for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
  125                 if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) {
  126                         device_set_desc(dev, gem_pci_devlist[i].gpd_desc);
  127                         return (BUS_PROBE_DEFAULT);
  128                 }
  129         }
  130 
  131         return (ENXIO);
  132 }
  133 
  134 static struct resource_spec gem_pci_res_spec[] = {
  135         { SYS_RES_IRQ, 0, RF_SHAREABLE | RF_ACTIVE },   /* GEM_RES_INTR */
  136         { SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE },     /* GEM_RES_BANK1 */
  137         { -1, 0 }
  138 };
  139 
  140 #define GEM_SHARED_PINS         "shared-pins"
  141 #define GEM_SHARED_PINS_SERDES  "serdes"
  142 
  143 static int
  144 gem_pci_attach(device_t dev)
  145 {
  146         struct gem_softc *sc;
  147         int i;
  148 #if defined(__powerpc__) || defined(__sparc64__)
  149         char buf[sizeof(GEM_SHARED_PINS)];
  150 #else
  151         int j;
  152 #endif
  153 
  154         sc = device_get_softc(dev);
  155         sc->sc_variant = GEM_UNKNOWN;
  156         for (i = 0; gem_pci_devlist[i].gpd_desc != NULL; i++) {
  157                 if (pci_get_devid(dev) == gem_pci_devlist[i].gpd_devid) {
  158                         sc->sc_variant = gem_pci_devlist[i].gpd_variant;
  159                         break;
  160                 }
  161         }
  162         if (sc->sc_variant == GEM_UNKNOWN) {
  163                 device_printf(dev, "unknown adaptor\n");
  164                 return (ENXIO);
  165         }
  166 
  167         pci_enable_busmaster(dev);
  168 
  169         /*
  170          * Some Sun GEMs/ERIs do have their intpin register bogusly set to 0,
  171          * although it should be 1.  Correct that.
  172          */
  173         if (pci_get_intpin(dev) == 0)
  174                 pci_set_intpin(dev, 1);
  175 
  176         /* Set the PCI latency timer for Sun ERIs. */
  177         if (sc->sc_variant == GEM_SUN_ERI)
  178                 pci_write_config(dev, PCIR_LATTIMER, GEM_ERI_LATENCY_TIMER, 1);
  179 
  180         sc->sc_dev = dev;
  181         sc->sc_flags |= GEM_PCI;
  182 
  183         if (bus_alloc_resources(dev, gem_pci_res_spec, sc->sc_res)) {
  184                 device_printf(dev, "failed to allocate resources\n");
  185                 bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
  186                 return (ENXIO);
  187         }
  188 
  189         GEM_LOCK_INIT(sc, device_get_nameunit(dev));
  190 
  191         /*
  192          * Derive GEM_RES_BANK2 from GEM_RES_BANK1.  This seemed cleaner
  193          * with the old way of using copies of the bus tag and handle in
  194          * the softc along with bus_space_*()...
  195          */
  196         sc->sc_res[GEM_RES_BANK2] = malloc(sizeof(*sc->sc_res[GEM_RES_BANK2]),
  197             M_DEVBUF, M_NOWAIT | M_ZERO);
  198         if (sc->sc_res[GEM_RES_BANK2] == NULL) {
  199                 device_printf(dev, "failed to allocate bank2 resource\n");
  200                 goto fail;
  201         }
  202         rman_set_bustag(sc->sc_res[GEM_RES_BANK2],
  203             rman_get_bustag(sc->sc_res[GEM_RES_BANK1]));
  204         bus_space_subregion(rman_get_bustag(sc->sc_res[GEM_RES_BANK1]),
  205             rman_get_bushandle(sc->sc_res[GEM_RES_BANK1]),
  206             GEM_PCI_BANK2_OFFSET, GEM_PCI_BANK2_SIZE,
  207             &sc->sc_res[GEM_RES_BANK2]->r_bushandle);
  208 
  209         /* Determine whether we're running at 66MHz. */
  210         if ((GEM_BANK2_READ_4(sc, GEM_PCI_BIF_CONFIG) &
  211            GEM_PCI_BIF_CNF_M66EN) != 0)
  212                 sc->sc_flags |= GEM_PCI66;
  213 
  214 #if defined(__powerpc__) || defined(__sparc64__)
  215         OF_getetheraddr(dev, sc->sc_enaddr);
  216         if (OF_getprop(ofw_bus_get_node(dev), GEM_SHARED_PINS, buf,
  217             sizeof(buf)) > 0) {
  218                 buf[sizeof(buf) - 1] = '\0';
  219                 if (strcmp(buf, GEM_SHARED_PINS_SERDES) == 0)
  220                         sc->sc_flags |= GEM_SERDES;
  221         }
  222 #else
  223         /*
  224          * Dig out VPD (vital product data) and read NA (network address).
  225          * The VPD resides in the PCI Expansion ROM (PCI FCode) and can't
  226          * be accessed via the PCI capability pointer.
  227          * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later)
  228          * chapter 2 describes the data structure.
  229          */
  230 
  231 #define PCI_ROMHDR_SIZE                 0x1c
  232 #define PCI_ROMHDR_SIG                  0x00
  233 #define PCI_ROMHDR_SIG_MAGIC            0xaa55          /* little endian */
  234 #define PCI_ROMHDR_PTR_DATA             0x18
  235 #define PCI_ROM_SIZE                    0x18
  236 #define PCI_ROM_SIG                     0x00
  237 #define PCI_ROM_SIG_MAGIC               0x52494350      /* "PCIR", endian */
  238                                                         /* reversed */
  239 #define PCI_ROM_VENDOR                  0x04
  240 #define PCI_ROM_DEVICE                  0x06
  241 #define PCI_ROM_PTR_VPD                 0x08
  242 #define PCI_VPDRES_BYTE0                0x00
  243 #define PCI_VPDRES_ISLARGE(x)           ((x) & 0x80)
  244 #define PCI_VPDRES_LARGE_NAME(x)        ((x) & 0x7f)
  245 #define PCI_VPDRES_LARGE_LEN_LSB        0x01
  246 #define PCI_VPDRES_LARGE_LEN_MSB        0x02
  247 #define PCI_VPDRES_LARGE_SIZE           0x03
  248 #define PCI_VPDRES_TYPE_VPD             0x10            /* large */
  249 #define PCI_VPD_KEY0                    0x00
  250 #define PCI_VPD_KEY1                    0x01
  251 #define PCI_VPD_LEN                     0x02
  252 #define PCI_VPD_SIZE                    0x03
  253 
  254 #define GEM_ROM_READ_1(sc, offs)                                        \
  255         GEM_BANK1_READ_1((sc), GEM_PCI_ROM_OFFSET + (offs))
  256 #define GEM_ROM_READ_2(sc, offs)                                        \
  257         GEM_BANK1_READ_2((sc), GEM_PCI_ROM_OFFSET + (offs))
  258 #define GEM_ROM_READ_4(sc, offs)                                        \
  259         GEM_BANK1_READ_4((sc), GEM_PCI_ROM_OFFSET + (offs))
  260 
  261         /* Read PCI Expansion ROM header. */
  262         if (GEM_ROM_READ_2(sc, PCI_ROMHDR_SIG) != PCI_ROMHDR_SIG_MAGIC ||
  263             (i = GEM_ROM_READ_2(sc, PCI_ROMHDR_PTR_DATA)) <
  264             PCI_ROMHDR_SIZE) {
  265                 device_printf(dev, "unexpected PCI Expansion ROM header\n");
  266                 goto fail;
  267         }
  268 
  269         /* Read PCI Expansion ROM data. */
  270         if (GEM_ROM_READ_4(sc, i + PCI_ROM_SIG) != PCI_ROM_SIG_MAGIC ||
  271             GEM_ROM_READ_2(sc, i + PCI_ROM_VENDOR) != pci_get_vendor(dev) ||
  272             GEM_ROM_READ_2(sc, i + PCI_ROM_DEVICE) != pci_get_device(dev) ||
  273             (j = GEM_ROM_READ_2(sc, i + PCI_ROM_PTR_VPD)) <
  274             i + PCI_ROM_SIZE) {
  275                 device_printf(dev, "unexpected PCI Expansion ROM data\n");
  276                 goto fail;
  277         }
  278 
  279         /*
  280          * Read PCI VPD.
  281          * SUNW,pci-gem cards have a single large resource VPD-R tag
  282          * containing one NA.  The VPD used is not in PCI 2.2 standard
  283          * format however.  The length in the resource header is in big
  284          * endian and the end tag is non-standard (0x79) and followed
  285          * by an all-zero "checksum" byte.  Sun calls this a "Fresh
  286          * Choice Ethernet" VPD...
  287          */
  288         if (PCI_VPDRES_ISLARGE(GEM_ROM_READ_1(sc,
  289             j + PCI_VPDRES_BYTE0)) == 0 ||
  290             PCI_VPDRES_LARGE_NAME(GEM_ROM_READ_1(sc,
  291             j + PCI_VPDRES_BYTE0)) != PCI_VPDRES_TYPE_VPD ||
  292             ((GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_LSB) << 8) |
  293             GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_LEN_MSB)) !=
  294             PCI_VPD_SIZE + ETHER_ADDR_LEN ||
  295             GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_KEY0) !=
  296             0x4e /* N */ ||
  297             GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_KEY1) !=
  298             0x41 /* A */ ||
  299             GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_LEN) !=
  300             ETHER_ADDR_LEN ||
  301             GEM_ROM_READ_1(sc, j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_SIZE +
  302             ETHER_ADDR_LEN) != 0x79) {
  303                 device_printf(dev, "unexpected PCI VPD\n");
  304                 goto fail;
  305         }
  306         bus_read_region_1(sc->sc_res[GEM_RES_BANK1],
  307             GEM_PCI_ROM_OFFSET + j + PCI_VPDRES_LARGE_SIZE + PCI_VPD_SIZE,
  308             sc->sc_enaddr, ETHER_ADDR_LEN);
  309 #endif
  310 
  311         if (gem_attach(sc) != 0) {
  312                 device_printf(dev, "could not be attached\n");
  313                 goto fail;
  314         }
  315 
  316         if (bus_setup_intr(dev, sc->sc_res[GEM_RES_INTR], INTR_TYPE_NET |
  317             INTR_MPSAFE, NULL, gem_intr, sc, &sc->sc_ih) != 0) {
  318                 device_printf(dev, "failed to set up interrupt\n");
  319                 gem_detach(sc);
  320                 goto fail;
  321         }
  322         return (0);
  323 
  324  fail:
  325         if (sc->sc_res[GEM_RES_BANK2] != NULL)
  326                 free(sc->sc_res[GEM_RES_BANK2], M_DEVBUF);
  327         GEM_LOCK_DESTROY(sc);
  328         bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
  329         return (ENXIO);
  330 }
  331 
  332 static int
  333 gem_pci_detach(device_t dev)
  334 {
  335         struct gem_softc *sc;
  336 
  337         sc = device_get_softc(dev);
  338         bus_teardown_intr(dev, sc->sc_res[GEM_RES_INTR], sc->sc_ih);
  339         gem_detach(sc);
  340         free(sc->sc_res[GEM_RES_BANK2], M_DEVBUF);
  341         GEM_LOCK_DESTROY(sc);
  342         bus_release_resources(dev, gem_pci_res_spec, sc->sc_res);
  343         return (0);
  344 }
  345 
  346 static int
  347 gem_pci_suspend(device_t dev)
  348 {
  349 
  350         gem_suspend(device_get_softc(dev));
  351         return (0);
  352 }
  353 
  354 static int
  355 gem_pci_resume(device_t dev)
  356 {
  357 
  358         gem_resume(device_get_softc(dev));
  359         return (0);
  360 }
Cache object: 146871999c698d300b850e66eb38ea3a
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FreeBSD/Linux Kernel Cross Reference sys/dev/gem/if_gem_pci.c

FreeBSD/Linux Kernel Cross Reference
sys/dev/gem/if_gem_pci.c
