1 /*-
2 * Copyright (c) 2020 Alstom Group.
3 * Copyright (c) 2020 Semihalf.
4 * Copyright (c) 2015 Justin Hibbits
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31 #define MAXPIN (31)
32
33 #define BIT(x) (1 << (x))
34
35 #define VALID_PIN(u) ((u) >= 0 && (u) <= MAXPIN)
36 #define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT | \
37 GPIO_PIN_OPENDRAIN | GPIO_PIN_PUSHPULL)
38
39 #define GPIO_LOCK(sc) mtx_lock_spin(&(sc)->sc_mtx)
40 #define GPIO_UNLOCK(sc) mtx_unlock_spin(&(sc)->sc_mtx)
41 #define GPIO_LOCK_INIT(sc) \
42 mtx_init(&(sc)->sc_mtx, device_get_nameunit((sc)->dev), \
43 "gpio", MTX_SPIN)
44 #define GPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
45
46 #define GPIO_GPDIR 0x0
47 #define GPIO_GPODR 0x4
48 #define GPIO_GPDAT 0x8
49 #define GPIO_GPIER 0xc
50 #define GPIO_GPIMR 0x10
51 #define GPIO_GPICR 0x14
52 #define GPIO_GPIBE 0x18
53
54 struct qoriq_gpio_softc {
55 device_t dev;
56 device_t busdev;
57 struct mtx sc_mtx;
58 struct resource *sc_mem;
59 struct gpio_pin sc_pins[MAXPIN + 1];
60 };
61
62 device_attach_t qoriq_gpio_attach;
63 device_detach_t qoriq_gpio_detach;
64
65 DECLARE_CLASS(qoriq_gpio_driver);
Cache object: 8675c2c6a1143f99097d76da171fb915
|