The Design and Implementation of the FreeBSD Operating System, Second Edition
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sys/dev/hfa/fore_aali.h

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    1 /*
    2  *
    3  * ===================================
    4  * HARP  |  Host ATM Research Platform
    5  * ===================================
    6  *
    7  *
    8  * This Host ATM Research Platform ("HARP") file (the "Software") is
    9  * made available by Network Computing Services, Inc. ("NetworkCS")
   10  * "AS IS".  NetworkCS does not provide maintenance, improvements or
   11  * support of any kind.
   12  *
   13  * NETWORKCS MAKES NO WARRANTIES OR REPRESENTATIONS, EXPRESS OR IMPLIED,
   14  * INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY
   15  * AND FITNESS FOR A PARTICULAR PURPOSE, AS TO ANY ELEMENT OF THE
   16  * SOFTWARE OR ANY SUPPORT PROVIDED IN CONNECTION WITH THIS SOFTWARE.
   17  * In no event shall NetworkCS be responsible for any damages, including
   18  * but not limited to consequential damages, arising from or relating to
   19  * any use of the Software or related support.
   20  *
   21  * Copyright 1994-1998 Network Computing Services, Inc.
   22  *
   23  * Copies of this Software may be made, however, the above copyright
   24  * notice must be reproduced on all copies.
   25  *
   26  *      @(#) $FreeBSD: releng/5.3/sys/dev/hfa/fore_aali.h 118264 2003-07-31 14:20:07Z harti $
   27  *
   28  */
   29 
   30 /*
   31  * FORE Systems 200-Series Adapter Support
   32  * ---------------------------------------
   33  *
   34  * ATM Adaptation Layer Interface (AALI) definitions
   35  *
   36  */
   37 
   38 #ifndef _FORE_AALI_H
   39 #define _FORE_AALI_H
   40 
   41 /*
   42  * This file contains the definitions required by the FORE ATM Adaptation
   43  * Layer Interface (AALI) specification.
   44  */
   45 
   46 
   47 /*
   48  * Addressing/Pointer definitions
   49  *
   50  * The CP memory only supports 32-bit word accesses (read and write) - thus,
   51  * all memory must be defined and accessed as 32-bit words.  Also, since the
   52  * data transfers are word-sized, we must take care of byte-swapping issues
   53  * from/to little-endian hosts (the CP is an i960 processor, ie big-endian).
   54  *
   55  * All pointers to CP memory areas are actually offsets from the start of 
   56  * the adapter RAM address space.
   57  *
   58  * All CP-resident data structures are declared volatile.
   59  */
   60 typedef void *          H_addr;         /* Host-resident address */
   61 typedef unsigned long   H_dma;          /* Host-resident DMA address */
   62 typedef unsigned long   CP_word;        /* CP-resident word */
   63 typedef unsigned long   CP_addr;        /* CP-resident CP memory offset */
   64 typedef unsigned long   CP_dma;         /* CP-resident DMA address */
   65  
   66 
   67 /*
   68  * Structure defining the CP's shared memory interface to the mon960 program
   69  */
   70 struct mon960 {
   71         CP_word         mon_xmitmon;    /* Uart - host to mon960 (see below) */
   72         CP_word         mon_xmithost;   /* Uart - mon960 to host (see below) */
   73         CP_word         mon_bstat;      /* Boot status word (see below) */
   74         CP_addr         mon_appl;       /* Pointer to application memory area */
   75         CP_word         mon_ver;        /* Mon960 firmware version */
   76 };
   77 typedef volatile struct mon960  Mon960;
   78 
   79 /*
   80  * Pseudo-UART usage
   81  */
   82 #define UART_READY      0x00000000      /* UART is ready for more data */
   83 #define UART_VALID      0x01000000      /* UART character is valid */
   84 #define UART_DATAMASK   0x000000ff      /* UART character data mask */
   85 
   86 /*
   87  * Boot Status Word
   88  */
   89 #define BOOT_COLDSTART  0xc01dc01d      /* CP is performing cold start */
   90 #define BOOT_MONREADY   0x02201958      /* Monitor is waiting for commands */
   91 #define BOOT_FAILTEST   0xadbadbad      /* Monitor failed self-test */
   92 #define BOOT_RUNNING    0xce11feed      /* Microcode downloaded and running */
   93 
   94 #define BOOT_LOOPS      20              /* Loops to wait for CP to boot */
   95 #define BOOT_DELAY      100000          /* Delay (us) for each boot loop */
   96 
   97 
   98 /*
   99  * Supported AALs
  100  */
  101 enum fore_aal {
  102         FORE_AAL_0 = 0,                 /* Cell Service */
  103         FORE_AAL_4 = 4,                 /* AAL 3/4 */
  104         FORE_AAL_5 = 5                  /* AAL 5 */
  105 };
  106 typedef enum fore_aal Fore_aal;
  107 
  108 
  109 /*
  110  * Buffer strategy definition
  111  */
  112 struct buf_strategy {
  113         CP_word         bfs_quelen;     /* Buffer supply queue entries */
  114         CP_word         bfs_bufsize;    /* Buffer size */
  115         CP_word         bfs_cppool;     /* Buffers in CP-resident pool */
  116         CP_word         bfs_entsize;    /* Buffers in each supply queue entry */
  117 };
  118 typedef volatile struct buf_strategy    Buf_strategy;
  119 
  120 /*
  121  * Buffer strategy id
  122  */
  123 #define BUF_STRAT_1     0               /* Buffer strategy one */
  124 #define BUF_STRAT_2     1               /* Buffer strategy two */
  125 
  126 
  127 
  128 #ifdef _KERNEL
  129 /*
  130  * Common Queue Element
  131  *
  132  * Used for Transmit, Receive and Buffer Supply Queues
  133  */
  134 struct com_queue {
  135         CP_dma          cq_descr;       /* Pointer to element descriptor */
  136         CP_dma          cq_status;      /* Pointer to element status word */
  137 };
  138 typedef volatile struct com_queue       Com_queue;
  139 
  140 
  141 /*
  142  * Queue element status word
  143  */
  144 typedef volatile unsigned long  Q_status;
  145 
  146 #define QSTAT_PENDING   0x01            /* Operation is pending */
  147 #define QSTAT_COMPLETED 0x02            /* Operation successfully completed */
  148 #define QSTAT_FREE      0x04            /* Queue element is free/unused */
  149 #define QSTAT_ERROR     0x08            /* Operation encountered an error */
  150 
  151 #define QSTAT_ALIGN     4
  152 
  153 
  154 /*
  155  * PDU Transmit Queue
  156  */
  157 
  158 /*
  159  * PDU Transmit Queue Element
  160  */
  161 typedef volatile struct com_queue       Xmit_queue;
  162 
  163 
  164 /*
  165  * PDU Transmit buffer segment descriptor
  166  */
  167 struct xmit_seg_descr {
  168         H_dma           xsd_buffer;     /* Buffer's DMA address */
  169         u_int           xsd_len;        /* Data length in buffer */
  170 };
  171 typedef struct xmit_seg_descr   Xmit_seg_descr;
  172 
  173 #define XMIT_SEG_ALIGN  4
  174 
  175 
  176 /*
  177  * PDU Transmit descriptor header
  178  */
  179 struct xmit_descr_hdr {
  180         u_long          xdh_cell_hdr;   /* Cell header (minus HEC) */
  181         u_long          xdh_spec;       /* Transmit specification (see below) */
  182         u_long          xdh_rate;       /* Rate control (data/idle cell ratio)*/
  183         u_long          xdh_pad;        /* Pad to quad-word boundary */
  184 };
  185 typedef struct xmit_descr_hdr   Xmit_descr_hdr;
  186 
  187 
  188 #define XMIT_BLK_BITS           5               /* Bits to encode block size */
  189 #define XMIT_MAX_BLK_BITS       4               /* Max bits we can use */
  190 #define XMIT_BLK_SIZE           (1 << XMIT_BLK_BITS)
  191 #define XMIT_SEGS_TO_BLKS(nseg) \
  192                 ((((nseg) * sizeof(Xmit_seg_descr)) \
  193                 + sizeof(Xmit_descr_hdr) + (XMIT_BLK_SIZE - 1)) \
  194                 >> XMIT_BLK_BITS)
  195 #define XMIT_MAX_BLKS           ((1 << XMIT_MAX_BLK_BITS) - 1)
  196 #define XMIT_HDR_SEGS           ((XMIT_BLK_SIZE - sizeof(Xmit_descr_hdr)) \
  197                                         / sizeof(Xmit_seg_descr))
  198 #define XMIT_BLK_SEGS           (XMIT_BLK_SIZE / sizeof(Xmit_seg_descr))
  199 #define XMIT_EXTRA_SEGS         ((XMIT_MAX_BLKS - 1) * XMIT_BLK_SEGS)
  200 #define XMIT_MAX_SEGS           (XMIT_EXTRA_SEGS + XMIT_HDR_SEGS)
  201 
  202 
  203 /*
  204  * PDU Transmit descriptor
  205  */
  206 struct xmit_descr {
  207         Xmit_descr_hdr  xd_hdr;         /* Descriptor header */
  208         Xmit_seg_descr  xd_seg[XMIT_MAX_SEGS];  /* PDU segments */
  209 };
  210 typedef struct xmit_descr       Xmit_descr;
  211 
  212 #define xd_cell_hdr     xd_hdr.xdh_cell_hdr
  213 #define xd_spec         xd_hdr.xdh_spec
  214 #define xd_rate         xd_hdr.xdh_rate
  215 
  216 /*
  217  * Transmit specification
  218  *
  219  *      Bits  0-15 - Total PDU length
  220  *      Bits 16-23 - Number of transmit segments
  221  *      Bits 24-27 - AAL type
  222  *      Bits 28-31 - Interrupt flag
  223  */
  224 #define XDS_SET_SPEC(i,a,n,l)   (((i) << 28) | ((a) << 24) | ((n) << 16) | (l))
  225 #define XDS_GET_LEN(s)          ((s) & 0xffff)
  226 #define XDS_GET_SEGS(s)         (((s) >> 16) & 0xff)
  227 #define XDS_GET_AAL(s)          (((s) >> 24) & 0xf)
  228 #define XDS_GET_INTR(s)         (((s) >> 28) & 0xf)
  229 
  230 #define XMIT_MAX_PDULEN         65535
  231 #define XMIT_DESCR_ALIGN        32
  232 
  233 
  234 
  235 /*
  236  * PDU Receive Queue
  237  */
  238 
  239 /*
  240  * PDU Receive Queue Element
  241  */
  242 typedef volatile struct com_queue       Recv_queue;
  243 
  244 
  245 /*
  246  * Receive PDU buffer segment description
  247  */
  248 struct recv_seg_descr {
  249         H_addr          rsd_handle;     /* Buffer handle (from supply) */
  250         u_int           rsd_len;        /* Data length in buffer */
  251 };
  252 typedef struct recv_seg_descr   Recv_seg_descr;
  253 
  254 
  255 /*
  256  * PDU Receive descriptor header
  257  */
  258 struct recv_descr_hdr {
  259         u_long          rdh_cell_hdr;   /* Cell header (minus HEC) */
  260         u_long          rdh_nsegs;      /* Number of receive segments */
  261 };
  262 typedef struct recv_descr_hdr   Recv_descr_hdr;
  263 
  264 
  265 #define RECV_BLK_SIZE           32
  266 #define RECV_HDR_SEGS           ((RECV_BLK_SIZE - sizeof(Recv_descr_hdr)) \
  267                                         / sizeof(Recv_seg_descr))
  268 #define RECV_BLK_SEGS           (RECV_BLK_SIZE / sizeof(Recv_seg_descr))
  269 #define RECV_MAX_LG_SEGS        ((FORE_IFF_MTU - BUF1_SM_SIZE \
  270                                         + (BUF1_LG_SIZE - 1)) / BUF1_LG_SIZE)
  271 #define RECV_EXTRA_BLKS         (((RECV_MAX_LG_SEGS + 1 - RECV_HDR_SEGS) \
  272                                         + (RECV_BLK_SEGS - 1)) / RECV_BLK_SEGS)
  273 #define RECV_EXTRA_SEGS         (RECV_EXTRA_BLKS * RECV_BLK_SEGS)
  274 #define RECV_MAX_SEGS           (RECV_EXTRA_SEGS + RECV_HDR_SEGS)
  275 
  276 
  277 /*
  278  * PDU Receive descriptor
  279  */
  280 struct recv_descr {
  281         Recv_descr_hdr  rd_hdr;         /* Descriptor header */
  282         Recv_seg_descr  rd_seg[RECV_MAX_SEGS];  /* PDU segments */
  283 };
  284 typedef struct recv_descr       Recv_descr;
  285 
  286 #define rd_cell_hdr     rd_hdr.rdh_cell_hdr
  287 #define rd_nsegs        rd_hdr.rdh_nsegs
  288 
  289 #define RECV_DESCR_ALIGN        32
  290 
  291 
  292 
  293 /*
  294  * Buffer Supply Queue
  295  */
  296 
  297 /*
  298  * Buffer Supply Queue Element
  299  */
  300 typedef volatile struct com_queue       Buf_queue;
  301 
  302 
  303 /*
  304  * Buffer supply descriptor for supplying receive buffers
  305  */
  306 struct buf_descr {
  307         H_addr          bsd_handle;     /* Host-specific buffer handle */
  308         H_dma           bsd_buffer;     /* Buffer DMA address */
  309 };
  310 typedef struct buf_descr        Buf_descr;
  311 
  312 #define BUF_DESCR_ALIGN         32
  313 
  314 
  315 
  316 /*
  317  * Command Queue
  318  */
  319 
  320 /*
  321  * Command Codes
  322  */
  323 typedef volatile unsigned long  Cmd_code;
  324 
  325 #define CMD_INIT        0x01            /* Initialize microcode */
  326 #define CMD_ACT_VCCIN   0x02            /* Activate incoming VCC */
  327 #define CMD_ACT_VCCOUT  0x03            /* Activate outgoing VCC */
  328 #define CMD_DACT_VCCIN  0x04            /* Deactivate incoming VCC */
  329 #define CMD_DACT_VCCOUT 0x05            /* Deactivate outgoing VCC */
  330 #define CMD_GET_STATS   0x06            /* Get adapter statistics */
  331 #define CMD_SET_OC3_REG 0x07            /* Set SUNI OC3 registers */
  332 #define CMD_GET_OC3_REG 0x08            /* Get SUNI OC3 registers */
  333 #define CMD_GET_PROM    0x09            /* Get PROM data */
  334 #define CMD_ZERO_STATS4 0x09            /* FT 4 Zero stats (unimpl) */
  335 #define CMD_GET_PROM4   0x0a            /* FT 4 Get PROM data */
  336 #define CMD_INTR_REQ    0x80            /* Request host interrupt */
  337 
  338 #endif  /* _KERNEL */
  339 
  340 
  341 /*
  342  * Structure defining the parameters for the Initialize command
  343  */
  344 struct init_parms {
  345         CP_word         init_cmd;       /* Command code */
  346         CP_word         init_status;    /* Completion status */
  347         CP_word         init_indisc;    /* Not used */
  348         CP_word         init_numvcc;    /* Number of VCC's supported */
  349         CP_word         init_cmd_elem;  /* # of command queue elements */
  350         CP_word         init_xmit_elem; /* # of transmit queue elements */
  351         CP_word         init_recv_elem; /* # of receive queue elements */
  352         CP_word         init_recv_ext;  /* # of extra receive descr SEGMENTS */
  353         CP_word         init_xmit_ext;  /* # of extra transmit descr SEGMENTS */
  354         CP_word         init_cls_vcc;   /* Not used */
  355         CP_word         init_pad[2];    /* Pad to quad-word boundary */
  356         Buf_strategy    init_buf1s;     /* Buffer strategy - 1 small */
  357         Buf_strategy    init_buf1l;     /* Buffer strategy - 1 large */
  358         Buf_strategy    init_buf2s;     /* Buffer strategy - 2 small */
  359         Buf_strategy    init_buf2l;     /* Buffer strategy - 2 large */
  360 };
  361 typedef volatile struct init_parms      Init_parms;
  362 
  363 
  364 #ifdef _KERNEL
  365 /*
  366  * Structure defining the parameters for the Activate commands
  367  */
  368 struct activate_parms {
  369         CP_word         act_spec;       /* Command specification (see below) */
  370         CP_word         act_vccid;      /* VCC id (VPI=0,VCI=id) */
  371         CP_word         act_batch;      /* # cells in batch (AAL=NULL) */
  372         CP_word         act_pad;        /* Pad to quad-word boundary */
  373 };
  374 typedef volatile struct activate_parms  Activate_parms;
  375 
  376 /*
  377  * Activate command specification
  378  *
  379  *      Bits  0-7  - command code
  380  *      Bits  8-15 - AAL type
  381  *      Bits 16-23 - buffer strategy
  382  *      Bits 24-31 - reserved
  383  */
  384 #define ACT_SET_SPEC(b,a,c)     (((b) << 16) | ((a) << 8) | (c))
  385 #define ACT_GET_CMD(s)          ((s) & 0xff)
  386 #define ACT_GET_AAL(s)          (((s) >> 8) & 0xff)
  387 #define ACT_GET_STRAT(s)        (((s) >> 16) & 0xff)
  388 
  389 
  390 /*
  391  * Structure defining the parameters for the Deactivate commands
  392  */
  393 struct dactivate_parms {
  394         CP_word         dact_cmd;       /* Command code */
  395         CP_word         dact_vccid;     /* VCC id (VPI=0,VCI=id) */
  396         CP_word         dact_pad[2];    /* Pad to quad-word boundary */
  397 };
  398 typedef volatile struct dactivate_parms Dactivate_parms;
  399 
  400 
  401 /*
  402  * Structure defining the parameters for the Get Statistics command
  403  */
  404 struct stats_parms {
  405         CP_word         stats_cmd;      /* Command code */
  406         CP_dma          stats_buffer;   /* DMA address of host stats buffer */
  407         CP_word         stats_pad[2];   /* Pad to quad-word boundary */
  408 };
  409 typedef volatile struct stats_parms     Stats_parms;
  410 
  411 
  412 /*
  413  * Structure defining the parameters for the SUNI OC3 commands
  414  */
  415 struct suni_parms {
  416         CP_word         suni_spec;      /* Command specification (see below) */
  417         CP_dma          suni_buffer;    /* DMA address of host SUNI buffer */
  418         CP_word         suni_pad[2];    /* Pad to quad-word boundary */
  419 };
  420 typedef volatile struct suni_parms      Suni_parms;
  421 
  422 /*
  423  * SUNI OC3 command specification
  424  *
  425  *      Bits  0-7  - command code
  426  *      Bits  8-15 - SUNI register number
  427  *      Bits 16-23 - Value(s) to set in register
  428  *      Bits 24-31 - Mask selecting value bits
  429  */
  430 #define SUNI_SET_SPEC(m,v,r,c)  (((m) << 24) | ((v) << 16) | ((r) << 8) | (c))
  431 #define SUNI_GET_CMD(s)         ((s) & 0xff)
  432 #define SUNI_GET_REG(s)         (((s) >> 8) & 0xff)
  433 #define SUNI_GET_VALUE(s)       (((s) >> 16) & 0xff)
  434 #define SUNI_GET_MASK(s)        (((s) >> 24) & 0xff)
  435 
  436 
  437 /*
  438  * Structure defining the parameters for the Get Prom command
  439  */
  440 struct  prom_parms {
  441         CP_word         prom_cmd;       /* Command code */
  442         CP_dma          prom_buffer;    /* DMA address of host prom buffer */
  443         CP_word         prom_pad[2];    /* Pad to quad-word boundary */
  444 };
  445 typedef volatile struct prom_parms      Prom_parms;
  446 
  447 
  448 /*
  449  * Command Queue Element
  450  */
  451 struct cmd_queue {
  452         union {                         /* Command-specific parameters */
  453                 Activate_parms  cmdqu_act;
  454                 Dactivate_parms cmdqu_dact;
  455                 Stats_parms     cmdqu_stats;
  456                 Suni_parms      cmdqu_suni;
  457                 Prom_parms      cmdqu_prom;
  458         } cmdq_u;
  459         CP_dma          cmdq_status;    /* Pointer to element status word */
  460         CP_word         cmdq_pad[3];    /* Pad to quad-word boundary */
  461 };
  462 #define cmdq_act        cmdq_u.cmdqu_act
  463 #define cmdq_dact       cmdq_u.cmdqu_dact
  464 #define cmdq_stats      cmdq_u.cmdqu_stats
  465 #define cmdq_suni       cmdq_u.cmdqu_suni
  466 #define cmdq_prom       cmdq_u.cmdqu_prom
  467 typedef volatile struct cmd_queue       Cmd_queue;
  468 
  469 #endif  /* _KERNEL */
  470 
  471 
  472 
  473 /*
  474  * Structure defining the CP's shared memory interface to the 
  475  * AALI firmware program (downloaded microcode)
  476  */
  477 struct aali {
  478         CP_addr         aali_cmd_q;     /* Pointer to command queue */
  479         CP_addr         aali_xmit_q;    /* Pointer to transmit queue */
  480         CP_addr         aali_recv_q;    /* Pointer to receive queue */
  481         CP_addr         aali_buf1s_q;   /* Pointer to strategy-1 small queue */
  482         CP_addr         aali_buf1l_q;   /* Pointer to strategy-1 large queue */
  483         CP_addr         aali_buf2s_q;   /* Pointer to strategy-2 small queue */
  484         CP_addr         aali_buf2l_q;   /* Pointer to strategy-2 large queue */
  485         CP_word         aali_intr_ena;  /* Enables interrupts if non-zero */
  486         CP_word         aali_intr_sent; /* Interrupt issued if non-zero */
  487         CP_addr         aali_heap;      /* Pointer to application heap */
  488         CP_word         aali_heaplen;   /* Length of application heap */
  489         CP_word         aali_hostlog;   /* FORE internal use */
  490         CP_word         aali_heartbeat; /* Monitor microcode health */
  491         CP_word         aali_ucode_ver; /* Microcode firmware version */
  492         CP_word         aali_mon_ver;   /* Mon960 version */
  493         CP_word         aali_xmit_tput; /* FORE internal use */
  494 
  495         /* This must be on a quad-word boundary */
  496         Init_parms      aali_init;      /* Initialize command parameters */
  497 };
  498 typedef volatile struct aali    Aali;
  499 
  500 
  501 /*
  502  * CP maintained statistics - DMA'd to host with CMD_GET_STATS command
  503  */
  504 struct stats_taxi {
  505         u_long          taxi_bad_crc;   /* Bad header CRC errors */
  506         u_long          taxi_framing;   /* Framing errors */
  507         u_long          taxi_pad[2];    /* Pad to quad-word boundary */
  508 };
  509 typedef struct stats_taxi       Stats_taxi;
  510 
  511 struct stats_oc3 {
  512         u_long          oc3_sect_bip8;  /* Section 8-bit intrlv parity errors */
  513         u_long          oc3_path_bip8;  /* Path 8-bit intrlv parity errors */
  514         u_long          oc3_line_bip24; /* Line 24-bit intrlv parity errors */
  515         u_long          oc3_line_febe;  /* Line far-end block errors */
  516         u_long          oc3_path_febe;  /* Path far-end block errors */
  517         u_long          oc3_hec_corr;   /* Correctible HEC errors */
  518         u_long          oc3_hec_uncorr; /* Uncorrectible HEC errors */
  519         u_long          oc3_pad;        /* Pad to quad-word boundary */
  520 };
  521 typedef struct stats_oc3        Stats_oc3;
  522 
  523 struct stats_atm {
  524         u_long          atm_xmit;       /* Cells transmitted */
  525         u_long          atm_rcvd;       /* Cells received */
  526         u_long          atm_vpi_range;  /* Cell drops - VPI out of range */
  527         u_long          atm_vpi_noconn; /* Cell drops - no connect for VPI */
  528         u_long          atm_vci_range;  /* Cell drops - VCI out of range */
  529         u_long          atm_vci_noconn; /* Cell drops - no connect for VCI */
  530         u_long          atm_pad[2];     /* Pad to quad-word boundary */
  531 };
  532 typedef struct stats_atm        Stats_atm;
  533 
  534 struct stats_aal0 {
  535         u_long          aal0_xmit;      /* Cells transmitted */
  536         u_long          aal0_rcvd;      /* Cells received */
  537         u_long          aal0_drops;     /* Cell drops */
  538         u_long          aal0_pad;       /* Pad to quad-word boundary */
  539 };
  540 typedef struct stats_aal0       Stats_aal0;
  541 
  542 struct stats_aal4 {
  543         u_long          aal4_xmit;      /* Cells transmitted */
  544         u_long          aal4_rcvd;      /* Cells received */
  545         u_long          aal4_crc;       /* Cells with payload CRC errors */
  546         u_long          aal4_sar_cs;    /* Cells with SAR/CS errors */
  547         u_long          aal4_drops;     /* Cell drops */
  548         u_long          aal4_pdu_xmit;  /* CS PDUs transmitted */
  549         u_long          aal4_pdu_rcvd;  /* CS PDUs received */
  550         u_long          aal4_pdu_errs;  /* CS layer protocol errors */
  551         u_long          aal4_pdu_drops; /* CS PDUs dropped */
  552         u_long          aal4_pad[3];    /* Pad to quad-word boundary */
  553 };
  554 typedef struct stats_aal4       Stats_aal4;
  555 
  556 struct stats_aal5 {
  557         u_long          aal5_xmit;      /* Cells transmitted */
  558         u_long          aal5_rcvd;      /* Cells received */
  559         u_long          aal5_crc_len;   /* Cells with CRC/length errors */
  560         u_long          aal5_drops;     /* Cell drops */
  561         u_long          aal5_pdu_xmit;  /* CS PDUs transmitted */
  562         u_long          aal5_pdu_rcvd;  /* CS PDUs received */
  563         u_long          aal5_pdu_crc;   /* CS PDUs with CRC errors */
  564         u_long          aal5_pdu_errs;  /* CS layer protocol errors */
  565         u_long          aal5_pdu_drops; /* CS PDUs dropped */
  566         u_long          aal5_pad[3];    /* Pad to quad-word boundary */
  567 };
  568 typedef struct stats_aal5       Stats_aal5;
  569 
  570 struct stats_misc {
  571         u_long          buf1_sm_fail;   /* Alloc fail: buffer strat 1 small */
  572         u_long          buf1_lg_fail;   /* Alloc fail: buffer strat 1 large */
  573         u_long          buf2_sm_fail;   /* Alloc fail: buffer strat 2 small */
  574         u_long          buf2_lg_fail;   /* Alloc fail: buffer strat 2 large */
  575         u_long          rcvd_pdu_fail;  /* Received PDU allocation failure */
  576         u_long          carrier_status; /* Carrier status */
  577         u_long          misc_pad[2];    /* Pad to quad-word boundary */
  578 };
  579 typedef struct stats_misc       Stats_misc;
  580 
  581 struct fore_cp_stats {
  582         Stats_taxi      st_cp_taxi;     /* TAXI layer statistics */
  583         Stats_oc3       st_cp_oc3;      /* OC3 layer statistics */
  584         Stats_atm       st_cp_atm;      /* ATM layer statistics */
  585         Stats_aal0      st_cp_aal0;     /* AAL0 layer statistics */
  586         Stats_aal4      st_cp_aal4;     /* AAL3/4 layer statistics */
  587         Stats_aal5      st_cp_aal5;     /* AAL5 layer statistics */
  588         Stats_misc      st_cp_misc;     /* Miscellaneous statistics */
  589 };
  590 typedef struct fore_cp_stats    Fore_cp_stats;
  591 
  592 #define FORE_STATS_ALIGN        32
  593 
  594 /*
  595  * CP PROM data - DMA'd to host with CMD_GET_PROM command
  596  */
  597 struct fore_prom {
  598         u_long          pr_hwver;       /* Hardware version number */
  599         u_long          pr_serno;       /* Serial number */
  600         u_char          pr_mac[8];      /* MAC address */
  601 };
  602 typedef struct fore_prom        Fore_prom;
  603 
  604 #define FORE_PROM_ALIGN         32
  605 
  606 #endif  /* _FORE_AALI_H */

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