Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/hme/if_hme_sbus.c
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1 /*- 2 * Copyright (c) 1999 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Paul Kranenburg. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 * 36 * from: NetBSD: if_hme_sbus.c,v 1.9 2001/11/13 06:58:17 lukem Exp 37 * 38 * $FreeBSD: releng/5.0/sys/dev/hme/if_hme_sbus.c 93043 2002-03-23 19:37:11Z tmm $ 39 */ 40 41 /* 42 * SBus front-end device driver for the HME ethernet device. 43 */ 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/bus.h> 48 #include <sys/kernel.h> 49 #include <sys/resource.h> 50 #include <sys/socket.h> 51 52 #include <machine/bus.h> 53 #include <machine/ofw_machdep.h> 54 #include <machine/resource.h> 55 56 #include <sys/rman.h> 57 58 #include <ofw/openfirm.h> 59 60 #include <net/ethernet.h> 61 #include <net/if.h> 62 #include <net/if_arp.h> 63 #include <net/if_dl.h> 64 #include <net/if_media.h> 65 66 #include <mii/mii.h> 67 #include <mii/miivar.h> 68 69 #include <sparc64/sbus/sbusvar.h> 70 71 #include <hme/if_hmereg.h> 72 #include <hme/if_hmevar.h> 73 74 #include "miibus_if.h" 75 76 struct hme_sbus_softc { 77 struct hme_softc hsc_hme; /* HME device */ 78 struct resource *hsc_seb_res; 79 int hsc_seb_rid; 80 struct resource *hsc_etx_res; 81 int hsc_etx_rid; 82 struct resource *hsc_erx_res; 83 int hsc_erx_rid; 84 struct resource *hsc_mac_res; 85 int hsc_mac_rid; 86 struct resource *hsc_mif_res; 87 int hsc_mif_rid; 88 struct resource *hsc_ires; 89 int hsc_irid; 90 void *hsc_ih; 91 }; 92 93 static int hme_sbus_probe(device_t); 94 static int hme_sbus_attach(device_t); 95 96 static device_method_t hme_sbus_methods[] = { 97 /* Device interface */ 98 DEVMETHOD(device_probe, hme_sbus_probe), 99 DEVMETHOD(device_attach, hme_sbus_attach), 100 101 /* bus interface */ 102 DEVMETHOD(bus_print_child, bus_generic_print_child), 103 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 104 105 /* MII interface */ 106 DEVMETHOD(miibus_readreg, hme_mii_readreg), 107 DEVMETHOD(miibus_writereg, hme_mii_writereg), 108 DEVMETHOD(miibus_statchg, hme_mii_statchg), 109 110 { 0, 0 } 111 }; 112 113 static driver_t hme_sbus_driver = { 114 "hme", 115 hme_sbus_methods, 116 sizeof(struct hme_sbus_softc) 117 }; 118 119 DRIVER_MODULE(if_hme, sbus, hme_sbus_driver, hme_devclass, 0, 0); 120 121 static int 122 hme_sbus_probe(device_t dev) 123 { 124 char *name; 125 126 name = sbus_get_name(dev); 127 if (strcmp(name, "SUNW,qfe") == 0 || 128 strcmp(name, "SUNW,hme") == 0) { 129 device_set_desc(dev, "Sun HME 10/100 Ethernet"); 130 return (0); 131 } 132 return (ENXIO); 133 } 134 135 static int 136 hme_sbus_attach(device_t dev) 137 { 138 struct hme_sbus_softc *hsc = device_get_softc(dev); 139 struct hme_softc *sc = &hsc->hsc_hme; 140 u_int32_t burst; 141 u_long start, count; 142 int error; 143 144 /* 145 * Map five register banks: 146 * 147 * bank 0: HME SEB registers 148 * bank 1: HME ETX registers 149 * bank 2: HME ERX registers 150 * bank 3: HME MAC registers 151 * bank 4: HME MIF registers 152 * 153 */ 154 sc->sc_sebo = sc->sc_etxo = sc->sc_erxo = sc->sc_maco = sc->sc_mifo = 0; 155 hsc->hsc_seb_rid = 0; 156 hsc->hsc_seb_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 157 &hsc->hsc_seb_rid, 0, ~0, 1, RF_ACTIVE); 158 if (hsc->hsc_seb_res == NULL) { 159 device_printf(dev, "cannot map SEB registers\n"); 160 return (ENXIO); 161 } 162 sc->sc_sebt = rman_get_bustag(hsc->hsc_seb_res); 163 sc->sc_sebh = rman_get_bushandle(hsc->hsc_seb_res); 164 165 hsc->hsc_etx_rid = 1; 166 hsc->hsc_etx_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 167 &hsc->hsc_etx_rid, 0, ~0, 1, RF_ACTIVE); 168 if (hsc->hsc_etx_res == NULL) { 169 device_printf(dev, "cannot map ETX registers\n"); 170 goto fail_seb_res; 171 } 172 sc->sc_etxt = rman_get_bustag(hsc->hsc_etx_res); 173 sc->sc_etxh = rman_get_bushandle(hsc->hsc_etx_res); 174 175 hsc->hsc_erx_rid = 2; 176 hsc->hsc_erx_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 177 &hsc->hsc_erx_rid, 0, ~0, 1, RF_ACTIVE); 178 if (hsc->hsc_erx_res == NULL) { 179 device_printf(dev, "cannot map ERX registers\n"); 180 goto fail_etx_res; 181 } 182 sc->sc_erxt = rman_get_bustag(hsc->hsc_erx_res); 183 sc->sc_erxh = rman_get_bushandle(hsc->hsc_erx_res); 184 185 hsc->hsc_mac_rid = 3; 186 hsc->hsc_mac_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 187 &hsc->hsc_mac_rid, 0, ~0, 1, RF_ACTIVE); 188 if (hsc->hsc_mac_res == NULL) { 189 device_printf(dev, "cannot map MAC registers\n"); 190 goto fail_erx_res; 191 } 192 sc->sc_mact = rman_get_bustag(hsc->hsc_mac_res); 193 sc->sc_mach = rman_get_bushandle(hsc->hsc_mac_res); 194 195 /* 196 * At least on some HMEs, the MIF registers seem to be inside the MAC 197 * range, so map try to kluge around it. 198 */ 199 hsc->hsc_mif_rid = 4; 200 hsc->hsc_mif_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 201 &hsc->hsc_mif_rid, 0, ~0, 1, RF_ACTIVE); 202 if (hsc->hsc_mif_res == NULL) { 203 if (bus_get_resource(dev, SYS_RES_MEMORY, hsc->hsc_mif_rid, 204 &start, &count) != 0) { 205 device_printf(dev, "cannot get MIF registers\n"); 206 goto fail_mac_res; 207 } 208 if (start < rman_get_start(hsc->hsc_mac_res) || 209 start + count - 1 > rman_get_end(hsc->hsc_mac_res)) { 210 device_printf(dev, "cannot move MIF registers to MAC " 211 "bank\n"); 212 goto fail_mac_res; 213 } 214 sc->sc_mift = sc->sc_mact; 215 sc->sc_mifh = sc->sc_mach; 216 sc->sc_mifo = sc->sc_maco + start - 217 rman_get_start(hsc->hsc_mac_res); 218 } else { 219 sc->sc_mift = rman_get_bustag(hsc->hsc_mif_res); 220 sc->sc_mifh = rman_get_bushandle(hsc->hsc_mif_res); 221 } 222 223 hsc->hsc_irid = 0; 224 hsc->hsc_ires = bus_alloc_resource(dev, SYS_RES_IRQ, &hsc->hsc_irid, 0, 225 ~0, 1, RF_SHAREABLE | RF_ACTIVE); 226 if (hsc->hsc_ires == NULL) { 227 device_printf(dev, "could not allocate interrupt\n"); 228 error = ENXIO; 229 goto fail_mif_res; 230 } 231 232 233 OF_getetheraddr(dev, sc->sc_arpcom.ac_enaddr); 234 235 burst = sbus_get_burstsz(dev); 236 /* Translate into plain numerical format */ 237 sc->sc_burst = (burst & SBUS_BURST_32) ? 32 : 238 (burst & SBUS_BURST_16) ? 16 : 0; 239 240 sc->sc_pci = 0; /* XXX: should all be done in bus_dma. */ 241 sc->sc_dev = dev; 242 243 if ((error = hme_config(sc)) != 0) { 244 device_printf(dev, "could not be configured\n"); 245 goto fail_ires; 246 } 247 248 249 if ((error = bus_setup_intr(dev, hsc->hsc_ires, INTR_TYPE_NET, hme_intr, 250 sc, &hsc->hsc_ih)) != 0) { 251 device_printf(dev, "couldn't establish interrupt\n"); 252 goto fail_ires; 253 } 254 return (0); 255 256 fail_ires: 257 bus_release_resource(dev, SYS_RES_IRQ, hsc->hsc_irid, hsc->hsc_ires); 258 fail_mif_res: 259 if (hsc->hsc_mif_res != NULL) { 260 bus_release_resource(dev, SYS_RES_MEMORY, hsc->hsc_mif_rid, 261 hsc->hsc_mif_res); 262 } 263 fail_mac_res: 264 bus_release_resource(dev, SYS_RES_MEMORY, hsc->hsc_mac_rid, 265 hsc->hsc_mac_res); 266 fail_erx_res: 267 bus_release_resource(dev, SYS_RES_MEMORY, hsc->hsc_erx_rid, 268 hsc->hsc_erx_res); 269 fail_etx_res: 270 bus_release_resource(dev, SYS_RES_MEMORY, hsc->hsc_etx_rid, 271 hsc->hsc_etx_res); 272 fail_seb_res: 273 bus_release_resource(dev, SYS_RES_MEMORY, hsc->hsc_seb_rid, 274 hsc->hsc_seb_res); 275 return (ENXIO); 276 }
Cache object: 1224af437ae897c590deaefa0722009f
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