The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/hme/if_hmevar.h

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    1 /*-
    2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    3  *
    4  * Copyright (c) 1999 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Paul Kranenburg.
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  *
   19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   29  * POSSIBILITY OF SUCH DAMAGE.
   30  *
   31  *      from: NetBSD: hmevar.h,v 1.5 2000/06/25 01:10:04 eeh Exp
   32  *
   33  * $FreeBSD$
   34  */
   35 
   36 #include <sys/callout.h>
   37 
   38 /*
   39  * Number of receive and transmit descriptors. For each receive descriptor,
   40  * an mbuf cluster is allocated and set up to receive a packet, and a dma map
   41  * is created. Therefore, this number should not be too high to not waste
   42  * memory.
   43  * TX descriptors have no static cost, except for the memory directly allocated
   44  * for them. TX queue elements (the number of which is fixed by HME_NTXQ) hold
   45  * the software state for a transmit job; each has a dmamap allocated for it.
   46  * There may be multiple descriptors allocated to a single queue element.
   47  * HME_NTXQ and HME_NTXSEGS are completely arbitrary.
   48  */
   49 #define HME_NRXDESC     128
   50 #define HME_NTXDESC     256
   51 #define HME_NTXQ        64
   52 #define HME_NTXSEGS     16
   53 
   54 /* Maximum size of a mapped RX buffer. */
   55 #define HME_BUFSZ       1600
   56 
   57 /*
   58  * RX DMA descriptor. The descriptors are preallocated; the dma map is
   59  * reused.
   60  */
   61 struct hme_rxdesc {
   62         struct mbuf     *hrx_m;
   63         bus_dmamap_t    hrx_dmamap;
   64 };
   65 
   66 /* Lazily leave at least one burst size grace space. */
   67 #define HME_DESC_RXLEN(sc, d)                                           \
   68         ulmin(HME_BUFSZ, (d)->hrx_m->m_len - (sc)->sc_burst)
   69 
   70 struct hme_txdesc {
   71         struct mbuf     *htx_m;
   72         bus_dmamap_t    htx_dmamap;
   73         int             htx_lastdesc;
   74         STAILQ_ENTRY(hme_txdesc) htx_q;
   75 };
   76 
   77 STAILQ_HEAD(hme_txdq, hme_txdesc);
   78 
   79 struct hme_ring {
   80         /* Ring Descriptors */
   81         caddr_t         rb_membase;     /* Packet buffer: CPU address */
   82         bus_addr_t      rb_dmabase;     /* Packet buffer: DMA address */
   83         caddr_t         rb_txd;         /* Transmit descriptors */
   84         bus_addr_t      rb_txddma;      /* DMA address of same */
   85         caddr_t         rb_rxd;         /* Receive descriptors */
   86         bus_addr_t      rb_rxddma;      /* DMA address of same */
   87 
   88         /* Ring Descriptor state */
   89         int             rb_tdhead, rb_tdtail;
   90         int             rb_rdtail;
   91         int             rb_td_nbusy;
   92 
   93         /* Descriptors */
   94         struct hme_rxdesc       rb_rxdesc[HME_NRXDESC];
   95         struct hme_txdesc       rb_txdesc[HME_NTXQ];
   96 
   97         struct  hme_txdq        rb_txfreeq;
   98         struct  hme_txdq        rb_txbusyq;
   99 
  100         bus_dmamap_t    rb_spare_dmamap;
  101 };
  102 
  103 struct hme_softc {
  104         struct ifnet    *sc_ifp;
  105         struct ifmedia  sc_ifmedia;
  106         device_t        sc_dev;
  107         device_t        sc_miibus;
  108         struct mii_data *sc_mii;        /* MII media control */
  109         u_char          sc_enaddr[ETHER_ADDR_LEN];
  110         struct callout  sc_tick_ch;     /* tick callout */
  111         int             sc_wdog_timer;  /* watchdog timer */
  112 
  113         /* The following bus handles are to be provided by the bus front-end */
  114         bus_dma_tag_t   sc_pdmatag;     /* bus dma parent tag */
  115         bus_dma_tag_t   sc_cdmatag;     /* control bus dma tag */
  116         bus_dmamap_t    sc_cdmamap;     /* control bus dma handle */
  117         bus_dma_tag_t   sc_rdmatag;     /* RX bus dma tag */
  118         bus_dma_tag_t   sc_tdmatag;     /* RX bus dma tag */
  119         bus_space_handle_t sc_sebh;     /* HME Global registers */
  120         bus_space_handle_t sc_erxh;     /* HME ERX registers */
  121         bus_space_handle_t sc_etxh;     /* HME ETX registers */
  122         bus_space_handle_t sc_mach;     /* HME MAC registers */
  123         bus_space_handle_t sc_mifh;     /* HME MIF registers */
  124         bus_space_tag_t sc_sebt;        /* HME Global registers */
  125         bus_space_tag_t sc_erxt;        /* HME ERX registers */
  126         bus_space_tag_t sc_etxt;        /* HME ETX registers */
  127         bus_space_tag_t sc_mact;        /* HME MAC registers */
  128         bus_space_tag_t sc_mift;        /* HME MIF registers */
  129         int             sc_burst;       /* DVMA burst size in effect */
  130         int             sc_phys[2];     /* MII instance -> PHY map */
  131 
  132         u_int           sc_flags;
  133 #define HME_LINK        (1 << 0)        /* link is up */
  134 #define HME_PCI         (1 << 1)        /* PCI busses are little-endian */
  135 
  136         int             sc_ifflags;
  137         int             sc_csum_features;
  138 
  139         /* Ring descriptor */
  140         struct hme_ring sc_rb;
  141 
  142         struct mtx      sc_lock;
  143 };
  144 
  145 #define HME_LOCK(_sc)           mtx_lock(&(_sc)->sc_lock)
  146 #define HME_UNLOCK(_sc)         mtx_unlock(&(_sc)->sc_lock)
  147 #define HME_LOCK_ASSERT(_sc, _what)     mtx_assert(&(_sc)->sc_lock, (_what))
  148 
  149 extern devclass_t hme_devclass;
  150 
  151 int     hme_config(struct hme_softc *);
  152 void    hme_detach(struct hme_softc *);
  153 void    hme_suspend(struct hme_softc *);
  154 void    hme_resume(struct hme_softc *);
  155 void    hme_intr(void *);
  156 
  157 /* MII methods & callbacks */
  158 int     hme_mii_readreg(device_t, int, int);
  159 int     hme_mii_writereg(device_t, int, int, int);
  160 void    hme_mii_statchg(device_t);

Cache object: 07c7bf60697559368ed315eb10058f99


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