The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/hme/if_hmevar.h

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    1 /*-
    2  * Copyright (c) 1999 The NetBSD Foundation, Inc.
    3  * All rights reserved.
    4  *
    5  * This code is derived from software contributed to The NetBSD Foundation
    6  * by Paul Kranenburg.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. All advertising materials mentioning features or use of this software
   17  *    must display the following acknowledgement:
   18  *        This product includes software developed by the NetBSD
   19  *        Foundation, Inc. and its contributors.
   20  * 4. Neither the name of The NetBSD Foundation nor the names of its
   21  *    contributors may be used to endorse or promote products derived
   22  *    from this software without specific prior written permission.
   23  *
   24  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   25  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   26  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   27  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   28  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   34  * POSSIBILITY OF SUCH DAMAGE.
   35  *
   36  *      from: NetBSD: hmevar.h,v 1.5 2000/06/25 01:10:04 eeh Exp
   37  *
   38  * $FreeBSD$
   39  */
   40 
   41 #include <sys/callout.h>
   42 
   43 /*
   44  * Number of receive and transmit descriptors. For each receive descriptor,
   45  * an mbuf cluster is allocated and set up to receive a packet, and a dma map
   46  * is created. Therefore, this number should not be too high to not waste
   47  * memory.
   48  * TX descriptors have no static cost, except for the memory directly allocated
   49  * for them. TX queue elements (the number of which is fixed by HME_NTXQ) hold
   50  * the software state for a transmit job; each has a dmamap allocated for it.
   51  * There may be multiple descriptors allocated to a single queue element.
   52  * HME_NTXQ and HME_NTXSEGS are completely arbitrary.
   53  */
   54 #define HME_NRXDESC     128
   55 #define HME_NTXDESC     256
   56 #define HME_NTXQ        64
   57 #define HME_NTXSEGS     16
   58 
   59 /* Maximum size of a mapped RX buffer. */
   60 #define HME_BUFSZ       1600
   61 
   62 /*
   63  * RX DMA descriptor. The descriptors are preallocated; the dma map is
   64  * reused.
   65  */
   66 struct hme_rxdesc {
   67         struct mbuf     *hrx_m;
   68         bus_dmamap_t    hrx_dmamap;
   69 };
   70 
   71 /* Lazily leave at least one burst size grace space. */
   72 #define HME_DESC_RXLEN(sc, d)                                           \
   73         ulmin(HME_BUFSZ, (d)->hrx_m->m_len - (sc)->sc_burst)
   74 
   75 struct hme_txdesc {
   76         struct mbuf     *htx_m;
   77         bus_dmamap_t    htx_dmamap;
   78         int             htx_lastdesc;
   79         STAILQ_ENTRY(hme_txdesc) htx_q;
   80 };
   81 
   82 STAILQ_HEAD(hme_txdq, hme_txdesc);
   83 
   84 struct hme_ring {
   85         /* Ring Descriptors */
   86         caddr_t         rb_membase;     /* Packet buffer: CPU address */
   87         bus_addr_t      rb_dmabase;     /* Packet buffer: DMA address */
   88         caddr_t         rb_txd;         /* Transmit descriptors */
   89         bus_addr_t      rb_txddma;      /* DMA address of same */
   90         caddr_t         rb_rxd;         /* Receive descriptors */
   91         bus_addr_t      rb_rxddma;      /* DMA address of same */
   92 
   93         /* Ring Descriptor state */
   94         int             rb_tdhead, rb_tdtail;
   95         int             rb_rdtail;
   96         int             rb_td_nbusy;
   97 
   98         /* Descriptors */
   99         struct hme_rxdesc       rb_rxdesc[HME_NRXDESC];
  100         struct hme_txdesc       rb_txdesc[HME_NTXQ];
  101 
  102         struct  hme_txdq        rb_txfreeq;
  103         struct  hme_txdq        rb_txbusyq;
  104 
  105         bus_dmamap_t    rb_spare_dmamap;
  106 };
  107 
  108 struct hme_softc {
  109         struct ifnet    *sc_ifp;
  110         struct ifmedia  sc_ifmedia;
  111         device_t        sc_dev;
  112         device_t        sc_miibus;
  113         struct mii_data *sc_mii;        /* MII media control */
  114         u_char          sc_enaddr[ETHER_ADDR_LEN];
  115         struct callout  sc_tick_ch;     /* tick callout */
  116         int             sc_wdog_timer;  /* watchdog timer */
  117 
  118         /* The following bus handles are to be provided by the bus front-end */
  119         bus_dma_tag_t   sc_pdmatag;     /* bus dma parent tag */
  120         bus_dma_tag_t   sc_cdmatag;     /* control bus dma tag */
  121         bus_dmamap_t    sc_cdmamap;     /* control bus dma handle */
  122         bus_dma_tag_t   sc_rdmatag;     /* RX bus dma tag */
  123         bus_dma_tag_t   sc_tdmatag;     /* RX bus dma tag */
  124         bus_space_handle_t sc_sebh;     /* HME Global registers */
  125         bus_space_handle_t sc_erxh;     /* HME ERX registers */
  126         bus_space_handle_t sc_etxh;     /* HME ETX registers */
  127         bus_space_handle_t sc_mach;     /* HME MAC registers */
  128         bus_space_handle_t sc_mifh;     /* HME MIF registers */
  129         bus_space_tag_t sc_sebt;        /* HME Global registers */
  130         bus_space_tag_t sc_erxt;        /* HME ERX registers */
  131         bus_space_tag_t sc_etxt;        /* HME ETX registers */
  132         bus_space_tag_t sc_mact;        /* HME MAC registers */
  133         bus_space_tag_t sc_mift;        /* HME MIF registers */
  134         int             sc_burst;       /* DVMA burst size in effect */
  135         int             sc_phys[2];     /* MII instance -> PHY map */
  136 
  137         u_int           sc_flags;
  138 #define HME_LINK        (1 << 0)        /* link is up */
  139 #define HME_PCI         (1 << 1)        /* PCI busses are little-endian */
  140 
  141         int             sc_ifflags;
  142         int             sc_csum_features;
  143 
  144         /* Ring descriptor */
  145         struct hme_ring sc_rb;
  146 
  147         struct mtx      sc_lock;
  148 };
  149 
  150 #define HME_LOCK(_sc)           mtx_lock(&(_sc)->sc_lock)
  151 #define HME_UNLOCK(_sc)         mtx_unlock(&(_sc)->sc_lock)
  152 #define HME_LOCK_ASSERT(_sc, _what)     mtx_assert(&(_sc)->sc_lock, (_what))
  153 
  154 extern devclass_t hme_devclass;
  155 
  156 int     hme_config(struct hme_softc *);
  157 void    hme_detach(struct hme_softc *);
  158 void    hme_suspend(struct hme_softc *);
  159 void    hme_resume(struct hme_softc *);
  160 void    hme_intr(void *);
  161 
  162 /* MII methods & callbacks */
  163 int     hme_mii_readreg(device_t, int, int);
  164 int     hme_mii_writereg(device_t, int, int, int);
  165 void    hme_mii_statchg(device_t);

Cache object: ce37e2fee1960c348c1ee795602dc464


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