The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/hpt27xx/hpt27xx_os_bsd.c

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    1 /*-
    2  * HighPoint RAID Driver for FreeBSD
    3  *
    4  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
    5  *
    6  * Copyright (C) 2005-2011 HighPoint Technologies, Inc. All Rights Reserved.
    7  * All rights reserved.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
   19  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   21  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
   22  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
   23  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
   24  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
   25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
   26  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  *
   30  * $FreeBSD$
   31  */
   32 
   33 #include <dev/hpt27xx/hpt27xx_config.h>
   34 
   35 #include <dev/hpt27xx/os_bsd.h>
   36 
   37 BUS_ADDRESS get_dmapool_phy_addr(void *osext, void * dmapool_virt_addr);
   38 
   39 /* hardware access */
   40 HPT_U8   os_inb  (void *port) { return inb((unsigned)(HPT_UPTR)port); }
   41 HPT_U16  os_inw  (void *port) { return inw((unsigned)(HPT_UPTR)port); }
   42 HPT_U32  os_inl  (void *port) { return inl((unsigned)(HPT_UPTR)port); }
   43 
   44 void os_outb (void *port, HPT_U8 value) { outb((unsigned)(HPT_UPTR)port, (value)); }
   45 void os_outw (void *port, HPT_U16 value) { outw((unsigned)(HPT_UPTR)port, (value)); }
   46 void os_outl (void *port, HPT_U32 value) { outl((unsigned)(HPT_UPTR)port, (value)); }
   47 
   48 void os_insw (void *port, HPT_U16 *buffer, HPT_U32 count)
   49 { insw((unsigned)(HPT_UPTR)port, (void *)buffer, count); }
   50 
   51 void os_outsw(void *port, HPT_U16 *buffer, HPT_U32 count)
   52 { outsw((unsigned)(HPT_UPTR)port, (void *)buffer, count); }
   53 
   54 HPT_U32 __dummy_reg = 0;
   55 
   56 /* PCI configuration space */
   57 HPT_U8  os_pci_readb (void *osext, HPT_U8 offset)
   58 {
   59     return  pci_read_config(((PHBA)osext)->pcidev, offset, 1);
   60 }
   61 
   62 HPT_U16 os_pci_readw (void *osext, HPT_U8 offset)
   63 {
   64     return  pci_read_config(((PHBA)osext)->pcidev, offset, 2);
   65 }
   66 
   67 HPT_U32 os_pci_readl (void *osext, HPT_U8 offset)
   68 {
   69     return  pci_read_config(((PHBA)osext)->pcidev, offset, 4);
   70 }
   71 
   72 void os_pci_writeb (void *osext, HPT_U8 offset, HPT_U8 value)
   73 {
   74     pci_write_config(((PHBA)osext)->pcidev, offset, value, 1);
   75 }
   76 
   77 void os_pci_writew (void *osext, HPT_U8 offset, HPT_U16 value)
   78 {
   79     pci_write_config(((PHBA)osext)->pcidev, offset, value, 2);
   80 }
   81 
   82 void os_pci_writel (void *osext, HPT_U8 offset, HPT_U32 value)
   83 {
   84     pci_write_config(((PHBA)osext)->pcidev, offset, value, 4);
   85 }
   86 
   87 BUS_ADDRESS get_dmapool_phy_addr(void *osext, void * dmapool_virt_addr)
   88 {
   89         return (BUS_ADDRESS)vtophys(dmapool_virt_addr);
   90 }
   91 
   92 /* PCI space access */
   93 HPT_U8 pcicfg_read_byte (HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg)
   94 {
   95         return (HPT_U8)pci_cfgregread(bus, dev, func, reg, 1);
   96 }
   97 HPT_U32 pcicfg_read_dword(HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg)
   98 {
   99         return (HPT_U32)pci_cfgregread(bus, dev, func, reg, 4);
  100 }
  101 void pcicfg_write_byte (HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg, HPT_U8 v)
  102 {
  103         pci_cfgregwrite(bus, dev, func, reg, v, 1);
  104 }
  105 void pcicfg_write_dword(HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg, HPT_U32 v)
  106 {
  107         pci_cfgregwrite(bus, dev, func, reg, v, 4);
  108 }/* PCI space access */
  109 
  110 void *os_map_pci_bar(
  111     void *osext, 
  112     int index,   
  113     HPT_U32 offset,
  114     HPT_U32 length
  115 )
  116 {
  117         PHBA hba = (PHBA)osext;
  118         HPT_U32 base;
  119 
  120         hba->pcibar[index].rid = 0x10 + index * 4;
  121         base = pci_read_config(hba->pcidev, hba->pcibar[index].rid, 4);
  122 
  123         if (base & 1) {
  124                 hba->pcibar[index].type = SYS_RES_IOPORT;
  125                 hba->pcibar[index].res = bus_alloc_resource_any(hba->pcidev,
  126                         hba->pcibar[index].type, &hba->pcibar[index].rid, RF_ACTIVE);
  127                 hba->pcibar[index].base = (void *)(unsigned long)(base & ~0x1);
  128         } else {
  129                 hba->pcibar[index].type = SYS_RES_MEMORY;
  130                 hba->pcibar[index].res = bus_alloc_resource_any(hba->pcidev,
  131                         hba->pcibar[index].type, &hba->pcibar[index].rid, RF_ACTIVE);
  132                 hba->pcibar[index].base = (char *)rman_get_virtual(hba->pcibar[index].res) + offset;
  133         }
  134 
  135         return hba->pcibar[index].base;
  136 }
  137 
  138 void os_unmap_pci_bar(void *osext, void *base)
  139 {
  140         PHBA hba = (PHBA)osext;
  141         int index;
  142         
  143         for (index=0; index<6; index++) {
  144                 if (hba->pcibar[index].base==base) {
  145                         bus_release_resource(hba->pcidev, hba->pcibar[index].type,
  146                                 hba->pcibar[index].rid, hba->pcibar[index].res);
  147                         hba->pcibar[index].base = 0;
  148                         return;
  149                 }
  150         }
  151 }
  152 
  153 void freelist_reserve(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT count)
  154 {
  155     PVBUS_EXT vbus_ext = osext;
  156 
  157     if (vbus_ext->ext_type!=EXT_TYPE_VBUS)
  158         vbus_ext = ((PHBA)osext)->vbus_ext;
  159 
  160     list->next = vbus_ext->freelist_head;
  161     vbus_ext->freelist_head = list;
  162     list->dma = 0;
  163     list->size = size;
  164     list->head = 0;
  165 #if DBG
  166     list->reserved_count =
  167 #endif
  168     list->count = count;
  169 }
  170 
  171 void *freelist_get(struct freelist *list)
  172 {
  173     void * result;
  174     if (list->count) {
  175         HPT_ASSERT(list->head);
  176         result = list->head;
  177         list->head = *(void **)result;
  178         list->count--;
  179         return result;
  180     }
  181     return 0;
  182 }
  183 
  184 void freelist_put(struct freelist * list, void *p)
  185 {
  186     HPT_ASSERT(list->dma==0);
  187     list->count++;
  188     *(void **)p = list->head;
  189     list->head = p;
  190 }
  191 
  192 void freelist_reserve_dma(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT alignment, HPT_UINT count)
  193 {
  194     PVBUS_EXT vbus_ext = osext;
  195 
  196     if (vbus_ext->ext_type!=EXT_TYPE_VBUS)
  197         vbus_ext = ((PHBA)osext)->vbus_ext;
  198 
  199     list->next = vbus_ext->freelist_dma_head;
  200     vbus_ext->freelist_dma_head = list;
  201     list->dma = 1;
  202     list->alignment = alignment;
  203     list->size = size;
  204     list->head = 0;
  205 #if DBG
  206     list->reserved_count =
  207 #endif
  208     list->count = count;
  209 }
  210 
  211 void *freelist_get_dma(struct freelist *list, BUS_ADDRESS *busaddr)
  212 {
  213     void *result;
  214     HPT_ASSERT(list->dma);
  215     result = freelist_get(list);
  216     if (result)
  217         *busaddr = *(BUS_ADDRESS *)((void **)result+1);
  218     return result;
  219 }
  220 
  221 void freelist_put_dma(struct freelist *list, void *p, BUS_ADDRESS busaddr)
  222 {
  223     HPT_ASSERT(list->dma);
  224     list->count++;
  225     *(void **)p = list->head;
  226     *(BUS_ADDRESS *)((void **)p+1) = busaddr;
  227     list->head = p;
  228 }
  229 
  230 HPT_U32 os_get_stamp(void)
  231 {
  232     HPT_U32 stamp;
  233     do { stamp = random(); } while (stamp==0);
  234     return stamp;
  235 }
  236 
  237 void os_stallexec(HPT_U32 microseconds)
  238 {
  239     DELAY(microseconds);
  240 }
  241 
  242 static void os_timer_for_ldm(void *arg)
  243 {
  244         PVBUS_EXT vbus_ext = (PVBUS_EXT)arg;
  245         ldm_on_timer((PVBUS)vbus_ext->vbus);
  246 }
  247 
  248 void  os_request_timer(void * osext, HPT_U32 interval)
  249 {
  250         PVBUS_EXT vbus_ext = osext;
  251 
  252         HPT_ASSERT(vbus_ext->ext_type==EXT_TYPE_VBUS);
  253         callout_reset_sbt(&vbus_ext->timer, SBT_1US * interval, 0,
  254             os_timer_for_ldm, vbus_ext, 0);
  255 }
  256 
  257 HPT_TIME os_query_time(void)
  258 {
  259         return ticks * (1000000 / hz);
  260 }
  261 
  262 void os_schedule_task(void *osext, OSM_TASK *task)
  263 {
  264         PVBUS_EXT vbus_ext = osext;
  265         
  266         HPT_ASSERT(task->next==0);
  267         
  268         if (vbus_ext->tasks==0)
  269                 vbus_ext->tasks = task;
  270         else {
  271                 OSM_TASK *t = vbus_ext->tasks;
  272                 while (t->next) t = t->next;
  273                 t->next = task;
  274         }
  275 
  276         if (vbus_ext->worker.ta_context)
  277                 TASK_ENQUEUE(&vbus_ext->worker);
  278 }
  279 
  280 int os_revalidate_device(void *osext, int id)
  281 {
  282 
  283     return 0;
  284 }
  285 
  286 int os_query_remove_device(void *osext, int id)
  287 {
  288         return 0;
  289 }
  290 
  291 HPT_U8 os_get_vbus_seq(void *osext)
  292 {
  293     return ((PVBUS_EXT)osext)->sim->path_id;
  294 }
  295 
  296 int  os_printk(char *fmt, ...)
  297 {
  298     va_list args;
  299     static char buf[512];
  300 
  301     va_start(args, fmt);
  302     vsnprintf(buf, sizeof(buf), fmt, args);
  303     va_end(args);
  304     return printf("%s: %s\n", driver_name, buf);
  305 }
  306 
  307 #if DBG
  308 void os_check_stack(const char *location, int size){}
  309 
  310 void __os_dbgbreak(const char *file, int line)
  311 {
  312     printf("*** break at %s:%d ***", file, line);
  313     while (1);
  314 }
  315 
  316 int hpt_dbg_level = 1;
  317 #endif

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