1 /*-
2 * Copyright (c) 2011 HighPoint Technologies, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28
29 #include <dev/hpt27xx/hpt27xx_config.h>
30
31 #ifndef HPT_INTF_H
32 #define HPT_INTF_H
33
34 #if defined(__BIG_ENDIAN__)&&!defined(__BIG_ENDIAN_BITFIELD)
35 #define __BIG_ENDIAN_BITFIELD
36 #endif
37
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41
42 #ifndef __GNUC__
43 #define __attribute__(x)
44 #endif
45
46 #pragma pack(1)
47
48 /*
49 * Version of this interface.
50 * The user mode application must first issue a hpt_get_version() call to
51 * check HPT_INTERFACE_VERSION. When an utility using newer version interface
52 * is used with old version drivers, it must call only the functions that
53 * driver supported.
54 * A new version interface should only add ioctl functions; it should implement
55 * all old version functions without change their definition.
56 */
57 #define __this_HPT_INTERFACE_VERSION 0x02010000
58
59 #ifndef HPT_INTERFACE_VERSION
60 #error "You must define HPT_INTERFACE_VERSION you implemented"
61 #endif
62
63 #if HPT_INTERFACE_VERSION > __this_HPT_INTERFACE_VERSION
64 #error "HPT_INTERFACE_VERSION is invalid"
65 #endif
66
67 /*
68 * DEFINITION
69 * Logical device --- a device that can be accessed by OS.
70 * Physical device --- device attached to the controller.
71 * A logical device can be simply a physical device.
72 *
73 * Each logical and physical device has a 32bit ID. GUI will use this ID
74 * to identify devices.
75 * 1. The ID must be unique.
76 * 2. The ID must be immutable. Once an ID is assigned to a device, it
77 * must not change when system is running and the device exists.
78 * 3. The ID of logical device must be NOT reusable. If a device is
79 * removed, other newly created logical device must not use the same ID.
80 * 4. The ID must not be zero or 0xFFFFFFFF.
81 */
82 typedef HPT_U32 DEVICEID;
83
84 /*
85 * logical device type.
86 * Identify array (logical device) and physical device.
87 */
88 #define LDT_ARRAY 1
89 #define LDT_DEVICE 2
90
91 /*
92 * Array types
93 * GUI will treat all array as 1-level RAID. No RAID0/1 or RAID1/0.
94 * A RAID0/1 device is type AT_RAID1. A RAID1/0 device is type AT_RAID0.
95 * Their members may be another array of type RAID0 or RAID1.
96 */
97 #define AT_UNKNOWN 0
98 #define AT_RAID0 1
99 #define AT_RAID1 2
100 #define AT_RAID5 3
101 #define AT_RAID6 4
102 #define AT_RAID3 5
103 #define AT_RAID4 6
104 #define AT_JBOD 7
105 #define AT_RAID1E 8
106
107 /*
108 * physical device type
109 */
110 #define PDT_UNKNOWN 0
111 #define PDT_HARDDISK 1
112 #define PDT_CDROM 2
113 #define PDT_TAPE 3
114
115 /*
116 * Some constants.
117 */
118 #define MAX_NAME_LENGTH 36
119 #define MAX_ARRAYNAME_LEN 16
120
121 #define MAX_ARRAY_MEMBERS_V1 8
122
123 #ifndef MAX_ARRAY_MEMBERS_V2
124 #define MAX_ARRAY_MEMBERS_V2 16
125 #endif
126
127 #ifndef MAX_ARRAY_MEMBERS_V3
128 #define MAX_ARRAY_MEMBERS_V3 64
129 #endif
130
131 /* keep definition for source code compatiblity */
132 #define MAX_ARRAY_MEMBERS MAX_ARRAY_MEMBERS_V1
133
134 /*
135 * io commands
136 * GUI use these commands to do IO on logical/physical devices.
137 */
138 #define IO_COMMAND_READ 1
139 #define IO_COMMAND_WRITE 2
140
141
142
143 /*
144 * array flags
145 */
146 #define ARRAY_FLAG_DISABLED 0x00000001 /* The array is disabled */
147 #define ARRAY_FLAG_NEEDBUILDING 0x00000002 /* array data need to be rebuilt */
148 #define ARRAY_FLAG_REBUILDING 0x00000004 /* array is in rebuilding process */
149 #define ARRAY_FLAG_BROKEN 0x00000008 /* broken but may still working */
150 #define ARRAY_FLAG_BOOTDISK 0x00000010 /* array has a active partition */
151
152 #define ARRAY_FLAG_BOOTMARK 0x00000040 /* array has boot mark set */
153 #define ARRAY_FLAG_NEED_AUTOREBUILD 0x00000080 /* auto-rebuild should start */
154 #define ARRAY_FLAG_VERIFYING 0x00000100 /* is being verified */
155 #define ARRAY_FLAG_INITIALIZING 0x00000200 /* is being initialized */
156 #define ARRAY_FLAG_TRANSFORMING 0x00000400 /* tranform in progress */
157 #define ARRAY_FLAG_NEEDTRANSFORM 0x00000800 /* array need tranform */
158 #define ARRAY_FLAG_NEEDINITIALIZING 0x00001000 /* the array's initialization hasn't finished*/
159 #define ARRAY_FLAG_BROKEN_REDUNDANT 0x00002000 /* broken but redundant (raid6) */
160 #define ARRAY_FLAG_RAID15PLUS 0x80000000 /* display this RAID 1 as RAID 1.5 */
161 /*
162 * device flags
163 */
164 #define DEVICE_FLAG_DISABLED 0x00000001 /* device is disabled */
165 #define DEVICE_FLAG_BOOTDISK 0x00000002 /* disk has a active partition */
166 #define DEVICE_FLAG_BOOTMARK 0x00000004 /* disk has boot mark set */
167 #define DEVICE_FLAG_WITH_601 0x00000008 /* has HPT601 connected */
168 #define DEVICE_FLAG_SATA 0x00000010 /* SATA or SAS device */
169 #define DEVICE_FLAG_ON_PM_PORT 0x00000020 /* PM port */
170 #define DEVICE_FLAG_SAS 0x00000040 /* SAS device */
171 #define DEVICE_FLAG_IN_ENCLOSURE 0x00000080 /* PathId is enclosure# */
172 #define DEVICE_FLAG_UNINITIALIZED 0x00010000 /* device is not initialized, can't be used to create array */
173 #define DEVICE_FLAG_LEGACY 0x00020000 /* single disk & mbr contains at least one partition */
174
175 #define DEVICE_FLAG_IS_SPARE 0x80000000 /* is a spare disk */
176
177 /*
178 * array states used by hpt_set_array_state()
179 */
180 /* old defines */
181 #define MIRROR_REBUILD_START 1
182 #define MIRROR_REBUILD_ABORT 2
183 #define MIRROR_REBUILD_COMPLETE 3
184 /* new defines */
185 #define AS_REBUILD_START 1
186 #define AS_REBUILD_ABORT 2
187 #define AS_REBUILD_PAUSE AS_REBUILD_ABORT
188 #define AS_REBUILD_COMPLETE 3
189 #define AS_VERIFY_START 4
190 #define AS_VERIFY_ABORT 5
191 #define AS_VERIFY_COMPLETE 6
192 #define AS_INITIALIZE_START 7
193 #define AS_INITIALIZE_ABORT 8
194 #define AS_INITIALIZE_COMPLETE 9
195 #define AS_VERIFY_FAILED 10
196 #define AS_REBUILD_STOP 11
197 #define AS_SAVE_STATE 12
198 #define AS_TRANSFORM_START 13
199 #define AS_TRANSFORM_ABORT 14
200
201 /************************************************************************
202 * ioctl code
203 * It would be better if ioctl code are the same on different platforms,
204 * but we must not conflict with system defined ioctl code.
205 ************************************************************************/
206 #if defined(LINUX) || defined(__FreeBSD_version) || defined(linux)
207 #define HPT_CTL_CODE(x) (x+0xFF00)
208 #define HPT_CTL_CODE_LINUX_TO_IOP(x) ((x)-0xff00)
209 #elif defined(_MS_WIN32_) || defined(WIN32)
210
211 #ifndef CTL_CODE
212 #define CTL_CODE( DeviceType, Function, Method, Access ) \
213 (((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method))
214 #endif
215 #define HPT_CTL_CODE(x) CTL_CODE(0x370, 0x900+(x), 0, 0)
216 #define HPT_CTL_CODE_WIN32_TO_IOP(x) ((((x) & 0xffff)>>2)-0x900)
217
218 #else
219 #define HPT_CTL_CODE(x) (x)
220 #endif
221
222 #define HPT_IOCTL_GET_VERSION HPT_CTL_CODE(0)
223 #define HPT_IOCTL_GET_CONTROLLER_COUNT HPT_CTL_CODE(1)
224 #define HPT_IOCTL_GET_CONTROLLER_INFO HPT_CTL_CODE(2)
225 #define HPT_IOCTL_GET_CHANNEL_INFO HPT_CTL_CODE(3)
226 #define HPT_IOCTL_GET_LOGICAL_DEVICES HPT_CTL_CODE(4)
227 #define HPT_IOCTL_GET_DEVICE_INFO HPT_CTL_CODE(5)
228 #define HPT_IOCTL_CREATE_ARRAY HPT_CTL_CODE(6)
229 #define HPT_IOCTL_DELETE_ARRAY HPT_CTL_CODE(7)
230 #define HPT_IOCTL_ARRAY_IO HPT_CTL_CODE(8)
231 #define HPT_IOCTL_DEVICE_IO HPT_CTL_CODE(9)
232 #define HPT_IOCTL_GET_EVENT HPT_CTL_CODE(10)
233 #define HPT_IOCTL_REBUILD_MIRROR HPT_CTL_CODE(11)
234 /* use HPT_IOCTL_REBUILD_DATA_BLOCK from now on */
235 #define HPT_IOCTL_REBUILD_DATA_BLOCK HPT_IOCTL_REBUILD_MIRROR
236 #define HPT_IOCTL_ADD_SPARE_DISK HPT_CTL_CODE(12)
237 #define HPT_IOCTL_REMOVE_SPARE_DISK HPT_CTL_CODE(13)
238 #define HPT_IOCTL_ADD_DISK_TO_ARRAY HPT_CTL_CODE(14)
239 #define HPT_IOCTL_SET_ARRAY_STATE HPT_CTL_CODE(15)
240 #define HPT_IOCTL_SET_ARRAY_INFO HPT_CTL_CODE(16)
241 #define HPT_IOCTL_SET_DEVICE_INFO HPT_CTL_CODE(17)
242 #define HPT_IOCTL_RESCAN_DEVICES HPT_CTL_CODE(18)
243 #define HPT_IOCTL_GET_DRIVER_CAPABILITIES HPT_CTL_CODE(19)
244 #define HPT_IOCTL_GET_601_INFO HPT_CTL_CODE(20)
245 #define HPT_IOCTL_SET_601_INFO HPT_CTL_CODE(21)
246 #define HPT_IOCTL_LOCK_DEVICE HPT_CTL_CODE(22)
247 #define HPT_IOCTL_UNLOCK_DEVICE HPT_CTL_CODE(23)
248 #define HPT_IOCTL_IDE_PASS_THROUGH HPT_CTL_CODE(24)
249 #define HPT_IOCTL_VERIFY_DATA_BLOCK HPT_CTL_CODE(25)
250 #define HPT_IOCTL_INITIALIZE_DATA_BLOCK HPT_CTL_CODE(26)
251 #define HPT_IOCTL_ADD_DEDICATED_SPARE HPT_CTL_CODE(27)
252 #define HPT_IOCTL_DEVICE_IO_EX HPT_CTL_CODE(28)
253 #define HPT_IOCTL_SET_BOOT_MARK HPT_CTL_CODE(29)
254 #define HPT_IOCTL_QUERY_REMOVE HPT_CTL_CODE(30)
255 #define HPT_IOCTL_REMOVE_DEVICES HPT_CTL_CODE(31)
256 #define HPT_IOCTL_CREATE_ARRAY_V2 HPT_CTL_CODE(32)
257 #define HPT_IOCTL_GET_DEVICE_INFO_V2 HPT_CTL_CODE(33)
258 #define HPT_IOCTL_SET_DEVICE_INFO_V2 HPT_CTL_CODE(34)
259 #define HPT_IOCTL_REBUILD_DATA_BLOCK_V2 HPT_CTL_CODE(35)
260 #define HPT_IOCTL_VERIFY_DATA_BLOCK_V2 HPT_CTL_CODE(36)
261 #define HPT_IOCTL_INITIALIZE_DATA_BLOCK_V2 HPT_CTL_CODE(37)
262 #define HPT_IOCTL_LOCK_DEVICE_V2 HPT_CTL_CODE(38)
263 #define HPT_IOCTL_DEVICE_IO_V2 HPT_CTL_CODE(39)
264 #define HPT_IOCTL_DEVICE_IO_EX_V2 HPT_CTL_CODE(40)
265 #define HPT_IOCTL_CREATE_TRANSFORM HPT_CTL_CODE(41)
266 #define HPT_IOCTL_STEP_TRANSFORM HPT_CTL_CODE(42)
267 #define HPT_IOCTL_SET_VDEV_INFO HPT_CTL_CODE(43)
268 #define HPT_IOCTL_CALC_MAX_CAPACITY HPT_CTL_CODE(44)
269 #define HPT_IOCTL_INIT_DISKS HPT_CTL_CODE(45)
270 #define HPT_IOCTL_GET_DEVICE_INFO_V3 HPT_CTL_CODE(46)
271 #define HPT_IOCTL_GET_CONTROLLER_INFO_V2 HPT_CTL_CODE(47)
272 #define HPT_IOCTL_I2C_TRANSACTION HPT_CTL_CODE(48)
273 #define HPT_IOCTL_GET_PARAMETER_LIST HPT_CTL_CODE(49)
274 #define HPT_IOCTL_GET_PARAMETER HPT_CTL_CODE(50)
275 #define HPT_IOCTL_SET_PARAMETER HPT_CTL_CODE(51)
276 #define HPT_IOCTL_GET_DRIVER_CAPABILITIES_V2 HPT_CTL_CODE(52)
277 #define HPT_IOCTL_GET_CHANNEL_INFO_V2 HPT_CTL_CODE(53)
278 #define HPT_IOCTL_GET_CONTROLLER_INFO_V3 HPT_CTL_CODE(54)
279 #define HPT_IOCTL_GET_DEVICE_INFO_V4 HPT_CTL_CODE(55)
280 #define HPT_IOCTL_CREATE_ARRAY_V3 HPT_CTL_CODE(56)
281 #define HPT_IOCTL_CREATE_TRANSFORM_V2 HPT_CTL_CODE(57)
282 #define HPT_IOCTL_CALC_MAX_CAPACITY_V2 HPT_CTL_CODE(58)
283 #define HPT_IOCTL_SCSI_PASSTHROUGH HPT_CTL_CODE(59)
284 #define HPT_IOCTL_GET_PHYSICAL_DEVICES HPT_CTL_CODE(60)
285 #define HPT_IOCTL_GET_ENCLOSURE_COUNT HPT_CTL_CODE(61)
286 #define HPT_IOCTL_GET_ENCLOSURE_INFO HPT_CTL_CODE(62)
287 #define HPT_IOCTL_GET_PERFMON_STATUS HPT_CTL_CODE(63)
288 #define HPT_IOCTL_SET_PERFMON_STATUS HPT_CTL_CODE(64)
289 #define HPT_IOCTL_GET_PERFMON_DATA HPT_CTL_CODE(65)
290 #define HPT_IOCTL_IDE_PASS_THROUGH_V2 HPT_CTL_CODE(66)
291 #define HPT_IOCTL_GET_ENCLOSURE_INFO_V2 HPT_CTL_CODE(67)
292 #define HPT_IOCTL_GET_ENCLOSURE_INFO_V3 HPT_CTL_CODE(68)
293
294 #define HPT_IOCTL_GET_CONTROLLER_IDS HPT_CTL_CODE(100)
295 #define HPT_IOCTL_GET_DCB HPT_CTL_CODE(101)
296
297 #define HPT_IOCTL_EPROM_IO HPT_CTL_CODE(102)
298 #define HPT_IOCTL_GET_CONTROLLER_VENID HPT_CTL_CODE(103)
299
300 /************************************************************************
301 * shared data structures
302 ************************************************************************/
303
304 /*
305 * Chip Type
306 */
307 #define CHIP_TYPE_HPT366 1
308 #define CHIP_TYPE_HPT368 2
309 #define CHIP_TYPE_HPT370 3
310 #define CHIP_TYPE_HPT370A 4
311 #define CHIP_TYPE_HPT370B 5
312 #define CHIP_TYPE_HPT374 6
313 #define CHIP_TYPE_HPT372 7
314 #define CHIP_TYPE_HPT372A 8
315 #define CHIP_TYPE_HPT302 9
316 #define CHIP_TYPE_HPT371 10
317 #define CHIP_TYPE_HPT372N 11
318 #define CHIP_TYPE_HPT302N 12
319 #define CHIP_TYPE_HPT371N 13
320 #define CHIP_TYPE_SI3112A 14
321 #define CHIP_TYPE_ICH5 15
322 #define CHIP_TYPE_ICH5R 16
323 #define CHIP_TYPE_MV50XX 20
324 #define CHIP_TYPE_MV60X1 21
325 #define CHIP_TYPE_MV60X2 22
326 #define CHIP_TYPE_MV70X2 23
327 #define CHIP_TYPE_MV5182 24
328 #define CHIP_TYPE_IOP331 31
329 #define CHIP_TYPE_IOP333 32
330 #define CHIP_TYPE_IOP341 33
331 #define CHIP_TYPE_IOP348 34
332
333 /*
334 * Chip Flags
335 */
336 #define CHIP_SUPPORT_ULTRA_66 0x20
337 #define CHIP_SUPPORT_ULTRA_100 0x40
338 #define CHIP_HPT3XX_DPLL_MODE 0x80
339 #define CHIP_SUPPORT_ULTRA_133 0x01
340 #define CHIP_SUPPORT_ULTRA_150 0x02
341 #define CHIP_MASTER 0x04
342 #define CHIP_SUPPORT_SATA_300 0x08
343
344 #define HPT_SPIN_UP_MODE_NOSUPPORT 0
345 #define HPT_SPIN_UP_MODE_FULL 1
346 #define HPT_SPIN_UP_MODE_STANDBY 2
347
348 typedef struct _DRIVER_CAPABILITIES {
349 HPT_U32 dwSize;
350
351 HPT_U8 MaximumControllers; /* maximum controllers the driver can support */
352 HPT_U8 SupportCrossControllerRAID; /* 1-support, 0-not support */
353 HPT_U8 MinimumBlockSizeShift; /* minimum block size shift */
354 HPT_U8 MaximumBlockSizeShift; /* maximum block size shift */
355
356 HPT_U8 SupportDiskModeSetting;
357 HPT_U8 SupportSparePool;
358 HPT_U8 MaximumArrayNameLength;
359 /* only one HPT_U8 left here! */
360 #ifdef __BIG_ENDIAN_BITFIELD
361 HPT_U8 reserved: 2;
362 HPT_U8 SupportPerformanceMonitor: 1;
363 HPT_U8 SupportVariableSectorSize: 1;
364 HPT_U8 SupportHotSwap: 1;
365 HPT_U8 HighPerformanceRAID1: 1;
366 HPT_U8 RebuildProcessInDriver: 1;
367 HPT_U8 SupportDedicatedSpare: 1;
368 #else
369 HPT_U8 SupportDedicatedSpare: 1; /* call hpt_add_dedicated_spare() for dedicated spare. */
370 HPT_U8 RebuildProcessInDriver: 1; /* Windows only. used by mid layer for rebuild control. */
371 HPT_U8 HighPerformanceRAID1: 1;
372 HPT_U8 SupportHotSwap: 1;
373 HPT_U8 SupportVariableSectorSize: 1;
374 HPT_U8 SupportPerformanceMonitor: 1;
375 HPT_U8 reserved: 2;
376 #endif
377
378
379 HPT_U8 SupportedRAIDTypes[16];
380 /* maximum members in an array corresponding to SupportedRAIDTypes */
381 HPT_U8 MaximumArrayMembers[16];
382 }
383 DRIVER_CAPABILITIES, *PDRIVER_CAPABILITIES;
384
385 typedef struct _DRIVER_CAPABILITIES_V2 {
386 DRIVER_CAPABILITIES v1;
387 HPT_U8 SupportedCachePolicies[16];
388 HPT_U32 reserved[17];
389 }
390 DRIVER_CAPABILITIES_V2, *PDRIVER_CAPABILITIES_V2;
391
392 /*
393 * Controller information.
394 */
395 typedef struct _CONTROLLER_INFO {
396 HPT_U8 ChipType; /* chip type */
397 HPT_U8 InterruptLevel; /* IRQ level */
398 HPT_U8 NumBuses; /* bus count */
399 HPT_U8 ChipFlags;
400
401 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */
402 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */
403
404 } CONTROLLER_INFO, *PCONTROLLER_INFO;
405
406 #if HPT_INTERFACE_VERSION>=0x01020000
407 typedef struct _CONTROLLER_INFO_V2 {
408 HPT_U8 ChipType; /* chip type */
409 HPT_U8 InterruptLevel; /* IRQ level */
410 HPT_U8 NumBuses; /* bus count */
411 HPT_U8 ChipFlags;
412
413 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */
414 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */
415
416 HPT_U32 GroupId; /* low 32bit of vbus pointer the controller belongs
417 * the master controller has CHIP_MASTER flag set*/
418 HPT_U8 pci_tree;
419 HPT_U8 pci_bus;
420 HPT_U8 pci_device;
421 HPT_U8 pci_function;
422
423 HPT_U32 ExFlags;
424 } CONTROLLER_INFO_V2, *PCONTROLLER_INFO_V2;
425
426
427 #define CEXF_IOPModel 1
428 #define CEXF_SDRAMSize 2
429 #define CEXF_BatteryInstalled 4
430 #define CEXF_BatteryStatus 8
431 #define CEXF_BatteryVoltage 0x10
432 #define CEXF_BatteryBackupTime 0x20
433 #define CEXF_FirmwareVersion 0x40
434 #define CEXF_SerialNumber 0x80
435 #define CEXF_BatteryTemperature 0x100
436 #define CEXF_Power12v 0x200
437 #define CEXF_Power5v 0x400
438 #define CEXF_Power3p3v 0x800
439 #define CEXF_Power2p5v 0x1000
440 #define CEXF_Power1p8v 0x2000
441 #define CEXF_Core1p8v 0x4000
442 #define CEXF_Core1p2v 0x8000
443 #define CEXF_DDR1p8v 0x10000
444 #define CEXF_DDR1p8vRef 0x20000
445 #define CEXF_CPUTemperature 0x40000
446 #define CEXF_BoardTemperature 0x80000
447 #define CEXF_FanSpeed 0x100000
448 #define CEXF_Core1p0v 0x200000
449 #define CEXF_Fan2Speed 0x400000
450
451 typedef struct _CONTROLLER_INFO_V3 {
452 HPT_U8 ChipType;
453 HPT_U8 InterruptLevel;
454 HPT_U8 NumBuses;
455 HPT_U8 ChipFlags;
456 HPT_U8 szProductID[MAX_NAME_LENGTH];
457 HPT_U8 szVendorID[MAX_NAME_LENGTH];
458 HPT_U32 GroupId;
459 HPT_U8 pci_tree;
460 HPT_U8 pci_bus;
461 HPT_U8 pci_device;
462 HPT_U8 pci_function;
463 HPT_U32 ExFlags;
464 HPT_U8 IOPModel[32];
465 HPT_U32 SDRAMSize;
466 HPT_U8 BatteryInstalled;
467 HPT_U8 BatteryStatus;
468 HPT_U16 BatteryVoltage;
469 HPT_U32 BatteryBackupTime;
470 HPT_U32 FirmwareVersion;
471 HPT_U8 SerialNumber[32];
472 HPT_U8 BatteryMBInstalled;
473 HPT_U8 BatteryTemperature;
474 signed char CPUTemperature;
475 signed char BoardTemperature;
476 HPT_U16 FanSpeed;
477 HPT_U16 Power12v;
478 HPT_U16 Power5v;
479 HPT_U16 Power3p3v;
480 HPT_U16 Power2p5v;
481 HPT_U16 Power1p8v;
482 HPT_U16 Core1p8v;
483 HPT_U16 Core1p2v;
484 HPT_U16 DDR1p8v;
485 HPT_U16 DDR1p8vRef;
486 HPT_U16 Core1p0v;
487 HPT_U16 Fan2Speed;
488 HPT_U8 reserve[60];
489 }
490 CONTROLLER_INFO_V3, *PCONTROLLER_INFO_V3;
491 typedef char check_CONTROLLER_INFO_V3[sizeof(CONTROLLER_INFO_V3)==256? 1:-1];
492 #endif
493 /*
494 * Channel information.
495 */
496 typedef struct _CHANNEL_INFO {
497 HPT_U32 IoPort; /* IDE Base Port Address */
498 HPT_U32 ControlPort; /* IDE Control Port Address */
499
500 DEVICEID Devices[2]; /* device connected to this channel */
501
502 } CHANNEL_INFO, *PCHANNEL_INFO;
503
504 typedef struct _CHANNEL_INFO_V2 {
505 HPT_U32 IoPort; /* IDE Base Port Address */
506 HPT_U32 ControlPort; /* IDE Control Port Address */
507
508 DEVICEID Devices[2+13]; /* device connected to this channel, PMPort max=15 */
509 } CHANNEL_INFO_V2, *PCHANNEL_INFO_V2;
510
511 typedef struct _ENCLOSURE_INFO {
512 HPT_U8 EnclosureType;
513 HPT_U8 NumberOfPhys;
514 HPT_U8 AttachedTo;
515 HPT_U8 Status;
516 HPT_U8 VendorId[8];
517 HPT_U8 ProductId[16];
518 HPT_U8 ProductRevisionLevel[4];
519 HPT_U32 PortPhyMap;
520 HPT_U32 reserve[55];
521 } ENCLOSURE_INFO, *PENCLOSURE_INFO;
522
523
524 typedef struct _SES_ELEMENT_STATUS {
525 HPT_U8 ElementType;
526 HPT_U8 ElementOverallIndex;
527 HPT_U8 ElementStatus;
528 HPT_U8 Reserved;
529 HPT_U32 ElementValue;
530 HPT_U8 ElementDescriptor[32];
531 }SES_ELEMENT_STATUS,*PSES_ELEMENT_STATUS;
532
533 #define MAX_ELEMENT_COUNT 80
534 /* Element Type */
535 #define SES_TYPE_UNSPECIFIED 0x00
536 #define SES_TYPE_DEVICE 0x01
537 #define SES_TYPE_POWER_SUPPLY 0x02
538 #define SES_TYPE_FAN 0x03
539 #define SES_TYPE_TEMPERATURE_SENSOR 0x04
540 #define SES_TYPE_DOOR_LOCK 0x05
541 #define SES_TYPE_SPEAKER 0x06
542 #define SES_TYPE_ES_CONTROLLER 0x07
543 #define SES_TYPE_SCC_CONTROLLER 0x08
544 #define SES_TYPE_NONVOLATILE_CACHE 0x09
545 #define SES_TYPE_UPS 0x0B
546 #define SES_TYPE_DISPLAY 0x0C
547 #define SES_TYPE_KEYPAD 0x0D
548 #define SES_TYPE_ENCLOSURE 0x0E
549 #define SES_TYPE_SCSI_TRANSCEIVER 0x0F
550 #define SES_TYPE_LANGUAGE 0x10
551 #define SES_TYPE_COMM_PORT 0x11
552 #define SES_TYPE_VOLTAGE_SENSOR 0x12
553 #define SES_TYPE_CURRENT_SENSOR 0x13
554 #define SES_TYPE_SCSI_TARGET_PORT 0x14
555 #define SES_TYPE_SCSI_INITIATOR_PORT 0x15
556 #define SES_TYPE_SIMPLE_SUBENCLOSURE 0x16
557 #define SES_TYPE_ARRAY_DEVICE 0x17
558 #define SES_TYPE_VENDOR_SPECIFIC 0x80
559
560 /* Element Status */
561
562 #define SES_STATUS_UNSUPPORTED 0x00
563 #define SES_STATUS_OK 0x01
564 #define SES_STATUS_CRITICAL 0x02
565 #define SES_STATUS_NONCRITICAL 0x03
566 #define SES_STATUS_UNRECOVERABLE 0x04
567 #define SES_STATUS_NOTINSTALLED 0x05
568 #define SES_STATUS_UNKNOWN 0x06
569 #define SES_STATUS_NOTAVAILABLE 0x06
570 #define SES_STATUS_RESERVED 0x07
571
572
573 typedef struct _ENCLOSURE_INFO_V2 {
574 HPT_U8 EnclosureType;
575 HPT_U8 NumberOfPhys;
576 HPT_U8 AttachedTo;
577 HPT_U8 Status;
578 HPT_U8 VendorId[8];
579 HPT_U8 ProductId[16];
580 HPT_U8 ProductRevisionLevel[4];
581 HPT_U32 PortPhyMap;
582 SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT];
583 } ENCLOSURE_INFO_V2, *PENCLOSURE_INFO_V2;
584
585 typedef struct _ENCLOSURE_INFO_V3 {
586 HPT_U8 EnclosureType;
587 HPT_U8 NumberOfPhys;
588 HPT_U8 AttachedTo;
589 HPT_U8 Status;
590 HPT_U8 VendorId[8];
591 HPT_U8 ProductId[16];
592 HPT_U8 ProductRevisionLevel[4];
593 HPT_U32 PortPhyMap;
594 HPT_U32 UnitId; /*272x card has two Cores, unitId is used to distinguish them */
595 HPT_U32 reserved[32];
596 SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT];
597 } ENCLOSURE_INFO_V3, *PENCLOSURE_INFO_V3;
598
599 #define ENCLOSURE_STATUS_OFFLINE 1
600
601 #define ENCLOSURE_TYPE_INTERNAL 0
602 #define ENCLOSURE_TYPE_SMP 1
603 #define ENCLOSURE_TYPE_PM 2
604
605 #ifndef __KERNEL__
606 /*
607 * time represented in HPT_U32 format
608 */
609 typedef struct _TIME_RECORD {
610 HPT_U32 seconds:6; /* 0 - 59 */
611 HPT_U32 minutes:6; /* 0 - 59 */
612 HPT_U32 month:4; /* 1 - 12 */
613 HPT_U32 hours:6; /* 0 - 59 */
614 HPT_U32 day:5; /* 1 - 31 */
615 HPT_U32 year:5; /* 0=2000, 31=2031 */
616 } TIME_RECORD;
617 #endif
618
619 /*
620 * Array information.
621 */
622 typedef struct _HPT_ARRAY_INFO {
623 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */
624 HPT_U8 Description[64]; /* array description */
625 HPT_U8 CreateManager[16]; /* who created it */
626 TIME_RECORD CreateTime; /* when created it */
627
628 HPT_U8 ArrayType; /* array type */
629 HPT_U8 BlockSizeShift; /* stripe size */
630 HPT_U8 nDisk; /* member count: Number of ID in Members[] */
631 HPT_U8 SubArrayType;
632
633 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */
634 HPT_U32 Members[MAX_ARRAY_MEMBERS_V1]; /* member array/disks */
635
636 /*
637 * rebuilding progress, xx.xx% = sprintf(s, "%.2f%%", RebuildingProgress/100.0);
638 * only valid if rebuilding is done by driver code.
639 * Member Flags will have ARRAY_FLAG_REBUILDING set at this case.
640 * Verify operation use same fields below, the only difference is
641 * ARRAY_FLAG_VERIFYING is set.
642 */
643 HPT_U32 RebuildingProgress;
644 HPT_U32 RebuiltSectors; /* rebuilding point (LBA) for single member */
645
646 } HPT_ARRAY_INFO, *PHPT_ARRAY_INFO;
647
648 #if HPT_INTERFACE_VERSION>=0x01010000
649 typedef struct _HPT_ARRAY_INFO_V2 {
650 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */
651 HPT_U8 Description[64]; /* array description */
652 HPT_U8 CreateManager[16]; /* who created it */
653 TIME_RECORD CreateTime; /* when created it */
654
655 HPT_U8 ArrayType; /* array type */
656 HPT_U8 BlockSizeShift; /* stripe size */
657 HPT_U8 nDisk; /* member count: Number of ID in Members[] */
658 HPT_U8 SubArrayType;
659
660 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */
661 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */
662
663 HPT_U32 RebuildingProgress;
664 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */
665
666 HPT_U32 reserve4[4];
667 } HPT_ARRAY_INFO_V2, *PHPT_ARRAY_INFO_V2;
668 #endif
669
670 #if HPT_INTERFACE_VERSION>=0x01020000
671 typedef struct _HPT_ARRAY_INFO_V3 {
672 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */
673 HPT_U8 Description[64]; /* array description */
674 HPT_U8 CreateManager[16]; /* who created it */
675 TIME_RECORD CreateTime; /* when created it */
676
677 HPT_U8 ArrayType; /* array type */
678 HPT_U8 BlockSizeShift; /* stripe size */
679 HPT_U8 nDisk; /* member count: Number of ID in Members[] */
680 HPT_U8 SubArrayType;
681
682 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */
683 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */
684
685 HPT_U32 RebuildingProgress;
686 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */
687
688 DEVICEID TransformSource;
689 DEVICEID TransformTarget; /* destination device ID */
690 HPT_U32 TransformingProgress;
691 HPT_U32 Signature; /* persistent identification*/
692 #if MAX_ARRAY_MEMBERS_V2==16
693 HPT_U16 Critical_Members; /* bit mask of critical members */
694 HPT_U16 reserve2;
695 HPT_U32 reserve;
696 #else
697 HPT_U32 Critical_Members;
698 HPT_U32 reserve;
699 #endif
700 } HPT_ARRAY_INFO_V3, *PHPT_ARRAY_INFO_V3;
701 #endif
702
703 #if HPT_INTERFACE_VERSION>=0x02000001
704 typedef struct _HPT_ARRAY_INFO_V4 {
705 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */
706 HPT_U8 Description[64]; /* array description */
707 HPT_U8 CreateManager[16]; /* who created it */
708 TIME_RECORD CreateTime; /* when created it */
709
710 HPT_U8 ArrayType; /* array type */
711 HPT_U8 BlockSizeShift; /* stripe size */
712 HPT_U8 nDisk; /* member count: Number of ID in Members[] */
713 HPT_U8 SubArrayType;
714
715 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */
716
717 HPT_U32 RebuildingProgress;
718 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */
719
720 DEVICEID TransformSource;
721 DEVICEID TransformTarget; /* destination device ID */
722 HPT_U32 TransformingProgress;
723 HPT_U32 Signature; /* persistent identification*/
724 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/
725 HPT_U8 reserved2[7];
726 HPT_U64 Critical_Members;
727 HPT_U32 Members[MAX_ARRAY_MEMBERS_V3]; /* member array/disks */
728 } HPT_ARRAY_INFO_V4, *PHPT_ARRAY_INFO_V4;
729 #endif
730
731
732 /*
733 * ATA/ATAPI Device identify data without the Reserved4.
734 */
735 typedef struct _IDENTIFY_DATA2 {
736 HPT_U16 GeneralConfiguration;
737 HPT_U16 NumberOfCylinders;
738 HPT_U16 Reserved1;
739 HPT_U16 NumberOfHeads;
740 HPT_U16 UnformattedBytesPerTrack;
741 HPT_U16 UnformattedBytesPerSector;
742 HPT_U8 SasAddress[8];
743 HPT_U16 SerialNumber[10];
744 HPT_U16 BufferType;
745 HPT_U16 BufferSectorSize;
746 HPT_U16 NumberOfEccBytes;
747 HPT_U16 FirmwareRevision[4];
748 HPT_U16 ModelNumber[20];
749 HPT_U8 MaximumBlockTransfer;
750 HPT_U8 VendorUnique2;
751 HPT_U16 DoubleWordIo;
752 HPT_U16 Capabilities;
753 HPT_U16 Reserved2;
754 HPT_U8 VendorUnique3;
755 HPT_U8 PioCycleTimingMode;
756 HPT_U8 VendorUnique4;
757 HPT_U8 DmaCycleTimingMode;
758 HPT_U16 TranslationFieldsValid;
759 HPT_U16 NumberOfCurrentCylinders;
760 HPT_U16 NumberOfCurrentHeads;
761 HPT_U16 CurrentSectorsPerTrack;
762 HPT_U32 CurrentSectorCapacity;
763 HPT_U16 CurrentMultiSectorSetting;
764 HPT_U32 UserAddressableSectors;
765 HPT_U8 SingleWordDMASupport;
766 HPT_U8 SingleWordDMAActive;
767 HPT_U8 MultiWordDMASupport;
768 HPT_U8 MultiWordDMAActive;
769 HPT_U8 AdvancedPIOModes;
770 HPT_U8 Reserved4;
771 HPT_U16 MinimumMWXferCycleTime;
772 HPT_U16 RecommendedMWXferCycleTime;
773 HPT_U16 MinimumPIOCycleTime;
774 HPT_U16 MinimumPIOCycleTimeIORDY;
775 HPT_U16 Reserved5[2];
776 HPT_U16 ReleaseTimeOverlapped;
777 HPT_U16 ReleaseTimeServiceCommand;
778 HPT_U16 MajorRevision;
779 HPT_U16 MinorRevision;
780 } __attribute__((packed)) IDENTIFY_DATA2, *PIDENTIFY_DATA2;
781
782 /*
783 * physical device information.
784 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data.
785 */
786 typedef struct _DEVICE_INFO {
787 HPT_U8 ControllerId; /* controller id */
788 HPT_U8 PathId; /* bus */
789 HPT_U8 TargetId; /* id */
790 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */
791 /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */
792 HPT_U8 DeviceType; /* device type */
793 HPT_U8 UsableMode; /* highest usable mode */
794
795 #ifdef __BIG_ENDIAN_BITFIELD
796 HPT_U8 NCQEnabled: 1;
797 HPT_U8 NCQSupported: 1;
798 HPT_U8 TCQEnabled: 1;
799 HPT_U8 TCQSupported: 1;
800 HPT_U8 WriteCacheEnabled: 1;
801 HPT_U8 WriteCacheSupported: 1;
802 HPT_U8 ReadAheadEnabled: 1;
803 HPT_U8 ReadAheadSupported: 1;
804 HPT_U8 reserved6: 6;
805 HPT_U8 SpinUpMode: 2;
806 #else
807 HPT_U8 ReadAheadSupported: 1;
808 HPT_U8 ReadAheadEnabled: 1;
809 HPT_U8 WriteCacheSupported: 1;
810 HPT_U8 WriteCacheEnabled: 1;
811 HPT_U8 TCQSupported: 1;
812 HPT_U8 TCQEnabled: 1;
813 HPT_U8 NCQSupported: 1;
814 HPT_U8 NCQEnabled: 1;
815 HPT_U8 SpinUpMode: 2;
816 HPT_U8 reserved6: 6;
817 #endif
818
819 HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */
820
821 IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */
822
823 }
824 __attribute__((packed)) DEVICE_INFO, *PDEVICE_INFO;
825
826 #if HPT_INTERFACE_VERSION>=0x01020000
827 #define MAX_PARENTS_PER_DISK 8
828 /*
829 * physical device information.
830 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data.
831 */
832 typedef struct _DEVICE_INFO_V2 {
833 HPT_U8 ControllerId; /* controller id */
834 HPT_U8 PathId; /* bus */
835 HPT_U8 TargetId; /* id */
836 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */
837 /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */
838 HPT_U8 DeviceType; /* device type */
839 HPT_U8 UsableMode; /* highest usable mode */
840
841 #ifdef __BIG_ENDIAN_BITFIELD
842 HPT_U8 NCQEnabled: 1;
843 HPT_U8 NCQSupported: 1;
844 HPT_U8 TCQEnabled: 1;
845 HPT_U8 TCQSupported: 1;
846 HPT_U8 WriteCacheEnabled: 1;
847 HPT_U8 WriteCacheSupported: 1;
848 HPT_U8 ReadAheadEnabled: 1;
849 HPT_U8 ReadAheadSupported: 1;
850 HPT_U8 reserved6: 6;
851 HPT_U8 SpinUpMode: 2;
852 #else
853 HPT_U8 ReadAheadSupported: 1;
854 HPT_U8 ReadAheadEnabled: 1;
855 HPT_U8 WriteCacheSupported: 1;
856 HPT_U8 WriteCacheEnabled: 1;
857 HPT_U8 TCQSupported: 1;
858 HPT_U8 TCQEnabled: 1;
859 HPT_U8 NCQSupported: 1;
860 HPT_U8 NCQEnabled: 1;
861 HPT_U8 SpinUpMode: 2;
862 HPT_U8 reserved6: 6;
863 #endif
864
865 HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */
866
867 IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */
868
869 HPT_U64 TotalFree;
870 HPT_U64 MaxFree;
871 HPT_U64 BadSectors;
872 DEVICEID ParentArrays[MAX_PARENTS_PER_DISK];
873
874 }
875 __attribute__((packed)) DEVICE_INFO_V2, *PDEVICE_INFO_V2, DEVICE_INFO_V3, *PDEVICE_INFO_V3;
876
877 /*
878 * HPT601 information
879 */
880 #endif
881 /*
882 * HPT601 information
883 */
884 #define HPT601_INFO_DEVICEID 1
885 #define HPT601_INFO_TEMPERATURE 2
886 #define HPT601_INFO_FANSTATUS 4
887 #define HPT601_INFO_BEEPERCONTROL 8
888 #define HPT601_INFO_LED1CONTROL 0x10
889 #define HPT601_INFO_LED2CONTROL 0x20
890 #define HPT601_INFO_POWERSTATUS 0x40
891
892 typedef struct _HPT601_INFO_ {
893 HPT_U16 ValidFields; /* mark valid fields below */
894 HPT_U16 DeviceId; /* 0x5A3E */
895 HPT_U16 Temperature; /* Read: temperature sensor value. Write: temperature limit */
896 HPT_U16 FanStatus; /* Fan status */
897 HPT_U16 BeeperControl; /* bit4: beeper control bit. bit0-3: frequency bits */
898 HPT_U16 LED1Control; /* bit4: twinkling control bit. bit0-3: frequency bits */
899 HPT_U16 LED2Control; /* bit4: twinkling control bit. bit0-3: frequency bits */
900 HPT_U16 PowerStatus; /* 1: has power 2: no power */
901 } HPT601_INFO, *PHPT601_INFO;
902
903 #if HPT_INTERFACE_VERSION>=0x01010000
904 #ifndef __KERNEL__
905 /* cache policy for each vdev, copied from ldm.h */
906 #define CACHE_POLICY_NONE 0
907 #define CACHE_POLICY_WRITE_THROUGH 1
908 #define CACHE_POLICY_WRITE_BACK 2
909
910 #endif
911 #endif
912 /*
913 * Logical device information.
914 * Union of ArrayInfo and DeviceInfo.
915 * Common properties will be put in logical device information.
916 */
917 typedef struct _LOGICAL_DEVICE_INFO {
918 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */
919 HPT_U8 reserved[3];
920
921 HPT_U32 Capacity; /* array capacity */
922 DEVICEID ParentArray;
923
924 union {
925 HPT_ARRAY_INFO array;
926 DEVICE_INFO device;
927 } __attribute__((packed)) u;
928
929 } __attribute__((packed)) LOGICAL_DEVICE_INFO, *PLOGICAL_DEVICE_INFO;
930
931 #if HPT_INTERFACE_VERSION>=0x01010000
932 typedef struct _LOGICAL_DEVICE_INFO_V2 {
933 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */
934 HPT_U8 reserved[3];
935
936 HPT_U64 Capacity; /* array capacity */
937 DEVICEID ParentArray; /* for physical device, Please don't use this field.
938 * use ParentArrays field in DEVICE_INFO_V2
939 */
940
941 union {
942 HPT_ARRAY_INFO_V2 array;
943 DEVICE_INFO device;
944 } __attribute__((packed)) u;
945
946 } __attribute__((packed)) LOGICAL_DEVICE_INFO_V2, *PLOGICAL_DEVICE_INFO_V2;
947 #endif
948
949 #if HPT_INTERFACE_VERSION>=0x01020000
950 #define INVALID_TARGET_ID 0xFF
951 #define INVALID_BUS_ID 0xFF
952 typedef struct _LOGICAL_DEVICE_INFO_V3 {
953 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */
954 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */
955 HPT_U8 VBusId; /* vbus sequence in vbus_list */
956 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */
957 /* OS disk name: HPT DISK $VBusId_$TargetId */
958 HPT_U64 Capacity; /* array capacity */
959 DEVICEID ParentArray; /* for physical device, don't use this field.
960 * use ParentArrays field in DEVICE_INFO_V2 instead.
961 */
962 HPT_U32 TotalIOs;
963 HPT_U32 TobalMBs;
964 HPT_U32 IOPerSec;
965 HPT_U32 MBPerSec;
966
967 union {
968 HPT_ARRAY_INFO_V3 array;
969 DEVICE_INFO_V2 device;
970 } __attribute__((packed)) u;
971
972 }
973 __attribute__((packed)) LOGICAL_DEVICE_INFO_V3, *PLOGICAL_DEVICE_INFO_V3;
974 #endif
975
976 #if HPT_INTERFACE_VERSION>=0x02000001
977 typedef struct _LOGICAL_DEVICE_INFO_V4 {
978 HPT_U32 dwSize;
979 HPT_U8 revision;
980 HPT_U8 reserved[7];
981
982 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */
983 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */
984 HPT_U8 VBusId; /* vbus sequence in vbus_list */
985 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */
986 /* OS disk name: HPT DISK $VBusId_$TargetId */
987 HPT_U64 Capacity; /* array capacity */
988 DEVICEID ParentArray; /* for physical device, don't use this field.
989 * use ParentArrays field in DEVICE_INFO_V2 instead.
990 */
991 HPT_U32 TotalIOs;
992 HPT_U32 TobalMBs;
993 HPT_U32 IOPerSec;
994 HPT_U32 MBPerSec;
995
996 union {
997 HPT_ARRAY_INFO_V4 array;
998 DEVICE_INFO_V3 device;
999 } __attribute__((packed)) u;
1000 }
1001 __attribute__((packed)) LOGICAL_DEVICE_INFO_V4, *PLOGICAL_DEVICE_INFO_V4;
1002
1003 /*LOGICAL_DEVICE_INFO_V4 max revision number*/
1004 #define LOGICAL_DEVICE_INFO_V4_REVISION 0
1005 /*If new revision was defined please check evey revision size*/
1006 #define LOGICAL_DEVICE_INFO_V4_R0_SIZE (sizeof(LOGICAL_DEVICE_INFO_V4))
1007 #endif
1008
1009 /*
1010 * ALTERABLE_ARRAY_INFO and ALTERABLE_DEVICE_INFO, used in set_array_info()
1011 * and set_device_info().
1012 * When set_xxx_info() is called, the ValidFields member indicates which
1013 * fields in the structure are valid.
1014 */
1015 /* field masks */
1016 #define AAIF_NAME 1
1017 #define AAIF_DESCRIPTION 2
1018
1019 #define ADIF_MODE 1
1020 #define ADIF_TCQ 2
1021 #define ADIF_NCQ 4
1022 #define ADIF_WRITE_CACHE 8
1023 #define ADIF_READ_AHEAD 0x10
1024 #define ADIF_SPIN_UP_MODE 0x20
1025
1026 typedef struct _ALTERABLE_ARRAY_INFO {
1027 HPT_U32 ValidFields; /* mark valid fields below */
1028 HPT_U8 Name[MAX_ARRAYNAME_LEN]; /* array name */
1029 HPT_U8 Description[64]; /* array description */
1030 }__attribute__((packed))ALTERABLE_ARRAY_INFO, *PALTERABLE_ARRAY_INFO;
1031
1032 typedef struct _ALTERABLE_DEVICE_INFO {
1033 HPT_U32 ValidFields; /* mark valid fields below */
1034 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
1035 }__attribute__((packed))ALTERABLE_DEVICE_INFO, *PALTERABLE_DEVICE_INFO;
1036
1037 typedef struct _ALTERABLE_DEVICE_INFO_V2 {
1038 HPT_U32 ValidFields; /* mark valid fields below */
1039 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */
1040 HPT_U8 TCQEnabled;
1041 HPT_U8 NCQEnabled;
1042 HPT_U8 WriteCacheEnabled;
1043 HPT_U8 ReadAheadEnabled;
1044 HPT_U8 SpinUpMode;
1045 HPT_U8 reserve[2];
1046 HPT_U32 reserve2[13]; /* pad to 64 bytes */
1047 }__attribute__((packed))ALTERABLE_DEVICE_INFO_V2, *PALTERABLE_DEVICE_INFO_V2;
1048
1049 #if HPT_INTERFACE_VERSION>=0x01020000
1050
1051 #define TARGET_TYPE_DEVICE 0
1052 #define TARGET_TYPE_ARRAY 1
1053
1054
1055 #define AIT_NAME 0
1056 #define AIT_DESCRIPTION 1
1057 #define AIT_CACHE_POLICY 2
1058
1059
1060 #define DIT_MODE 0
1061 #define DIT_READ_AHEAD 1
1062 #define DIT_WRITE_CACHE 2
1063 #define DIT_TCQ 3
1064 #define DIT_NCQ 4
1065 #define DIT_IDENTIFY 5
1066
1067 /* param type is determined by target_type and info_type*/
1068 typedef struct _SET_DEV_INFO
1069 {
1070 HPT_U8 target_type;
1071 HPT_U8 infor_type;
1072 HPT_U16 param_length;
1073 #define SET_VDEV_INFO_param(p) ((HPT_U8 *)(p)+sizeof(SET_VDEV_INFO))
1074 /* HPT_U8 param[0]; */
1075 } SET_VDEV_INFO, * PSET_VDEV_INFO;
1076
1077 typedef HPT_U8 PARAM_ARRAY_NAME[MAX_ARRAYNAME_LEN] ;
1078 typedef HPT_U8 PARAM_ARRAY_DES[64];
1079 typedef HPT_U8 PARAM_DEVICE_MODE, PARAM_TCQ, PARAM_NCQ, PARAM_READ_AHEAD, PARAM_WRITE_CACHE, PARAM_CACHE_POLICY;
1080
1081 #endif
1082
1083 /*
1084 * CREATE_ARRAY_PARAMS
1085 * Param structure used to create an array.
1086 */
1087 typedef struct _CREATE_ARRAY_PARAMS {
1088 HPT_U8 ArrayType; /* 1-level array type */
1089 HPT_U8 nDisk; /* number of elements in Members[] array */
1090 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
1091 HPT_U8 CreateFlags; /* See CAF_xxx */
1092
1093 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
1094 HPT_U8 Description[64]; /* array description */
1095 HPT_U8 CreateManager[16]; /* who created it */
1096 TIME_RECORD CreateTime; /* when created it */
1097
1098 HPT_U32 Members[MAX_ARRAY_MEMBERS_V1];/* ID of array members, a member can be an array */
1099
1100 } CREATE_ARRAY_PARAMS, *PCREATE_ARRAY_PARAMS;
1101
1102 #if HPT_INTERFACE_VERSION>=0x01010000
1103 typedef struct _CREATE_ARRAY_PARAMS_V2 {
1104 HPT_U8 ArrayType; /* 1-level array type */
1105 HPT_U8 nDisk; /* number of elements in Members[] array */
1106 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
1107 HPT_U8 CreateFlags; /* See CAF_xxx */
1108
1109 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
1110 HPT_U8 Description[64]; /* array description */
1111 HPT_U8 CreateManager[16]; /* who created it */
1112 TIME_RECORD CreateTime; /* when created it */
1113 HPT_U64 Capacity;
1114
1115 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2];/* ID of array members, a member can be an array */
1116
1117 } CREATE_ARRAY_PARAMS_V2, *PCREATE_ARRAY_PARAMS_V2;
1118 #endif
1119
1120 #if HPT_INTERFACE_VERSION>=0x02000001
1121 typedef struct _CREATE_ARRAY_PARAMS_V3 {
1122 HPT_U32 dwSize;
1123 HPT_U8 revision; /*CREATE_ARRAY_PARAMS_V3_REVISION*/
1124 HPT_U8 reserved[5];
1125 HPT_U8 subDisks; /* RAIDn0 sub array */
1126 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/
1127 HPT_U8 ArrayType; /* 1-level array type */
1128 HPT_U8 nDisk; /* number of elements in Members[] array */
1129 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */
1130 HPT_U8 CreateFlags; /* See CAF_xxx */
1131
1132 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */
1133 HPT_U8 Description[64]; /* array description */
1134 HPT_U8 CreateManager[16]; /* who created it */
1135 TIME_RECORD CreateTime; /* when created it */
1136 HPT_U64 Capacity;
1137
1138 HPT_U32 Members[MAX_ARRAY_MEMBERS_V3];/* ID of array members, a member can be an array */
1139 } CREATE_ARRAY_PARAMS_V3, *PCREATE_ARRAY_PARAMS_V3;
1140
1141 /*CREATE_ARRAY_PARAMS_V3 current max revision*/
1142 #define CREATE_ARRAY_PARAMS_V3_REVISION 0
1143 /*If new revision defined please check evey revision size*/
1144 #define CREATE_ARRAY_PARAMS_V3_R0_SIZE (sizeof(CREATE_ARRAY_PARAMS_V3))
1145 #endif
1146
1147 #if HPT_INTERFACE_VERSION < 0x01020000
1148 /*
1149 * Flags used for creating an RAID 1 array
1150 *
1151 * CAF_CREATE_AND_DUPLICATE
1152 * Copy source disk contents to target for RAID 1. If user choose "create and duplicate"
1153 * to create an array, GUI will call CreateArray() with this flag set. Then GUI should
1154 * call hpt_get_device_info() with the returned array ID and check returned flags to
1155 * see if ARRAY_FLAG_REBUILDING is set. If not set, driver does not support rebuilding
1156 * and GUI must do duplication itself.
1157 * CAF_DUPLICATE_MUST_DONE
1158 * If the duplication is aborted or fails, do not create the array.
1159 */
1160 #define CAF_CREATE_AND_DUPLICATE 1
1161 #define CAF_DUPLICATE_MUST_DONE 2
1162 #define CAF_CREATE_AS_RAID15 4
1163 /*
1164 * Flags used for creating an RAID 5 array
1165 */
1166 #define CAF_CREATE_R5_NO_BUILD 1
1167 #define CAF_CREATE_R5_ZERO_INIT 2
1168 #define CAF_CREATE_R5_BUILD_PARITY 4
1169
1170 #else
1171 /*
1172 * Flags used for creating
1173 */
1174 #define CAF_FOREGROUND_INITIALIZE 1
1175 #define CAF_BACKGROUND_INITIALIZE 2
1176 #define CAF_CREATE_R5_WRITE_BACK (CACHE_POLICY_WRITE_BACK<<CAF_CACHE_POLICY_SHIFT)
1177
1178
1179 #define CAF_CACHE_POLICY_MASK 0x1C
1180 #define CAF_CACHE_POLICY_SHIFT 2
1181
1182 #endif
1183
1184 #define CAF_KEEP_DATA_ALWAYS 0x80
1185
1186 /* Flags used for deleting an array
1187 *
1188 * DAF_KEEP_DATA_IF_POSSIBLE
1189 * If this flag is set, deleting a RAID 1 array will not destroy the data on both disks.
1190 * Deleting a JBOD should keep partitions on first disk ( not implement now ).
1191 * Deleting a RAID 0/1 should result as two RAID 0 array ( not implement now ).
1192 */
1193 #define DAF_KEEP_DATA_IF_POSSIBLE 1
1194 #define DAF_KEEP_DATA_ALWAYS 2
1195
1196 /*
1197 * event types
1198 */
1199 #define ET_DEVICE_REMOVED 1 /* device removed */
1200 #define ET_DEVICE_PLUGGED 2 /* device plugged */
1201 #define ET_DEVICE_ERROR 3 /* device I/O error */
1202 #define ET_REBUILD_STARTED 4
1203 #define ET_REBUILD_ABORTED 5
1204 #define ET_REBUILD_FINISHED 6
1205 #define ET_SPARE_TOOK_OVER 7
1206 #define ET_REBUILD_FAILED 8
1207 #define ET_VERIFY_STARTED 9
1208 #define ET_VERIFY_ABORTED 10
1209 #define ET_VERIFY_FAILED 11
1210 #define ET_VERIFY_FINISHED 12
1211 #define ET_INITIALIZE_STARTED 13
1212 #define ET_INITIALIZE_ABORTED 14
1213 #define ET_INITIALIZE_FAILED 15
1214 #define ET_INITIALIZE_FINISHED 16
1215 #define ET_VERIFY_DATA_ERROR 17
1216 #define ET_TRANSFORM_STARTED 18
1217 #define ET_TRANSFORM_ABORTED 19
1218 #define ET_TRANSFORM_FAILED 20
1219 #define ET_TRANSFORM_FINISHED 21
1220 #define ET_SMART_FAILED 22
1221 #define ET_SMART_PASSED 23
1222 #define ET_SECTOR_REPAIR_FAIL 24
1223 #define ET_SECTOR_REPAIR_SUCCESS 25
1224 #define ET_ERASE_FAIL 26
1225 #define ET_ERASE_SUCCESS 27
1226 #define ET_CONTINUE_REBUILD_ON_ERROR 28
1227
1228
1229 /*
1230 * event structure
1231 */
1232 typedef struct _HPT_EVENT {
1233 TIME_RECORD Time;
1234 DEVICEID DeviceID;
1235 HPT_U8 EventType;
1236 HPT_U8 reserved[3];
1237
1238 HPT_U8 Data[32]; /* various data depend on EventType */
1239 } HPT_EVENT, *PHPT_EVENT;
1240
1241 /*
1242 * IDE pass-through command. Use it at your own risk!
1243 */
1244 typedef struct _IDE_PASS_THROUGH_HEADER {
1245 DEVICEID idDisk; /* disk ID */
1246 HPT_U8 bFeaturesReg; /* feature register */
1247 HPT_U8 bSectorCountReg; /* IDE sector count register. */
1248 HPT_U8 bLbaLowReg; /* IDE LBA low value. */
1249 HPT_U8 bLbaMidReg; /* IDE LBA mid register. */
1250 HPT_U8 bLbaHighReg; /* IDE LBA high value. */
1251 HPT_U8 bDriveHeadReg; /* IDE drive/head register. */
1252 HPT_U8 bCommandReg; /* Actual IDE command. Checked for validity by driver. */
1253 HPT_U8 nSectors; /* data size in sectors, if the command has data transfer */
1254 HPT_U8 protocol; /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */
1255 HPT_U8 reserve[3];
1256 #define IDE_PASS_THROUGH_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER))
1257 /* HPT_U8 DataBuffer[0]; */
1258 }
1259 IDE_PASS_THROUGH_HEADER, *PIDE_PASS_THROUGH_HEADER;
1260
1261 typedef struct _IDE_PASS_THROUGH_HEADER_V2 {
1262 DEVICEID idDisk; /* disk ID */
1263 HPT_U16 bFeaturesReg; /* feature register */
1264 HPT_U16 bSectorCountReg; /* IDE sector count register. */
1265 HPT_U16 bLbaLowReg; /* IDE LBA low value. */
1266 HPT_U16 bLbaMidReg; /* IDE LBA mid register. */
1267 HPT_U16 bLbaHighReg; /* IDE LBA high value. */
1268 HPT_U8 bDriveHeadReg; /* IDE drive/head register. */
1269 HPT_U8 bCommandReg; /* Actual IDE command. Checked for validity by driver. */
1270 HPT_U16 nSectors; /* data size in sectors, if the command has data transfer */
1271 HPT_U8 protocol; /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */
1272 HPT_U8 reserve;
1273 #define IDE_PASS_THROUGH_V2_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER_V2))
1274 /* HPT_U8 DataBuffer[0]; */
1275 }
1276 IDE_PASS_THROUGH_HEADER_V2, *PIDE_PASS_THROUGH_HEADER_V2;
1277
1278 typedef struct _HPT_SCSI_PASSTHROUGH_IN {
1279 DEVICEID idDisk;
1280 HPT_U8 protocol;
1281 HPT_U8 reserve1;
1282 HPT_U8 reserve2;
1283 HPT_U8 cdbLength;
1284 HPT_U8 cdb[16];
1285 HPT_U32 dataLength;
1286 /* data follows, if any */
1287 }
1288 HPT_SCSI_PASSTHROUGH_IN, *PHPT_SCSI_PASSTHROUGH_IN;
1289
1290 typedef struct _HPT_SCSI_PASSTHROUGH_OUT {
1291 HPT_U8 scsiStatus;
1292 HPT_U8 reserve1;
1293 HPT_U8 reserve2;
1294 HPT_U8 reserve3;
1295 HPT_U32 dataLength;
1296 /* data/sense follows if any */
1297 }
1298 HPT_SCSI_PASSTHROUGH_OUT, *PHPT_SCSI_PASSTHROUGH_OUT;
1299
1300 /*
1301 * device io packet format
1302 */
1303 typedef struct _DEVICE_IO_EX_PARAMS {
1304 DEVICEID idDisk;
1305 HPT_U32 Lba;
1306 HPT_U16 nSectors;
1307 HPT_U8 Command; /* IO_COMMAD_xxx */
1308 HPT_U8 BufferType; /* BUFFER_TYPE_xxx, see below */
1309 HPT_U32 BufferPtr;
1310 }
1311 DEVICE_IO_EX_PARAMS, *PDEVICE_IO_EX_PARAMS;
1312
1313 #define BUFFER_TYPE_LOGICAL 1 /* logical pointer to buffer */
1314 #define BUFFER_TYPE_PHYSICAL 2 /* physical address of buffer */
1315 #define BUFFER_TYPE_LOGICAL_LOGICAL_SG 3 /* logical pointer to logical S/G table */
1316 #define BUFFER_TYPE_LOGICAL_PHYSICAL_SG 4 /* logical pointer to physical S/G table */
1317 #define BUFFER_TYPE_PHYSICAL_LOGICAL_SG 5 /* physical address to logical S/G table */
1318 #define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG 6 /* physical address of physical S/G table */
1319 #define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG_PIO 7 /* non DMA capable physical address of physical S/G table */
1320
1321 typedef struct _HPT_DRIVER_PARAMETER {
1322 char name[32];
1323 HPT_U8 value[32];
1324 HPT_U8 type; /* HPT_DRIVER_PARAMETER_TYPE_* */
1325 HPT_U8 persistent;
1326 HPT_U8 reserve2[2];
1327 HPT_U8 location; /* 0 - system */
1328 HPT_U8 controller;
1329 HPT_U8 bus;
1330 HPT_U8 reserve1;
1331 char desc[128];
1332 }
1333 HPT_DRIVER_PARAMETER, *PHPT_DRIVER_PARAMETER;
1334
1335 #define HPT_DRIVER_PARAMETER_TYPE_INT 1
1336 #define HPT_DRIVER_PARAMETER_TYPE_BOOL 2
1337
1338 typedef struct _HPT_PM_CMDSTAT {
1339 HPT_U64 timeStamp;
1340 HPT_U64 lba;
1341 HPT_U16 sectors;
1342 HPT_U16 reserved;
1343 HPT_U32 rspTime;
1344 }
1345 HPT_PM_CMDSTAT, *PHPT_PM_CMDSTAT;
1346
1347 #define HIGHEST_RSPTIME_CMD_SAVE 10
1348 #define RSPTIME_HISTOGRAM_SEGMENT_COUNT 38
1349
1350 typedef struct _HPT_PM_IOSTAT {
1351 HPT_PM_CMDSTAT highestRspCmdStatData[HIGHEST_RSPTIME_CMD_SAVE];
1352 HPT_U32 rspTimeHistogram[RSPTIME_HISTOGRAM_SEGMENT_COUNT];
1353 HPT_U16 pendingIo;
1354 HPT_U16 activeIo;
1355 HPT_U32 instantKBPs;
1356 HPT_U32 averageKBPs;
1357 HPT_U32 instantIOPs;
1358 HPT_U32 averageIOPs;
1359 }
1360 HPT_PM_IOSTAT, *PHPT_PM_IOSTAT;
1361
1362
1363
1364 /*
1365 * ioctl structure
1366 */
1367 #define HPT_IOCTL_MAGIC32 0x1A2B3C4D
1368 #define HPT_IOCTL_MAGIC 0xA1B2C3D4
1369
1370 typedef struct _HPT_IOCTL_PARAM {
1371 HPT_U32 Magic; /* used to check if it's a valid ioctl packet */
1372 HPT_U32 dwIoControlCode; /* operation control code */
1373 HPT_PTR lpInBuffer; /* input data buffer */
1374 HPT_U32 nInBufferSize; /* size of input data buffer */
1375 HPT_PTR lpOutBuffer; /* output data buffer */
1376 HPT_U32 nOutBufferSize; /* size of output data buffer */
1377 HPT_PTR lpBytesReturned; /* count of HPT_U8s returned */
1378 }
1379 HPT_IOCTL_PARAM, *PHPT_IOCTL_PARAM;
1380
1381 /* for 32-bit app running on 64-bit system */
1382 typedef struct _HPT_IOCTL_PARAM32 {
1383 HPT_U32 Magic;
1384 HPT_U32 dwIoControlCode;
1385 HPT_U32 lpInBuffer;
1386 HPT_U32 nInBufferSize;
1387 HPT_U32 lpOutBuffer;
1388 HPT_U32 nOutBufferSize;
1389 HPT_U32 lpBytesReturned;
1390 }
1391 HPT_IOCTL_PARAM32, *PHPT_IOCTL_PARAM32;
1392
1393 #if !defined(__KERNEL__) || defined(SIMULATE)
1394 /*
1395 * User-mode ioctl parameter passing conventions:
1396 * The ioctl function implementation is platform specific, so we don't
1397 * have forced rules for it. However, it's suggested to use a parameter
1398 * passing method as below
1399 * 1) Put all input data continuously in an input buffer.
1400 * 2) Prepare an output buffer with enough size if needed.
1401 * 3) Fill a HPT_IOCTL_PARAM structure.
1402 * 4) Pass the structure to driver through a platform-specific method.
1403 * This is implemented in the mid-layer user-mode library. The UI
1404 * programmer needn't care about it.
1405 */
1406
1407 /************************************************************************
1408 * User mode functions
1409 ************************************************************************/
1410 /*
1411 * hpt_get_version
1412 * Version compatibility: all versions
1413 * Parameters:
1414 * None
1415 * Returns:
1416 * interface version. 0 when fail.
1417 */
1418 HPT_U32 hpt_get_version(void);
1419
1420 /*
1421 * hpt_get_driver_capabilities
1422 * Version compatibility: v1.0.0.2 or later
1423 * Parameters:
1424 * Pointer to receive a DRIVE_CAPABILITIES structure. The caller must set
1425 * dwSize member to sizeof(DRIVER_CAPABILITIES). The callee must check this
1426 * member to see if it's correct.
1427 * Returns:
1428 * 0 - Success
1429 */
1430 int hpt_get_driver_capabilities(PDRIVER_CAPABILITIES cap);
1431 int hpt_get_driver_capabilities_v2(PDRIVER_CAPABILITIES_V2 cap);
1432
1433 /*
1434 * hpt_get_controller_count
1435 * Version compatibility: v1.0.0.1 or later
1436 * Parameters:
1437 * None
1438 * Returns:
1439 * number of controllers
1440 */
1441 int hpt_get_controller_count(void);
1442
1443 /* hpt_get_controller_info
1444 * Version compatibility: v1.0.0.1 or later
1445 * Parameters:
1446 * id Controller id
1447 * pInfo pointer to CONTROLLER_INFO buffer
1448 * Returns:
1449 * 0 Success, controller info is put into (*pInfo ).
1450 */
1451 int hpt_get_controller_info(int id, PCONTROLLER_INFO pInfo);
1452
1453 #if HPT_INTERFACE_VERSION>=0x01020000
1454 /* hpt_get_controller_info_v2
1455 * Version compatibility: v2.0.0.0 or later
1456 * Parameters:
1457 * id Controller id
1458 * pInfo pointer to CONTROLLER_INFO_V2 buffer
1459 * Returns:
1460 * 0 Success, controller info is put into (*pInfo ).
1461 */
1462 int hpt_get_controller_info_v2(int id, PCONTROLLER_INFO_V2 pInfo);
1463
1464 /* hpt_get_controller_info_v3
1465 * Version compatibility: v2.0.0.0 or later
1466 * Parameters:
1467 * id Controller id
1468 * pInfo pointer to CONTROLLER_INFO_V3 buffer
1469 * Returns:
1470 * 0 Success, controller info is put into (*pInfo ).
1471 */
1472 int hpt_get_controller_info_v3(int id, PCONTROLLER_INFO_V3 pInfo);
1473 #endif
1474
1475 /* hpt_get_channel_info
1476 * Version compatibility: v1.0.0.1 or later
1477 * Parameters:
1478 * id Controller id
1479 * bus bus number
1480 * pInfo pointer to CHANNEL_INFO buffer
1481 * Returns:
1482 * 0 Success, channel info is put into (*pInfo ).
1483 */
1484 int hpt_get_channel_info(int id, int bus, PCHANNEL_INFO pInfo);
1485
1486 /* hpt_get_channel_info_v2
1487 * Version compatibility: v1.0.0.1 or later
1488 * Parameters:
1489 * id Controller id
1490 * bus bus number
1491 * pInfo pointer to CHANNEL_INFO buffer
1492 * Returns:
1493 * 0 Success, channel info is put into (*pInfo ).
1494 */
1495 int hpt_get_channel_info_v2(int id, int bus, PCHANNEL_INFO_V2 pInfo);
1496
1497 /* hpt_get_logical_devices
1498 * Version compatibility: v1.0.0.1 or later
1499 * Parameters:
1500 * pIds pointer to a DEVICEID array
1501 * nMaxCount array size
1502 * Returns:
1503 * Number of ID returned. All logical device IDs are put into pIds array.
1504 * Note: A spare disk is not a logical device.
1505 */
1506 int hpt_get_logical_devices(DEVICEID * pIds, int nMaxCount);
1507
1508 /* hpt_get_physical_devices
1509 * Version compatibility: v2.1.0.0 or later
1510 * Parameters:
1511 * pIds pointer to a DEVICEID array
1512 * nMaxCount array size
1513 * Returns:
1514 * Number of ID returned. All physical device IDs are put into pIds array.
1515 */
1516 int hpt_get_physical_devices(DEVICEID * pIds, int nMaxCount);
1517
1518 /* hpt_get_device_info
1519 * Version compatibility: v1.0.0.1 or later
1520 * Parameters:
1521 * id logical device id
1522 * pInfo pointer to LOGICAL_DEVICE_INFO structure
1523 * Returns:
1524 * 0 - Success
1525 */
1526 int hpt_get_device_info(DEVICEID id, PLOGICAL_DEVICE_INFO pInfo);
1527
1528 /* hpt_create_array
1529 * Version compatibility: v1.0.0.1 or later
1530 * Parameters:
1531 * pParam pointer to CREATE_ARRAY_PARAMS structure
1532 * Returns:
1533 * 0 failed
1534 * else return array id
1535 */
1536 DEVICEID hpt_create_array(PCREATE_ARRAY_PARAMS pParam);
1537
1538 /* hpt_delete_array
1539 * Version compatibility: v1.0.0.1 or later
1540 * Parameters:
1541 * id array id
1542 * Returns:
1543 * 0 Success
1544 */
1545 int hpt_delete_array(DEVICEID id, HPT_U32 options);
1546
1547 /* hpt_device_io
1548 * Read/write data on array and physcal device.
1549 * Version compatibility: v1.0.0.1 or later
1550 * Parameters:
1551 * id device id. If it's an array ID, IO will be performed on the array.
1552 * If it's a physical device ID, IO will be performed on the device.
1553 * cmd IO_COMMAND_READ or IO_COMMAND_WRITE
1554 * buffer data buffer
1555 * length data size
1556 * Returns:
1557 * 0 Success
1558 */
1559 int hpt_device_io(DEVICEID id, int cmd, HPT_U32 lba, HPT_U32 nSector, void * buffer);
1560
1561 /* hpt_add_disk_to_array
1562 * Used to dynamicly add a disk to an RAID1, RAID0/1, RAID1/0 or RAID5 array.
1563 * Auto-rebuild will start.
1564 * Version compatibility: v1.0.0.1 or later
1565 * Parameters:
1566 * idArray array id
1567 * idDisk disk id
1568 * Returns:
1569 * 0 Success
1570 */
1571 int hpt_add_disk_to_array(DEVICEID idArray, DEVICEID idDisk);
1572
1573 /* hpt_add_spare_disk
1574 * Version compatibility: v1.0.0.1 or later
1575 * Add a disk to spare pool.
1576 * Parameters:
1577 * idDisk disk id
1578 * Returns:
1579 * 0 Success
1580 */
1581 int hpt_add_spare_disk(DEVICEID idDisk);
1582
1583 /* hpt_add_dedicated_spare
1584 * Version compatibility: v1.0.0.3 or later
1585 * Add a spare disk to an array
1586 * Parameters:
1587 * idDisk disk id
1588 * idArray array id
1589 * Returns:
1590 * 0 Success
1591 */
1592 int hpt_add_dedicated_spare(DEVICEID idDisk, DEVICEID idArray);
1593
1594 /* hpt_remove_spare_disk
1595 * remove a disk from spare pool.
1596 * Version compatibility: v1.0.0.1 or later
1597 * Parameters:
1598 * idDisk disk id
1599 * Returns:
1600 * 0 Success
1601 */
1602 int hpt_remove_spare_disk(DEVICEID idDisk);
1603
1604 /* hpt_get_event
1605 * Used to poll events from driver.
1606 * Version compatibility: v1.0.0.1 or later
1607 * Parameters:
1608 * pEvent pointer to HPT_EVENT structure
1609 * Returns:
1610 * 0 Success, event info is filled in *pEvent
1611 */
1612 int hpt_get_event(PHPT_EVENT pEvent);
1613
1614 /* hpt_rebuild_data_block
1615 * Used to copy data from source disk and mirror disk.
1616 * Version compatibility: v1.0.0.1 or later
1617 * Parameters:
1618 * idArray Array ID (RAID1, 0/1 or RAID5)
1619 * Lba Start LBA for each array member
1620 * nSector Number of sectors for each array member (RAID 5 will ignore this parameter)
1621 *
1622 * Returns:
1623 * 0 Success, event info is filled in *pEvent
1624 */
1625 int hpt_rebuild_data_block(DEVICEID idMirror, HPT_U32 Lba, HPT_U8 nSector);
1626 #define hpt_rebuild_mirror(p1, p2, p3) hpt_rebuild_data_block(p1, p2, p3)
1627
1628 /* hpt_set_array_state
1629 * set array state.
1630 * Version compatibility: v1.0.0.1 or later
1631 * Parameters:
1632 * idArray Array ID
1633 * state See above 'array states' constants, possible values are:
1634 * MIRROR_REBUILD_START
1635 * Indicate that GUI wants to rebuild a mirror array
1636 * MIRROR_REBUILD_ABORT
1637 * GUI wants to abort rebuilding an array
1638 * MIRROR_REBUILD_COMPLETE
1639 * GUI finished to rebuild an array. If rebuild is done by driver this
1640 * state has no use
1641 *
1642 * Returns:
1643 * 0 Success
1644 */
1645 int hpt_set_array_state(DEVICEID idArray, HPT_U32 state);
1646
1647 /* hpt_set_array_info
1648 * set array info.
1649 * Version compatibility: v1.0.0.1 or later
1650 * Parameters:
1651 * idArray Array ID
1652 * pInfo pointer to new info
1653 *
1654 * Returns:
1655 * 0 Success
1656 */
1657 int hpt_set_array_info(DEVICEID idArray, PALTERABLE_ARRAY_INFO pInfo);
1658
1659 /* hpt_set_device_info
1660 * set device info.
1661 * Version compatibility: v1.0.0.1 or later
1662 * Parameters:
1663 * idDisk device ID
1664 * pInfo pointer to new info
1665 *
1666 * Returns:
1667 * 0 Success
1668 * Additional notes:
1669 * If idDisk==0, call to this function will stop buzzer on the adapter
1670 * (if supported by driver).
1671 */
1672 int hpt_set_device_info(DEVICEID idDisk, PALTERABLE_DEVICE_INFO pInfo);
1673
1674 #if HPT_INTERFACE_VERSION >= 0x01000004
1675 int hpt_set_device_info_v2(DEVICEID idDisk, PALTERABLE_DEVICE_INFO_V2 pInfo);
1676 #endif
1677
1678 /* hpt_rescan_devices
1679 * rescan devices
1680 * Version compatibility: v1.0.0.1 or later
1681 * Parameters:
1682 * None
1683 * Returns:
1684 * 0 Success
1685 */
1686 int hpt_rescan_devices(void);
1687
1688 /* hpt_get_601_info
1689 * Get HPT601 status
1690 * Version compatibiilty: v1.0.0.3 or later
1691 * Parameters:
1692 * idDisk - Disk handle
1693 * PHPT601_INFO - pointer to HPT601 info buffer
1694 * Returns:
1695 * 0 Success
1696 */
1697 int hpt_get_601_info(DEVICEID idDisk, PHPT601_INFO pInfo);
1698
1699 /* hpt_set_601_info
1700 * HPT601 function control
1701 * Version compatibiilty: v1.0.0.3 or later
1702 * Parameters:
1703 * idDisk - Disk handle
1704 * PHPT601_INFO - pointer to HPT601 info buffer
1705 * Returns:
1706 * 0 Success
1707 */
1708 int hpt_set_601_info(DEVICEID idDisk, PHPT601_INFO pInfo);
1709
1710 /* hpt_lock_device
1711 * Lock a block on a device (prevent OS accessing it)
1712 * Version compatibiilty: v1.0.0.3 or later
1713 * Parameters:
1714 * idDisk - Disk handle
1715 * Lba - Start LBA
1716 * nSectors - number of sectors
1717 * Returns:
1718 * 0 Success
1719 */
1720 int hpt_lock_device(DEVICEID idDisk, HPT_U32 Lba, HPT_U8 nSectors);
1721
1722 /* hpt_lock_device
1723 * Unlock a device
1724 * Version compatibiilty: v1.0.0.3 or later
1725 * Parameters:
1726 * idDisk - Disk handle
1727 * Returns:
1728 * 0 Success
1729 */
1730 int hpt_unlock_device(DEVICEID idDisk);
1731
1732 /* hpt_ide_pass_through
1733 * send a ATA passthrough command to a device.
1734 * Version compatibility: v1.0.0.3 or later
1735 * Parameters:
1736 * p - IDE_PASS_THROUGH header pointer
1737 * Returns:
1738 * 0 Success
1739 */
1740 int hpt_ide_pass_through(PIDE_PASS_THROUGH_HEADER p);
1741 int hpt_ide_pass_through_v2(PIDE_PASS_THROUGH_HEADER_V2 p);
1742
1743 /* hpt_scsi_passthrough
1744 * send a SCSI passthrough command to a device.
1745 * Version compatibility: v2.0.0.0 or later
1746 * Parameters:
1747 * in - HPT_SCSI_PASSTHROUGH_IN header pointer
1748 * out - PHPT_SCSI_PASSTHROUGH_OUT header pointer
1749 * insize, outsize - in/out buffer size
1750 * Returns:
1751 * 0 Success
1752 */
1753 int hpt_scsi_passthrough(PHPT_SCSI_PASSTHROUGH_IN in, HPT_U32 insize,
1754 PHPT_SCSI_PASSTHROUGH_OUT out, HPT_U32 outsize);
1755
1756 /* hpt_verify_data_block
1757 * verify data block on RAID1 or RAID5.
1758 * Version compatibility: v1.0.0.3 or later
1759 * Parameters:
1760 * idArray - Array ID
1761 * Lba - block number (on each array member, not logical block!)
1762 * nSectors - Sectors for each member (RAID 5 will ignore this parameter)
1763 * Returns:
1764 * 0 Success
1765 * 1 Data compare error
1766 * 2 I/O error
1767 */
1768 int hpt_verify_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors);
1769
1770 /* hpt_initialize_data_block
1771 * initialize data block (fill with zero) on RAID5
1772 * Version compatibility: v1.0.0.3 or later
1773 * Parameters:
1774 * idArray - Array ID
1775 * Lba - block number (on each array member, not logical block!)
1776 * nSectors - Sectors for each member (RAID 5 will ignore this parameter)
1777 * Returns:
1778 * 0 Success
1779 */
1780 int hpt_initialize_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors);
1781
1782 /* hpt_device_io_ex
1783 * extended device I/O function
1784 * Version compatibility: v1.0.0.3 or later
1785 * Parameters:
1786 * idArray - Array ID
1787 * Lba - block number (on each array member, not logical block!)
1788 * nSectors - Sectors for each member
1789 * buffer - I/O buffer or s/g address
1790 * Returns:
1791 * 0 Success
1792 */
1793 int hpt_device_io_ex(PDEVICE_IO_EX_PARAMS param);
1794
1795 /* hpt_set_boot_mark
1796 * select boot device
1797 * Version compatibility: v1.0.0.3 or later
1798 * Parameters:
1799 * id - logical device ID. If id is 0 the boot mark will be removed.
1800 * Returns:
1801 * 0 Success
1802 */
1803 int hpt_set_boot_mark(DEVICEID id);
1804
1805 /* hpt_query_remove
1806 * check if device can be removed safely
1807 * Version compatibility: v1.0.0.4 or later
1808 * Parameters:
1809 * ndev - number of devices
1810 * pIds - device ID list
1811 * Returns:
1812 * 0 - Success
1813 * -1 - unknown error
1814 * n - the n-th device that can't be removed
1815 */
1816 int hpt_query_remove(HPT_U32 ndev, DEVICEID *pIds);
1817
1818 /* hpt_remove_devices
1819 * remove a list of devices
1820 * Version compatibility: v1.0.0.4 or later
1821 * Parameters:
1822 * ndev - number of devices
1823 * pIds - device ID list
1824 * Returns:
1825 * 0 - Success
1826 * -1 - unknown error
1827 * n - the n-th device that can't be removed
1828 */
1829 int hpt_remove_devices(HPT_U32 ndev, DEVICEID *pIds);
1830
1831 /* hpt_create_array_v2
1832 * Version compatibility: v1.1.0.0 or later
1833 * Parameters:
1834 * pParam pointer to CREATE_ARRAY_PARAMS_V2 structure
1835 * Returns:
1836 * 0 failed
1837 * else return array id
1838 */
1839 #if HPT_INTERFACE_VERSION>=0x01010000
1840 DEVICEID hpt_create_array_v2(PCREATE_ARRAY_PARAMS_V2 pParam);
1841 #endif
1842
1843 /* hpt_create_array_v3
1844 * Version compatibility: v2.0.0.1 or later
1845 * Parameters:
1846 * pParam pointer to CREATE_ARRAY_PARAMS_V3 structure
1847 * Returns:
1848 * 0 failed
1849 * else return array id
1850 */
1851 #if HPT_INTERFACE_VERSION>=0x02000001
1852 DEVICEID hpt_create_array_v3(PCREATE_ARRAY_PARAMS_V3 pParam);
1853 #endif
1854
1855 /* hpt_get_device_info_v2
1856 * Version compatibility: v1.1.0.0 or later
1857 * Parameters:
1858 * id logical device id
1859 * pInfo pointer to LOGICAL_DEVICE_INFO_V2 structure
1860 * Returns:
1861 * 0 - Success
1862 */
1863 #if HPT_INTERFACE_VERSION>=0x01010000
1864 int hpt_get_device_info_v2(DEVICEID id, PLOGICAL_DEVICE_INFO_V2 pInfo);
1865 #endif
1866
1867 /* hpt_get_device_info_v3
1868 * Version compatibility: v1.2.0.0 or later
1869 * Parameters:
1870 * id logical device id
1871 * pInfo pointer to LOGICAL_DEVICE_INFO_V3 structure
1872 * Returns:
1873 * 0 - Success
1874 */
1875 #if HPT_INTERFACE_VERSION>=0x01020000
1876 int hpt_get_device_info_v3(DEVICEID id, PLOGICAL_DEVICE_INFO_V3 pInfo);
1877 #endif
1878
1879 /* hpt_get_device_info_v4
1880 * Version compatibility: v2.0.0.1 or later
1881 * Parameters:
1882 * id logical device id
1883 * pInfo pointer to LOGICAL_DEVICE_INFO_V4 structure
1884 * Returns:
1885 * 0 - Success
1886 */
1887 #if HPT_INTERFACE_VERSION>=0x02000001
1888 int hpt_get_device_info_v4(DEVICEID id, PLOGICAL_DEVICE_INFO_V4 pInfo);
1889 #endif
1890
1891 /* hpt_create_transform
1892 * create a transform instance.
1893 * Version compatibility: v2.0.0.0 or later
1894 * Parameters:
1895 * idArray - source array
1896 * destInfo - destination array info
1897 * Returns:
1898 * destination array id
1899 */
1900 #if HPT_INTERFACE_VERSION>=0x02000000
1901 DEVICEID hpt_create_transform(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V2 destInfo);
1902 #endif
1903
1904 /* hpt_create_transform_v2
1905 * create a transform instance.
1906 * Version compatibility: v2.0.0.1 or later
1907 * Parameters:
1908 * idArray - source array
1909 * destInfo - destination array info
1910 * Returns:
1911 * destination array id
1912 */
1913 #if HPT_INTERFACE_VERSION>=0x02000001
1914 DEVICEID hpt_create_transform_v2(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V3 destInfo);
1915 #endif
1916
1917 /* hpt_step_transform
1918 * move a block in a tranform progress.
1919 * This function is called by mid-layer, not GUI (which uses set_array_state instead).
1920 * Version compatibility: v2.0.0.0 or later
1921 * Parameters:
1922 * idArray - destination array ID
1923 * the source ID will be invalid when transform complete.
1924 * Returns:
1925 * 0 - Success
1926 */
1927 #if HPT_INTERFACE_VERSION>=0x02000000
1928 int hpt_step_transform(DEVICEID idArray);
1929 #endif
1930
1931 /* hpt_set_vdev_info
1932 * set information for disk or array
1933 * Version compatibility: v1.2.0.0 or later
1934 * Parameters:
1935 * dev - destination device
1936 *
1937 * Returns:
1938 * 0 - Success
1939 */
1940 #if HPT_INTERFACE_VERSION>=0x01020000
1941 int hpt_set_vdev_info(DEVICEID dev, PSET_VDEV_INFO pInfo);
1942 #endif
1943
1944 /* hpt_init_disks
1945 * initialize disks for use
1946 * Version compatibility: v2.0.0.0 or later
1947 * Parameters:
1948 * ndev - number of disks to initialize
1949 * pIds - array of DEVICEID
1950 *
1951 * Returns:
1952 * 0 - Success
1953 */
1954 #if HPT_INTERFACE_VERSION>=0x02000000
1955 int hpt_init_disks(HPT_U32 ndev, DEVICEID * pIds);
1956 #endif
1957
1958 /* hpt_calc_max_array_capacity
1959 * cap max capacity of the array user want to create or transform
1960 * Version compatibility: v1.2.0.0 or later
1961 * Parameters:
1962 * source - if transform, this is the source array, otherwise, it should be zero
1963 * destInfo - target array params
1964 * Returns:
1965 * 0 - Success
1966 * cap - max capacity of the target array
1967 */
1968 #if HPT_INTERFACE_VERSION>=0x01020000
1969 int hpt_calc_max_array_capacity(DEVICEID source, PCREATE_ARRAY_PARAMS_V2 destInfo, HPT_U64 * cap);
1970 #endif
1971
1972 /* hpt_calc_max_array_capacity_v2
1973 * cap max capacity of the array user want to create or transform
1974 * Version compatibility: v2.0.0.1 or later
1975 * Parameters:
1976 * source - if transform, this is the source array, otherwise, it should be zero
1977 * destInfo - target array params
1978 * Returns:
1979 * 0 - Success
1980 * cap - max capacity of the target array
1981 */
1982 #if HPT_INTERFACE_VERSION>=0x02000001
1983 int hpt_calc_max_array_capacity_v2(DEVICEID source, PCREATE_ARRAY_PARAMS_V3 destInfo, HPT_U64 * cap);
1984 #endif
1985
1986 /* hpt_rebuild_data_block2
1987 * Used to copy data from source disk and mirror disk.
1988 * Version compatibility: v1.1.0.0 or later
1989 * Parameters:
1990 * idArray Array ID (RAID1, 0/1 or RAID5)
1991 * Lba Start LBA for each array member
1992 * nSector Number of sectors for each array member (RAID 5 will ignore this parameter)
1993 *
1994 * Returns:
1995 * 0 Success, event info is filled in *pEvent
1996 */
1997 #if HPT_INTERFACE_VERSION>=0x01010000
1998 int hpt_rebuild_data_block_v2(DEVICEID idMirror, HPT_U64 Lba, HPT_U16 nSector);
1999 #endif
2000
2001 /* hpt_verify_data_block2
2002 * verify data block on RAID1 or RAID5.
2003 * Version compatibility: v1.1.0.0 or later
2004 * Parameters:
2005 * idArray - Array ID
2006 * Lba - block number (on each array member, not logical block!)
2007 * nSectors - Sectors for each member (RAID 5 will ignore this parameter)
2008 * Returns:
2009 * 0 Success
2010 * 1 Data compare error
2011 * 2 I/O error
2012 */
2013 #if HPT_INTERFACE_VERSION>=0x01010000
2014 int hpt_verify_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors);
2015 #endif
2016
2017 /* hpt_initialize_data_block2
2018 * initialize data block (fill with zero) on RAID5
2019 * Version compatibility: v1.1.0.0 or later
2020 * Parameters:
2021 * idArray - Array ID
2022 * Lba - block number (on each array member, not logical block!)
2023 * nSectors - Sectors for each member (RAID 5 will ignore this parameter)
2024 * Returns:
2025 * 0 Success
2026 */
2027 #if HPT_INTERFACE_VERSION>=0x01010000
2028 int hpt_initialize_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors);
2029 #endif
2030
2031 /* hpt_i2c_transaction
2032 * perform an transaction on i2c bus
2033 * Version compatibility: v2.0.0.0 or later
2034 * Parameters:
2035 * indata[0] - controller ID
2036 * Returns:
2037 * 0 Success
2038 */
2039 #if HPT_INTERFACE_VERSION>=0x01020000
2040 int hpt_i2c_transaction(HPT_U8 *indata, HPT_U32 inlen, HPT_U8 *outdata, HPT_U32 outlen, HPT_U32 *poutlen);
2041 #endif
2042
2043 /* hpt_get_parameter_list
2044 * get a list of driver parameters.
2045 * Version compatibility: v1.0.0.0 or later
2046 * Parameters:
2047 * location - parameter location
2048 * outBuffer - a buffer to hold the output
2049 * outBufferSize - size of outBuffer
2050 * Returns:
2051 * 0 Success
2052 * put in outBuffer a list of zero terminated parameter names. the whole list
2053 * is terminated with an additional zero byte.
2054 */
2055 int hpt_get_parameter_list(HPT_U32 location, char *outBuffer, HPT_U32 outBufferSize);
2056
2057 /* hpt_{get,set}_parameter
2058 * get/set a parameter value.
2059 * Version compatibility: v1.0.0.0 or later
2060 * Parameters:
2061 * pParam - a pointer to HPT_DRIVER_PARAMETER.
2062 * Returns:
2063 * 0 Success
2064 */
2065 int hpt_get_parameter(PHPT_DRIVER_PARAMETER pParam);
2066 int hpt_set_parameter(PHPT_DRIVER_PARAMETER pParam);
2067 int hpt_reenumerate_device(DEVICEID id);
2068
2069 /*
2070 * hpt_get_enclosure_count
2071 * Version compatibility: v2.1.0.0 or later
2072 * Parameters:
2073 * controller_id
2074 * Returns:
2075 * number of enclosurers
2076 */
2077 int hpt_get_enclosure_count(int ctlr_id);
2078
2079 /* hpt_get_enclosure_info
2080 * Version compatibility: v2.1.0.0 or later
2081 * Parameters:
2082 * id enclosure id
2083 * pInfo pointer to ENCLOSURE_INFO buffer
2084 * Returns:
2085 * 0 Success, enclosure info is put into (*pInfo ).
2086 */
2087 int hpt_get_enclosure_info(int ctlr_id, int enc_id, PENCLOSURE_INFO pInfo);
2088
2089 int hpt_get_enclosure_info_v2(int ctlr_id, int enc_id, PENCLOSURE_INFO_V2 pInfo);
2090
2091 int hpt_get_enclosure_info_v3(int ctlr_id, int enc_id, PENCLOSURE_INFO_V3 pInfo);
2092
2093 /* performance monitor interface
2094 * Version compatibility: v2.1.0.0 or later
2095 */
2096 int hpt_get_perfmon_status(int ctlr_id, int *p_status);
2097 int hpt_set_perfmon_status(int ctlr_id, int enable);
2098 int hpt_get_perfmon_data(DEVICEID id, PHPT_PM_IOSTAT iostat);
2099
2100 /* hpt_get_controller_venid
2101 * Version compatibility: v1.0.0.0 or later
2102 */
2103 int hpt_get_controller_venid(int ctlr_id, HPT_U32 *venid);
2104
2105 #endif
2106
2107 #pragma pack()
2108
2109 #ifdef __cplusplus
2110 }
2111 #endif
2112 #endif
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