Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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sys/dev/hptmv/atapi.h
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1 /* 2 * Copyright (c) 2004-2005 HighPoint Technologies, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 #ifndef _ATAPI_H_ 30 #define _ATAPI_H_ 31 32 #pragma pack(1) 33 34 /*************************************************************************** 35 * IDE IO Register File 36 ***************************************************************************/ 37 38 /* 39 * IDE IO Port definition 40 */ 41 typedef struct _IDE_REGISTERS_1 { 42 USHORT Data; /* RW: Data port feature register */ 43 UCHAR BlockCount; /* RW: Sector count */ 44 UCHAR BlockNumber; /* RW: Sector number & LBA 0-7 */ 45 UCHAR CylinderLow; /* RW: Cylinder low & LBA 8-15 */ 46 UCHAR CylinderHigh; /* RW: Cylinder hign & LBA 16-23 */ 47 UCHAR DriveSelect; /* RW: Drive/head & LBA 24-27 */ 48 UCHAR Command; /* RO: Status WR:Command */ 49 } IDE_REGISTERS_1, *PIDE_REGISTERS_1; 50 51 52 /* 53 * IDE status definitions 54 */ 55 #define IDE_STATUS_ERROR 0x01 /* Error Occurred in Execution */ 56 #define IDE_STATUS_INDEX 0x02 /* is vendor specific */ 57 #define IDE_STATUS_CORRECTED_ERROR 0x04 /* Corrected Data */ 58 #define IDE_STATUS_DRQ 0x08 /* Ready to transfer data */ 59 #define IDE_STATUS_DSC 0x10 /* not defined in ATA-2 */ 60 #define IDE_STATUS_DWF 0x20 /* Device Fault has been detected */ 61 #define IDE_STATUS_DRDY 0x40 /* Device Ready to accept command */ 62 #define IDE_STATUS_IDLE 0x50 /* Device is OK */ 63 #define IDE_STATUS_BUSY 0x80 /* Device Busy, must wait */ 64 65 66 #define IDE_ERROR_BAD_BLOCK 0x80 /* Reserved now */ 67 #define IDE_ERROR_DATA_ERROR 0x40 /* Uncorreectable Data Error */ 68 #define IDE_ERROR_MEDIA_CHANGE 0x20 /* Media Changed */ 69 #define IDE_ERROR_ID_NOT_FOUND 0x10 /* ID Not Found */ 70 #define IDE_ERROR_MEDIA_CHANGE_REQ 0x08 /* Media Change Requested */ 71 #define IDE_ERROR_COMMAND_ABORTED 0x04 /* Aborted Command */ 72 #define IDE_ERROR_TRACK0_NOT_FOUND 0x02 /* Track 0 Not Found */ 73 #define IDE_ERROR_ADDRESS_NOT_FOUND 0x01 /* Address Mark Not Found */ 74 75 76 #define LBA_MODE 0x40 77 78 /* 79 * IDE command definitions 80 */ 81 82 #define IDE_COMMAND_RECALIBRATE 0x10 /* Recalibrate */ 83 #define IDE_COMMAND_READ 0x20 /* Read Sectors with retry */ 84 #define IDE_COMMAND_WRITE 0x30 /* Write Sectors with retry */ 85 #define IDE_COMMAND_VERIFY 0x40 /* Read Verify Sectors with Retry */ 86 #define IDE_COMMAND_SEEK 0x70 /* Seek */ 87 #define IDE_COMMAND_SET_DRIVE_PARAMETER 0x91 /* Initialize Device Parmeters */ 88 #define IDE_COMMAND_GET_MEDIA_STATUS 0xDA 89 #define IDE_COMMAND_DOOR_LOCK 0xDE /* Door Lock */ 90 #define IDE_COMMAND_DOOR_UNLOCK 0xDF /* Door Unlock */ 91 #define IDE_COMMAND_ENABLE_MEDIA_STATUS 0xEF /* Set Features */ 92 #define IDE_COMMAND_IDENTIFY 0xEC /* Identify Device */ 93 #define IDE_COMMAND_MEDIA_EJECT 0xED 94 #define IDE_COMMAND_SET_FEATURES 0xEF /* IDE set features command */ 95 96 #define IDE_COMMAND_FLUSH_CACHE 0xE7 97 #define IDE_COMMAND_STANDBY_IMMEDIATE 0xE0 98 99 #ifndef NOT_SUPPORT_MULTIPLE 100 #define IDE_COMMAND_READ_MULTIPLE 0xC4 /* Read Multiple */ 101 #define IDE_COMMAND_WRITE_MULTIPLE 0xC5 /* Write Multiple */ 102 #define IDE_COMMAND_SET_MULTIPLE 0xC6 /* Set Multiple Mode */ 103 #endif 104 105 #ifndef NOT_SUPPORT_DMA 106 #define IDE_COMMAND_DMA_READ 0xc8 /* IDE DMA read command */ 107 #define IDE_COMMAND_DMA_WRITE 0xca /* IDE DMA write command */ 108 #endif 109 110 #define IDE_COMMAND_READ_DMA_QUEUE 0xc7 /* IDE read DMA queue command */ 111 #define IDE_COMMAND_WRITE_DMA_QUEUE 0xcc /* IDE write DMA queue command */ 112 #define IDE_COMMAND_SERVICE 0xA2 /* IDE service command command */ 113 #define IDE_COMMAND_NOP 0x00 /* IDE NOP command */ 114 #define IDE_STATUS_SRV 0x10 115 #define IDE_RELEASE_BUS 4 116 117 /*#define IDE_COMMAND_FLUSH_CACHE_EXT */ 118 #define IDE_COMMAND_READ_DMA_EXT 0x25 119 #define IDE_COMMAND_READ_QUEUE_EXT 0x26 120 #define IDE_COMMAND_READ_MULTIPLE_EXT 0x29 121 #define IDE_COMMAND_READ_MAX_ADDR 0x27 122 #define IDE_COMMAND_READ_EXT 0x24 123 #define IDE_COMMAND_VERIFY_EXT 0x42 124 #define IDE_COMMAND_SET_MULTIPLE_EXT 0x37 125 #define IDE_COMMAND_WRITE_DMA_EXT 0x35 126 #define IDE_COMMAND_WRITE_QUEUE_EXT 0x36 127 #define IDE_COMMAND_WRITE_EXT 0x34 128 #define IDE_COMMAND_WRITE_MULTIPLE_EXT 0x39 129 130 /* 131 * IDE_COMMAND_SET_FEATURES 132 */ 133 #define FT_USE_ULTRA 0x40 /* Set feature for Ultra DMA */ 134 #define FT_USE_MWDMA 0x20 /* Set feature for MW DMA */ 135 #define FT_USE_SWDMA 0x10 /* Set feature for SW DMA */ 136 #define FT_USE_PIO 0x8 /* Set feature for PIO */ 137 #define FT_DISABLE_IORDY 0x10 /* Set feature for disabling IORDY */ 138 139 /* 140 * S.M.A.R.T. commands 141 */ 142 #define IDE_COMMAND_SMART 0xB0 143 #define SMART_READ_VALUES 0xd0 144 #define SMART_READ_THRESHOLDS 0xd1 145 #define SMART_AUTOSAVE 0xd2 146 #define SMART_SAVE 0xd3 147 #define SMART_IMMEDIATE_OFFLINE 0xd4 148 #define SMART_READ_LOG_SECTOR 0xd5 149 #define SMART_WRITE_LOG_SECTOR 0xd6 150 #define SMART_ENABLE 0xd8 151 #define SMART_DISABLE 0xd9 152 #define SMART_STATUS 0xda 153 #define SMART_AUTO_OFFLINE 0xdb 154 155 /*************************************************************************** 156 * IDE Control Register File 157 ***************************************************************************/ 158 159 typedef struct _IDE_REGISTERS_2 { 160 UCHAR AlternateStatus; /* RW: device control port */ 161 } IDE_REGISTERS_2, *PIDE_REGISTERS_2; 162 163 164 /* 165 * IDE drive control definitions 166 */ 167 #define IDE_DC_DISABLE_INTERRUPTS 0x02 168 #define IDE_DC_RESET_CONTROLLER 0x04 169 #define IDE_DC_REENABLE_CONTROLLER 0x00 170 171 /*************************************************************************** 172 * MSNS: Removable device 173 ***************************************************************************/ 174 /* 175 * Media syatus 176 */ 177 #define MSNS_NO_MEDIA 2 178 #define MSNS_MEDIA_CHANGE_REQUEST 8 179 #define MSNS_MIDIA_CHANGE 0x20 180 #define MSNS_WRITE_PROTECT 0x40 181 #define MSNS_READ_PROTECT 0x80 182 183 /*************************************************************************** 184 * ATAPI IO Register File 185 ***************************************************************************/ 186 187 /* 188 * ATAPI register definition 189 */ 190 191 typedef struct _ATAPI_REGISTERS_1 { 192 USHORT Data; 193 UCHAR InterruptReason; /* Atapi Phase Port */ 194 UCHAR Unused1; 195 UCHAR ByteCountLow; /* Byte Count LSB */ 196 UCHAR ByteCountHigh; /* Byte Count MSB */ 197 UCHAR DriveSelect; 198 UCHAR Command; 199 } ATAPI_REGISTERS_1, *PATAPI_REGISTERS_1; 200 201 /* 202 * Atapi Error Status 203 */ 204 #define IDE_ERROR_END_OF_MEDIA IDE_ERROR_TRACK0_NOT_FOUND 205 #define IDE_ERROR_ILLEGAL_LENGTH IDE_ERROR_ADDRESS_NOT_FOUND 206 207 /* 208 * ATAPI interrupt reasons 209 */ 210 #define ATAPI_IR_COD 0x01 211 #define ATAPI_IR_IO 0x02 212 213 /* sense key */ 214 #define ATAPI_SENSE_NO_SENSE 0x00 215 #define ATAPI_SENSE_RECOVERED_ERROR 0x01 216 #define ATAPI_SENSE_NOT_READY 0x02 217 #define ATAPI_SENSE_MEDIUM_ERROR 0x03 218 #define ATAPI_SENSE_HARDWARE_ERROR 0x04 219 #define ATAPI_SENSE_ILLEGAL_REQUEST 0x05 220 #define ATAPI_SENSE_UNIT_ATTENTION 0x06 221 #define ATAPI_SENSE_DATA_PROTECT 0x07 222 #define ATAPI_SENSE_BLANK_CHECK 0x08 223 #define ATAPI_SENSE_UNIQUE 0x09 224 #define ATAPI_SENSE_COPY_ABORTED 0x0A 225 #define ATAPI_SENSE_ABORTED_COMMAND 0x0B 226 #define ATAPI_SENSE_EQUAL 0x0C 227 #define ATAPI_SENSE_VOL_OVERFLOW 0x0D 228 #define ATAPI_SENSE_MISCOMPARE 0x0E 229 #define ATAPI_SENSE_RESERVED 0x0F 230 231 /* Additional Sense codes */ 232 #define ATAPI_ASC_NO_SENSE 0x00 233 #define ATAPI_ASC_LUN_NOT_READY 0x04 234 #define ATAPI_ASC_TRACK_ERROR 0x14 235 #define ATAPI_ASC_SEEK_ERROR 0x15 236 #define ATAPI_ASC_REC_DATA_NOECC 0x17 237 #define ATAPI_ASC_REC_DATA_ECC 0x18 238 #define ATAPI_ASC_ILLEGAL_COMMAND 0x20 239 #define ATAPI_ASC_ILLEGAL_BLOCK 0x21 240 #define ATAPI_ASC_INVALID_CDB 0x24 241 #define ATAPI_ASC_INVALID_LUN 0x25 242 #define ATAPI_ASC_PROTECT 0x27 243 #define ATAPI_ASC_MEDIUM_CHANGED 0x28 244 #define ATAPI_ASC_BUS_RESET 0x29 245 #define ATAPI_ASC_NO_MEDIA_IN_DEVICE 0x3a 246 #define ATAPI_ASC_MUSIC_AREA 0xA0 247 #define ATAPI_ASC_DATA_AREA 0xA1 248 #define ATAPI_ASC_VOLUME_OVERFLOW 0xA7 249 250 /* 251 * IDE command definitions ( for ATAPI ) 252 */ 253 254 #define IDE_COMMAND_ATAPI_RESET 0x08 /* Atapi Software Reset command */ 255 #define IDE_COMMAND_ATAPI_PACKET 0xA0 /* Atapi Identify command */ 256 #define IDE_COMMAND_ATAPI_IDENTIFY 0xA1 /* Atapi Packet Command */ 257 258 259 /* 260 * ATAPI command definitions 261 */ 262 263 #define ATAPI_TEST_UNIT_READY 0x00 264 #define ATAPI_REZERO_UNIT 0x01 265 #define ATAPI_REQUEST_SENSE 0x03 266 #define ATAPI_FORMAT_UNIT6 0x04 267 #define ATAPI_FORMAT_UNIT 0x24 268 #define ATAPI_INQUIRY 0x12 269 #define ATAPI_MODE_SELECT 0x15 270 #define ATAPI_RELEASE6 0x17 271 #define ATAPI_MODE_SENSE 0x1A 272 #define ATAPI_START_STOP_UNIT 0x1B 273 #define ATAPI_LOAD_UNLOAD 0x1B 274 #define ATAPI_RECEIVE_DIAGNOSTIC 0x1C 275 #define ATAPI_SEND_DIAGNOSTIC 0x1D 276 #define ATAPI_MEDIUM_REMOVAL 0x1E 277 #define ATAPI_READ_FORMAT_CAPACITY 0x23 278 #define ATAPI_READ_CAPACITY 0x25 279 #define ATAPI_READ 0x28 280 #define ATAPI_WRITE 0x2A 281 #define ATAPI_SEEK 0x2B 282 #define ATAPI_ERASE 0x2C 283 #define ATAPI_VERIFY 0x2F 284 #define ATAPI_WRITE_VERIFY 0x2E 285 #define ATAPI_SYNCHRONIZE_CACHE 0x35 286 #define ATAPI_LOCK_CACHE 0x36 287 #define ATAPI_COMPARE 0x39 288 #define ATAPI_WRITE_BUFFER 0x3B 289 #define ATAPI_READ_DATA_BUFF 0x3C 290 #define ATAPI_READ_SUB_CHANNEL 0x42 291 #define ATAPI_READ_TOC 0x43 292 #define ATAPI_READ_HEADER 0x44 293 #define ATAPI_PLAY_AUDIO10 0x45 294 #define ATAPI_GET_CONFIGURATION 0x46 295 #define ATAPI_PLAY_AUDIO_MSF 0x47 296 #define ATAPI_GET_EVENT_STATUS_NOTIFICATION 0x4A 297 #define ATAPI_PAUSE_RESUME 0x4B 298 #define ATAPI_LOG_SELECT 0x4C 299 #define ATAPI_LOG_SENSE 0x4D 300 #define ATAPI_STOP_PLAY_SCAN 0x4E 301 #define ATAPI_READ_DISK_INFORMATION 0x51 302 #define ATAPI_READ_TRACK_INFORMATION 0x52 303 #define ATAPI_RESERVE_TRACK_RZONE 0x53 304 #define ATAPI_SEND_OPC_INFORMATION 0x54 305 #define ATAPI_MODE_SELECT10 0x55 306 #define ATAPI_RELEASE10 0x57 307 #define ATAPI_REPAIR_ZONE 0x58 308 #define ATAPI_MODE_SENSE10 0x5A 309 #define ATAPI_CLOSE_TRACK_SESSION 0x5B 310 #define ATAPI_READ_BUFFER_CAPACITY 0x5C 311 #define ATAPI_SEND_CUE_SHEET 0x5D 312 #define ATAPI_BLANK_COMMAND 0xA1 /*Provide the ability to erase any part of a CD-RW disc.*/ 313 #define ATAPI_SEND_EVENT 0xA2 /* add for DVD */ 314 #define ATAPI_SEND_KEY 0xA3 /* add for DVD */ 315 #define ATAPI_REPORT_KEY 0xA4 316 #define ATAPI_PLAY_AUDIO 0xA5 317 #define ATAPI_LOAD_UNLOAD_MEDIUM 0xA6 318 #define ATAPI_SET_READ_AHEAD 0xA7 319 #define ATAPI_READ12 0xA8 320 #define ATAPI_READ_DVD_STRUCTURE 0xAD 321 #define ATAPI_WRITE12 0xAA 322 #define ATAPI_GET_PERFORM_NOTIFICATION 0xAC /* add for DVD-RW */ 323 #define ATAPI_SET_STREAM 0xB6 /* add for DVD-RW */ 324 #define ATAPI_READ_CD_MSF 0xB9 325 #define ATAPI_SCAN 0xBA 326 #define ATAPI_SET_SPEED 0xBB /* no payload */ 327 #define ATAPI_MECHANISM_STATUS 0xBD 328 #define ATAPI_READ_CD 0xBE 329 #define ATAPI_SEND_DVD_STRUCTURE 0xBF 330 #define ATAPI_SET_CDRW_SPEED 0xDA /*WindowsXP need*/ 331 332 #define MODE_DSP_WRITE_PROTECT 0x80 333 334 335 /*************************************************************************** 336 * ATAPI IO Register File 337 ***************************************************************************/ 338 339 340 typedef struct _ATAPI_REGISTERS_2 { 341 UCHAR AlternateStatus; 342 } ATAPI_REGISTERS_2, *PATAPI_REGISTERS_2; 343 344 345 /*************************************************************************** 346 * ATAPI packets 347 ***************************************************************************/ 348 typedef struct _ATAPI_SENSE_DATA { 349 #ifdef __BIG_ENDIAN_BITFIELD 350 UCHAR Valid:1; 351 UCHAR ErrorCode:7; 352 UCHAR SegmentNumber; 353 UCHAR FileMark:1; 354 UCHAR EndOfMedia:1; 355 UCHAR IncorrectLength:1; 356 UCHAR Reserved:1; 357 UCHAR SenseKey:4; 358 #else 359 UCHAR ErrorCode:7; 360 UCHAR Valid:1; 361 UCHAR SegmentNumber; 362 UCHAR SenseKey:4; 363 UCHAR Reserved:1; 364 UCHAR IncorrectLength:1; 365 UCHAR EndOfMedia:1; 366 UCHAR FileMark:1; 367 #endif 368 UCHAR Information[4]; 369 UCHAR AdditionalSenseLength; 370 UCHAR CommandSpecificInformation[4]; 371 UCHAR AdditionalSenseCode; 372 UCHAR AdditionalSenseCodeQualifier; 373 UCHAR FieldReplaceableUnitCode; 374 UCHAR SenseKeySpecific[3]; 375 } ATAPI_SENSE_DATA, *PATAPI_SENSE_DATA; 376 377 /* 378 * IDENTIFY data 379 */ 380 typedef struct _IDENTIFY_DATA { 381 USHORT GeneralConfiguration; /* 00 00 */ 382 USHORT NumberOfCylinders; /* 02 1 */ 383 USHORT Reserved1; /* 04 2 */ 384 USHORT NumberOfHeads; /* 06 3 */ 385 USHORT UnformattedBytesPerTrack; /* 08 4 */ 386 USHORT UnformattedBytesPerSector; /* 0A 5 */ 387 USHORT SectorsPerTrack; /* 0C 6 */ 388 USHORT VendorUnique1[3]; /* 0E 7-9 */ 389 USHORT SerialNumber[10]; /* 14 10-19 */ 390 USHORT BufferType; /* 28 20 */ 391 USHORT BufferSectorSize; /* 2A 21 */ 392 USHORT NumberOfEccBytes; /* 2C 22 */ 393 USHORT FirmwareRevision[4]; /* 2E 23-26 */ 394 USHORT ModelNumber[20]; /* 36 27-46 */ 395 UCHAR MaximumBlockTransfer; /* 5E 47 */ 396 UCHAR VendorUnique2; /* 5F */ 397 USHORT DoubleWordIo; /* 60 48 */ 398 USHORT Capabilities; /* 62 49 */ 399 USHORT Reserved2; /* 64 50 */ 400 UCHAR VendorUnique3; /* 66 51 */ 401 UCHAR PioCycleTimingMode; /* 67 */ 402 UCHAR VendorUnique4; /* 68 52 */ 403 UCHAR DmaCycleTimingMode; /* 69 */ 404 USHORT TranslationFieldsValid; /* 6A 53 */ 405 USHORT NumberOfCurrentCylinders; /* 6C 54 */ 406 USHORT NumberOfCurrentHeads; /* 6E 55 */ 407 USHORT CurrentSectorsPerTrack; /* 70 56 */ 408 ULONG CurrentSectorCapacity; /* 72 57-58 */ 409 USHORT CurrentMultiSectorSetting; /* 76 59 */ 410 ULONG UserAddressableSectors; /* 78 60-61 */ 411 UCHAR SingleWordDMASupport; /* 7C 62 */ 412 UCHAR SingleWordDMAActive; /* 7D */ 413 UCHAR MultiWordDMASupport; /* 7E 63 */ 414 UCHAR MultiWordDMAActive; /* 7F */ 415 UCHAR AdvancedPIOModes; /* 80 64 */ 416 UCHAR Reserved4; /* 81 */ 417 USHORT MinimumMWXferCycleTime; /* 82 65 */ 418 USHORT RecommendedMWXferCycleTime; /* 84 66 */ 419 USHORT MinimumPIOCycleTime; /* 86 67 */ 420 USHORT MinimumPIOCycleTimeIORDY; /* 88 68 */ 421 USHORT Reserved5[2]; /* 8A 69-70 */ 422 USHORT ReleaseTimeOverlapped; /* 8E 71 */ 423 USHORT ReleaseTimeServiceCommand; /* 90 72 */ 424 USHORT MajorRevision; /* 92 73 */ 425 USHORT MinorRevision; /* 94 74 */ 426 USHORT MaxQueueDepth; /* 96 75 */ 427 USHORT SataCapability; /* 76 */ 428 USHORT Reserved6[9]; /* 98 77-85 */ 429 USHORT CommandSupport; /* 86 */ 430 USHORT CommandEnable; /* 87 */ 431 USHORT UtralDmaMode; /* 88 */ 432 USHORT Reserved7[11]; /* 89-99 */ 433 ULONG Lba48BitLow; /* 101-100 */ 434 ULONG Lba48BitHigh; /* 103-102 */ 435 USHORT Reserved8[23]; /* 104-126 */ 436 USHORT SpecialFunctionsEnabled; /* 127 */ 437 USHORT Reserved9[128]; /* 128-255 */ 438 439 } IDENTIFY_DATA, *PIDENTIFY_DATA; 440 441 typedef struct _CONFIGURATION_IDENTIFY_DATA { 442 USHORT Revision; 443 USHORT MWDMAModeSupported; 444 USHORT UDMAModeSupported; 445 ULONG MaximumLbaLow; 446 ULONG MaximumLbaHigh; 447 USHORT CommandSupport; 448 USHORT Reserved[247]; 449 UCHAR Signature; /* 0xA5 */ 450 UCHAR CheckSum; 451 } 452 CONFIGURATION_IDENTIFY_DATA, *PCONFIGURATION_IDENTIFY_DATA; 453 454 /* */ 455 /* Identify data without the Reserved4. */ 456 /* */ 457 typedef struct _IDENTIFY_DATA2 { 458 USHORT GeneralConfiguration; /* 00 00 */ 459 USHORT NumberOfCylinders; /* 02 1 */ 460 USHORT Reserved1; /* 04 2 */ 461 USHORT NumberOfHeads; /* 06 3 */ 462 USHORT UnformattedBytesPerTrack; /* 08 4 */ 463 USHORT UnformattedBytesPerSector; /* 0A 5 */ 464 USHORT SectorsPerTrack; /* 0C 6 */ 465 USHORT VendorUnique1[3]; /* 0E 7-9 */ 466 USHORT SerialNumber[10]; /* 14 10-19 */ 467 USHORT BufferType; /* 28 20 */ 468 USHORT BufferSectorSize; /* 2A 21 */ 469 USHORT NumberOfEccBytes; /* 2C 22 */ 470 USHORT FirmwareRevision[4]; /* 2E 23-26 */ 471 USHORT ModelNumber[20]; /* 36 27-46 */ 472 UCHAR MaximumBlockTransfer; /* 5E 47 */ 473 UCHAR VendorUnique2; /* 5F */ 474 USHORT DoubleWordIo; /* 60 48 */ 475 USHORT Capabilities; /* 62 49 */ 476 USHORT Reserved2; /* 64 50 */ 477 UCHAR VendorUnique3; /* 66 51 */ 478 UCHAR PioCycleTimingMode; /* 67 */ 479 UCHAR VendorUnique4; /* 68 52 */ 480 UCHAR DmaCycleTimingMode; /* 69 */ 481 USHORT TranslationFieldsValid; /* 6A 53 */ 482 USHORT NumberOfCurrentCylinders; /* 6C 54 */ 483 USHORT NumberOfCurrentHeads; /* 6E 55 */ 484 USHORT CurrentSectorsPerTrack; /* 70 56 */ 485 ULONG CurrentSectorCapacity; /* 72 57-58 */ 486 USHORT CurrentMultiSectorSetting; /* 59 */ 487 ULONG UserAddressableSectors; /* 60-61 */ 488 UCHAR SingleWordDMASupport; /* 62 */ 489 UCHAR SingleWordDMAActive; 490 UCHAR MultiWordDMASupport; /* 63 */ 491 UCHAR MultiWordDMAActive; 492 UCHAR AdvancedPIOModes; /* 64 */ 493 UCHAR Reserved4; 494 USHORT MinimumMWXferCycleTime; /* 65 */ 495 USHORT RecommendedMWXferCycleTime; /* 66 */ 496 USHORT MinimumPIOCycleTime; /* 67 */ 497 USHORT MinimumPIOCycleTimeIORDY; /* 68 */ 498 USHORT Reserved5[2]; /* 69-70 */ 499 USHORT ReleaseTimeOverlapped; /* 71 */ 500 USHORT ReleaseTimeServiceCommand; /* 72 */ 501 USHORT MajorRevision; /* 73 */ 502 USHORT MinorRevision; /* 74 */ 503 /* USHORT Reserved6[14]; // 75-88 */ 504 } IDENTIFY_DATA2, *PIDENTIFY_DATA2; 505 506 #define IDENTIFY_DATA_SIZE sizeof(IDENTIFY_DATA2) 507 508 /* */ 509 /* IDENTIFY DMA timing cycle modes. */ 510 /* */ 511 512 #define IDENTIFY_DMA_CYCLES_MODE_0 0x00 513 #define IDENTIFY_DMA_CYCLES_MODE_1 0x01 514 #define IDENTIFY_DMA_CYCLES_MODE_2 0x02 515 516 /* 517 * Mode definitions 518 */ 519 typedef enum _DISK_MODE 520 { 521 IDE_PIO_0 = 0, 522 IDE_PIO_1, 523 IDE_PIO_2, 524 IDE_PIO_3, 525 IDE_PIO_4, 526 IDE_MWDMA_0, 527 IDE_MWDMA_1, 528 IDE_MWDMA_2, 529 IDE_UDMA_0, 530 IDE_UDMA_1, 531 IDE_UDMA_2, 532 IDE_UDMA_3, 533 IDE_UDMA_4, 534 IDE_UDMA_5, 535 IDE_UDMA_6, 536 IDE_UDMA_7, 537 } DISK_MODE; 538 539 /*************************************************************************** 540 * IDE Macro 541 ***************************************************************************/ 542 #ifndef MAX_LBA_T 543 #define MAX_LBA_T ((LBA_T)-1) 544 #endif 545 546 #define SECTOR_TO_BYTE_SHIFT 9 547 #define SECTOR_TO_BYTE(x) ((ULONG)(x) << SECTOR_TO_BYTE_SHIFT) 548 549 #define mGetStatus(IOPort2) (UCHAR)InPort(&IOPort2->AlternateStatus) 550 #define mUnitControl(IOPort2, Value) OutPort(&IOPort2->AlternateStatus,(UCHAR)(Value)) 551 552 #define mGetErrorCode(IOPort) (UCHAR)InPort((PUCHAR)&IOPort->Data+1) 553 #define mSetFeaturePort(IOPort,x) OutPort((PUCHAR)&IOPort->Data+1, x) 554 #define mSetBlockCount(IOPort,x) OutPort(&IOPort->BlockCount, x) 555 #define mGetBlockCount(IOPort) (UCHAR)InPort(&IOPort->BlockCount) 556 #define mGetInterruptReason(IOPort) (UCHAR)InPort(&IOPort->BlockCount) 557 #define mSetBlockNumber(IOPort,x) OutPort(&IOPort->BlockNumber, x) 558 #define mGetBlockNumber(IOPort) (UCHAR)InPort((PUCHAR)&IOPort->BlockNumber) 559 #define mGetByteLow(IOPort) (UCHAR)InPort(&IOPort->CylinderLow) 560 #define mSetCylinderLow(IOPort,x) OutPort(&IOPort->CylinderLow, x) 561 #define mGetByteHigh(IOPort) (UCHAR)InPort(&IOPort->CylinderHigh) 562 #define mSetCylinderHigh(IOPort,x) OutPort(&IOPort->CylinderHigh, x) 563 #define mGetBaseStatus(IOPort) (UCHAR)InPort(&IOPort->Command) 564 #ifdef SUPPORT_HPT601 565 #define mSelectUnit(IOPort,UnitId) do {\ 566 OutPort(&IOPort->DriveSelect, (UCHAR)(UnitId));\ 567 OutPort(&IOPort->DriveSelect, (UCHAR)(UnitId));\ 568 } while (0) 569 #else 570 #define mSelectUnit(IOPort,UnitId) OutPort(&IOPort->DriveSelect, (UCHAR)(UnitId)) 571 #endif 572 #define mGetUnitNumber(IOPort) InPort(&IOPort->DriveSelect) 573 #define mIssueCommand(IOPort,Cmd) OutPort(&IOPort->Command, (UCHAR)(Cmd)) 574 575 /* 576 * WDC old disk, don't care right now 577 */ 578 #define WDC_MW1_FIX_FLAG_OFFSET 129 579 #define WDC_MW1_FIX_FLAG_VALUE 0x00005555 580 581 #pragma pack() 582 #endif 583 584 585
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