FreeBSD/Linux Kernel Cross Reference
sys/dev/hptrr/him.h
1 /*
2 * Copyright (c) HighPoint Technologies, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD$
27 */
28 #include <dev/hptrr/hptrr_config.h>
29 /*
30 * $Id: him.h,v 1.41 2007/01/12 09:12:49 gmm Exp $
31 * Copyright (C) 2004-2005 HighPoint Technologies, Inc. All rights reserved.
32 */
33 #ifndef _HPT_HIM_H_
34 #define _HPT_HIM_H_
35
36 #define VERMAGIC_HIM 41
37
38 #if defined(__cplusplus)
39 extern "C" {
40 #endif
41
42 #include <dev/hptrr/list.h>
43
44 #define SECTOR_TO_BYTE_SHIFT 9
45 #define SECTOR_TO_BYTE(x) ((HPT_U32)(x) << SECTOR_TO_BYTE_SHIFT)
46 #define BYTE_TO_SECTOR(x) ((x)>>SECTOR_TO_BYTE_SHIFT)
47
48 typedef struct _PCI_ID
49 {
50 HPT_U16 vid;
51 HPT_U16 did;
52 HPT_U32 subsys;
53 HPT_U8 rev;
54 HPT_U8 nbase;
55 HPT_U16 reserve;
56 }
57 PCI_ID;
58
59 typedef struct _PCI_ADDRESS
60 {
61 HPT_U8 tree;
62 HPT_U8 bus;
63 HPT_U8 device;
64 HPT_U8 function;
65 }
66 PCI_ADDRESS;
67
68 typedef struct _HIM_ADAPTER_CONFIG
69 {
70 PCI_ADDRESS pci_addr;
71 PCI_ID pci_id;
72
73 HPT_U8 max_devices;
74 HPT_U8 reserve1;
75
76 HPT_U8 bDevsPerBus;
77 HPT_U8 first_on_slot;
78
79 HPT_U8 bChipType;
80 HPT_U8 bChipIntrNum;
81 HPT_U8 bChipFlags;
82 HPT_U8 bNumBuses;
83
84 HPT_U8 szVendorID[36];
85 HPT_U8 szProductID[36];
86 }
87 HIM_ADAPTER_CONFIG, *PHIM_ADAPTER_CONFIG;
88
89 typedef struct _HIM_CHANNEL_CONFIG
90 {
91 HPT_U32 io_port;
92 HPT_U32 ctl_port;
93 } HIM_CHANNEL_CONFIG, *PHIM_CHANNEL_CONFIG;
94
95 typedef struct _HIM_DEVICE_FLAGS
96 {
97 HPT_U32 df_atapi :1;
98 HPT_U32 df_removable_drive :1;
99 HPT_U32 df_on_line :1;
100 HPT_U32 df_reduce_mode :1;
101 HPT_U32 df_sata :1;
102 HPT_U32 df_on_pm_port :1;
103 HPT_U32 df_support_read_ahead :1;
104 HPT_U32 df_read_ahead_enabled :1;
105 HPT_U32 df_support_write_cache :1;
106 HPT_U32 df_write_cache_enabled :1;
107 HPT_U32 df_cdrom_device :1;
108 HPT_U32 df_tape_device :1;
109 HPT_U32 df_support_tcq :1;
110 HPT_U32 df_tcq_enabled :1;
111 HPT_U32 df_support_ncq :1;
112 HPT_U32 df_ncq_enabled :1;
113 } DEVICE_FLAGS, *PDEVICE_FLAGS;
114
115 #pragma pack(1)
116 typedef struct _IDENTIFY_DATA2 {
117 HPT_U16 GeneralConfiguration;
118 HPT_U16 NumberOfCylinders;
119 HPT_U16 Reserved1;
120 HPT_U16 NumberOfHeads;
121 HPT_U16 UnformattedBytesPerTrack;
122 HPT_U16 UnformattedBytesPerSector;
123 HPT_U16 SectorsPerTrack;
124 HPT_U16 VendorUnique1[3];
125 HPT_U16 SerialNumber[10];
126 HPT_U16 BufferType;
127 HPT_U16 BufferSectorSize;
128 HPT_U16 NumberOfEccBytes;
129 HPT_U16 FirmwareRevision[4];
130 HPT_U16 ModelNumber[20];
131 HPT_U8 MaximumBlockTransfer;
132 HPT_U8 VendorUnique2;
133 HPT_U16 DoubleWordIo;
134 HPT_U16 Capabilities;
135 HPT_U16 Reserved2;
136 HPT_U8 VendorUnique3;
137 HPT_U8 PioCycleTimingMode;
138 HPT_U8 VendorUnique4;
139 HPT_U8 DmaCycleTimingMode;
140 HPT_U16 TranslationFieldsValid;
141 HPT_U16 NumberOfCurrentCylinders;
142 HPT_U16 NumberOfCurrentHeads;
143 HPT_U16 CurrentSectorsPerTrack;
144 HPT_U32 CurrentSectorCapacity;
145 HPT_U16 CurrentMultiSectorSetting;
146 HPT_U32 UserAddressableSectors;
147 HPT_U8 SingleWordDMASupport;
148 HPT_U8 SingleWordDMAActive;
149 HPT_U8 MultiWordDMASupport;
150 HPT_U8 MultiWordDMAActive;
151 HPT_U8 AdvancedPIOModes;
152 HPT_U8 Reserved4;
153 HPT_U16 MinimumMWXferCycleTime;
154 HPT_U16 RecommendedMWXferCycleTime;
155 HPT_U16 MinimumPIOCycleTime;
156 HPT_U16 MinimumPIOCycleTimeIORDY;
157 HPT_U16 Reserved5[2];
158 HPT_U16 ReleaseTimeOverlapped;
159 HPT_U16 ReleaseTimeServiceCommand;
160 HPT_U16 MajorRevision;
161 HPT_U16 MinorRevision;
162 }
163 #ifdef __GNUC__
164 __attribute__((packed))
165 #endif
166 IDENTIFY_DATA2, *PIDENTIFY_DATA2;
167 #pragma pack()
168
169 typedef struct _HIM_DEVICE_CONFIG
170 {
171 HPT_U64 capacity;
172
173 DEVICE_FLAGS flags;
174
175 HPT_U8 path_id;
176 HPT_U8 target_id;
177 HPT_U8 max_queue_depth;
178 HPT_U8 spin_up_mode;
179
180 HPT_U8 reserved;
181 HPT_U8 transfer_mode;
182 HPT_U8 bMaxShowMode;
183 HPT_U8 bDeUsable_Mode;
184
185 HPT_U16 max_sectors_per_cmd;
186
187 PIDENTIFY_DATA2 pIdentifyData;
188
189 }
190 HIM_DEVICE_CONFIG, *PHIM_DEVICE_CONFIG;
191
192
193 #define _DIT_MODE 0
194 #define _DIT_601 1
195 #define _DIT_READ_AHEAD 2
196 #define _DIT_WRITE_CACHE 3
197 #define _DIT_TCQ 4
198 #define _DIT_NCQ 5
199 #define _DIT_BEEP_OFF 6
200 #define _DIT_SPIN_UP_MODE 7
201
202 #define SPIN_UP_MODE_NOSUPPORT 0
203 #define SPIN_UP_MODE_FULL 1
204 #define SPIN_UP_MODE_STANDBY 2
205
206 struct tcq_control {
207 HPT_U8 enable;
208 HPT_U8 depth;
209 };
210
211 struct ncq_control {
212 HPT_U8 enable;
213 HPT_U8 depth;
214 };
215
216 typedef struct _HIM_ALTERABLE_DEV_INFO{
217 HPT_U8 type;
218 union {
219 HPT_U8 mode;
220 HPT_U8 enable_read_ahead;
221 HPT_U8 enable_read_cache;
222 HPT_U8 enable_write_cache;
223 struct tcq_control tcq;
224 struct ncq_control ncq;
225 void * adapter;
226 HPT_U8 spin_up_mode;
227 }u;
228 } HIM_ALTERABLE_DEV_INFO, *PHIM_ALTERABLE_DEV_INFO;
229
230 struct _COMMAND;
231 struct _IOCTL_ARG;
232
233 typedef void (*PROBE_CALLBACK)(void *arg, void *dev, int index);
234
235 typedef struct _HIM {
236 char *name;
237 struct _HIM *next;
238 HPT_UINT max_sg_descriptors;
239 #define _HIM_INTERFACE(_type, _fn, _args) _type (* _fn) _args;
240 #include <dev/hptrr/himfuncs.h>
241 }
242 HIM, *PHIM;
243
244
245 #pragma pack(1)
246 #ifdef SG_FLAG_EOT
247 #error "don't use SG_FLAG_EOT with _SG.eot. clean the code!"
248 #endif
249
250 typedef struct _SG {
251 HPT_U32 size;
252 HPT_UINT eot;
253 union {
254 HPT_U8 FAR * _logical;
255 BUS_ADDRESS bus;
256 }
257 addr;
258 }
259 SG, *PSG;
260 #pragma pack()
261
262 typedef struct _AtaCommand
263 {
264 HPT_U64 Lba;
265 HPT_U16 nSectors;
266 HPT_U16 pad;
267 } AtaComm, *PAtaComm;
268
269 #define ATA_CMD_SET_FEATURES 0xef
270 #define ATA_CMD_FLUSH 0xE7
271 #define ATA_CMD_VERIFY 0x40
272 #define ATA_CMD_STANDBY 0xe2
273 #define ATA_CMD_READ_MULTI 0xC4
274 #define ATA_CMD_READ_MULTI_EXT 0x29
275 #define ATA_CMD_WRITE_MULTI 0xC5
276 #define ATA_CMD_WRITE_MULTI_EXT 0x39
277 #define ATA_CMD_WRITE_MULTI_FUA_EXT 0xCE
278
279 #define ATA_SET_FEATURES_XFER 0x3
280 #define ATA_SECTOR_SIZE 512
281
282 typedef struct _PassthroughCmd {
283 HPT_U16 bFeaturesReg;
284 HPT_U16 bSectorCountReg;
285 HPT_U16 bLbaLowReg;
286 HPT_U16 bLbaMidReg;
287 HPT_U16 bLbaHighReg;
288 HPT_U8 bDriveHeadReg;
289 HPT_U8 bCommandReg;
290 HPT_U8 nSectors;
291 HPT_U8 *pDataBuffer;
292 }
293 PassthroughCmd;
294
295
296 #define CTRL_CMD_REBUILD 1
297 #define CTRL_CMD_VERIFY 2
298 #define CTRL_CMD_INIT 3
299
300
301 typedef struct _R5ControlCmd {
302 HPT_U64 StripeLine;
303 HPT_U16 Offset;
304 HPT_U8 Command;
305 HPT_U8 reserve1;
306 }
307 R5ControlCmd, *PR5ControlCmd;
308
309 typedef struct _HPT_ADDRESS
310 {
311 HPT_U8 * logical;
312 BUS_ADDRESS bus;
313 }
314 HPT_ADDRESS;
315
316
317 typedef struct ctl_pages {
318 HPT_ADDRESS *pages;
319 HPT_UINT page_size;
320 HPT_UINT npages;
321 HPT_UINT min_sg_descriptors;
322 } CONTROL_PAGES, *PCONTROL_PAGES;
323
324 typedef struct _R1ControlCmd {
325 HPT_U64 Lba;
326 HPT_U16 nSectors;
327 HPT_U8 Command; /* CTRL_CMD_XXX */
328 HPT_U8 reserve1;
329 PCONTROL_PAGES ctl_pages;
330 }
331 R1ControlCmd, *PR1ControlCmd;
332
333 typedef void (*TQ_PROC)(void *arg);
334
335 struct tq_item {
336 TQ_PROC proc;
337 void *arg;
338 struct tq_item *next;
339 };
340
341 #define INIT_TQ_ITEM(t, p, a) \
342 do { (t)->proc = p; (t)->arg = a; (t)->next = 0; } while (0)
343
344 typedef struct _COMMAND
345 {
346
347 struct _VBUS * vbus;
348
349 struct freelist *grplist;
350 HPT_UINT grpcnt;
351
352
353 struct list_head q_link;
354 struct tq_item done_dpc;
355
356 HPT_UINT extsize;
357 void *ext;
358
359
360
361 void *target;
362 void *priv;
363 HPT_UPTR priv2;
364
365 int priority;
366 struct lock_request *owned_lock;
367 struct lock_request *lock_req;
368
369 union{
370 /* Ide Command */
371 AtaComm Ide;
372 PassthroughCmd Passthrough;
373 /* Atapi Command */
374 HPT_U8 Atapi[12];
375 /* Control command */
376 R5ControlCmd R5Control;
377 R1ControlCmd R1Control;
378 } uCmd;
379
380 HPT_U8 type; /* CMD_TYPE_* */
381
382 struct {
383 HPT_U8 physical_sg: 1;
384 HPT_U8 data_in: 1;
385 HPT_U8 data_out: 1;
386 HPT_U8 transform : 1;
387 HPT_U8 hard_flush: 2;
388 HPT_U8 from_cc: 1;
389 } flags;
390
391 /* return status */
392 HPT_U8 Result;
393 /* retry count */
394 HPT_U8 RetryCount;
395
396
397 PSG psg;
398
399
400 int (*buildsgl)(struct _COMMAND *cmd, PSG psg, int logical);
401 void (*done)(struct _COMMAND *cmd);
402 }
403 COMMAND, *PCOMMAND;
404
405 /* command types */
406 #define CMD_TYPE_IO 0
407 #define CMD_TYPE_CONTROL 1
408 #define CMD_TYPE_ATAPI 2
409 #define CMD_TYPE_PASSTHROUGH 3
410 #define CMD_TYPE_FLUSH 4
411
412 /* flush command flags */
413 #define CF_HARD_FLUSH_CACHE 1
414 #define CF_HARD_FLUSH_STANDBY 2
415
416 /* command return values */
417 #define RETURN_PENDING 0
418 #define RETURN_SUCCESS 1
419 #define RETURN_BAD_DEVICE 2
420 #define RETURN_BAD_PARAMETER 3
421 #define RETURN_WRITE_NO_DRQ 4
422 #define RETURN_DEVICE_BUSY 5
423 #define RETURN_INVALID_REQUEST 6
424 #define RETURN_SELECTION_TIMEOUT 7
425 #define RETURN_IDE_ERROR 8
426 #define RETURN_NEED_LOGICAL_SG 9
427 #define RETURN_NEED_PHYSICAL_SG 10
428 #define RETURN_RETRY 11
429 #define RETURN_DATA_ERROR 12
430 #define RETURN_BUS_RESET 13
431 #define RETURN_BAD_TRANSFER_LENGTH 14
432 #define RETURN_INSUFFICIENT_MEMORY 15
433 #define RETURN_SECTOR_ERROR 16
434
435 #if defined(__cplusplus)
436 }
437 #endif
438 #endif
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