1 /*-
2 * Copyright (c) 2008 Joseph Koshy
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD: releng/7.3/sys/dev/hwpmc/hwpmc_tsc.c 193634 2009-06-07 10:00:35Z fabient $");
29
30 #include <sys/param.h>
31 #include <sys/pmc.h>
32 #include <sys/pmckern.h>
33 #include <sys/systm.h>
34
35 #include <machine/specialreg.h>
36
37 /*
38 * TSC support.
39 */
40
41 #define TSC_CAPS PMC_CAP_READ
42
43 struct tsc_descr {
44 struct pmc_descr pm_descr; /* "base class" */
45 };
46
47 static struct tsc_descr tsc_pmcdesc[TSC_NPMCS] =
48 {
49 {
50 .pm_descr =
51 {
52 .pd_name = "TSC",
53 .pd_class = PMC_CLASS_TSC,
54 .pd_caps = TSC_CAPS,
55 .pd_width = 64
56 }
57 }
58 };
59
60 /*
61 * Per-CPU data structure for TSCs.
62 */
63
64 struct tsc_cpu {
65 struct pmc_hw tc_hw;
66 };
67
68 static struct tsc_cpu **tsc_pcpu;
69
70 static int
71 tsc_allocate_pmc(int cpu, int ri, struct pmc *pm,
72 const struct pmc_op_pmcallocate *a)
73 {
74 (void) cpu;
75
76 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
77 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
78 KASSERT(ri >= 0 && ri < TSC_NPMCS,
79 ("[tsc,%d] illegal row index %d", __LINE__, ri));
80
81 if (a->pm_class != PMC_CLASS_TSC)
82 return (EINVAL);
83
84 if ((pm->pm_caps & TSC_CAPS) == 0)
85 return (EINVAL);
86
87 if ((pm->pm_caps & ~TSC_CAPS) != 0)
88 return (EPERM);
89
90 if (a->pm_ev != PMC_EV_TSC_TSC ||
91 a->pm_mode != PMC_MODE_SC)
92 return (EINVAL);
93
94 return (0);
95 }
96
97 static int
98 tsc_config_pmc(int cpu, int ri, struct pmc *pm)
99 {
100 struct pmc_hw *phw;
101
102 PMCDBG(MDP,CFG,1, "cpu=%d ri=%d pm=%p", cpu, ri, pm);
103
104 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
105 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
106 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
107
108 phw = &tsc_pcpu[cpu]->tc_hw;
109
110 KASSERT(pm == NULL || phw->phw_pmc == NULL,
111 ("[tsc,%d] pm=%p phw->pm=%p hwpmc not unconfigured", __LINE__,
112 pm, phw->phw_pmc));
113
114 phw->phw_pmc = pm;
115
116 return (0);
117 }
118
119 static int
120 tsc_describe(int cpu, int ri, struct pmc_info *pi, struct pmc **ppmc)
121 {
122 int error;
123 size_t copied;
124 const struct tsc_descr *pd;
125 struct pmc_hw *phw;
126
127 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
128 ("[tsc,%d] illegal CPU %d", __LINE__, cpu));
129 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
130
131 phw = &tsc_pcpu[cpu]->tc_hw;
132 pd = &tsc_pmcdesc[ri];
133
134 if ((error = copystr(pd->pm_descr.pd_name, pi->pm_name,
135 PMC_NAME_MAX, &copied)) != 0)
136 return (error);
137
138 pi->pm_class = pd->pm_descr.pd_class;
139
140 if (phw->phw_state & PMC_PHW_FLAG_IS_ENABLED) {
141 pi->pm_enabled = TRUE;
142 *ppmc = phw->phw_pmc;
143 } else {
144 pi->pm_enabled = FALSE;
145 *ppmc = NULL;
146 }
147
148 return (0);
149 }
150
151 static int
152 tsc_get_config(int cpu, int ri, struct pmc **ppm)
153 {
154 (void) ri;
155
156 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
157 ("[tsc,%d] illegal CPU %d", __LINE__, cpu));
158 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
159
160 *ppm = tsc_pcpu[cpu]->tc_hw.phw_pmc;
161
162 return (0);
163 }
164
165 static int
166 tsc_get_msr(int ri, uint32_t *msr)
167 {
168 (void) ri;
169
170 KASSERT(ri >= 0 && ri < TSC_NPMCS,
171 ("[tsc,%d] ri %d out of range", __LINE__, ri));
172
173 *msr = MSR_TSC;
174
175 return (0);
176 }
177
178 static int
179 tsc_pcpu_fini(struct pmc_mdep *md, int cpu)
180 {
181 int ri;
182 struct pmc_cpu *pc;
183
184 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
185 ("[tsc,%d] illegal cpu %d", __LINE__, cpu));
186 KASSERT(tsc_pcpu[cpu] != NULL, ("[tsc,%d] null pcpu", __LINE__));
187
188 free(tsc_pcpu[cpu], M_PMC);
189 tsc_pcpu[cpu] = NULL;
190
191 ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri;
192
193 KASSERT(ri == 0 && ri < TSC_NPMCS, ("[tsc,%d] ri=%d", __LINE__,
194 ri));
195
196 pc = pmc_pcpu[cpu];
197 pc->pc_hwpmcs[ri] = NULL;
198
199 return (0);
200 }
201
202 static int
203 tsc_pcpu_init(struct pmc_mdep *md, int cpu)
204 {
205 int ri;
206 struct pmc_cpu *pc;
207 struct tsc_cpu *tsc_pc;
208
209
210 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
211 ("[tsc,%d] illegal cpu %d", __LINE__, cpu));
212 KASSERT(tsc_pcpu, ("[tsc,%d] null pcpu", __LINE__));
213 KASSERT(tsc_pcpu[cpu] == NULL, ("[tsc,%d] non-null per-cpu",
214 __LINE__));
215
216 tsc_pc = malloc(sizeof(struct tsc_cpu), M_PMC, M_WAITOK|M_ZERO);
217
218 tsc_pc->tc_hw.phw_state = PMC_PHW_FLAG_IS_ENABLED |
219 PMC_PHW_CPU_TO_STATE(cpu) | PMC_PHW_INDEX_TO_STATE(0) |
220 PMC_PHW_FLAG_IS_SHAREABLE;
221
222 tsc_pcpu[cpu] = tsc_pc;
223
224 ri = md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_ri;
225
226 KASSERT(pmc_pcpu, ("[tsc,%d] null generic pcpu", __LINE__));
227
228 pc = pmc_pcpu[cpu];
229
230 KASSERT(pc, ("[tsc,%d] null generic per-cpu", __LINE__));
231
232 pc->pc_hwpmcs[ri] = &tsc_pc->tc_hw;
233
234 return (0);
235 }
236
237 static int
238 tsc_read_pmc(int cpu, int ri, pmc_value_t *v)
239 {
240 struct pmc *pm;
241 enum pmc_mode mode;
242 const struct pmc_hw *phw;
243
244 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
245 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
246 KASSERT(ri == 0, ("[tsc,%d] illegal ri %d", __LINE__, ri));
247
248 phw = &tsc_pcpu[cpu]->tc_hw;
249 pm = phw->phw_pmc;
250
251 KASSERT(pm != NULL,
252 ("[tsc,%d] no owner for PHW [cpu%d,pmc%d]", __LINE__, cpu, ri));
253
254 mode = PMC_TO_MODE(pm);
255
256 KASSERT(mode == PMC_MODE_SC,
257 ("[tsc,%d] illegal pmc mode %d", __LINE__, mode));
258
259 PMCDBG(MDP,REA,1,"tsc-read id=%d", ri);
260
261 *v = rdtsc();
262
263 return (0);
264 }
265
266 static int
267 tsc_release_pmc(int cpu, int ri, struct pmc *pmc)
268 {
269 struct pmc_hw *phw;
270
271 (void) pmc;
272
273 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
274 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
275 KASSERT(ri == 0,
276 ("[tsc,%d] illegal row-index %d", __LINE__, ri));
277
278 phw = &tsc_pcpu[cpu]->tc_hw;
279
280 KASSERT(phw->phw_pmc == NULL,
281 ("[tsc,%d] PHW pmc %p non-NULL", __LINE__, phw->phw_pmc));
282
283 /*
284 * Nothing to do.
285 */
286 return (0);
287 }
288
289 static int
290 tsc_start_pmc(int cpu, int ri)
291 {
292 (void) cpu;
293
294 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
295 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
296 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
297
298 return (0); /* TSCs are always running. */
299 }
300
301 static int
302 tsc_stop_pmc(int cpu, int ri)
303 {
304 (void) cpu; (void) ri;
305
306 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
307 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
308 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
309
310 return (0); /* Cannot actually stop a TSC. */
311 }
312
313 static int
314 tsc_write_pmc(int cpu, int ri, pmc_value_t v)
315 {
316 (void) cpu; (void) ri; (void) v;
317
318 KASSERT(cpu >= 0 && cpu < pmc_cpu_max(),
319 ("[tsc,%d] illegal CPU value %d", __LINE__, cpu));
320 KASSERT(ri == 0, ("[tsc,%d] illegal row-index %d", __LINE__, ri));
321
322 /*
323 * The TSCs are used as timecounters by the kernel, so even
324 * though some i386 CPUs support writeable TSCs, we don't
325 * support writing changing TSC values through the HWPMC API.
326 */
327 return (0);
328 }
329
330 int
331 pmc_tsc_initialize(struct pmc_mdep *md, int maxcpu)
332 {
333 struct pmc_classdep *pcd;
334
335 KASSERT(md != NULL, ("[tsc,%d] md is NULL", __LINE__));
336 KASSERT(md->pmd_nclass >= 1, ("[tsc,%d] dubious md->nclass %d",
337 __LINE__, md->pmd_nclass));
338
339 tsc_pcpu = malloc(sizeof(struct tsc_cpu *) * maxcpu, M_PMC,
340 M_ZERO|M_WAITOK);
341
342 pcd = &md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC];
343
344 pcd->pcd_caps = PMC_CAP_READ;
345 pcd->pcd_class = PMC_CLASS_TSC;
346 pcd->pcd_num = TSC_NPMCS;
347 pcd->pcd_ri = md->pmd_npmc;
348 pcd->pcd_width = 64;
349
350 pcd->pcd_allocate_pmc = tsc_allocate_pmc;
351 pcd->pcd_config_pmc = tsc_config_pmc;
352 pcd->pcd_describe = tsc_describe;
353 pcd->pcd_get_config = tsc_get_config;
354 pcd->pcd_get_msr = tsc_get_msr;
355 pcd->pcd_pcpu_init = tsc_pcpu_init;
356 pcd->pcd_pcpu_fini = tsc_pcpu_fini;
357 pcd->pcd_read_pmc = tsc_read_pmc;
358 pcd->pcd_release_pmc = tsc_release_pmc;
359 pcd->pcd_start_pmc = tsc_start_pmc;
360 pcd->pcd_stop_pmc = tsc_stop_pmc;
361 pcd->pcd_write_pmc = tsc_write_pmc;
362
363 md->pmd_npmc += TSC_NPMCS;
364
365 return (0);
366 }
367
368 void
369 pmc_tsc_finalize(struct pmc_mdep *md)
370 {
371 #ifdef INVARIANTS
372 int i, ncpus;
373
374 ncpus = pmc_cpu_max();
375 for (i = 0; i < ncpus; i++)
376 KASSERT(tsc_pcpu[i] == NULL, ("[tsc,%d] non-null pcpu cpu %d",
377 __LINE__, i));
378
379 KASSERT(md->pmd_classdep[PMC_MDEP_CLASS_INDEX_TSC].pcd_class ==
380 PMC_CLASS_TSC, ("[tsc,%d] class mismatch", __LINE__));
381
382 #else
383 (void) md;
384 #endif
385
386 free(tsc_pcpu, M_PMC);
387 tsc_pcpu = NULL;
388 }
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