The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/i2c/x1226.c

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    1 /*      $NetBSD: x1226.c,v 1.4 2004/02/13 20:12:00 shige Exp $  */
    2 
    3 /*
    4  * Copyright (c) 2003 Shigeyuki Fukushima.
    5  * All rights reserved.
    6  *
    7  * Written by Shigeyuki Fukushima for the NetBSD Project.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed for the NetBSD Project by
   20  *      Shigeyuki Fukushima.
   21  * 4. The name of Shigeyuki Fukushima may not be used to endorse
   22  *    or promote products derived from this software without specific prior
   23  *    written permission.
   24  *
   25  * THIS SOFTWARE IS PROVIDED BY SHIGEYUKI FUKUSHIMA ``AS IS'' AND
   26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL SHIGEYUKI FUKUSHIMA
   29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   35  * POSSIBILITY OF SUCH DAMAGE.
   36  */
   37 
   38 #include <sys/cdefs.h>
   39 __KERNEL_RCSID(0, "$NetBSD: x1226.c,v 1.4 2004/02/13 20:12:00 shige Exp $");
   40 
   41 #include <sys/param.h>
   42 #include <sys/systm.h>
   43 #include <sys/device.h>
   44 #include <sys/kernel.h>
   45 #include <sys/fcntl.h>
   46 #include <sys/uio.h>
   47 #include <sys/conf.h>
   48 #include <sys/event.h>
   49 
   50 #include <dev/clock_subr.h>
   51 
   52 #include <dev/i2c/i2cvar.h>
   53 #include <dev/i2c/x1226reg.h>
   54 
   55 struct xrtc_softc {
   56         struct device           sc_dev;
   57         i2c_tag_t               sc_tag;
   58         int                     sc_address;
   59         int                     sc_open;
   60         struct todr_chip_handle sc_todr;
   61 };
   62 
   63 static void     xrtc_attach(struct device *, struct device *, void *);
   64 static int      xrtc_match(struct device *, struct cfdata *, void *);
   65 
   66 CFATTACH_DECL(xrtc, sizeof(struct xrtc_softc),
   67     xrtc_match, xrtc_attach, NULL, NULL);
   68 extern struct cfdriver xrtc_cd;
   69 
   70 dev_type_open(xrtc_open);
   71 dev_type_close(xrtc_close);
   72 dev_type_read(xrtc_read);
   73 dev_type_write(xrtc_write);
   74 
   75 const struct cdevsw xrtc_cdevsw = {
   76         xrtc_open, xrtc_close, xrtc_read, xrtc_write,
   77         noioctl, nostop, notty, nopoll, nommap, nokqfilter
   78 };
   79 
   80 static int xrtc_clock_read(struct xrtc_softc *, struct clock_ymdhms *);
   81 static int xrtc_clock_write(struct xrtc_softc *, struct clock_ymdhms *);
   82 static int xrtc_gettime(struct todr_chip_handle *, struct timeval *);
   83 static int xrtc_settime(struct todr_chip_handle *, struct timeval *);
   84 static int xrtc_getcal(struct todr_chip_handle *, int *);
   85 static int xrtc_setcal(struct todr_chip_handle *, int);
   86 
   87 
   88 /*
   89  * xrtc_match()
   90  */
   91 static int
   92 xrtc_match(struct device *parent, struct cfdata *cf, void *arg)
   93 {
   94         struct i2c_attach_args *ia = arg;
   95 
   96         /* match only this RTC devices */
   97         if (ia->ia_addr == X1226_ADDR)
   98                 return (1);
   99 
  100         return (0);
  101 }
  102 
  103 /*
  104  * xrtc_attach()
  105  */
  106 static void
  107 xrtc_attach(struct device *parent, struct device *self, void *arg)
  108 {
  109         struct xrtc_softc *sc = (struct xrtc_softc *)self;
  110         struct i2c_attach_args *ia = arg;
  111 
  112         aprint_naive(": Real-time Clock/NVRAM\n");
  113         aprint_normal(": Xicor X1226 Real-time Clock/NVRAM\n");
  114 
  115         sc->sc_tag = ia->ia_tag;
  116         sc->sc_address = ia->ia_addr;
  117         sc->sc_open = 0;
  118         sc->sc_todr.cookie = sc;
  119         sc->sc_todr.todr_gettime = xrtc_gettime;
  120         sc->sc_todr.todr_settime = xrtc_settime;
  121         sc->sc_todr.todr_getcal = xrtc_getcal;
  122         sc->sc_todr.todr_setcal = xrtc_setcal;
  123         sc->sc_todr.todr_setwen = NULL;
  124 
  125         todr_attach(&sc->sc_todr);
  126 }
  127 
  128 
  129 /*ARGSUSED*/
  130 int
  131 xrtc_open(dev_t dev, int flag, int fmt, struct proc *p)
  132 {
  133         struct xrtc_softc *sc;
  134 
  135         if ((sc = device_lookup(&xrtc_cd, minor(dev))) == NULL)
  136                 return (ENXIO);
  137 
  138         /* XXX: Locking */
  139 
  140         if (sc->sc_open)
  141                 return (EBUSY);
  142 
  143         sc->sc_open = 1;
  144         return (0);
  145 }
  146 
  147 /*ARGSUSED*/
  148 int
  149 xrtc_close(dev_t dev, int flag, int fmt, struct proc *p)
  150 {
  151         struct xrtc_softc *sc;
  152 
  153         if ((sc = device_lookup(&xrtc_cd, minor(dev))) == NULL)
  154                 return (ENXIO);
  155 
  156         sc->sc_open = 0;
  157         return (0);
  158 }
  159 
  160 /*ARGSUSED*/
  161 int
  162 xrtc_read(dev_t dev, struct uio *uio, int flags)
  163 {
  164         struct xrtc_softc *sc;
  165         u_int8_t ch, cmdbuf[2];
  166         int addr, error;
  167 
  168         if ((sc = device_lookup(&xrtc_cd, minor(dev))) == NULL)
  169                 return (ENXIO);
  170 
  171         if (uio->uio_offset >= X1226_NVRAM_SIZE)
  172                 return (EINVAL);
  173 
  174         if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
  175                 return (error);
  176 
  177         while (uio->uio_resid && uio->uio_offset < X1226_NVRAM_SIZE) {
  178                 addr = (int)uio->uio_offset + X1226_NVRAM_START;
  179                 cmdbuf[0] = (addr >> 8) && 0xff;
  180                 cmdbuf[1] = addr && 0xff;
  181                 if ((error = iic_exec(sc->sc_tag,
  182                         I2C_OP_READ_WITH_STOP,
  183                         sc->sc_address, cmdbuf, 2, &ch, 1, 0)) != 0) {
  184                         iic_release_bus(sc->sc_tag, 0);
  185                         printf("%s: xrtc_read: read failed at 0x%x\n",
  186                                 sc->sc_dev.dv_xname, (int)uio->uio_offset);
  187                         return (error);
  188                 }
  189                 if ((error = uiomove(&ch, 1, uio)) != 0) {
  190                         iic_release_bus(sc->sc_tag, 0);
  191                         return (error);
  192                 }
  193         }
  194 
  195         iic_release_bus(sc->sc_tag, 0);
  196 
  197         return (0);
  198 }
  199 
  200 /*ARGSUSED*/
  201 int
  202 xrtc_write(dev_t dev, struct uio *uio, int flags)
  203 {
  204         struct xrtc_softc *sc;
  205         u_int8_t cmdbuf[3];
  206         int addr, error;
  207 
  208         if ((sc = device_lookup(&xrtc_cd, minor(dev))) == NULL)
  209                 return (ENXIO);
  210 
  211         if (uio->uio_offset >= X1226_NVRAM_SIZE)
  212                 return (EINVAL);
  213 
  214         if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
  215                 return (error);
  216 
  217         while (uio->uio_resid && uio->uio_offset < X1226_NVRAM_SIZE) {
  218                 addr = (int)uio->uio_offset + X1226_NVRAM_START;
  219                 cmdbuf[0] = (addr >> 8) && 0xff;
  220                 cmdbuf[1] = addr && 0xff;
  221                 if ((error = uiomove(&cmdbuf[2], 1, uio)) != 0) {
  222                         break;
  223                 }
  224                 if ((error = iic_exec(sc->sc_tag,
  225                         uio->uio_resid ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
  226                         sc->sc_address, cmdbuf, 2, &cmdbuf[2], 1, 0)) != 0) {
  227                         iic_release_bus(sc->sc_tag, 0);
  228                         printf("%s: xrtc_write: write failed at 0x%x\n",
  229                                 sc->sc_dev.dv_xname, (int)uio->uio_offset);
  230                         return (error);
  231                 }
  232         }
  233 
  234         iic_release_bus(sc->sc_tag, 0);
  235 
  236         return (0);
  237 }
  238 
  239 
  240 static int
  241 xrtc_gettime(struct todr_chip_handle *ch, struct timeval *tv)
  242 {
  243         struct xrtc_softc *sc = ch->cookie;
  244         struct clock_ymdhms dt, check;
  245         int retries;
  246 
  247         memset(&dt, 0, sizeof(dt));
  248         memset(&check, 0, sizeof(check));
  249 
  250         retries = 5;
  251         do {
  252                 xrtc_clock_read(sc, &dt);
  253                 xrtc_clock_read(sc, &check);
  254         } while (memcmp(&dt, &check, sizeof(check)) != 0 && --retries);
  255 
  256         tv->tv_sec = clock_ymdhms_to_secs(&dt);
  257         tv->tv_usec = 0;
  258 
  259         return (0);
  260 }
  261 
  262 static int
  263 xrtc_settime(struct todr_chip_handle *ch, struct timeval *tv)
  264 {
  265         struct xrtc_softc *sc = ch->cookie;
  266         struct clock_ymdhms dt;
  267 
  268         clock_secs_to_ymdhms(tv->tv_sec, &dt);
  269 
  270         if (xrtc_clock_write(sc, &dt) == 0)
  271                 return (-1);
  272 
  273         return (0);
  274 }
  275 
  276 static int
  277 xrtc_setcal(struct todr_chip_handle *ch, int cal)
  278 {
  279         return (EOPNOTSUPP);
  280 }
  281 
  282 static int
  283 xrtc_getcal(struct todr_chip_handle *ch, int *cal)
  284 {
  285         return (EOPNOTSUPP);
  286 }
  287 
  288 static int
  289 xrtc_clock_read(struct xrtc_softc *sc, struct clock_ymdhms *dt)
  290 {
  291         int i = 0;
  292         u_int8_t bcd[X1226_REG_RTC_SIZE], cmdbuf[2];
  293 
  294         if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
  295                 printf("%s: xrtc_clock_read: failed to acquire I2C bus\n",
  296                         sc->sc_dev.dv_xname);
  297                 return (0);
  298         }
  299 
  300         /* Read each RTC register in order */
  301         for (i = 0 ; i < X1226_REG_RTC_SIZE ; i++) {
  302                 int addr = i + X1226_REG_RTC_BASE;
  303                 cmdbuf[0] = (addr >> 8) & 0xff;
  304                 cmdbuf[1] = addr & 0xff;
  305 
  306                 if (iic_exec(sc->sc_tag,
  307                         I2C_OP_READ_WITH_STOP,
  308                         sc->sc_address, cmdbuf, 2,
  309                         &bcd[i], 1, I2C_F_POLL)) {
  310                         iic_release_bus(sc->sc_tag, I2C_F_POLL);
  311                         printf("%s: xrtc_clock_read: failed to read rtc "
  312                                 "at 0x%x\n", sc->sc_dev.dv_xname, i);
  313                         return (0);
  314                 }
  315         }
  316 
  317         /* Done with I2C */
  318         iic_release_bus(sc->sc_tag, I2C_F_POLL);
  319 
  320         /*
  321          * Convert the X1226's register bcd values
  322          */
  323         dt->dt_sec = FROMBCD(bcd[X1226_REG_SC - X1226_REG_RTC_BASE]
  324                         & X1226_REG_SC_MASK);
  325         dt->dt_min = FROMBCD(bcd[X1226_REG_MN - X1226_REG_RTC_BASE]
  326                         & X1226_REG_MN_MASK);
  327         if (!(bcd[X1226_REG_HR - X1226_REG_RTC_BASE] & X1226_FLAG_HR_24H)) {
  328                 dt->dt_hour = FROMBCD(bcd[X1226_REG_HR - X1226_REG_RTC_BASE]
  329                                 & X1226_REG_HR12_MASK);
  330                 if (bcd[X1226_REG_HR - X1226_REG_RTC_BASE] & X1226_FLAG_HR_12HPM) {
  331                         dt->dt_hour += 12;
  332                 }
  333         } else {
  334                 dt->dt_hour = FROMBCD(bcd[X1226_REG_HR - X1226_REG_RTC_BASE]
  335                         & X1226_REG_HR24_MASK);
  336         }
  337         dt->dt_wday = FROMBCD(bcd[X1226_REG_DW - X1226_REG_RTC_BASE]
  338                         & X1226_REG_DT_MASK);
  339         dt->dt_day = FROMBCD(bcd[X1226_REG_DT - X1226_REG_RTC_BASE]
  340                         & X1226_REG_DT_MASK);
  341         dt->dt_mon = FROMBCD(bcd[X1226_REG_MO - X1226_REG_RTC_BASE]
  342                         & X1226_REG_MO_MASK);
  343         dt->dt_year = FROMBCD(bcd[X1226_REG_YR - X1226_REG_RTC_BASE]
  344                         & X1226_REG_YR_MASK);
  345         dt->dt_year += FROMBCD(bcd[X1226_REG_Y2K - X1226_REG_RTC_BASE]
  346                         & X1226_REG_Y2K_MASK) * 100;
  347 
  348         return (1);
  349 }
  350 
  351 static int
  352 xrtc_clock_write(struct xrtc_softc *sc, struct clock_ymdhms *dt)
  353 {
  354         int i = 0, addr;
  355         u_int8_t bcd[X1226_REG_RTC_SIZE], cmdbuf[3];
  356 
  357         /*
  358          * Convert our time to bcd values
  359          */
  360         bcd[X1226_REG_SC - X1226_REG_RTC_BASE] = TOBCD(dt->dt_sec);
  361         bcd[X1226_REG_MN - X1226_REG_RTC_BASE] = TOBCD(dt->dt_min);
  362         bcd[X1226_REG_HR - X1226_REG_RTC_BASE] = TOBCD(dt->dt_hour)
  363                                                 | X1226_FLAG_HR_24H;
  364         bcd[X1226_REG_DW - X1226_REG_RTC_BASE] = TOBCD(dt->dt_wday);
  365         bcd[X1226_REG_DT - X1226_REG_RTC_BASE] = TOBCD(dt->dt_day);
  366         bcd[X1226_REG_MO - X1226_REG_RTC_BASE] = TOBCD(dt->dt_mon);
  367         bcd[X1226_REG_YR - X1226_REG_RTC_BASE] = TOBCD(dt->dt_year % 100);
  368         bcd[X1226_REG_Y2K - X1226_REG_RTC_BASE] = TOBCD(dt->dt_year / 100);
  369 
  370         if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
  371                 printf("%s: xrtc_clock_write: failed to acquire I2C bus\n",
  372                         sc->sc_dev.dv_xname);
  373                 return (0);
  374         }
  375 
  376         /* Unlock register: Write Enable Latch */
  377         addr = X1226_REG_SR;
  378         cmdbuf[0] = ((addr >> 8) & 0xff);
  379         cmdbuf[1] = (addr & 0xff);
  380         cmdbuf[2] = X1226_FLAG_SR_WEL;
  381         if (iic_exec(sc->sc_tag,
  382                 I2C_OP_WRITE_WITH_STOP,
  383                 sc->sc_address, cmdbuf, 2, &cmdbuf[2], 1, 0) != 0) {
  384                 iic_release_bus(sc->sc_tag, I2C_F_POLL);
  385                 printf("%s: xrtc_clock_write: "
  386                         "failed to write-unlock status register(WEL=1)\n",
  387                         sc->sc_dev.dv_xname);
  388                 return (0);
  389         }
  390 
  391         /* Unlock register: Register Write Enable Latch */
  392         addr = X1226_REG_SR;
  393         cmdbuf[0] = ((addr >> 8) & 0xff);
  394         cmdbuf[1] = (addr & 0xff);
  395         cmdbuf[2] = X1226_FLAG_SR_WEL | X1226_FLAG_SR_RWEL;
  396         if (iic_exec(sc->sc_tag,
  397                 I2C_OP_WRITE_WITH_STOP,
  398                 sc->sc_address, cmdbuf, 2, &cmdbuf[2], 1, 0) != 0) {
  399                 iic_release_bus(sc->sc_tag, I2C_F_POLL);
  400                 printf("%s: xrtc_clock_write: "
  401                         "failed to write-unlock status register(RWEL=1)\n",
  402                         sc->sc_dev.dv_xname);
  403                 return (0);
  404         }
  405 
  406         /* Write each RTC register in reverse order */
  407         for (i = (X1226_REG_RTC_SIZE - 1) ; i >= 0; i--) {
  408                 int addr = i + X1226_REG_RTC_BASE;
  409                 cmdbuf[0] = ((addr >> 8) & 0xff);
  410                 cmdbuf[1] = (addr & 0xff);
  411                 if (iic_exec(sc->sc_tag,
  412                         I2C_OP_WRITE_WITH_STOP,
  413                         sc->sc_address, cmdbuf, 2,
  414                         &bcd[i], 1, I2C_F_POLL)) {
  415 
  416                         /* Lock register: WEL/RWEL off */
  417                         addr = X1226_REG_SR;
  418                         cmdbuf[0] = ((addr >> 8) & 0xff);
  419                         cmdbuf[1] = (addr & 0xff);
  420                         cmdbuf[2] = 0;
  421                         iic_exec(sc->sc_tag,
  422                                 I2C_OP_WRITE_WITH_STOP,
  423                                 sc->sc_address, cmdbuf, 2,
  424                                 &cmdbuf[2], 1, 0);
  425 
  426                         iic_release_bus(sc->sc_tag, I2C_F_POLL);
  427                         printf("%s: xrtc_clock_write: failed to write rtc "
  428                                 "at 0x%x\n", sc->sc_dev.dv_xname, i);
  429                         return (0);
  430                 }
  431         }
  432 
  433         /* Lock register: WEL/RWEL off */
  434         addr = X1226_REG_SR;
  435         cmdbuf[0] = ((addr >> 8) & 0xff);
  436         cmdbuf[1] = (addr & 0xff);
  437         cmdbuf[2] = 0;
  438         if (iic_exec(sc->sc_tag,
  439                 I2C_OP_WRITE_WITH_STOP,
  440                 sc->sc_address, cmdbuf, 2, &cmdbuf[2], 1, 0) != 0) {
  441                 iic_release_bus(sc->sc_tag, I2C_F_POLL);
  442                 printf("%s: xrtc_clock_write: "
  443                         "failed to write-lock status register\n",
  444                         sc->sc_dev.dv_xname);
  445                 return (0);
  446         }
  447 
  448         iic_release_bus(sc->sc_tag, I2C_F_POLL);
  449         return (1);
  450 }

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