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sys/dev/iavf/iavf_adminq_cmd.h
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1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (c) 2021, Intel Corporation 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the Intel Corporation nor the names of its 16 * contributors may be used to endorse or promote products derived from 17 * this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /*$FreeBSD$*/ 32 33 #ifndef _IAVF_ADMINQ_CMD_H_ 34 #define _IAVF_ADMINQ_CMD_H_ 35 36 /* This header file defines the iavf Admin Queue commands and is shared between 37 * iavf Firmware and Software. Do not change the names in this file to IAVF 38 * because this file should be diff-able against the iavf version, even 39 * though many parts have been removed in this VF version. 40 * 41 * This file needs to comply with the Linux Kernel coding style. 42 */ 43 44 #define IAVF_FW_API_VERSION_MAJOR 0x0001 45 #define IAVF_FW_API_VERSION_MINOR_X722 0x0006 46 #define IAVF_FW_API_VERSION_MINOR_X710 0x0007 47 48 #define IAVF_FW_MINOR_VERSION(_h) ((_h)->mac.type == IAVF_MAC_XL710 ? \ 49 IAVF_FW_API_VERSION_MINOR_X710 : \ 50 IAVF_FW_API_VERSION_MINOR_X722) 51 52 /* API version 1.7 implements additional link and PHY-specific APIs */ 53 #define IAVF_MINOR_VER_GET_LINK_INFO_XL710 0x0007 54 /* API version 1.6 for X722 devices adds ability to stop FW LLDP agent */ 55 #define IAVF_MINOR_VER_FW_LLDP_STOPPABLE_X722 0x0006 56 57 struct iavf_aq_desc { 58 __le16 flags; 59 __le16 opcode; 60 __le16 datalen; 61 __le16 retval; 62 __le32 cookie_high; 63 __le32 cookie_low; 64 union { 65 struct { 66 __le32 param0; 67 __le32 param1; 68 __le32 param2; 69 __le32 param3; 70 } internal; 71 struct { 72 __le32 param0; 73 __le32 param1; 74 __le32 addr_high; 75 __le32 addr_low; 76 } external; 77 u8 raw[16]; 78 } params; 79 }; 80 81 /* Flags sub-structure 82 * |0 |1 |2 |3 |4 |5 |6 |7 |8 |9 |10 |11 |12 |13 |14 |15 | 83 * |DD |CMP|ERR|VFE| * * RESERVED * * |LB |RD |VFC|BUF|SI |EI |FE | 84 */ 85 86 /* command flags and offsets*/ 87 #define IAVF_AQ_FLAG_DD_SHIFT 0 88 #define IAVF_AQ_FLAG_CMP_SHIFT 1 89 #define IAVF_AQ_FLAG_ERR_SHIFT 2 90 #define IAVF_AQ_FLAG_VFE_SHIFT 3 91 #define IAVF_AQ_FLAG_LB_SHIFT 9 92 #define IAVF_AQ_FLAG_RD_SHIFT 10 93 #define IAVF_AQ_FLAG_VFC_SHIFT 11 94 #define IAVF_AQ_FLAG_BUF_SHIFT 12 95 #define IAVF_AQ_FLAG_SI_SHIFT 13 96 #define IAVF_AQ_FLAG_EI_SHIFT 14 97 #define IAVF_AQ_FLAG_FE_SHIFT 15 98 99 #define IAVF_AQ_FLAG_DD (1 << IAVF_AQ_FLAG_DD_SHIFT) /* 0x1 */ 100 #define IAVF_AQ_FLAG_CMP (1 << IAVF_AQ_FLAG_CMP_SHIFT) /* 0x2 */ 101 #define IAVF_AQ_FLAG_ERR (1 << IAVF_AQ_FLAG_ERR_SHIFT) /* 0x4 */ 102 #define IAVF_AQ_FLAG_VFE (1 << IAVF_AQ_FLAG_VFE_SHIFT) /* 0x8 */ 103 #define IAVF_AQ_FLAG_LB (1 << IAVF_AQ_FLAG_LB_SHIFT) /* 0x200 */ 104 #define IAVF_AQ_FLAG_RD (1 << IAVF_AQ_FLAG_RD_SHIFT) /* 0x400 */ 105 #define IAVF_AQ_FLAG_VFC (1 << IAVF_AQ_FLAG_VFC_SHIFT) /* 0x800 */ 106 #define IAVF_AQ_FLAG_BUF (1 << IAVF_AQ_FLAG_BUF_SHIFT) /* 0x1000 */ 107 #define IAVF_AQ_FLAG_SI (1 << IAVF_AQ_FLAG_SI_SHIFT) /* 0x2000 */ 108 #define IAVF_AQ_FLAG_EI (1 << IAVF_AQ_FLAG_EI_SHIFT) /* 0x4000 */ 109 #define IAVF_AQ_FLAG_FE (1 << IAVF_AQ_FLAG_FE_SHIFT) /* 0x8000 */ 110 111 /* error codes */ 112 enum iavf_admin_queue_err { 113 IAVF_AQ_RC_OK = 0, /* success */ 114 IAVF_AQ_RC_EPERM = 1, /* Operation not permitted */ 115 IAVF_AQ_RC_ENOENT = 2, /* No such element */ 116 IAVF_AQ_RC_ESRCH = 3, /* Bad opcode */ 117 IAVF_AQ_RC_EINTR = 4, /* operation interrupted */ 118 IAVF_AQ_RC_EIO = 5, /* I/O error */ 119 IAVF_AQ_RC_ENXIO = 6, /* No such resource */ 120 IAVF_AQ_RC_E2BIG = 7, /* Arg too long */ 121 IAVF_AQ_RC_EAGAIN = 8, /* Try again */ 122 IAVF_AQ_RC_ENOMEM = 9, /* Out of memory */ 123 IAVF_AQ_RC_EACCES = 10, /* Permission denied */ 124 IAVF_AQ_RC_EFAULT = 11, /* Bad address */ 125 IAVF_AQ_RC_EBUSY = 12, /* Device or resource busy */ 126 IAVF_AQ_RC_EEXIST = 13, /* object already exists */ 127 IAVF_AQ_RC_EINVAL = 14, /* Invalid argument */ 128 IAVF_AQ_RC_ENOTTY = 15, /* Not a typewriter */ 129 IAVF_AQ_RC_ENOSPC = 16, /* No space left or alloc failure */ 130 IAVF_AQ_RC_ENOSYS = 17, /* Function not implemented */ 131 IAVF_AQ_RC_ERANGE = 18, /* Parameter out of range */ 132 IAVF_AQ_RC_EFLUSHED = 19, /* Cmd flushed due to prev cmd error */ 133 IAVF_AQ_RC_BAD_ADDR = 20, /* Descriptor contains a bad pointer */ 134 IAVF_AQ_RC_EMODE = 21, /* Op not allowed in current dev mode */ 135 IAVF_AQ_RC_EFBIG = 22, /* File too large */ 136 }; 137 138 /* Admin Queue command opcodes */ 139 enum iavf_admin_queue_opc { 140 /* aq commands */ 141 iavf_aqc_opc_get_version = 0x0001, 142 iavf_aqc_opc_driver_version = 0x0002, 143 iavf_aqc_opc_queue_shutdown = 0x0003, 144 iavf_aqc_opc_set_pf_context = 0x0004, 145 146 /* resource ownership */ 147 iavf_aqc_opc_request_resource = 0x0008, 148 iavf_aqc_opc_release_resource = 0x0009, 149 150 iavf_aqc_opc_list_func_capabilities = 0x000A, 151 iavf_aqc_opc_list_dev_capabilities = 0x000B, 152 153 /* Proxy commands */ 154 iavf_aqc_opc_set_proxy_config = 0x0104, 155 iavf_aqc_opc_set_ns_proxy_table_entry = 0x0105, 156 157 /* LAA */ 158 iavf_aqc_opc_mac_address_read = 0x0107, 159 iavf_aqc_opc_mac_address_write = 0x0108, 160 161 /* PXE */ 162 iavf_aqc_opc_clear_pxe_mode = 0x0110, 163 164 /* WoL commands */ 165 iavf_aqc_opc_set_wol_filter = 0x0120, 166 iavf_aqc_opc_get_wake_reason = 0x0121, 167 iavf_aqc_opc_clear_all_wol_filters = 0x025E, 168 169 /* internal switch commands */ 170 iavf_aqc_opc_get_switch_config = 0x0200, 171 iavf_aqc_opc_add_statistics = 0x0201, 172 iavf_aqc_opc_remove_statistics = 0x0202, 173 iavf_aqc_opc_set_port_parameters = 0x0203, 174 iavf_aqc_opc_get_switch_resource_alloc = 0x0204, 175 iavf_aqc_opc_set_switch_config = 0x0205, 176 iavf_aqc_opc_rx_ctl_reg_read = 0x0206, 177 iavf_aqc_opc_rx_ctl_reg_write = 0x0207, 178 179 iavf_aqc_opc_add_vsi = 0x0210, 180 iavf_aqc_opc_update_vsi_parameters = 0x0211, 181 iavf_aqc_opc_get_vsi_parameters = 0x0212, 182 183 iavf_aqc_opc_add_pv = 0x0220, 184 iavf_aqc_opc_update_pv_parameters = 0x0221, 185 iavf_aqc_opc_get_pv_parameters = 0x0222, 186 187 iavf_aqc_opc_add_veb = 0x0230, 188 iavf_aqc_opc_update_veb_parameters = 0x0231, 189 iavf_aqc_opc_get_veb_parameters = 0x0232, 190 191 iavf_aqc_opc_delete_element = 0x0243, 192 193 iavf_aqc_opc_add_macvlan = 0x0250, 194 iavf_aqc_opc_remove_macvlan = 0x0251, 195 iavf_aqc_opc_add_vlan = 0x0252, 196 iavf_aqc_opc_remove_vlan = 0x0253, 197 iavf_aqc_opc_set_vsi_promiscuous_modes = 0x0254, 198 iavf_aqc_opc_add_tag = 0x0255, 199 iavf_aqc_opc_remove_tag = 0x0256, 200 iavf_aqc_opc_add_multicast_etag = 0x0257, 201 iavf_aqc_opc_remove_multicast_etag = 0x0258, 202 iavf_aqc_opc_update_tag = 0x0259, 203 iavf_aqc_opc_add_control_packet_filter = 0x025A, 204 iavf_aqc_opc_remove_control_packet_filter = 0x025B, 205 iavf_aqc_opc_add_cloud_filters = 0x025C, 206 iavf_aqc_opc_remove_cloud_filters = 0x025D, 207 iavf_aqc_opc_clear_wol_switch_filters = 0x025E, 208 iavf_aqc_opc_replace_cloud_filters = 0x025F, 209 210 iavf_aqc_opc_add_mirror_rule = 0x0260, 211 iavf_aqc_opc_delete_mirror_rule = 0x0261, 212 213 /* Dynamic Device Personalization */ 214 iavf_aqc_opc_write_personalization_profile = 0x0270, 215 iavf_aqc_opc_get_personalization_profile_list = 0x0271, 216 217 /* DCB commands */ 218 iavf_aqc_opc_dcb_ignore_pfc = 0x0301, 219 iavf_aqc_opc_dcb_updated = 0x0302, 220 iavf_aqc_opc_set_dcb_parameters = 0x0303, 221 222 /* TX scheduler */ 223 iavf_aqc_opc_configure_vsi_bw_limit = 0x0400, 224 iavf_aqc_opc_configure_vsi_ets_sla_bw_limit = 0x0406, 225 iavf_aqc_opc_configure_vsi_tc_bw = 0x0407, 226 iavf_aqc_opc_query_vsi_bw_config = 0x0408, 227 iavf_aqc_opc_query_vsi_ets_sla_config = 0x040A, 228 iavf_aqc_opc_configure_switching_comp_bw_limit = 0x0410, 229 230 iavf_aqc_opc_enable_switching_comp_ets = 0x0413, 231 iavf_aqc_opc_modify_switching_comp_ets = 0x0414, 232 iavf_aqc_opc_disable_switching_comp_ets = 0x0415, 233 iavf_aqc_opc_configure_switching_comp_ets_bw_limit = 0x0416, 234 iavf_aqc_opc_configure_switching_comp_bw_config = 0x0417, 235 iavf_aqc_opc_query_switching_comp_ets_config = 0x0418, 236 iavf_aqc_opc_query_port_ets_config = 0x0419, 237 iavf_aqc_opc_query_switching_comp_bw_config = 0x041A, 238 iavf_aqc_opc_suspend_port_tx = 0x041B, 239 iavf_aqc_opc_resume_port_tx = 0x041C, 240 iavf_aqc_opc_configure_partition_bw = 0x041D, 241 /* hmc */ 242 iavf_aqc_opc_query_hmc_resource_profile = 0x0500, 243 iavf_aqc_opc_set_hmc_resource_profile = 0x0501, 244 245 /* phy commands*/ 246 247 /* phy commands*/ 248 iavf_aqc_opc_get_phy_abilities = 0x0600, 249 iavf_aqc_opc_set_phy_config = 0x0601, 250 iavf_aqc_opc_set_mac_config = 0x0603, 251 iavf_aqc_opc_set_link_restart_an = 0x0605, 252 iavf_aqc_opc_get_link_status = 0x0607, 253 iavf_aqc_opc_set_phy_int_mask = 0x0613, 254 iavf_aqc_opc_get_local_advt_reg = 0x0614, 255 iavf_aqc_opc_set_local_advt_reg = 0x0615, 256 iavf_aqc_opc_get_partner_advt = 0x0616, 257 iavf_aqc_opc_set_lb_modes = 0x0618, 258 iavf_aqc_opc_get_phy_wol_caps = 0x0621, 259 iavf_aqc_opc_set_phy_debug = 0x0622, 260 iavf_aqc_opc_upload_ext_phy_fm = 0x0625, 261 iavf_aqc_opc_run_phy_activity = 0x0626, 262 iavf_aqc_opc_set_phy_register = 0x0628, 263 iavf_aqc_opc_get_phy_register = 0x0629, 264 265 /* NVM commands */ 266 iavf_aqc_opc_nvm_read = 0x0701, 267 iavf_aqc_opc_nvm_erase = 0x0702, 268 iavf_aqc_opc_nvm_update = 0x0703, 269 iavf_aqc_opc_nvm_config_read = 0x0704, 270 iavf_aqc_opc_nvm_config_write = 0x0705, 271 iavf_aqc_opc_nvm_progress = 0x0706, 272 iavf_aqc_opc_oem_post_update = 0x0720, 273 iavf_aqc_opc_thermal_sensor = 0x0721, 274 275 /* virtualization commands */ 276 iavf_aqc_opc_send_msg_to_pf = 0x0801, 277 iavf_aqc_opc_send_msg_to_vf = 0x0802, 278 iavf_aqc_opc_send_msg_to_peer = 0x0803, 279 280 /* alternate structure */ 281 iavf_aqc_opc_alternate_write = 0x0900, 282 iavf_aqc_opc_alternate_write_indirect = 0x0901, 283 iavf_aqc_opc_alternate_read = 0x0902, 284 iavf_aqc_opc_alternate_read_indirect = 0x0903, 285 iavf_aqc_opc_alternate_write_done = 0x0904, 286 iavf_aqc_opc_alternate_set_mode = 0x0905, 287 iavf_aqc_opc_alternate_clear_port = 0x0906, 288 289 /* LLDP commands */ 290 iavf_aqc_opc_lldp_get_mib = 0x0A00, 291 iavf_aqc_opc_lldp_update_mib = 0x0A01, 292 iavf_aqc_opc_lldp_add_tlv = 0x0A02, 293 iavf_aqc_opc_lldp_update_tlv = 0x0A03, 294 iavf_aqc_opc_lldp_delete_tlv = 0x0A04, 295 iavf_aqc_opc_lldp_stop = 0x0A05, 296 iavf_aqc_opc_lldp_start = 0x0A06, 297 iavf_aqc_opc_get_cee_dcb_cfg = 0x0A07, 298 iavf_aqc_opc_lldp_set_local_mib = 0x0A08, 299 iavf_aqc_opc_lldp_stop_start_spec_agent = 0x0A09, 300 301 /* Tunnel commands */ 302 iavf_aqc_opc_add_udp_tunnel = 0x0B00, 303 iavf_aqc_opc_del_udp_tunnel = 0x0B01, 304 iavf_aqc_opc_set_rss_key = 0x0B02, 305 iavf_aqc_opc_set_rss_lut = 0x0B03, 306 iavf_aqc_opc_get_rss_key = 0x0B04, 307 iavf_aqc_opc_get_rss_lut = 0x0B05, 308 309 /* Async Events */ 310 iavf_aqc_opc_event_lan_overflow = 0x1001, 311 312 /* OEM commands */ 313 iavf_aqc_opc_oem_parameter_change = 0xFE00, 314 iavf_aqc_opc_oem_device_status_change = 0xFE01, 315 iavf_aqc_opc_oem_ocsd_initialize = 0xFE02, 316 iavf_aqc_opc_oem_ocbb_initialize = 0xFE03, 317 318 /* debug commands */ 319 iavf_aqc_opc_debug_read_reg = 0xFF03, 320 iavf_aqc_opc_debug_write_reg = 0xFF04, 321 iavf_aqc_opc_debug_modify_reg = 0xFF07, 322 iavf_aqc_opc_debug_dump_internals = 0xFF08, 323 }; 324 325 /* command structures and indirect data structures */ 326 327 /* Structure naming conventions: 328 * - no suffix for direct command descriptor structures 329 * - _data for indirect sent data 330 * - _resp for indirect return data (data which is both will use _data) 331 * - _completion for direct return data 332 * - _element_ for repeated elements (may also be _data or _resp) 333 * 334 * Command structures are expected to overlay the params.raw member of the basic 335 * descriptor, and as such cannot exceed 16 bytes in length. 336 */ 337 338 /* This macro is used to generate a compilation error if a structure 339 * is not exactly the correct length. It gives a divide by zero error if the 340 * structure is not of the correct size, otherwise it creates an enum that is 341 * never used. 342 */ 343 #define IAVF_CHECK_STRUCT_LEN(n, X) enum iavf_static_assert_enum_##X \ 344 { iavf_static_assert_##X = (n)/((sizeof(struct X) == (n)) ? 1 : 0) } 345 346 /* This macro is used extensively to ensure that command structures are 16 347 * bytes in length as they have to map to the raw array of that size. 348 */ 349 #define IAVF_CHECK_CMD_LENGTH(X) IAVF_CHECK_STRUCT_LEN(16, X) 350 351 /* Queue Shutdown (direct 0x0003) */ 352 struct iavf_aqc_queue_shutdown { 353 __le32 driver_unloading; 354 #define IAVF_AQ_DRIVER_UNLOADING 0x1 355 u8 reserved[12]; 356 }; 357 358 IAVF_CHECK_CMD_LENGTH(iavf_aqc_queue_shutdown); 359 360 #define IAVF_AQC_WOL_PRESERVE_STATUS 0x200 361 #define IAVF_AQC_MC_MAG_EN 0x0100 362 #define IAVF_AQC_WOL_PRESERVE_ON_PFR 0x0200 363 364 struct iavf_aqc_vsi_properties_data { 365 /* first 96 byte are written by SW */ 366 __le16 valid_sections; 367 #define IAVF_AQ_VSI_PROP_SWITCH_VALID 0x0001 368 #define IAVF_AQ_VSI_PROP_SECURITY_VALID 0x0002 369 #define IAVF_AQ_VSI_PROP_VLAN_VALID 0x0004 370 #define IAVF_AQ_VSI_PROP_CAS_PV_VALID 0x0008 371 #define IAVF_AQ_VSI_PROP_INGRESS_UP_VALID 0x0010 372 #define IAVF_AQ_VSI_PROP_EGRESS_UP_VALID 0x0020 373 #define IAVF_AQ_VSI_PROP_QUEUE_MAP_VALID 0x0040 374 #define IAVF_AQ_VSI_PROP_QUEUE_OPT_VALID 0x0080 375 #define IAVF_AQ_VSI_PROP_OUTER_UP_VALID 0x0100 376 #define IAVF_AQ_VSI_PROP_SCHED_VALID 0x0200 377 /* switch section */ 378 __le16 switch_id; /* 12bit id combined with flags below */ 379 #define IAVF_AQ_VSI_SW_ID_SHIFT 0x0000 380 #define IAVF_AQ_VSI_SW_ID_MASK (0xFFF << IAVF_AQ_VSI_SW_ID_SHIFT) 381 #define IAVF_AQ_VSI_SW_ID_FLAG_NOT_STAG 0x1000 382 #define IAVF_AQ_VSI_SW_ID_FLAG_ALLOW_LB 0x2000 383 #define IAVF_AQ_VSI_SW_ID_FLAG_LOCAL_LB 0x4000 384 u8 sw_reserved[2]; 385 /* security section */ 386 u8 sec_flags; 387 #define IAVF_AQ_VSI_SEC_FLAG_ALLOW_DEST_OVRD 0x01 388 #define IAVF_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK 0x02 389 #define IAVF_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK 0x04 390 u8 sec_reserved; 391 /* VLAN section */ 392 __le16 pvid; /* VLANS include priority bits */ 393 __le16 fcoe_pvid; 394 u8 port_vlan_flags; 395 #define IAVF_AQ_VSI_PVLAN_MODE_SHIFT 0x00 396 #define IAVF_AQ_VSI_PVLAN_MODE_MASK (0x03 << \ 397 IAVF_AQ_VSI_PVLAN_MODE_SHIFT) 398 #define IAVF_AQ_VSI_PVLAN_MODE_TAGGED 0x01 399 #define IAVF_AQ_VSI_PVLAN_MODE_UNTAGGED 0x02 400 #define IAVF_AQ_VSI_PVLAN_MODE_ALL 0x03 401 #define IAVF_AQ_VSI_PVLAN_INSERT_PVID 0x04 402 #define IAVF_AQ_VSI_PVLAN_EMOD_SHIFT 0x03 403 #define IAVF_AQ_VSI_PVLAN_EMOD_MASK (0x3 << \ 404 IAVF_AQ_VSI_PVLAN_EMOD_SHIFT) 405 #define IAVF_AQ_VSI_PVLAN_EMOD_STR_BOTH 0x0 406 #define IAVF_AQ_VSI_PVLAN_EMOD_STR_UP 0x08 407 #define IAVF_AQ_VSI_PVLAN_EMOD_STR 0x10 408 #define IAVF_AQ_VSI_PVLAN_EMOD_NOTHING 0x18 409 u8 pvlan_reserved[3]; 410 /* ingress egress up sections */ 411 __le32 ingress_table; /* bitmap, 3 bits per up */ 412 #define IAVF_AQ_VSI_UP_TABLE_UP0_SHIFT 0 413 #define IAVF_AQ_VSI_UP_TABLE_UP0_MASK (0x7 << \ 414 IAVF_AQ_VSI_UP_TABLE_UP0_SHIFT) 415 #define IAVF_AQ_VSI_UP_TABLE_UP1_SHIFT 3 416 #define IAVF_AQ_VSI_UP_TABLE_UP1_MASK (0x7 << \ 417 IAVF_AQ_VSI_UP_TABLE_UP1_SHIFT) 418 #define IAVF_AQ_VSI_UP_TABLE_UP2_SHIFT 6 419 #define IAVF_AQ_VSI_UP_TABLE_UP2_MASK (0x7 << \ 420 IAVF_AQ_VSI_UP_TABLE_UP2_SHIFT) 421 #define IAVF_AQ_VSI_UP_TABLE_UP3_SHIFT 9 422 #define IAVF_AQ_VSI_UP_TABLE_UP3_MASK (0x7 << \ 423 IAVF_AQ_VSI_UP_TABLE_UP3_SHIFT) 424 #define IAVF_AQ_VSI_UP_TABLE_UP4_SHIFT 12 425 #define IAVF_AQ_VSI_UP_TABLE_UP4_MASK (0x7 << \ 426 IAVF_AQ_VSI_UP_TABLE_UP4_SHIFT) 427 #define IAVF_AQ_VSI_UP_TABLE_UP5_SHIFT 15 428 #define IAVF_AQ_VSI_UP_TABLE_UP5_MASK (0x7 << \ 429 IAVF_AQ_VSI_UP_TABLE_UP5_SHIFT) 430 #define IAVF_AQ_VSI_UP_TABLE_UP6_SHIFT 18 431 #define IAVF_AQ_VSI_UP_TABLE_UP6_MASK (0x7 << \ 432 IAVF_AQ_VSI_UP_TABLE_UP6_SHIFT) 433 #define IAVF_AQ_VSI_UP_TABLE_UP7_SHIFT 21 434 #define IAVF_AQ_VSI_UP_TABLE_UP7_MASK (0x7 << \ 435 IAVF_AQ_VSI_UP_TABLE_UP7_SHIFT) 436 __le32 egress_table; /* same defines as for ingress table */ 437 /* cascaded PV section */ 438 __le16 cas_pv_tag; 439 u8 cas_pv_flags; 440 #define IAVF_AQ_VSI_CAS_PV_TAGX_SHIFT 0x00 441 #define IAVF_AQ_VSI_CAS_PV_TAGX_MASK (0x03 << \ 442 IAVF_AQ_VSI_CAS_PV_TAGX_SHIFT) 443 #define IAVF_AQ_VSI_CAS_PV_TAGX_LEAVE 0x00 444 #define IAVF_AQ_VSI_CAS_PV_TAGX_REMOVE 0x01 445 #define IAVF_AQ_VSI_CAS_PV_TAGX_COPY 0x02 446 #define IAVF_AQ_VSI_CAS_PV_INSERT_TAG 0x10 447 #define IAVF_AQ_VSI_CAS_PV_ETAG_PRUNE 0x20 448 #define IAVF_AQ_VSI_CAS_PV_ACCEPT_HOST_TAG 0x40 449 u8 cas_pv_reserved; 450 /* queue mapping section */ 451 __le16 mapping_flags; 452 #define IAVF_AQ_VSI_QUE_MAP_CONTIG 0x0 453 #define IAVF_AQ_VSI_QUE_MAP_NONCONTIG 0x1 454 __le16 queue_mapping[16]; 455 #define IAVF_AQ_VSI_QUEUE_SHIFT 0x0 456 #define IAVF_AQ_VSI_QUEUE_MASK (0x7FF << IAVF_AQ_VSI_QUEUE_SHIFT) 457 __le16 tc_mapping[8]; 458 #define IAVF_AQ_VSI_TC_QUE_OFFSET_SHIFT 0 459 #define IAVF_AQ_VSI_TC_QUE_OFFSET_MASK (0x1FF << \ 460 IAVF_AQ_VSI_TC_QUE_OFFSET_SHIFT) 461 #define IAVF_AQ_VSI_TC_QUE_NUMBER_SHIFT 9 462 #define IAVF_AQ_VSI_TC_QUE_NUMBER_MASK (0x7 << \ 463 IAVF_AQ_VSI_TC_QUE_NUMBER_SHIFT) 464 /* queueing option section */ 465 u8 queueing_opt_flags; 466 #define IAVF_AQ_VSI_QUE_OPT_MULTICAST_UDP_ENA 0x04 467 #define IAVF_AQ_VSI_QUE_OPT_UNICAST_UDP_ENA 0x08 468 #define IAVF_AQ_VSI_QUE_OPT_TCP_ENA 0x10 469 #define IAVF_AQ_VSI_QUE_OPT_FCOE_ENA 0x20 470 #define IAVF_AQ_VSI_QUE_OPT_RSS_LUT_PF 0x00 471 #define IAVF_AQ_VSI_QUE_OPT_RSS_LUT_VSI 0x40 472 u8 queueing_opt_reserved[3]; 473 /* scheduler section */ 474 u8 up_enable_bits; 475 u8 sched_reserved; 476 /* outer up section */ 477 __le32 outer_up_table; /* same structure and defines as ingress tbl */ 478 u8 cmd_reserved[8]; 479 /* last 32 bytes are written by FW */ 480 __le16 qs_handle[8]; 481 #define IAVF_AQ_VSI_QS_HANDLE_INVALID 0xFFFF 482 __le16 stat_counter_idx; 483 __le16 sched_id; 484 u8 resp_reserved[12]; 485 }; 486 487 IAVF_CHECK_STRUCT_LEN(128, iavf_aqc_vsi_properties_data); 488 489 /* Get VEB Parameters (direct 0x0232) 490 * uses iavf_aqc_switch_seid for the descriptor 491 */ 492 struct iavf_aqc_get_veb_parameters_completion { 493 __le16 seid; 494 __le16 switch_id; 495 __le16 veb_flags; /* only the first/last flags from 0x0230 is valid */ 496 __le16 statistic_index; 497 __le16 vebs_used; 498 __le16 vebs_free; 499 u8 reserved[4]; 500 }; 501 502 IAVF_CHECK_CMD_LENGTH(iavf_aqc_get_veb_parameters_completion); 503 504 #define IAVF_LINK_SPEED_100MB_SHIFT 0x1 505 #define IAVF_LINK_SPEED_1000MB_SHIFT 0x2 506 #define IAVF_LINK_SPEED_10GB_SHIFT 0x3 507 #define IAVF_LINK_SPEED_40GB_SHIFT 0x4 508 #define IAVF_LINK_SPEED_20GB_SHIFT 0x5 509 #define IAVF_LINK_SPEED_25GB_SHIFT 0x6 510 511 enum iavf_aq_link_speed { 512 IAVF_LINK_SPEED_UNKNOWN = 0, 513 IAVF_LINK_SPEED_100MB = (1 << IAVF_LINK_SPEED_100MB_SHIFT), 514 IAVF_LINK_SPEED_1GB = (1 << IAVF_LINK_SPEED_1000MB_SHIFT), 515 IAVF_LINK_SPEED_10GB = (1 << IAVF_LINK_SPEED_10GB_SHIFT), 516 IAVF_LINK_SPEED_40GB = (1 << IAVF_LINK_SPEED_40GB_SHIFT), 517 IAVF_LINK_SPEED_20GB = (1 << IAVF_LINK_SPEED_20GB_SHIFT), 518 IAVF_LINK_SPEED_25GB = (1 << IAVF_LINK_SPEED_25GB_SHIFT), 519 }; 520 521 #define IAVF_AQ_LINK_UP_FUNCTION 0x01 522 523 /* Send to PF command (indirect 0x0801) id is only used by PF 524 * Send to VF command (indirect 0x0802) id is only used by PF 525 * Send to Peer PF command (indirect 0x0803) 526 */ 527 struct iavf_aqc_pf_vf_message { 528 __le32 id; 529 u8 reserved[4]; 530 __le32 addr_high; 531 __le32 addr_low; 532 }; 533 534 IAVF_CHECK_CMD_LENGTH(iavf_aqc_pf_vf_message); 535 536 /* Get CEE DCBX Oper Config (0x0A07) 537 * uses the generic descriptor struct 538 * returns below as indirect response 539 */ 540 541 #define IAVF_AQC_CEE_APP_FCOE_SHIFT 0x0 542 #define IAVF_AQC_CEE_APP_FCOE_MASK (0x7 << IAVF_AQC_CEE_APP_FCOE_SHIFT) 543 #define IAVF_AQC_CEE_APP_ISCSI_SHIFT 0x3 544 #define IAVF_AQC_CEE_APP_ISCSI_MASK (0x7 << IAVF_AQC_CEE_APP_ISCSI_SHIFT) 545 #define IAVF_AQC_CEE_APP_FIP_SHIFT 0x8 546 #define IAVF_AQC_CEE_APP_FIP_MASK (0x7 << IAVF_AQC_CEE_APP_FIP_SHIFT) 547 548 #define IAVF_AQC_CEE_PG_STATUS_SHIFT 0x0 549 #define IAVF_AQC_CEE_PG_STATUS_MASK (0x7 << IAVF_AQC_CEE_PG_STATUS_SHIFT) 550 #define IAVF_AQC_CEE_PFC_STATUS_SHIFT 0x3 551 #define IAVF_AQC_CEE_PFC_STATUS_MASK (0x7 << IAVF_AQC_CEE_PFC_STATUS_SHIFT) 552 #define IAVF_AQC_CEE_APP_STATUS_SHIFT 0x8 553 #define IAVF_AQC_CEE_APP_STATUS_MASK (0x7 << IAVF_AQC_CEE_APP_STATUS_SHIFT) 554 #define IAVF_AQC_CEE_FCOE_STATUS_SHIFT 0x8 555 #define IAVF_AQC_CEE_FCOE_STATUS_MASK (0x7 << IAVF_AQC_CEE_FCOE_STATUS_SHIFT) 556 #define IAVF_AQC_CEE_ISCSI_STATUS_SHIFT 0xB 557 #define IAVF_AQC_CEE_ISCSI_STATUS_MASK (0x7 << IAVF_AQC_CEE_ISCSI_STATUS_SHIFT) 558 #define IAVF_AQC_CEE_FIP_STATUS_SHIFT 0x10 559 #define IAVF_AQC_CEE_FIP_STATUS_MASK (0x7 << IAVF_AQC_CEE_FIP_STATUS_SHIFT) 560 561 /* struct iavf_aqc_get_cee_dcb_cfg_v1_resp was originally defined with 562 * word boundary layout issues, which the Linux compilers silently deal 563 * with by adding padding, making the actual struct larger than designed. 564 * However, the FW compiler for the NIC is less lenient and complains 565 * about the struct. Hence, the struct defined here has an extra byte in 566 * fields reserved3 and reserved4 to directly acknowledge that padding, 567 * and the new length is used in the length check macro. 568 */ 569 struct iavf_aqc_get_cee_dcb_cfg_v1_resp { 570 u8 reserved1; 571 u8 oper_num_tc; 572 u8 oper_prio_tc[4]; 573 u8 reserved2; 574 u8 oper_tc_bw[8]; 575 u8 oper_pfc_en; 576 u8 reserved3[2]; 577 __le16 oper_app_prio; 578 u8 reserved4[2]; 579 __le16 tlv_status; 580 }; 581 582 IAVF_CHECK_STRUCT_LEN(0x18, iavf_aqc_get_cee_dcb_cfg_v1_resp); 583 584 struct iavf_aqc_get_cee_dcb_cfg_resp { 585 u8 oper_num_tc; 586 u8 oper_prio_tc[4]; 587 u8 oper_tc_bw[8]; 588 u8 oper_pfc_en; 589 __le16 oper_app_prio; 590 __le32 tlv_status; 591 u8 reserved[12]; 592 }; 593 594 IAVF_CHECK_STRUCT_LEN(0x20, iavf_aqc_get_cee_dcb_cfg_resp); 595 596 /* Set Local LLDP MIB (indirect 0x0A08) 597 * Used to replace the local MIB of a given LLDP agent. e.g. DCBx 598 */ 599 struct iavf_aqc_lldp_set_local_mib { 600 #define SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT 0 601 #define SET_LOCAL_MIB_AC_TYPE_DCBX_MASK (1 << \ 602 SET_LOCAL_MIB_AC_TYPE_DCBX_SHIFT) 603 #define SET_LOCAL_MIB_AC_TYPE_LOCAL_MIB 0x0 604 #define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT (1) 605 #define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_MASK (1 << \ 606 SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS_SHIFT) 607 #define SET_LOCAL_MIB_AC_TYPE_NON_WILLING_APPS 0x1 608 u8 type; 609 u8 reserved0; 610 __le16 length; 611 u8 reserved1[4]; 612 __le32 address_high; 613 __le32 address_low; 614 }; 615 616 IAVF_CHECK_CMD_LENGTH(iavf_aqc_lldp_set_local_mib); 617 618 struct iavf_aqc_lldp_set_local_mib_resp { 619 #define SET_LOCAL_MIB_RESP_EVENT_TRIGGERED_MASK 0x01 620 u8 status; 621 u8 reserved[15]; 622 }; 623 624 IAVF_CHECK_STRUCT_LEN(0x10, iavf_aqc_lldp_set_local_mib_resp); 625 626 /* Stop/Start LLDP Agent (direct 0x0A09) 627 * Used for stopping/starting specific LLDP agent. e.g. DCBx 628 */ 629 struct iavf_aqc_lldp_stop_start_specific_agent { 630 #define IAVF_AQC_START_SPECIFIC_AGENT_SHIFT 0 631 #define IAVF_AQC_START_SPECIFIC_AGENT_MASK \ 632 (1 << IAVF_AQC_START_SPECIFIC_AGENT_SHIFT) 633 u8 command; 634 u8 reserved[15]; 635 }; 636 637 IAVF_CHECK_CMD_LENGTH(iavf_aqc_lldp_stop_start_specific_agent); 638 639 struct iavf_aqc_get_set_rss_key { 640 #define IAVF_AQC_SET_RSS_KEY_VSI_VALID (0x1 << 15) 641 #define IAVF_AQC_SET_RSS_KEY_VSI_ID_SHIFT 0 642 #define IAVF_AQC_SET_RSS_KEY_VSI_ID_MASK (0x3FF << \ 643 IAVF_AQC_SET_RSS_KEY_VSI_ID_SHIFT) 644 __le16 vsi_id; 645 u8 reserved[6]; 646 __le32 addr_high; 647 __le32 addr_low; 648 }; 649 650 IAVF_CHECK_CMD_LENGTH(iavf_aqc_get_set_rss_key); 651 652 struct iavf_aqc_get_set_rss_key_data { 653 u8 standard_rss_key[0x28]; 654 u8 extended_hash_key[0xc]; 655 }; 656 657 IAVF_CHECK_STRUCT_LEN(0x34, iavf_aqc_get_set_rss_key_data); 658 659 struct iavf_aqc_get_set_rss_lut { 660 #define IAVF_AQC_SET_RSS_LUT_VSI_VALID (0x1 << 15) 661 #define IAVF_AQC_SET_RSS_LUT_VSI_ID_SHIFT 0 662 #define IAVF_AQC_SET_RSS_LUT_VSI_ID_MASK (0x3FF << \ 663 IAVF_AQC_SET_RSS_LUT_VSI_ID_SHIFT) 664 __le16 vsi_id; 665 #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT 0 666 #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_MASK (0x1 << \ 667 IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) 668 669 #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_VSI 0 670 #define IAVF_AQC_SET_RSS_LUT_TABLE_TYPE_PF 1 671 __le16 flags; 672 u8 reserved[4]; 673 __le32 addr_high; 674 __le32 addr_low; 675 }; 676 677 IAVF_CHECK_CMD_LENGTH(iavf_aqc_get_set_rss_lut); 678 #endif /* _IAVF_ADMINQ_CMD_H_ */
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