The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/dev/iavf/iavf_register.h

Version: -  FREEBSD  -  FREEBSD-13-STABLE  -  FREEBSD-13-0  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  l41  -  OPENBSD  -  linux-2.6  -  MK84  -  PLAN9  -  xnu-8792 
SearchContext: -  none  -  3  -  10  
    1 /* SPDX-License-Identifier: BSD-3-Clause */
    2 /*  Copyright (c) 2021, Intel Corporation
    3  *  All rights reserved.
    4  *
    5  *  Redistribution and use in source and binary forms, with or without
    6  *  modification, are permitted provided that the following conditions are met:
    7  *
    8  *   1. Redistributions of source code must retain the above copyright notice,
    9  *      this list of conditions and the following disclaimer.
   10  *
   11  *   2. Redistributions in binary form must reproduce the above copyright
   12  *      notice, this list of conditions and the following disclaimer in the
   13  *      documentation and/or other materials provided with the distribution.
   14  *
   15  *   3. Neither the name of the Intel Corporation nor the names of its
   16  *      contributors may be used to endorse or promote products derived from
   17  *      this software without specific prior written permission.
   18  *
   19  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
   20  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
   21  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
   22  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
   23  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   24  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   25  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   26  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   27  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   28  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   29  *  POSSIBILITY OF SUCH DAMAGE.
   30  */
   31 /*$FreeBSD$*/
   32 
   33 #ifndef _IAVF_REGISTER_H_
   34 #define _IAVF_REGISTER_H_
   35 
   36 #define IAVF_VF_ARQBAH1              0x00006000 /* Reset: EMPR */
   37 #define IAVF_VF_ARQBAL1              0x00006C00 /* Reset: EMPR */
   38 #define IAVF_VF_ARQH1            0x00007400 /* Reset: EMPR */
   39 #define IAVF_VF_ARQH1_ARQH_SHIFT 0
   40 #define IAVF_VF_ARQH1_ARQH_MASK  IAVF_MASK(0x3FF, IAVF_VF_ARQH1_ARQH_SHIFT)
   41 #define IAVF_VF_ARQLEN1                 0x00008000 /* Reset: EMPR */
   42 #define IAVF_VF_ARQLEN1_ARQVFE_SHIFT    28
   43 #define IAVF_VF_ARQLEN1_ARQVFE_MASK     IAVF_MASK(1UL, IAVF_VF_ARQLEN1_ARQVFE_SHIFT)
   44 #define IAVF_VF_ARQLEN1_ARQOVFL_SHIFT   29
   45 #define IAVF_VF_ARQLEN1_ARQOVFL_MASK    IAVF_MASK(1UL, IAVF_VF_ARQLEN1_ARQOVFL_SHIFT)
   46 #define IAVF_VF_ARQLEN1_ARQCRIT_SHIFT   30
   47 #define IAVF_VF_ARQLEN1_ARQCRIT_MASK    IAVF_MASK(1UL, IAVF_VF_ARQLEN1_ARQCRIT_SHIFT)
   48 #define IAVF_VF_ARQLEN1_ARQENABLE_SHIFT 31
   49 #define IAVF_VF_ARQLEN1_ARQENABLE_MASK  IAVF_MASK(1UL, IAVF_VF_ARQLEN1_ARQENABLE_SHIFT)
   50 #define IAVF_VF_ARQT1            0x00007000 /* Reset: EMPR */
   51 #define IAVF_VF_ATQBAH1              0x00007800 /* Reset: EMPR */
   52 #define IAVF_VF_ATQBAL1              0x00007C00 /* Reset: EMPR */
   53 #define IAVF_VF_ATQH1            0x00006400 /* Reset: EMPR */
   54 #define IAVF_VF_ATQLEN1                 0x00006800 /* Reset: EMPR */
   55 #define IAVF_VF_ATQLEN1_ATQVFE_SHIFT    28
   56 #define IAVF_VF_ATQLEN1_ATQVFE_MASK     IAVF_MASK(1UL, IAVF_VF_ATQLEN1_ATQVFE_SHIFT)
   57 #define IAVF_VF_ATQLEN1_ATQOVFL_SHIFT   29
   58 #define IAVF_VF_ATQLEN1_ATQOVFL_MASK    IAVF_MASK(1UL, IAVF_VF_ATQLEN1_ATQOVFL_SHIFT)
   59 #define IAVF_VF_ATQLEN1_ATQCRIT_SHIFT   30
   60 #define IAVF_VF_ATQLEN1_ATQCRIT_MASK    IAVF_MASK(1UL, IAVF_VF_ATQLEN1_ATQCRIT_SHIFT)
   61 #define IAVF_VF_ATQLEN1_ATQENABLE_SHIFT 31
   62 #define IAVF_VF_ATQLEN1_ATQENABLE_MASK  IAVF_MASK(1UL, IAVF_VF_ATQLEN1_ATQENABLE_SHIFT)
   63 #define IAVF_VF_ATQT1            0x00008400 /* Reset: EMPR */
   64 #define IAVF_VFGEN_RSTAT                 0x00008800 /* Reset: VFR */
   65 #define IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT 0
   66 #define IAVF_VFGEN_RSTAT_VFR_STATE_MASK  IAVF_MASK(0x3, IAVF_VFGEN_RSTAT_VFR_STATE_SHIFT)
   67 #define IAVF_VFINT_DYN_CTL01                       0x00005C00 /* Reset: VFR */
   68 #define IAVF_VFINT_DYN_CTL01_INTENA_SHIFT          0
   69 #define IAVF_VFINT_DYN_CTL01_INTENA_MASK           IAVF_MASK(1UL, IAVF_VFINT_DYN_CTL01_INTENA_SHIFT)
   70 #define IAVF_VFINT_DYN_CTL01_CLEARPBA_SHIFT        1
   71 #define IAVF_VFINT_DYN_CTL01_CLEARPBA_MASK         IAVF_MASK(1UL, IAVF_VFINT_DYN_CTL01_CLEARPBA_SHIFT)
   72 #define IAVF_VFINT_DYN_CTL01_SWINT_TRIG_SHIFT      2
   73 #define IAVF_VFINT_DYN_CTL01_SWINT_TRIG_MASK       IAVF_MASK(1UL, IAVF_VFINT_DYN_CTL01_SWINT_TRIG_SHIFT)
   74 #define IAVF_VFINT_DYN_CTL01_ITR_INDX_SHIFT        3
   75 #define IAVF_VFINT_DYN_CTL01_ITR_INDX_MASK         IAVF_MASK(0x3, IAVF_VFINT_DYN_CTL01_ITR_INDX_SHIFT)
   76 #define IAVF_VFINT_DYN_CTL01_INTERVAL_SHIFT        5
   77 #define IAVF_VFINT_DYN_CTL01_INTERVAL_MASK         IAVF_MASK(0xFFF, IAVF_VFINT_DYN_CTL01_INTERVAL_SHIFT)
   78 #define IAVF_VFINT_DYN_CTL01_SW_ITR_INDX_ENA_SHIFT 24
   79 #define IAVF_VFINT_DYN_CTL01_SW_ITR_INDX_ENA_MASK  IAVF_MASK(1UL, IAVF_VFINT_DYN_CTL01_SW_ITR_INDX_ENA_SHIFT)
   80 #define IAVF_VFINT_DYN_CTL01_SW_ITR_INDX_SHIFT     25
   81 #define IAVF_VFINT_DYN_CTL01_SW_ITR_INDX_MASK      IAVF_MASK(0x3, IAVF_VFINT_DYN_CTL01_SW_ITR_INDX_SHIFT)
   82 #define IAVF_VFINT_DYN_CTLN1(_INTVF)               (0x00003800 + ((_INTVF) * 4)) /* _i=0...15 */ /* Reset: VFR */
   83 #define IAVF_VFINT_DYN_CTLN1_INTENA_SHIFT          0
   84 #define IAVF_VFINT_DYN_CTLN1_INTENA_MASK           IAVF_MASK(1UL, IAVF_VFINT_DYN_CTLN1_INTENA_SHIFT)
   85 #define IAVF_VFINT_DYN_CTLN1_CLEARPBA_SHIFT        1
   86 #define IAVF_VFINT_DYN_CTLN1_CLEARPBA_MASK         IAVF_MASK(1UL, IAVF_VFINT_DYN_CTLN1_CLEARPBA_SHIFT)
   87 #define IAVF_VFINT_DYN_CTLN1_SWINT_TRIG_SHIFT      2
   88 #define IAVF_VFINT_DYN_CTLN1_SWINT_TRIG_MASK       IAVF_MASK(1UL, IAVF_VFINT_DYN_CTLN1_SWINT_TRIG_SHIFT)
   89 #define IAVF_VFINT_DYN_CTLN1_ITR_INDX_SHIFT        3
   90 #define IAVF_VFINT_DYN_CTLN1_ITR_INDX_MASK         IAVF_MASK(0x3, IAVF_VFINT_DYN_CTLN1_ITR_INDX_SHIFT)
   91 #define IAVF_VFINT_DYN_CTLN1_INTERVAL_SHIFT        5
   92 #define IAVF_VFINT_DYN_CTLN1_INTERVAL_MASK         IAVF_MASK(0xFFF, IAVF_VFINT_DYN_CTLN1_INTERVAL_SHIFT)
   93 #define IAVF_VFINT_DYN_CTLN1_SW_ITR_INDX_ENA_SHIFT 24
   94 #define IAVF_VFINT_DYN_CTLN1_SW_ITR_INDX_ENA_MASK  IAVF_MASK(1UL, IAVF_VFINT_DYN_CTLN1_SW_ITR_INDX_ENA_SHIFT)
   95 #define IAVF_VFINT_DYN_CTLN1_SW_ITR_INDX_SHIFT     25
   96 #define IAVF_VFINT_DYN_CTLN1_SW_ITR_INDX_MASK      IAVF_MASK(0x3, IAVF_VFINT_DYN_CTLN1_SW_ITR_INDX_SHIFT)
   97 #define IAVF_VFINT_ICR0_ENA1                        0x00005000 /* Reset: CORER */
   98 #define IAVF_VFINT_ICR0_ENA1_ADMINQ_SHIFT           30
   99 #define IAVF_VFINT_ICR0_ENA1_ADMINQ_MASK            IAVF_MASK(1UL, IAVF_VFINT_ICR0_ENA1_ADMINQ_SHIFT)
  100 #define IAVF_VFINT_ICR0_ENA1_RSVD_SHIFT             31
  101 #define IAVF_VFINT_ICR01                        0x00004800 /* Reset: CORER */
  102 #define IAVF_VFINT_ICR01_QUEUE_0_SHIFT          1
  103 #define IAVF_VFINT_ICR01_QUEUE_0_MASK           IAVF_MASK(1UL, IAVF_VFINT_ICR01_QUEUE_0_SHIFT)
  104 #define IAVF_VFINT_ICR01_LINK_STAT_CHANGE_SHIFT 25
  105 #define IAVF_VFINT_ICR01_LINK_STAT_CHANGE_MASK  IAVF_MASK(1UL, IAVF_VFINT_ICR01_LINK_STAT_CHANGE_SHIFT)
  106 #define IAVF_VFINT_ICR01_ADMINQ_SHIFT           30
  107 #define IAVF_VFINT_ICR01_ADMINQ_MASK            IAVF_MASK(1UL, IAVF_VFINT_ICR01_ADMINQ_SHIFT)
  108 #define IAVF_VFINT_ITR01(_i)            (0x00004C00 + ((_i) * 4)) /* _i=0...2 */ /* Reset: VFR */
  109 #define IAVF_VFINT_ITRN1(_i, _INTVF)     (0x00002800 + ((_i) * 64 + (_INTVF) * 4)) /* _i=0...2, _INTVF=0...15 */ /* Reset: VFR */
  110 #define IAVF_VFINT_STAT_CTL01                      0x00005400 /* Reset: CORER */
  111 #define IAVF_QRX_TAIL1(_Q)        (0x00002000 + ((_Q) * 4)) /* _i=0...15 */ /* Reset: CORER */
  112 #define IAVF_QTX_TAIL1(_Q)        (0x00000000 + ((_Q) * 4)) /* _i=0...15 */ /* Reset: PFR */
  113 #define IAVF_VFQF_HENA(_i)             (0x0000C400 + ((_i) * 4)) /* _i=0...1 */ /* Reset: CORER */
  114 #define IAVF_VFQF_HKEY(_i)         (0x0000CC00 + ((_i) * 4)) /* _i=0...12 */ /* Reset: CORER */
  115 #define IAVF_VFQF_HKEY_MAX_INDEX   12
  116 #define IAVF_VFQF_HLUT(_i)        (0x0000D000 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */
  117 #define IAVF_VFQF_HLUT_MAX_INDEX  15
  118 #define IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_SHIFT       30
  119 #define IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_MASK        IAVF_MASK(1UL, IAVF_VFINT_DYN_CTLN1_WB_ON_ITR_SHIFT)
  120 
  121 #endif /* _IAVF_REGISTER_H_ */

Cache object: 2f58bd1ecd910aa4b7a067c3d51919d0

[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.