FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/aacreg.h
1 /* $NetBSD: aacreg.h,v 1.1 2002/04/26 02:05:11 ad Exp $ */
2
3 /*-
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Andrew Doran.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*-
40 * Copyright (c) 2000 Michael Smith
41 * Copyright (c) 2000 Scott Long
42 * Copyright (c) 2000 BSDi
43 * Copyright (c) 2000 Niklas Hallqvist
44 * All rights reserved.
45 *
46 * Redistribution and use in source and binary forms, with or without
47 * modification, are permitted provided that the following conditions
48 * are met:
49 * 1. Redistributions of source code must retain the above copyright
50 * notice, this list of conditions and the following disclaimer.
51 * 2. Redistributions in binary form must reproduce the above copyright
52 * notice, this list of conditions and the following disclaimer in the
53 * documentation and/or other materials provided with the distribution.
54 *
55 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
58 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
65 * SUCH DAMAGE.
66 *
67 * from FreeBSD: aacreg.h,v 1.1 2000/09/13 03:20:34 msmith Exp
68 * via OpenBSD: aacreg.h,v 1.3 2001/06/12 15:40:29 niklas Exp
69 */
70
71 /*
72 * Data structures defining the interface between the driver and the Adaptec
73 * 'FSA' adapters. Note that many field names and comments here are taken
74 * verbatim from the Adaptec driver source in order to make comparing the
75 * two slightly easier.
76 */
77
78 #ifndef _PCI_AACREG_H_
79 #define _PCI_AACREG_H_
80
81 /*
82 * Misc. magic numbers.
83 */
84 #define AAC_MAX_CONTAINERS 64
85 #define AAC_BLOCK_SIZE 512
86
87 /*
88 * Communications interface.
89 *
90 * Where datastructure layouts are closely parallel to the Adaptec sample code,
91 * retain their naming conventions (for now) to aid in cross-referencing.
92 */
93
94 /*
95 * We establish 4 command queues and matching response queues. Queues must
96 * be 16-byte aligned, and are sized as follows:
97 */
98 #define AAC_HOST_NORM_CMD_ENTRIES 8 /* cmd adapter->host, normal pri */
99 #define AAC_HOST_HIGH_CMD_ENTRIES 4 /* cmd adapter->host, high pri */
100 #define AAC_ADAP_NORM_CMD_ENTRIES 512 /* cmd host->adapter, normal pri */
101 #define AAC_ADAP_HIGH_CMD_ENTRIES 4 /* cmd host->adapter, high pri */
102 #define AAC_HOST_NORM_RESP_ENTRIES 512 /* resp, adapter->host, normal pri */
103 #define AAC_HOST_HIGH_RESP_ENTRIES 4 /* resp, adapter->host, high pri */
104 #define AAC_ADAP_NORM_RESP_ENTRIES 8 /* resp, host->adapter, normal pri */
105 #define AAC_ADAP_HIGH_RESP_ENTRIES 4 /* resp, host->adapter, high pri */
106
107 #define AAC_TOTALQ_LENGTH \
108 (AAC_HOST_HIGH_CMD_ENTRIES + AAC_HOST_NORM_CMD_ENTRIES + \
109 AAC_ADAP_HIGH_CMD_ENTRIES + AAC_ADAP_NORM_CMD_ENTRIES + \
110 AAC_HOST_HIGH_RESP_ENTRIES + AAC_HOST_NORM_RESP_ENTRIES + \
111 AAC_ADAP_HIGH_RESP_ENTRIES + AAC_ADAP_NORM_RESP_ENTRIES)
112
113 #define AAC_QUEUE_COUNT 8
114 #define AAC_QUEUE_ALIGN 16
115
116 struct aac_queue_entry {
117 u_int32_t aq_fib_size; /* FIB size in bytes */
118 u_int32_t aq_fib_addr; /* receiver-space address of the FIB */
119 } __attribute__ ((__packed__));
120
121 #define AAC_PRODUCER_INDEX 0
122 #define AAC_CONSUMER_INDEX 1
123
124 /*
125 * Table of queue indices and queues used to communicate with the
126 * controller. This structure must be aligned to AAC_QUEUE_ALIGN
127 */
128 struct aac_queue_table {
129 /* queue consumer/producer indexes (layout mandated by adapter) */
130 u_int32_t qt_qindex[AAC_QUEUE_COUNT][2];
131
132 /* queue entry structures (layout mandated by adapter) */
133 struct aac_queue_entry qt_HostNormCmdQueue[AAC_HOST_NORM_CMD_ENTRIES];
134 struct aac_queue_entry qt_HostHighCmdQueue[AAC_HOST_HIGH_CMD_ENTRIES];
135 struct aac_queue_entry qt_AdapNormCmdQueue[AAC_ADAP_NORM_CMD_ENTRIES];
136 struct aac_queue_entry qt_AdapHighCmdQueue[AAC_ADAP_HIGH_CMD_ENTRIES];
137 struct aac_queue_entry
138 qt_HostNormRespQueue[AAC_HOST_NORM_RESP_ENTRIES];
139 struct aac_queue_entry
140 qt_HostHighRespQueue[AAC_HOST_HIGH_RESP_ENTRIES];
141 struct aac_queue_entry
142 qt_AdapNormRespQueue[AAC_ADAP_NORM_RESP_ENTRIES];
143 struct aac_queue_entry
144 qt_AdapHighRespQueue[AAC_ADAP_HIGH_RESP_ENTRIES];
145 } __attribute__ ((__packed__));
146
147 /*
148 * Adapter Init Structure: this is passed to the adapter with the
149 * AAC_MONKER_INITSTRUCT command to point it at our control structures.
150 */
151 struct aac_adapter_init {
152 u_int32_t InitStructRevision;
153 #define AAC_INIT_STRUCT_REVISION 3
154 u_int32_t MiniPortRevision;
155 u_int32_t FilesystemRevision;
156 u_int32_t CommHeaderAddress;
157 u_int32_t FastIoCommAreaAddress;
158 u_int32_t AdapterFibsPhysicalAddress;
159 void *AdapterFibsVirtualAddress;
160 u_int32_t AdapterFibsSize;
161 u_int32_t AdapterFibAlign;
162 u_int32_t PrintfBufferAddress;
163 u_int32_t PrintfBufferSize;
164 u_int32_t HostPhysMemPages;
165 u_int32_t HostElapsedSeconds;
166 } __attribute__((__packed__));
167
168 /*
169 * Shared data types
170 */
171
172 /*
173 * Container types
174 */
175 #define CT_NONE 0
176 #define CT_VOLUME 1
177 #define CT_MIRROR 2
178 #define CT_STRIPE 3
179 #define CT_RAID5 4
180 #define CT_SSRW 5
181 #define CT_SSRO 6
182 #define CT_MORPH 7
183 #define CT_PASSTHRU 8
184 #define CT_RAID4 9
185 #define CT_RAID10 10 /* stripe of mirror */
186 #define CT_RAID00 11 /* stripe of stripe */
187 #define CT_VOLUME_OF_MIRRORS 12 /* volume of mirror */
188 #define CT_PSEUDO_RAID3 13 /* really raid4 */
189
190 /*
191 * Host-addressable object types
192 */
193 #define FT_REG 1 /* regular file */
194 #define FT_DIR 2 /* directory */
195 #define FT_BLK 3 /* "block" device - reserved */
196 #define FT_CHR 4 /* "character special" device - reserved */
197 #define FT_LNK 5 /* symbolic link */
198 #define FT_SOCK 6 /* socket */
199 #define FT_FIFO 7 /* fifo */
200 #define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */
201 #define FT_DRIVE 9 /* phys disk - addressable in scsi by bus/target/lun */
202 #define FT_SLICE 10 /* virtual disk - raw volume - slice */
203 #define FT_PARTITION 11 /* FSA part, inside slice, container building block */
204 #define FT_VOLUME 12 /* Container - Volume Set */
205 #define FT_STRIPE 13 /* Container - Stripe Set */
206 #define FT_MIRROR 14 /* Container - Mirror Set */
207 #define FT_RAID5 15 /* Container - Raid 5 Set */
208 #define FT_DATABASE 16 /* Storage object with "foreign" content manager */
209
210 /*
211 * Host-side scatter/gather list for 32-bit commands.
212 */
213 struct aac_sg_entry {
214 u_int32_t SgAddress;
215 u_int32_t SgByteCount;
216 } __attribute__ ((__packed__));
217
218 struct aac_sg_table {
219 u_int32_t SgCount;
220 struct aac_sg_entry SgEntry[0]; /* XXX */
221 } __attribute__ ((__packed__));
222
223 /*
224 * Host-side scatter/gather list for 64-bit commands.
225 */
226 struct aac_sg_table64 {
227 u_int8_t SgCount;
228 u_int8_t SgSectorsPerPage;
229 u_int16_t SgByteOffset;
230 u_int64_t SgEntry[0];
231 } __attribute__ ((__packed__));
232
233 /*
234 * Container creation data
235 */
236 struct aac_container_creation {
237 u_int8_t ViaBuildNumber;
238 u_int8_t MicroSecond;
239 u_int8_t Via; /* 1 = FSU, 2 = API, etc. */
240 u_int8_t YearsSince1900;
241 u_int32_t Month:4; /* 1-12 */
242 u_int32_t Day:6; /* 1-32 */
243 u_int32_t Hour:6; /* 0-23 */
244 u_int32_t Minute:6; /* 0-59 */
245 u_int32_t Second:6; /* 0-59 */
246 u_int64_t ViaAdapterSerialNumber;
247 } __attribute__ ((__packed__));
248
249 struct FsaRevision {
250 union {
251 struct {
252 u_int8_t dash;
253 u_int8_t type;
254 u_int8_t minor;
255 u_int8_t major;
256 } comp;
257 u_int32_t ul;
258 } external;
259 u_int32_t buildNumber;
260 } __attribute__((__packed__));
261
262 /*
263 * Adapter Information
264 */
265
266 #define CPU_NTSIM 1
267 #define CPU_I960 2
268 #define CPU_ARM 3
269 #define CPU_SPARC 4
270 #define CPU_POWERPC 5
271 #define CPU_ALPHA 6
272 #define CPU_P7 7
273 #define CPU_I960_RX 8
274 #define CPU__last 9
275
276 #define CPUI960_JX 1
277 #define CPUI960_CX 2
278 #define CPUI960_HX 3
279 #define CPUI960_RX 4
280 #define CPUARM_SA110 5
281 #define CPUARM_xxx 6
282 #define CPUPPC_603e 7
283 #define CPUPPC_xxx 8
284 #define CPUSUBTYPE__last 9
285
286 #define PLAT_NTSIM 1
287 #define PLAT_V3ADU 2
288 #define PLAT_CYCLONE 3
289 #define PLAT_CYCLONE_HD 4
290 #define PLAT_BATBOARD 5
291 #define PLAT_BATBOARD_HD 6
292 #define PLAT_YOLO 7
293 #define PLAT_COBRA 8
294 #define PLAT_ANAHEIM 9
295 #define PLAT_JALAPENO 10
296 #define PLAT_QUEENS 11
297 #define PLAT_JALAPENO_DELL 12
298 #define PLAT_POBLANO 13
299 #define PLAT_POBLANO_OPAL 14
300 #define PLAT_POBLANO_SL0 15
301 #define PLAT_POBLANO_SL1 16
302 #define PLAT_POBLANO_SL2 17
303 #define PLAT_POBLANO_XXX 18
304 #define PLAT_JALAPENO_P2 19
305 #define PLAT_HABANERO 20
306 #define PLAT__last 21
307
308 #define OEM_FLAVOR_ADAPTEC 1
309 #define OEM_FLAVOR_DELL 2
310 #define OEM_FLAVOR_HP 3
311 #define OEM_FLAVOR_IBM 4
312 #define OEM_FLAVOR_CPQ 5
313 #define OEM_FLAVOR_BRAND_X 6
314 #define OEM_FLAVOR_BRAND_Y 7
315 #define OEM_FLAVOR_BRAND_Z 8
316 #define OEM_FLAVOR__last 9
317
318 /*
319 * XXX the aac-2622 with no battery present reports PLATFORM_BAT_OPT_PRESENT
320 */
321 #define PLATFORM_BAT_REQ_PRESENT 1 /* BATTERY REQUIRED AND PRESENT */
322 #define PLATFORM_BAT_REQ_NOTPRESENT 2 /* BATTERY REQUIRED AND NOT PRESENT */
323 #define PLATFORM_BAT_OPT_PRESENT 3 /* BATTERY OPTIONAL AND PRESENT */
324 #define PLATFORM_BAT_OPT_NOTPRESENT 4 /* BATTERY OPTIONAL AND NOT PRESENT */
325 #define PLATFORM_BAT_NOT_SUPPORTED 5 /* BATTERY NOT SUPPORTED */
326
327 /*
328 * Structure used to respond to a RequestAdapterInfo fib.
329 */
330 struct aac_adapter_info {
331 u_int32_t PlatformBase; /* adapter type */
332 u_int32_t CpuArchitecture; /* adapter CPU type */
333 u_int32_t CpuVariant; /* adapter CPU subtype */
334 u_int32_t ClockSpeed; /* adapter CPU clockspeed */
335 u_int32_t ExecutionMem; /* adapter Execution Memory size */
336 u_int32_t BufferMem; /* adapter Data Memory */
337 u_int32_t TotalMem; /* adapter Total Memory */
338 struct FsaRevision KernelRevision; /* adapter Kernel SW Revision */
339 struct FsaRevision MonitorRevision; /* adapter Monitor/Diag SW Rev */
340 struct FsaRevision HardwareRevision; /* TDB */
341 struct FsaRevision BIOSRevision; /* adapter BIOS Revision */
342 u_int32_t ClusteringEnabled;
343 u_int32_t ClusterChannelMask;
344 u_int64_t SerialNumber;
345 u_int32_t batteryPlatform;
346 u_int32_t SupportedOptions; /* supported features of this ctrlr */
347 u_int32_t OemVariant;
348 } __attribute__((__packed__));
349
350 /*
351 * Monitor/Kernel interface.
352 */
353
354 /*
355 * Synchronous commands to the monitor/kernel.
356 */
357 #define AAC_MONKER_INITSTRUCT 0x05
358 #define AAC_MONKER_SYNCFIB 0x0c
359 #define AAC_MONKER_GETKERNVER 0x11
360
361 /*
362 * Command status values
363 */
364 #define ST_OK 0
365 #define ST_PERM 1
366 #define ST_NOENT 2
367 #define ST_IO 5
368 #define ST_NXIO 6
369 #define ST_E2BIG 7
370 #define ST_ACCES 13
371 #define ST_EXIST 17
372 #define ST_XDEV 18
373 #define ST_NODEV 19
374 #define ST_NOTDIR 20
375 #define ST_ISDIR 21
376 #define ST_INVAL 22
377 #define ST_FBIG 27
378 #define ST_NOSPC 28
379 #define ST_ROFS 30
380 #define ST_MLINK 31
381 #define ST_WOULDBLOCK 35
382 #define ST_NAMETOOLONG 63
383 #define ST_NOTEMPTY 66
384 #define ST_DQUOT 69
385 #define ST_STALE 70
386 #define ST_REMOTE 71
387 #define ST_BADHANDLE 10001
388 #define ST_NOT_SYNC 10002
389 #define ST_BAD_COOKIE 10003
390 #define ST_NOTSUPP 10004
391 #define ST_TOOSMALL 10005
392 #define ST_SERVERFAULT 10006
393 #define ST_BADTYPE 10007
394 #define ST_JUKEBOX 10008
395 #define ST_NOTMOUNTED 10009
396 #define ST_MAINTMODE 10010
397 #define ST_STALEACL 10011
398
399 /*
400 * Volume manager commands
401 */
402 #define VM_Null 0
403 #define VM_NameServe 1
404 #define VM_ContainerConfig 2
405 #define VM_Ioctl 3
406 #define VM_FilesystemIoctl 4
407 #define VM_CloseAll 5
408 #define VM_CtBlockRead 6
409 #define VM_CtBlockWrite 7
410 #define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */
411 #define VM_SliceBlockWrite 9
412 #define VM_DriveBlockRead 10 /* raw access to physical devices */
413 #define VM_DriveBlockWrite 11
414 #define VM_EnclosureMgt 12 /* enclosure management */
415 #define VM_Unused 13 /* used to be diskset management */
416 #define VM_CtBlockVerify 14
417 #define VM_CtPerf 15 /* performance test */
418 #define VM_CtBlockRead64 16
419 #define VM_CtBlockWrite64 17
420 #define VM_CtBlockVerify64 18
421
422 /*
423 * "Mountable object"
424 */
425 struct aac_mntobj {
426 u_int32_t ObjectId;
427 char FileSystemName[16];
428 struct aac_container_creation CreateInfo;
429 u_int32_t Capacity;
430 u_int32_t VolType;
431 u_int32_t ObjType;
432 u_int32_t ContentState;
433 #define AAC_FSCS_READONLY 0x0002 /* XXX need more information than this */
434 union {
435 u_int32_t pad[8];
436 } ObjExtension;
437 u_int32_t AlterEgoId;
438 } __attribute__ ((__packed__));
439
440 struct aac_mntinfo {
441 u_int32_t Command;
442 u_int32_t MntType;
443 u_int32_t MntCount;
444 } __attribute__ ((__packed__));
445
446 struct aac_mntinforesponse {
447 u_int32_t Status;
448 u_int32_t MntType;
449 u_int32_t MntRespCount;
450 struct aac_mntobj MntTable[1];
451 } __attribute__ ((__packed__));
452
453 /*
454 * Write 'stability' options.
455 */
456 #define CSTABLE 1
457 #define CUNSTABLE 2
458
459 /*
460 * Commit level response for a write request.
461 */
462 #define CMFILE_SYNC_NVRAM 1
463 #define CMDATA_SYNC_NVRAM 2
464 #define CMFILE_SYNC 3
465 #define CMDATA_SYNC 4
466 #define CMUNSTABLE 5
467
468 /*
469 * Block read/write operations. These structures are packed into the 'data'
470 * area in the FIB.
471 */
472 struct aac_blockread {
473 u_int32_t Command; /* not FSACommand! */
474 u_int32_t ContainerId;
475 u_int32_t BlockNumber;
476 u_int32_t ByteCount;
477 struct aac_sg_table SgMap; /* variable size */
478 } __attribute__ ((__packed__));
479
480 struct aac_blockread_response {
481 u_int32_t Status;
482 u_int32_t ByteCount;
483 } __attribute__ ((__packed__));
484
485 struct aac_blockwrite {
486 u_int32_t Command; /* not FSACommand! */
487 u_int32_t ContainerId;
488 u_int32_t BlockNumber;
489 u_int32_t ByteCount;
490 u_int32_t Stable;
491 struct aac_sg_table SgMap; /* variable size */
492 } __attribute__ ((__packed__));
493
494 struct aac_blockwrite_response {
495 u_int32_t Status;
496 u_int32_t ByteCount;
497 u_int32_t Committed;
498 } __attribute__ ((__packed__));
499
500 struct aac_close_command {
501 u_int32_t Command;
502 u_int32_t ContainerId;
503 } __attribute__ ((__packed__));
504
505 /*
506 * Register definitions for the Adaptec AAC-364 'Jalapeno I/II' adapters, based
507 * on the SA110 'StrongArm'.
508 */
509
510 #define AAC_REGSIZE 0x100
511
512 /* doorbell 0 (adapter->host) */
513 #define AAC_SA_DOORBELL0_CLEAR 0x98
514 #define AAC_SA_DOORBELL0_SET 0x9c
515 #define AAC_SA_DOORBELL0 0x9c
516 #define AAC_SA_MASK0_CLEAR 0xa0
517 #define AAC_SA_MASK0_SET 0xa4
518
519 /* doorbell 1 (host->adapter) */
520 #define AAC_SA_DOORBELL1_CLEAR 0x9a
521 #define AAC_SA_DOORBELL1_SET 0x9e
522 #define AAC_SA_MASK1_CLEAR 0xa2
523 #define AAC_SA_MASK1_SET 0xa6
524
525 /* mailbox (20 bytes) */
526 #define AAC_SA_MAILBOX 0xa8
527 #define AAC_SA_FWSTATUS 0xc4
528
529 /*
530 * Register definitions for the Adaptec 'Pablano' adapters, based on the
531 * i960Rx, and other related adapters.
532 */
533
534 #define AAC_RX_IDBR 0x20 /* inbound doorbell */
535 #define AAC_RX_IISR 0x24 /* inbound interrupt status */
536 #define AAC_RX_IIMR 0x28 /* inbound interrupt mask */
537 #define AAC_RX_ODBR 0x2c /* outbound doorbell */
538 #define AAC_RX_OISR 0x30 /* outbound interrupt status */
539 #define AAC_RX_OIMR 0x34 /* outbound interrupt mask */
540
541 #define AAC_RX_MAILBOX 0x50 /* mailbox (20 bytes) */
542 #define AAC_RX_FWSTATUS 0x6c
543
544 /*
545 * Common bit definitions for the doorbell registers.
546 */
547
548 /*
549 * Status bits in the doorbell registers.
550 */
551 #define AAC_DB_SYNC_COMMAND (1<<0) /* send/completed synchronous FIB */
552 #define AAC_DB_COMMAND_READY (1<<1) /* posted one or more commands */
553 #define AAC_DB_RESPONSE_READY (1<<2) /* one or more commands complete */
554 #define AAC_DB_COMMAND_NOT_FULL (1<<3) /* command queue not full */
555 #define AAC_DB_RESPONSE_NOT_FULL (1<<4) /* response queue not full */
556
557 /*
558 * The adapter can request the host print a message by setting the
559 * DB_PRINTF flag in DOORBELL0. The driver responds by collecting the
560 * message from the printf buffer, clearing the DB_PRINTF flag in
561 * DOORBELL0 and setting it in DOORBELL1.
562 * (ODBR and IDBR respectively for the i960Rx adapters)
563 */
564 #define AAC_DB_PRINTF (1<<5)
565
566 /*
567 * Mask containing the interrupt bits we care about. We don't anticipate
568 * (or want) interrupts not in this mask.
569 */
570 #define AAC_DB_INTERRUPTS \
571 (AAC_DB_COMMAND_READY | AAC_DB_RESPONSE_READY | AAC_DB_PRINTF)
572
573 /*
574 * Queue names
575 *
576 * Note that we base these at 0 in order to use them as array indices. Adaptec
577 * used base 1 for some unknown reason, and sorted them in a different order.
578 */
579 #define AAC_HOST_NORM_CMD_QUEUE 0
580 #define AAC_HOST_HIGH_CMD_QUEUE 1
581 #define AAC_ADAP_NORM_CMD_QUEUE 2
582 #define AAC_ADAP_HIGH_CMD_QUEUE 3
583 #define AAC_HOST_NORM_RESP_QUEUE 4
584 #define AAC_HOST_HIGH_RESP_QUEUE 5
585 #define AAC_ADAP_NORM_RESP_QUEUE 6
586 #define AAC_ADAP_HIGH_RESP_QUEUE 7
587
588 /*
589 * List structure used to chain FIBs (used by the adapter - we hang FIBs off
590 * our private command structure and don't touch these)
591 */
592 struct aac_fib_list_entry {
593 struct fib_list_entry *Flink;
594 struct fib_list_entry *Blink;
595 } __attribute__((__packed__));
596
597 /*
598 * FIB (FSA Interface Block?); this is the datastructure passed between the
599 * host and adapter.
600 */
601 struct aac_fib_header {
602 u_int32_t XferState;
603 u_int16_t Command;
604 u_int8_t StructType;
605 u_int8_t Flags;
606 u_int16_t Size;
607 u_int16_t SenderSize;
608 u_int32_t SenderFibAddress;
609 u_int32_t ReceiverFibAddress;
610 u_int32_t SenderData;
611 union {
612 struct {
613 u_int32_t ReceiverTimeStart;
614 u_int32_t ReceiverTimeDone;
615 } _s;
616 struct aac_fib_list_entry FibLinks;
617 } _u;
618 } __attribute__((__packed__));
619
620 #define AAC_FIB_DATASIZE (512 - sizeof(struct aac_fib_header))
621
622 struct aac_fib {
623 struct aac_fib_header Header;
624 u_int8_t data[AAC_FIB_DATASIZE];
625 } __attribute__((__packed__));
626
627 /*
628 * FIB commands
629 */
630 #define TestCommandResponse 1
631 #define TestAdapterCommand 2
632
633 /* Lowlevel and comm commands */
634 #define LastTestCommand 100
635 #define ReinitHostNormCommandQueue 101
636 #define ReinitHostHighCommandQueue 102
637 #define ReinitHostHighRespQueue 103
638 #define ReinitHostNormRespQueue 104
639 #define ReinitAdapNormCommandQueue 105
640 #define ReinitAdapHighCommandQueue 107
641 #define ReinitAdapHighRespQueue 108
642 #define ReinitAdapNormRespQueue 109
643 #define InterfaceShutdown 110
644 #define DmaCommandFib 120
645 #define StartProfile 121
646 #define TermProfile 122
647 #define SpeedTest 123
648 #define TakeABreakPt 124
649 #define RequestPerfData 125
650 #define SetInterruptDefTimer 126
651 #define SetInterruptDefCount 127
652 #define GetInterruptDefStatus 128
653 #define LastCommCommand 129
654
655 /* filesystem commands */
656 #define NuFileSystem 300
657 #define UFS 301
658 #define HostFileSystem 302
659 #define LastFileSystemCommand 303
660
661 /* Container Commands */
662 #define ContainerCommand 500
663 #define ContainerCommand64 501
664
665 /* Cluster Commands */
666 #define ClusterCommand 550
667
668 /* Scsi Port commands (scsi passthrough) */
669 #define ScsiPortCommand 600
670
671 /* Misc house keeping and generic adapter initiated commands */
672 #define AifRequest 700
673 #define CheckRevision 701
674 #define FsaHostShutdown 702
675 #define RequestAdapterInfo 703
676 #define IsAdapterPaused 704
677 #define SendHostTime 705
678 #define LastMiscCommand 706
679
680 /*
681 * FIB types
682 */
683 #define AAC_FIBTYPE_TFIB 1
684 #define AAC_FIBTYPE_TQE 2
685 #define AAC_FIBTYPE_TCTPERF 3
686
687 /*
688 * FIB transfer state
689 */
690 #define AAC_FIBSTATE_HOSTOWNED (1<<0) /* owned by the host */
691 #define AAC_FIBSTATE_ADAPTEROWNED (1<<1) /* owned by the adapter */
692 #define AAC_FIBSTATE_INITIALISED (1<<2) /* initialised */
693 #define AAC_FIBSTATE_EMPTY (1<<3) /* empty */
694 #define AAC_FIBSTATE_FROMPOOL (1<<4) /* allocated from pool */
695 #define AAC_FIBSTATE_FROMHOST (1<<5) /* sent from the host */
696 #define AAC_FIBSTATE_FROMADAP (1<<6) /* sent from the adapter */
697 #define AAC_FIBSTATE_REXPECTED (1<<7) /* response is expected */
698 #define AAC_FIBSTATE_RNOTEXPECTED (1<<8) /* response is not expected */
699 #define AAC_FIBSTATE_DONEADAP (1<<9) /* processed by the adapter */
700 #define AAC_FIBSTATE_DONEHOST (1<<10) /* processed by the host */
701 #define AAC_FIBSTATE_HIGH (1<<11) /* high priority */
702 #define AAC_FIBSTATE_NORM (1<<12) /* normal priority */
703 #define AAC_FIBSTATE_ASYNC (1<<13)
704 #define AAC_FIBSTATE_ASYNCIO (1<<13) /* to be removed */
705 #define AAC_FIBSTATE_PAGEFILEIO (1<<14) /* to be removed */
706 #define AAC_FIBSTATE_SHUTDOWN (1<<15)
707 #define AAC_FIBSTATE_LAZYWRITE (1<<16) /* to be removed */
708 #define AAC_FIBSTATE_ADAPMICROFIB (1<<17)
709 #define AAC_FIBSTATE_BIOSFIB (1<<18)
710 #define AAC_FIBSTATE_FAST_RESPONSE (1<<19) /* fast response capable */
711 #define AAC_FIBSTATE_APIFIB (1<<20)
712
713 /*
714 * FIB error values
715 */
716 #define AAC_ERROR_NORMAL 0x00
717 #define AAC_ERROR_PENDING 0x01
718 #define AAC_ERROR_FATAL 0x02
719 #define AAC_ERROR_INVALID_QUEUE 0x03
720 #define AAC_ERROR_NOENTRIES 0x04
721 #define AAC_ERROR_SENDFAILED 0x05
722 #define AAC_ERROR_INVALID_QUEUE_PRIORITY 0x06
723 #define AAC_ERROR_FIB_ALLOCATION_FAILED 0x07
724 #define AAC_ERROR_FIB_DEALLOCATION_FAILED 0x08
725
726 /*
727 * Adapter Status Register
728 *
729 * Phase Staus mailbox is 32bits:
730 * <31:16> = Phase Status
731 * <15:0> = Phase
732 *
733 * The adapter reports its present state through the phase. Only
734 * a single phase should be ever be set. Each phase can have multiple
735 * phase status bits to provide more detailed information about the
736 * state of the adapter.
737 */
738 #define AAC_SELF_TEST_FAILED 0x00000004
739 #define AAC_UP_AND_RUNNING 0x00000080
740 #define AAC_KERNEL_PANIC 0x00000100
741
742 #endif /* !_PCI_AACREG_H_ */
Cache object: 9167d7ae71c412fdc8d78bc2ec25f9d9
|