The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/ad1843reg.h

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    1 /* $NetBSD: ad1843reg.h,v 1.1 2007/04/13 03:35:38 jmcneill Exp $ */
    2 /* $OpenBSD: ad1843reg.h,v 1.1 2005/01/02 19:25:41 kettenis Exp $ */
    3 
    4 /*
    5  * Copyright (c) 2005 Mark Kettenis
    6  *
    7  * Permission to use, copy, modify, and distribute this software for any
    8  * purpose with or without fee is hereby granted, provided that the above
    9  * copyright notice and this permission notice appear in all copies.
   10  *
   11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
   13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
   14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
   15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
   16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
   17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
   18  */
   19 
   20 /*
   21  * AD1843 Codec register defenitions.
   22  */
   23 
   24 #define AD1843_CODEC_STATUS             0
   25 #define  AD1843_INIT                    0x8000
   26 #define  AD1843_PDNO                    0x4000
   27 #define  AD1843_REVISION_MASK           0x000f
   28 
   29 #define AD1843_ADC_SOURCE_GAIN          2
   30 #define  AD1843_LSS_MASK                0xe000
   31 #define  AD1843_LSS_SHIFT               13
   32 #define  AD1843_RSS_MASK                0x00e0
   33 #define  AD1843_RSS_SHIFT               5
   34 #define  AD1843_LMGE                    0x1000
   35 #define  AD1843_RMGE                    0x0010
   36 #define  AD1843_LIG_MASK                0x0f00
   37 #define  AD1843_LIG_SHIFT               8
   38 #define  AD1843_RIG_MASK                0x000f
   39 #define  AD1843_RIG_SHIFT               0
   40 
   41 #define AD1843_DAC2_TO_MIXER            3
   42 #define  AD1843_LD2MM                   0x8000
   43 #define  AD1843_RD2MM                   0x0080
   44 #define  AD1843_LD2M_MASK               0x1f00
   45 #define  AD1843_LD2M_SHIFT              8
   46 #define  AD1843_RD2M_MASK               0x001f
   47 #define  AD1843_RD2M_SHIFT              0
   48 
   49 #define AD1843_MISC_SETTINGS            8
   50 #define  AD1843_MNMM                    0x8000
   51 #define  AD1843_MNM_MASK                0x1f00
   52 #define  AD1843_MNM_SHIFT               8
   53 #define  AD1843_ALLMM                   0x0080
   54 #define  AD1843_MNOM                    0x0040
   55 #define  AD1843_HPOM                    0x0020
   56 #define  AD1843_HPOS                    0x0010
   57 #define  AD1843_SUMM                    0x0008
   58 #define  AD1843_DAC2T                   0x0002
   59 #define  AD1843_DAC1T                   0x0001
   60 
   61 #define AD1843_DAC1_ANALOG_GAIN         9
   62 #define  AD1843_LDA1GM                  0x8000
   63 #define  AD1843_RDA1GM                  0x0080
   64 #define  AD1843_LDA1G_MASK              0x3f00
   65 #define  AD1843_LDA1G_SHIFT             8
   66 #define  AD1843_RDA1G_MASK              0x003f
   67 #define  AD1843_RDA1G_SHIFT             0
   68 
   69 #define AD1843_DAC1_DIGITAL_GAIN        11
   70 #define  AD1843_LDA1AM                  0x8000
   71 #define  AD1843_RDA1AM                  0x0080
   72 
   73 #define AD1843_CHANNEL_SAMPLE_RATE      15
   74 #define  AD1843_DA1C_SHIFT              8
   75 
   76 #define AD1843_CLOCK1_SAMPLE_RATE       17
   77 #define AD1843_CLOCK2_SAMPLE_RATE       20
   78 #define AD1843_CLOCK3_SAMPLE_RATE       13
   79 
   80 #define AD1843_SERIAL_INTERFACE         26
   81 #define  AD1843_DA2F_MASK               0x0c00
   82 #define  AD1843_DA2F_SHIFT              10
   83 #define  AD1843_DA1F_MASK               0x0300
   84 #define  AD1843_DA1F_SHIFT              8
   85 #define  AD1843_PCM8                    0
   86 #define  AD1843_PCM16                   1
   87 #define  AD1843_ULAW                    2
   88 #define  AD1843_ALAW                    3
   89 #define  AD1843_SCF                     0x0080
   90 
   91 #define AD1843_CHANNEL_POWER_DOWN       27
   92 #define  AD1843_DFREE                   0x8000
   93 #define  AD1843_DDMEN                   0x1000
   94 #define  AD1843_DA2EN                   0x0200
   95 #define  AD1843_DA1EN                   0x0100
   96 #define  AD1843_ANAEN                   0x0080
   97 #define  AD1843_HPEN                    0x0040
   98 #define  AD1843_AAMEN                   0x0010
   99 #define  AD1843_ADREN                   0x0002
  100 #define  AD1843_ADLEN                   0x0001
  101 
  102 #define AD1843_FUNDAMENTAL_SETTINGS     28
  103 #define  AD1843_PDNI                    0x8000
  104 #define  AD1843_ACEN                    0x4000
  105 #define  AD1843_C3EN                    0x2000
  106 #define  AD1843_C2EN                    0x1000
  107 #define  AD1843_C1EN                    0x0800
  108 
  109 #define AD1843_NREGS                    32

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