FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/aic6360.c
1 /* $NetBSD: aic6360.c,v 1.84 2005/02/27 00:27:00 perry Exp $ */
2
3 /*
4 * Copyright (c) 1994, 1995, 1996 Charles M. Hannum. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Charles M. Hannum.
17 * 4. The name of the author may not be used to endorse or promote products
18 * derived from this software without specific prior written permission.
19 *
20 * Copyright (c) 1994 Jarle Greipsland
21 * All rights reserved.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 * 1. Redistributions of source code must retain the above copyright
27 * notice, this list of conditions and the following disclaimer.
28 * 2. Redistributions in binary form must reproduce the above copyright
29 * notice, this list of conditions and the following disclaimer in the
30 * documentation and/or other materials provided with the distribution.
31 * 3. The name of the author may not be used to endorse or promote products
32 * derived from this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
35 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
36 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
37 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
38 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
39 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
40 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
41 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
42 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
43 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
44 * POSSIBILITY OF SUCH DAMAGE.
45 */
46
47 /*
48 * Acknowledgements: Many of the algorithms used in this driver are
49 * inspired by the work of Julian Elischer (julian@tfs.com) and
50 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million!
51 */
52
53 /* TODO list:
54 * 1) Get the DMA stuff working.
55 * 2) Get the iov/uio stuff working. Is this a good thing ???
56 * 3) Get the synch stuff working.
57 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
58 */
59
60 #include <sys/cdefs.h>
61 __KERNEL_RCSID(0, "$NetBSD: aic6360.c,v 1.84 2005/02/27 00:27:00 perry Exp $");
62
63 #include "opt_ddb.h"
64
65 /*
66 * A few customizable items:
67 */
68
69 /* Use doubleword transfers to/from SCSI chip. Note: This requires
70 * motherboard support. Basicly, some motherboard chipsets are able to
71 * split a 32 bit I/O operation into two 16 bit I/O operations,
72 * transparently to the processor. This speeds up some things, notably long
73 * data transfers.
74 */
75 #define AIC_USE_DWORDS 0
76
77 /* Synchronous data transfers? */
78 #define AIC_USE_SYNCHRONOUS 0
79 #define AIC_SYNC_REQ_ACK_OFS 8
80
81 /* Wide data transfers? */
82 #define AIC_USE_WIDE 0
83 #define AIC_MAX_WIDTH 0
84
85 /* Max attempts made to transmit a message */
86 #define AIC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */
87
88 /* Use DMA (else we do programmed I/O using string instructions) (not yet!)*/
89 #define AIC_USE_EISA_DMA 0
90 #define AIC_USE_ISA_DMA 0
91
92 /* How to behave on the (E)ISA bus when/if DMAing (on<<4) + off in us */
93 #define EISA_BRST_TIM ((15<<4) + 1) /* 15us on, 1us off */
94
95 /* Some spin loop parameters (essentially how long to wait some places)
96 * The problem(?) is that sometimes we expect either to be able to transmit a
97 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid
98 * returning from the interrupt just to get yanked back for the next byte we
99 * may spin in the interrupt routine waiting for this byte to come. How long?
100 * This is really (SCSI) device and processor dependent. Tuneable, I guess.
101 */
102 #define AIC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */
103 #define AIC_MSGOUT_SPIN 1
104
105 /* Include debug functions? At the end of this file there are a bunch of
106 * functions that will print out various information regarding queued SCSI
107 * commands, driver state and chip contents. You can call them from the
108 * kernel debugger. If you set AIC_DEBUG to 0 they are not included (the
109 * kernel uses less memory) but you lose the debugging facilities.
110 */
111 #define AIC_DEBUG 1
112
113 #define AIC_ABORT_TIMEOUT 2000 /* time to wait for abort */
114
115 /* End of customizable parameters */
116
117 #if AIC_USE_EISA_DMA || AIC_USE_ISA_DMA
118 #error "I said not yet! Start paying attention... grumble"
119 #endif
120
121 #include <sys/param.h>
122 #include <sys/systm.h>
123 #include <sys/callout.h>
124 #include <sys/kernel.h>
125 #include <sys/errno.h>
126 #include <sys/ioctl.h>
127 #include <sys/device.h>
128 #include <sys/buf.h>
129 #include <sys/proc.h>
130 #include <sys/user.h>
131 #include <sys/queue.h>
132
133 #include <machine/bus.h>
134 #include <machine/intr.h>
135
136 #include <dev/scsipi/scsi_spc.h>
137 #include <dev/scsipi/scsi_all.h>
138 #include <dev/scsipi/scsipi_all.h>
139 #include <dev/scsipi/scsi_message.h>
140 #include <dev/scsipi/scsiconf.h>
141
142 #include <dev/ic/aic6360reg.h>
143 #include <dev/ic/aic6360var.h>
144
145 #ifndef DDB
146 #define Debugger() panic("should call debugger here (aic6360.c)")
147 #endif /* ! DDB */
148
149 #if AIC_DEBUG
150 int aic_debug = 0x00; /* AIC_SHOWSTART|AIC_SHOWMISC|AIC_SHOWTRACE; */
151 #endif
152
153 static void aic_minphys(struct buf *);
154 static void aic_done(struct aic_softc *, struct aic_acb *);
155 static void aic_dequeue(struct aic_softc *, struct aic_acb *);
156 static void aic_scsipi_request(struct scsipi_channel *,
157 scsipi_adapter_req_t, void *);
158 static int aic_poll(struct aic_softc *, struct scsipi_xfer *, int);
159 static void aic_select(struct aic_softc *, struct aic_acb *);
160 static void aic_timeout(void *);
161 static void aic_sched(struct aic_softc *);
162 static void aic_scsi_reset(struct aic_softc *);
163 static void aic_reset(struct aic_softc *);
164 static void aic_free_acb(struct aic_softc *, struct aic_acb *);
165 static struct aic_acb* aic_get_acb(struct aic_softc *);
166 static int aic_reselect(struct aic_softc *, int);
167 static void aic_sense(struct aic_softc *, struct aic_acb *);
168 static void aic_msgin(struct aic_softc *);
169 static void aic_abort(struct aic_softc *, struct aic_acb *);
170 static void aic_msgout(struct aic_softc *);
171 static int aic_dataout_pio(struct aic_softc *, u_char *, int);
172 static int aic_datain_pio(struct aic_softc *, u_char *, int);
173 static void aic_update_xfer_mode(struct aic_softc *, int);
174 #if AIC_DEBUG
175 static void aic_print_acb(struct aic_acb *);
176 void aic_dump_driver(struct aic_softc *);
177 void aic_dump6360(struct aic_softc *);
178 static void aic_show_scsi_cmd(struct aic_acb *);
179 void aic_print_active_acb(void);
180 #endif
181
182 /*
183 * INITIALIZATION ROUTINES (probe, attach ++)
184 */
185
186 /* Do the real search-for-device.
187 * Prerequisite: sc->sc_iobase should be set to the proper value
188 */
189 int
190 aic_find(bus_space_tag_t iot, bus_space_handle_t ioh)
191 {
192 char chip_id[sizeof(IDSTRING)]; /* For chips that support it */
193 int i;
194
195 /* Remove aic6360 from possible powerdown mode */
196 bus_space_write_1(iot, ioh, DMACNTRL0, 0);
197
198 /* Thanks to mark@aggregate.com for the new method for detecting
199 * whether the chip is present or not. Bonus: may also work for
200 * the AIC-6260!
201 */
202 AIC_TRACE(("aic: probing for aic-chip\n"));
203 /*
204 * Linux also init's the stack to 1-16 and then clears it,
205 * 6260's don't appear to have an ID reg - mpg
206 */
207 /* Push the sequence 0,1,..,15 on the stack */
208 #define STSIZE 16
209 bus_space_write_1(iot, ioh, DMACNTRL1, 0); /* Reset stack pointer */
210 for (i = 0; i < STSIZE; i++)
211 bus_space_write_1(iot, ioh, STACK, i);
212
213 /* See if we can pull out the same sequence */
214 bus_space_write_1(iot, ioh, DMACNTRL1, 0);
215 for (i = 0; i < STSIZE && bus_space_read_1(iot, ioh, STACK) == i; i++)
216 ;
217 if (i != STSIZE) {
218 AIC_START(("STACK futzed at %d.\n", i));
219 return 0;
220 }
221
222 /* See if we can pull the id string out of the ID register,
223 * now only used for informational purposes.
224 */
225 memset(chip_id, 0, sizeof(chip_id));
226 bus_space_read_multi_1(iot, ioh, ID, chip_id, sizeof(IDSTRING) - 1);
227 AIC_START(("AIC found ID: %s ",chip_id));
228 AIC_START(("chip revision %d\n",
229 (int)bus_space_read_1(iot, ioh, REV)));
230
231 return 1;
232 }
233
234 /*
235 * Attach the AIC6360, fill out some high and low level data structures
236 */
237 void
238 aicattach(struct aic_softc *sc)
239 {
240 struct scsipi_adapter *adapt = &sc->sc_adapter;
241 struct scsipi_channel *chan = &sc->sc_channel;
242
243 AIC_TRACE(("aicattach "));
244 sc->sc_state = AIC_INIT;
245
246 sc->sc_initiator = 7;
247 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */
248
249 /*
250 * These are the bounds of the sync period, based on the frequency of
251 * the chip's clock input and the size and offset of the sync period
252 * register.
253 *
254 * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a
255 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
256 * minimum transfer rate.
257 */
258 sc->sc_minsync = (2 * 250) / sc->sc_freq;
259 sc->sc_maxsync = (9 * 250) / sc->sc_freq;
260
261 /*
262 * Fill in the scsipi_adapter.
263 */
264 adapt->adapt_dev = &sc->sc_dev;
265 adapt->adapt_nchannels = 1;
266 adapt->adapt_openings = 8;
267 adapt->adapt_max_periph = 1;
268 adapt->adapt_request = aic_scsipi_request;
269 adapt->adapt_minphys = aic_minphys;
270
271 /*
272 * Fill in the scsipi_channel.
273 */
274 chan->chan_adapter = adapt;
275 chan->chan_bustype = &scsi_bustype;
276 chan->chan_channel = 0;
277 chan->chan_ntargets = 8;
278 chan->chan_nluns = 8;
279 chan->chan_id = sc->sc_initiator;
280
281 /*
282 * Add reference to adapter so that we drop the reference after
283 * config_found() to make sure the adatper is disabled.
284 */
285 if (scsipi_adapter_addref(adapt) != 0) {
286 printf("%s: unable to enable controller\n",
287 sc->sc_dev.dv_xname);
288 return;
289 }
290
291 aic_init(sc, 1); /* Init chip and driver */
292
293 /*
294 * Ask the adapter what subunits are present
295 */
296 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint);
297 scsipi_adapter_delref(adapt);
298 }
299
300 int
301 aic_activate(struct device *self, enum devact act)
302 {
303 struct aic_softc *sc = (struct aic_softc *) self;
304 int s, rv = 0;
305
306 s = splhigh();
307 switch (act) {
308 case DVACT_ACTIVATE:
309 rv = EOPNOTSUPP;
310 break;
311
312 case DVACT_DEACTIVATE:
313 if (sc->sc_child != NULL)
314 rv = config_deactivate(sc->sc_child);
315 break;
316 }
317 splx(s);
318
319 return (rv);
320 }
321
322 int
323 aic_detach(struct device *self, int flags)
324 {
325 struct aic_softc *sc = (struct aic_softc *) self;
326 int rv = 0;
327
328 if (sc->sc_child != NULL)
329 rv = config_detach(sc->sc_child, flags);
330
331 return (rv);
332 }
333
334 /* Initialize AIC6360 chip itself
335 * The following conditions should hold:
336 * aic_isa_probe should have succeeded, i.e. the iobase address in aic_softc
337 * must be valid.
338 */
339 static void
340 aic_reset(struct aic_softc *sc)
341 {
342 bus_space_tag_t iot = sc->sc_iot;
343 bus_space_handle_t ioh = sc->sc_ioh;
344
345 /*
346 * Doc. recommends to clear these two registers before
347 * operations commence
348 */
349 bus_space_write_1(iot, ioh, SCSITEST, 0);
350 bus_space_write_1(iot, ioh, TEST, 0);
351
352 /* Reset SCSI-FIFO and abort any transfers */
353 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRCH | CLRSTCNT);
354
355 /* Reset DMA-FIFO */
356 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO);
357 bus_space_write_1(iot, ioh, DMACNTRL1, 0);
358
359 /* Disable all selection features */
360 bus_space_write_1(iot, ioh, SCSISEQ, 0);
361 bus_space_write_1(iot, ioh, SXFRCTL1, 0);
362
363 /* Disable some interrupts */
364 bus_space_write_1(iot, ioh, SIMODE0, 0x00);
365 /* Clear a slew of interrupts */
366 bus_space_write_1(iot, ioh, CLRSINT0, 0x7f);
367
368 /* Disable some more interrupts */
369 bus_space_write_1(iot, ioh, SIMODE1, 0x00);
370 /* Clear another slew of interrupts */
371 bus_space_write_1(iot, ioh, CLRSINT1, 0xef);
372
373 /* Disable synchronous transfers */
374 bus_space_write_1(iot, ioh, SCSIRATE, 0);
375
376 /* Haven't seen ant errors (yet) */
377 bus_space_write_1(iot, ioh, CLRSERR, 0x07);
378
379 /* Set our SCSI-ID */
380 bus_space_write_1(iot, ioh, SCSIID, sc->sc_initiator << OID_S);
381 bus_space_write_1(iot, ioh, BRSTCNTRL, EISA_BRST_TIM);
382 }
383
384 /* Pull the SCSI RST line for 500 us */
385 static void
386 aic_scsi_reset(struct aic_softc *sc)
387 {
388 bus_space_tag_t iot = sc->sc_iot;
389 bus_space_handle_t ioh = sc->sc_ioh;
390
391 bus_space_write_1(iot, ioh, SCSISEQ, SCSIRSTO);
392 delay(500);
393 bus_space_write_1(iot, ioh, SCSISEQ, 0);
394 delay(50);
395 }
396
397 /*
398 * Initialize aic SCSI driver.
399 */
400 void
401 aic_init(struct aic_softc *sc, int bus_reset)
402 {
403 struct aic_acb *acb;
404 int r;
405
406 if (bus_reset) {
407 aic_reset(sc);
408 aic_scsi_reset(sc);
409 }
410 aic_reset(sc);
411
412 if (sc->sc_state == AIC_INIT) {
413 /* First time through; initialize. */
414 TAILQ_INIT(&sc->ready_list);
415 TAILQ_INIT(&sc->nexus_list);
416 TAILQ_INIT(&sc->free_list);
417 sc->sc_nexus = NULL;
418 acb = sc->sc_acb;
419 memset(acb, 0, sizeof(sc->sc_acb));
420 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
421 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
422 acb++;
423 }
424 memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
425 } else {
426 /* Cancel any active commands. */
427 sc->sc_state = AIC_CLEANING;
428 if ((acb = sc->sc_nexus) != NULL) {
429 acb->xs->error = XS_DRIVER_STUFFUP;
430 callout_stop(&acb->xs->xs_callout);
431 aic_done(sc, acb);
432 }
433 while ((acb = sc->nexus_list.tqh_first) != NULL) {
434 acb->xs->error = XS_DRIVER_STUFFUP;
435 callout_stop(&acb->xs->xs_callout);
436 aic_done(sc, acb);
437 }
438 }
439
440 sc->sc_prevphase = PH_INVALID;
441 for (r = 0; r < 8; r++) {
442 struct aic_tinfo *ti = &sc->sc_tinfo[r];
443
444 ti->flags = 0;
445 ti->period = ti->offset = 0;
446 ti->width = 0;
447 }
448
449 sc->sc_state = AIC_IDLE;
450 bus_space_write_1(sc->sc_iot, sc->sc_ioh, DMACNTRL0, INTEN);
451 }
452
453 static void
454 aic_free_acb(struct aic_softc *sc, struct aic_acb *acb)
455 {
456 int s;
457
458 s = splbio();
459 acb->flags = 0;
460 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
461 splx(s);
462 }
463
464 static struct aic_acb *
465 aic_get_acb(struct aic_softc *sc)
466 {
467 struct aic_acb *acb;
468 int s;
469
470 s = splbio();
471 acb = TAILQ_FIRST(&sc->free_list);
472 if (acb != NULL) {
473 TAILQ_REMOVE(&sc->free_list, acb, chain);
474 acb->flags |= ACB_ALLOC;
475 }
476 splx(s);
477 return (acb);
478 }
479
480 /*
481 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
482 */
483
484 /*
485 * Expected sequence:
486 * 1) Command inserted into ready list
487 * 2) Command selected for execution
488 * 3) Command won arbitration and has selected target device
489 * 4) Send message out (identify message, eventually also sync.negotiations)
490 * 5) Send command
491 * 5a) Receive disconnect message, disconnect.
492 * 5b) Reselected by target
493 * 5c) Receive identify message from target.
494 * 6) Send or receive data
495 * 7) Receive status
496 * 8) Receive message (command complete etc.)
497 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd.
498 * Repeat 2-8 (no disconnects please...)
499 */
500
501 /*
502 * Perform a request from the SCSIPI midlayer.
503 */
504 static void
505 aic_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
506 void *arg)
507 {
508 struct scsipi_xfer *xs;
509 struct scsipi_periph *periph;
510 struct aic_softc *sc = (void *)chan->chan_adapter->adapt_dev;
511 struct aic_acb *acb;
512 int s, flags;
513
514 AIC_TRACE(("aic_request "));
515
516 switch (req) {
517 case ADAPTER_REQ_RUN_XFER:
518 xs = arg;
519 periph = xs->xs_periph;
520
521 AIC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
522 periph->periph_target));
523
524 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) {
525 xs->error = XS_DRIVER_STUFFUP;
526 scsipi_done(xs);
527 return;
528 }
529
530 flags = xs->xs_control;
531 acb = aic_get_acb(sc);
532 #ifdef DIAGNOSTIC
533 /*
534 * This should never happen as we track the resources
535 * in the mid-layer.
536 */
537 if (acb == NULL) {
538 scsipi_printaddr(periph);
539 printf("unable to allocate acb\n");
540 panic("aic_scsipi_request");
541 }
542 #endif
543
544 /* Initialize acb */
545 acb->xs = xs;
546 acb->timeout = xs->timeout;
547
548 if (xs->xs_control & XS_CTL_RESET) {
549 acb->flags |= ACB_RESET;
550 acb->scsipi_cmd_length = 0;
551 acb->data_length = 0;
552 } else {
553 memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen);
554 acb->scsipi_cmd_length = xs->cmdlen;
555 acb->data_addr = xs->data;
556 acb->data_length = xs->datalen;
557 }
558 acb->target_stat = 0;
559
560 s = splbio();
561
562 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
563 if (sc->sc_state == AIC_IDLE)
564 aic_sched(sc);
565
566 splx(s);
567
568 if ((flags & XS_CTL_POLL) == 0)
569 return;
570
571 /* Not allowed to use interrupts, use polling instead */
572 if (aic_poll(sc, xs, acb->timeout)) {
573 aic_timeout(acb);
574 if (aic_poll(sc, xs, acb->timeout))
575 aic_timeout(acb);
576 }
577 return;
578
579 case ADAPTER_REQ_GROW_RESOURCES:
580 /* XXX Not supported. */
581 return;
582
583 case ADAPTER_REQ_SET_XFER_MODE:
584 {
585 struct aic_tinfo *ti;
586 struct scsipi_xfer_mode *xm = arg;
587
588 ti = &sc->sc_tinfo[xm->xm_target];
589 ti->flags &= ~(DO_SYNC|DO_WIDE);
590 ti->period = 0;
591 ti->offset = 0;
592
593 #if AIC_USE_SYNCHRONOUS
594 if (xm->xm_mode & PERIPH_CAP_SYNC) {
595 ti->flags |= DO_SYNC;
596 ti->period = sc->sc_minsync;
597 ti->offset = AIC_SYNC_REQ_ACK_OFS;
598 }
599 #endif
600 #if AIC_USE_WIDE
601 if (xm->xm_mode & PERIPH_CAP_WIDE16) {
602 ti->flags |= DO_WIDE;
603 ti->width = AIC_MAX_WIDTH;
604 }
605 #endif
606 /*
607 * If we're not going to negotiate, send the notification
608 * now, since it won't happen later.
609 */
610 if ((ti->flags & (DO_SYNC|DO_WIDE)) == 0)
611 aic_update_xfer_mode(sc, xm->xm_target);
612 return;
613 }
614 }
615 }
616
617 static void
618 aic_update_xfer_mode(struct aic_softc *sc, int target)
619 {
620 struct scsipi_xfer_mode xm;
621 struct aic_tinfo *ti = &sc->sc_tinfo[target];
622
623 xm.xm_target = target;
624 xm.xm_mode = 0;
625 xm.xm_period = 0;
626 xm.xm_offset = 0;
627
628 if (ti->offset != 0) {
629 xm.xm_mode |= PERIPH_CAP_SYNC;
630 xm.xm_period = ti->period;
631 xm.xm_offset = ti->offset;
632 }
633 switch (ti->width) {
634 case 2:
635 xm.xm_mode |= PERIPH_CAP_WIDE32;
636 break;
637 case 1:
638 xm.xm_mode |= PERIPH_CAP_WIDE16;
639 break;
640 }
641
642 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm);
643 }
644
645 /*
646 * Adjust transfer size in buffer structure
647 */
648 static void
649 aic_minphys(struct buf *bp)
650 {
651
652 AIC_TRACE(("aic_minphys "));
653 if (bp->b_bcount > (AIC_NSEG << PGSHIFT))
654 bp->b_bcount = (AIC_NSEG << PGSHIFT);
655 minphys(bp);
656 }
657
658 /*
659 * Used when interrupt driven I/O isn't allowed, e.g. during boot.
660 */
661 static int
662 aic_poll(struct aic_softc *sc, struct scsipi_xfer *xs, int count)
663 {
664 bus_space_tag_t iot = sc->sc_iot;
665 bus_space_handle_t ioh = sc->sc_ioh;
666
667 AIC_TRACE(("aic_poll "));
668 while (count) {
669 /*
670 * If we had interrupts enabled, would we
671 * have got an interrupt?
672 */
673 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) != 0)
674 aicintr(sc);
675 if ((xs->xs_status & XS_STS_DONE) != 0)
676 return 0;
677 delay(1000);
678 count--;
679 }
680 return 1;
681 }
682
683 /*
684 * LOW LEVEL SCSI UTILITIES
685 */
686
687 static __inline void
688 aic_sched_msgout(struct aic_softc *sc, u_char m)
689 {
690 bus_space_tag_t iot = sc->sc_iot;
691 bus_space_handle_t ioh = sc->sc_ioh;
692
693 if (sc->sc_msgpriq == 0)
694 bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase | ATNO);
695 sc->sc_msgpriq |= m;
696 }
697
698 /*
699 * Set synchronous transfer offset and period.
700 */
701 #if !AIC_USE_SYNCHRONOUS
702 /* ARGSUSED */
703 #endif
704 static __inline void
705 aic_setsync(struct aic_softc *sc, struct aic_tinfo *ti)
706 {
707 #if AIC_USE_SYNCHRONOUS
708 bus_space_tag_t iot = sc->sc_iot;
709 bus_space_handle_t ioh = sc->sc_ioh;
710
711 if (ti->offset != 0)
712 bus_space_write_1(iot, ioh, SCSIRATE,
713 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
714 else
715 bus_space_write_1(iot, ioh, SCSIRATE, 0);
716 #endif
717 }
718
719 /*
720 * Start a selection. This is used by aic_sched() to select an idle target,
721 * and by aic_done() to immediately reselect a target to get sense information.
722 */
723 static void
724 aic_select(struct aic_softc *sc, struct aic_acb *acb)
725 {
726 struct scsipi_periph *periph = acb->xs->xs_periph;
727 int target = periph->periph_target;
728 struct aic_tinfo *ti = &sc->sc_tinfo[target];
729 bus_space_tag_t iot = sc->sc_iot;
730 bus_space_handle_t ioh = sc->sc_ioh;
731
732 bus_space_write_1(iot, ioh, SCSIID,
733 sc->sc_initiator << OID_S | target);
734 aic_setsync(sc, ti);
735 bus_space_write_1(iot, ioh, SXFRCTL1, STIMO_256ms | ENSTIMER);
736
737 /* Always enable reselections. */
738 bus_space_write_1(iot, ioh, SIMODE0, ENSELDI | ENSELDO);
739 bus_space_write_1(iot, ioh, SIMODE1, ENSCSIRST | ENSELTIMO);
740 bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI | ENSELO | ENAUTOATNO);
741
742 sc->sc_state = AIC_SELECTING;
743 }
744
745 static int
746 aic_reselect(struct aic_softc *sc, int message)
747 {
748 u_char selid, target, lun;
749 struct aic_acb *acb;
750 struct scsipi_periph *periph;
751 struct aic_tinfo *ti;
752
753 /*
754 * The SCSI chip made a snapshot of the data bus while the reselection
755 * was being negotiated. This enables us to determine which target did
756 * the reselect.
757 */
758 selid = sc->sc_selid & ~(1 << sc->sc_initiator);
759 if (selid & (selid - 1)) {
760 printf("%s: reselect with invalid selid %02x; "
761 "sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid);
762 AIC_BREAK();
763 goto reset;
764 }
765
766 /* Search wait queue for disconnected cmd
767 * The list should be short, so I haven't bothered with
768 * any more sophisticated structures than a simple
769 * singly linked list.
770 */
771 target = ffs(selid) - 1;
772 lun = message & 0x07;
773 for (acb = sc->nexus_list.tqh_first; acb != NULL;
774 acb = acb->chain.tqe_next) {
775 periph = acb->xs->xs_periph;
776 if (periph->periph_target == target &&
777 periph->periph_lun == lun)
778 break;
779 }
780 if (acb == NULL) {
781 printf("%s: reselect from target %d lun %d with no nexus; "
782 "sending ABORT\n", sc->sc_dev.dv_xname, target, lun);
783 AIC_BREAK();
784 goto abort;
785 }
786
787 /* Make this nexus active again. */
788 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
789 sc->sc_state = AIC_CONNECTED;
790 sc->sc_nexus = acb;
791 ti = &sc->sc_tinfo[target];
792 ti->lubusy |= (1 << lun);
793 aic_setsync(sc, ti);
794
795 if (acb->flags & ACB_RESET)
796 aic_sched_msgout(sc, SEND_DEV_RESET);
797 else if (acb->flags & ACB_ABORT)
798 aic_sched_msgout(sc, SEND_ABORT);
799
800 /* Do an implicit RESTORE POINTERS. */
801 sc->sc_dp = acb->data_addr;
802 sc->sc_dleft = acb->data_length;
803 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
804 sc->sc_cleft = acb->scsipi_cmd_length;
805
806 return (0);
807
808 reset:
809 aic_sched_msgout(sc, SEND_DEV_RESET);
810 return (1);
811
812 abort:
813 aic_sched_msgout(sc, SEND_ABORT);
814 return (1);
815 }
816
817 /*
818 * Schedule a SCSI operation. This has now been pulled out of the interrupt
819 * handler so that we may call it from aic_scsipi_request and aic_done. This
820 * may save us an unnecessary interrupt just to get things going. Should only
821 * be called when state == AIC_IDLE and at bio pl.
822 */
823 static void
824 aic_sched(struct aic_softc *sc)
825 {
826 struct aic_acb *acb;
827 struct scsipi_periph *periph;
828 struct aic_tinfo *ti;
829 bus_space_tag_t iot = sc->sc_iot;
830 bus_space_handle_t ioh = sc->sc_ioh;
831
832 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
833 return;
834
835 /*
836 * Find first acb in ready queue that is for a target/lunit pair that
837 * is not busy.
838 */
839 bus_space_write_1(iot, ioh, CLRSINT1,
840 CLRSELTIMO | CLRBUSFREE | CLRSCSIPERR);
841 for (acb = sc->ready_list.tqh_first; acb != NULL;
842 acb = acb->chain.tqe_next) {
843 periph = acb->xs->xs_periph;
844 ti = &sc->sc_tinfo[periph->periph_target];
845 if ((ti->lubusy & (1 << periph->periph_lun)) == 0) {
846 AIC_MISC(("selecting %d:%d ",
847 periph->periph_target, periph->periph_lun));
848 TAILQ_REMOVE(&sc->ready_list, acb, chain);
849 sc->sc_nexus = acb;
850 aic_select(sc, acb);
851 return;
852 } else
853 AIC_MISC(("%d:%d busy\n",
854 periph->periph_target, periph->periph_lun));
855 }
856 AIC_MISC(("idle "));
857 /* Nothing to start; just enable reselections and wait. */
858 bus_space_write_1(iot, ioh, SIMODE0, ENSELDI);
859 bus_space_write_1(iot, ioh, SIMODE1, ENSCSIRST);
860 bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI);
861 }
862
863 static void
864 aic_sense(struct aic_softc *sc, struct aic_acb *acb)
865 {
866 struct scsipi_xfer *xs = acb->xs;
867 struct scsipi_periph *periph = xs->xs_periph;
868 struct aic_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
869 struct scsi_request_sense *ss = (void *)&acb->scsipi_cmd;
870
871 AIC_MISC(("requesting sense "));
872 /* Next, setup a request sense command block */
873 memset(ss, 0, sizeof(*ss));
874 ss->opcode = SCSI_REQUEST_SENSE;
875 ss->byte2 = periph->periph_lun << 5;
876 ss->length = sizeof(struct scsi_sense_data);
877 acb->scsipi_cmd_length = sizeof(*ss);
878 acb->data_addr = (char *)&xs->sense.scsi_sense;
879 acb->data_length = sizeof(struct scsi_sense_data);
880 acb->flags |= ACB_SENSE;
881 ti->senses++;
882 if (acb->flags & ACB_NEXUS)
883 ti->lubusy &= ~(1 << periph->periph_lun);
884 if (acb == sc->sc_nexus) {
885 aic_select(sc, acb);
886 } else {
887 aic_dequeue(sc, acb);
888 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
889 if (sc->sc_state == AIC_IDLE)
890 aic_sched(sc);
891 }
892 }
893
894 /*
895 * POST PROCESSING OF SCSI_CMD (usually current)
896 */
897 static void
898 aic_done(struct aic_softc *sc, struct aic_acb *acb)
899 {
900 struct scsipi_xfer *xs = acb->xs;
901 struct scsipi_periph *periph = xs->xs_periph;
902 struct aic_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
903
904 AIC_TRACE(("aic_done "));
905
906 /*
907 * Now, if we've come here with no error code, i.e. we've kept the
908 * initial XS_NOERROR, and the status code signals that we should
909 * check sense, we'll need to set up a request sense cmd block and
910 * push the command back into the ready queue *before* any other
911 * commands for this target/lunit, else we lose the sense info.
912 * We don't support chk sense conditions for the request sense cmd.
913 */
914 if (xs->error == XS_NOERROR) {
915 if (acb->flags & ACB_ABORT) {
916 xs->error = XS_DRIVER_STUFFUP;
917 } else if (acb->flags & ACB_SENSE) {
918 xs->error = XS_SENSE;
919 } else if (acb->target_stat == SCSI_CHECK) {
920 /* First, save the return values */
921 xs->resid = acb->data_length;
922 xs->status = acb->target_stat;
923 aic_sense(sc, acb);
924 return;
925 } else {
926 xs->resid = acb->data_length;
927 }
928 }
929
930 #if AIC_DEBUG
931 if ((aic_debug & AIC_SHOWMISC) != 0) {
932 if (xs->resid != 0)
933 printf("resid=%d ", xs->resid);
934 if (xs->error == XS_SENSE)
935 printf("sense=0x%02x\n", xs->sense.scsi_sense.response_code);
936 else
937 printf("error=%d\n", xs->error);
938 }
939 #endif
940
941 /*
942 * Remove the ACB from whatever queue it happens to be on.
943 */
944 if (acb->flags & ACB_NEXUS)
945 ti->lubusy &= ~(1 << periph->periph_lun);
946 if (acb == sc->sc_nexus) {
947 sc->sc_nexus = NULL;
948 sc->sc_state = AIC_IDLE;
949 aic_sched(sc);
950 } else
951 aic_dequeue(sc, acb);
952
953 aic_free_acb(sc, acb);
954 ti->cmds++;
955 scsipi_done(xs);
956 }
957
958 static void
959 aic_dequeue(struct aic_softc *sc, struct aic_acb *acb)
960 {
961
962 if (acb->flags & ACB_NEXUS) {
963 TAILQ_REMOVE(&sc->nexus_list, acb, chain);
964 } else {
965 TAILQ_REMOVE(&sc->ready_list, acb, chain);
966 }
967 }
968
969 /*
970 * INTERRUPT/PROTOCOL ENGINE
971 */
972
973 /*
974 * Precondition:
975 * The SCSI bus is already in the MSGI phase and there is a message byte
976 * on the bus, along with an asserted REQ signal.
977 */
978 static void
979 aic_msgin(struct aic_softc *sc)
980 {
981 bus_space_tag_t iot = sc->sc_iot;
982 bus_space_handle_t ioh = sc->sc_ioh;
983 u_char sstat1;
984 int n;
985
986 AIC_TRACE(("aic_msgin "));
987
988 if (sc->sc_prevphase == PH_MSGIN) {
989 /* This is a continuation of the previous message. */
990 n = sc->sc_imp - sc->sc_imess;
991 goto nextbyte;
992 }
993
994 /* This is a new MESSAGE IN phase. Clean up our state. */
995 sc->sc_flags &= ~AIC_DROP_MSGIN;
996
997 nextmsg:
998 n = 0;
999 sc->sc_imp = &sc->sc_imess[n];
1000
1001 nextbyte:
1002 /*
1003 * Read a whole message, but don't ack the last byte. If we reject the
1004 * message, we have to assert ATN during the message transfer phase
1005 * itself.
1006 */
1007 for (;;) {
1008 for (;;) {
1009 sstat1 = bus_space_read_1(iot, ioh, SSTAT1);
1010 if ((sstat1 & (REQINIT | PHASECHG | BUSFREE)) != 0)
1011 break;
1012 /* Wait for REQINIT. XXX Need timeout. */
1013 }
1014 if ((sstat1 & (PHASECHG | BUSFREE)) != 0) {
1015 /*
1016 * Target left MESSAGE IN, probably because it
1017 * a) noticed our ATN signal, or
1018 * b) ran out of messages.
1019 */
1020 goto out;
1021 }
1022
1023 /* If parity error, just dump everything on the floor. */
1024 if ((sstat1 & SCSIPERR) != 0) {
1025 sc->sc_flags |= AIC_DROP_MSGIN;
1026 aic_sched_msgout(sc, SEND_PARITY_ERROR);
1027 }
1028
1029 /* Gather incoming message bytes if needed. */
1030 if ((sc->sc_flags & AIC_DROP_MSGIN) == 0) {
1031 if (n >= AIC_MAX_MSG_LEN) {
1032 (void) bus_space_read_1(iot, ioh, SCSIDAT);
1033 sc->sc_flags |= AIC_DROP_MSGIN;
1034 aic_sched_msgout(sc, SEND_REJECT);
1035 } else {
1036 *sc->sc_imp++ = bus_space_read_1(iot, ioh,
1037 SCSIDAT);
1038 n++;
1039 /*
1040 * This testing is suboptimal, but most
1041 * messages will be of the one byte variety, so
1042 * it should not affect performance
1043 * significantly.
1044 */
1045 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0]))
1046 break;
1047 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0]))
1048 break;
1049 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) &&
1050 n == sc->sc_imess[1] + 2)
1051 break;
1052 }
1053 } else
1054 (void) bus_space_read_1(iot, ioh, SCSIDAT);
1055
1056 /*
1057 * If we reach this spot we're either:
1058 * a) in the middle of a multi-byte message, or
1059 * b) dropping bytes.
1060 */
1061 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN);
1062 /* Ack the last byte read. */
1063 (void) bus_space_read_1(iot, ioh, SCSIDAT);
1064 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
1065 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0)
1066 ;
1067 }
1068
1069 AIC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
1070
1071 /* We now have a complete message. Parse it. */
1072 switch (sc->sc_state) {
1073 struct aic_acb *acb;
1074 struct scsipi_periph *periph;
1075 struct aic_tinfo *ti;
1076
1077 case AIC_CONNECTED:
1078 AIC_ASSERT(sc->sc_nexus != NULL);
1079 acb = sc->sc_nexus;
1080 ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target];
1081
1082 switch (sc->sc_imess[0]) {
1083 case MSG_CMDCOMPLETE:
1084 if (sc->sc_dleft < 0) {
1085 periph = acb->xs->xs_periph;
1086 printf("%s: %ld extra bytes from %d:%d\n",
1087 sc->sc_dev.dv_xname, (long)-sc->sc_dleft,
1088 periph->periph_target, periph->periph_lun);
1089 sc->sc_dleft = 0;
1090 }
1091 acb->xs->resid = acb->data_length = sc->sc_dleft;
1092 sc->sc_state = AIC_CMDCOMPLETE;
1093 break;
1094
1095 case MSG_PARITY_ERROR:
1096 /* Resend the last message. */
1097 aic_sched_msgout(sc, sc->sc_lastmsg);
1098 break;
1099
1100 case MSG_MESSAGE_REJECT:
1101 AIC_MISC(("message rejected %02x ", sc->sc_lastmsg));
1102 switch (sc->sc_lastmsg) {
1103 #if AIC_USE_SYNCHRONOUS + AIC_USE_WIDE
1104 case SEND_IDENTIFY:
1105 ti->flags &= ~(DO_SYNC | DO_WIDE);
1106 ti->period = ti->offset = 0;
1107 aic_setsync(sc, ti);
1108 ti->width = 0;
1109 break;
1110 #endif
1111 #if AIC_USE_SYNCHRONOUS
1112 case SEND_SDTR:
1113 ti->flags &= ~DO_SYNC;
1114 ti->period = ti->offset = 0;
1115 aic_setsync(sc, ti);
1116 aic_update_xfer_mode(sc,
1117 acb->xs->xs_periph->periph_target);
1118 break;
1119 #endif
1120 #if AIC_USE_WIDE
1121 case SEND_WDTR:
1122 ti->flags &= ~DO_WIDE;
1123 ti->width = 0;
1124 aic_update_xfer_mode(sc,
1125 acb->xs->xs_periph->periph_target);
1126 break;
1127 #endif
1128 case SEND_INIT_DET_ERR:
1129 aic_sched_msgout(sc, SEND_ABORT);
1130 break;
1131 }
1132 break;
1133
1134 case MSG_NOOP:
1135 break;
1136
1137 case MSG_DISCONNECT:
1138 ti->dconns++;
1139 sc->sc_state = AIC_DISCONNECT;
1140 break;
1141
1142 case MSG_SAVEDATAPOINTER:
1143 acb->data_addr = sc->sc_dp;
1144 acb->data_length = sc->sc_dleft;
1145 break;
1146
1147 case MSG_RESTOREPOINTERS:
1148 sc->sc_dp = acb->data_addr;
1149 sc->sc_dleft = acb->data_length;
1150 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1151 sc->sc_cleft = acb->scsipi_cmd_length;
1152 break;
1153
1154 case MSG_EXTENDED:
1155 switch (sc->sc_imess[2]) {
1156 #if AIC_USE_SYNCHRONOUS
1157 case MSG_EXT_SDTR:
1158 if (sc->sc_imess[1] != 3)
1159 goto reject;
1160 ti->period = sc->sc_imess[3];
1161 ti->offset = sc->sc_imess[4];
1162 ti->flags &= ~DO_SYNC;
1163 if (ti->offset == 0) {
1164 } else if (ti->period < sc->sc_minsync ||
1165 ti->period > sc->sc_maxsync ||
1166 ti->offset > 8) {
1167 ti->period = ti->offset = 0;
1168 aic_sched_msgout(sc, SEND_SDTR);
1169 } else {
1170 aic_update_xfer_mode(sc,
1171 acb->xs->xs_periph->periph_target);
1172 }
1173 aic_setsync(sc, ti);
1174 break;
1175 #endif
1176
1177 #if AIC_USE_WIDE
1178 case MSG_EXT_WDTR:
1179 if (sc->sc_imess[1] != 2)
1180 goto reject;
1181 ti->width = sc->sc_imess[3];
1182 ti->flags &= ~DO_WIDE;
1183 if (ti->width == 0) {
1184 } else if (ti->width > AIC_MAX_WIDTH) {
1185 ti->width = 0;
1186 aic_sched_msgout(sc, SEND_WDTR);
1187 } else {
1188 aic_update_xfer_mode(sc,
1189 acb->xs->xs_periph->periph_target);
1190 }
1191 break;
1192 #endif
1193
1194 default:
1195 printf("%s: unrecognized MESSAGE EXTENDED; "
1196 "sending REJECT\n", sc->sc_dev.dv_xname);
1197 AIC_BREAK();
1198 goto reject;
1199 }
1200 break;
1201
1202 default:
1203 printf("%s: unrecognized MESSAGE; sending REJECT\n",
1204 sc->sc_dev.dv_xname);
1205 AIC_BREAK();
1206 reject:
1207 aic_sched_msgout(sc, SEND_REJECT);
1208 break;
1209 }
1210 break;
1211
1212 case AIC_RESELECTED:
1213 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
1214 printf("%s: reselect without IDENTIFY; "
1215 "sending DEVICE RESET\n", sc->sc_dev.dv_xname);
1216 AIC_BREAK();
1217 goto reset;
1218 }
1219
1220 (void) aic_reselect(sc, sc->sc_imess[0]);
1221 break;
1222
1223 default:
1224 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1225 sc->sc_dev.dv_xname);
1226 AIC_BREAK();
1227 reset:
1228 aic_sched_msgout(sc, SEND_DEV_RESET);
1229 break;
1230
1231 #ifdef notdef
1232 abort:
1233 aic_sched_msgout(sc, SEND_ABORT);
1234 break;
1235 #endif
1236 }
1237
1238 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN);
1239 /* Ack the last message byte. */
1240 (void) bus_space_read_1(iot, ioh, SCSIDAT);
1241 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
1242 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0)
1243 ;
1244
1245 /* Go get the next message, if any. */
1246 goto nextmsg;
1247
1248 out:
1249 AIC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0]));
1250 }
1251
1252 /*
1253 * Send the highest priority, scheduled message.
1254 */
1255 static void
1256 aic_msgout(struct aic_softc *sc)
1257 {
1258 bus_space_tag_t iot = sc->sc_iot;
1259 bus_space_handle_t ioh = sc->sc_ioh;
1260 #if AIC_USE_SYNCHRONOUS
1261 struct aic_tinfo *ti;
1262 #endif
1263 u_char sstat1;
1264 int n;
1265
1266 AIC_TRACE(("aic_msgout "));
1267
1268 /* Reset the FIFO. */
1269 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO);
1270 /* Enable REQ/ACK protocol. */
1271 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN);
1272
1273 if (sc->sc_prevphase == PH_MSGOUT) {
1274 if (sc->sc_omp == sc->sc_omess) {
1275 /*
1276 * This is a retransmission.
1277 *
1278 * We get here if the target stayed in MESSAGE OUT
1279 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates
1280 * that all of the previously transmitted messages must
1281 * be sent again, in the same order. Therefore, we
1282 * requeue all the previously transmitted messages, and
1283 * start again from the top. Our simple priority
1284 * scheme keeps the messages in the right order.
1285 */
1286 AIC_MISC(("retransmitting "));
1287 sc->sc_msgpriq |= sc->sc_msgoutq;
1288 /*
1289 * Set ATN. If we're just sending a trivial 1-byte
1290 * message, we'll clear ATN later on anyway.
1291 */
1292 bus_space_write_1(iot, ioh, SCSISIG, PH_MSGOUT | ATNO);
1293 } else {
1294 /* This is a continuation of the previous message. */
1295 n = sc->sc_omp - sc->sc_omess;
1296 goto nextbyte;
1297 }
1298 }
1299
1300 /* No messages transmitted so far. */
1301 sc->sc_msgoutq = 0;
1302 sc->sc_lastmsg = 0;
1303
1304 nextmsg:
1305 /* Pick up highest priority message. */
1306 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
1307 sc->sc_msgpriq &= ~sc->sc_currmsg;
1308 sc->sc_msgoutq |= sc->sc_currmsg;
1309
1310 /* Build the outgoing message data. */
1311 switch (sc->sc_currmsg) {
1312 case SEND_IDENTIFY:
1313 AIC_ASSERT(sc->sc_nexus != NULL);
1314 sc->sc_omess[0] =
1315 MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1);
1316 n = 1;
1317 break;
1318
1319 #if AIC_USE_SYNCHRONOUS
1320 case SEND_SDTR:
1321 AIC_ASSERT(sc->sc_nexus != NULL);
1322 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
1323 sc->sc_omess[4] = MSG_EXTENDED;
1324 sc->sc_omess[3] = 3;
1325 sc->sc_omess[2] = MSG_EXT_SDTR;
1326 sc->sc_omess[1] = ti->period >> 2;
1327 sc->sc_omess[0] = ti->offset;
1328 n = 5;
1329 break;
1330 #endif
1331
1332 #if AIC_USE_WIDE
1333 case SEND_WDTR:
1334 AIC_ASSERT(sc->sc_nexus != NULL);
1335 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
1336 sc->sc_omess[3] = MSG_EXTENDED;
1337 sc->sc_omess[2] = 2;
1338 sc->sc_omess[1] = MSG_EXT_WDTR;
1339 sc->sc_omess[0] = ti->width;
1340 n = 4;
1341 break;
1342 #endif
1343
1344 case SEND_DEV_RESET:
1345 sc->sc_flags |= AIC_ABORTING;
1346 sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1347 n = 1;
1348 break;
1349
1350 case SEND_REJECT:
1351 sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1352 n = 1;
1353 break;
1354
1355 case SEND_PARITY_ERROR:
1356 sc->sc_omess[0] = MSG_PARITY_ERROR;
1357 n = 1;
1358 break;
1359
1360 case SEND_INIT_DET_ERR:
1361 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1362 n = 1;
1363 break;
1364
1365 case SEND_ABORT:
1366 sc->sc_flags |= AIC_ABORTING;
1367 sc->sc_omess[0] = MSG_ABORT;
1368 n = 1;
1369 break;
1370
1371 default:
1372 printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
1373 sc->sc_dev.dv_xname);
1374 AIC_BREAK();
1375 sc->sc_omess[0] = MSG_NOOP;
1376 n = 1;
1377 break;
1378 }
1379 sc->sc_omp = &sc->sc_omess[n];
1380
1381 nextbyte:
1382 /* Send message bytes. */
1383 for (;;) {
1384 for (;;) {
1385 sstat1 = bus_space_read_1(iot, ioh, SSTAT1);
1386 if ((sstat1 & (REQINIT | PHASECHG | BUSFREE)) != 0)
1387 break;
1388 /* Wait for REQINIT. XXX Need timeout. */
1389 }
1390 if ((sstat1 & (PHASECHG | BUSFREE)) != 0) {
1391 /*
1392 * Target left MESSAGE OUT, possibly to reject
1393 * our message.
1394 *
1395 * If this is the last message being sent, then we
1396 * deassert ATN, since either the target is going to
1397 * ignore this message, or it's going to ask for a
1398 * retransmission via MESSAGE PARITY ERROR (in which
1399 * case we reassert ATN anyway).
1400 */
1401 if (sc->sc_msgpriq == 0)
1402 bus_space_write_1(iot, ioh, CLRSINT1, CLRATNO);
1403 goto out;
1404 }
1405
1406 /* Clear ATN before last byte if this is the last message. */
1407 if (n == 1 && sc->sc_msgpriq == 0)
1408 bus_space_write_1(iot, ioh, CLRSINT1, CLRATNO);
1409 /* Send message byte. */
1410 bus_space_write_1(iot, ioh, SCSIDAT, *--sc->sc_omp);
1411 --n;
1412 /* Keep track of the last message we've sent any bytes of. */
1413 sc->sc_lastmsg = sc->sc_currmsg;
1414 /* Wait for ACK to be negated. XXX Need timeout. */
1415 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0)
1416 ;
1417
1418 if (n == 0)
1419 break;
1420 }
1421
1422 /* We get here only if the entire message has been transmitted. */
1423 if (sc->sc_msgpriq != 0) {
1424 /* There are more outgoing messages. */
1425 goto nextmsg;
1426 }
1427
1428 /*
1429 * The last message has been transmitted. We need to remember the last
1430 * message transmitted (in case the target switches to MESSAGE IN phase
1431 * and sends a MESSAGE REJECT), and the list of messages transmitted
1432 * this time around (in case the target stays in MESSAGE OUT phase to
1433 * request a retransmit).
1434 */
1435
1436 out:
1437 /* Disable REQ/ACK protocol. */
1438 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
1439 }
1440
1441 /* aic_dataout_pio: perform a data transfer using the FIFO datapath in the
1442 * aic6360
1443 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
1444 * and ACK deasserted (i.e. waiting for a data byte)
1445 * This new revision has been optimized (I tried) to make the common case fast,
1446 * and the rarer cases (as a result) somewhat more comlex
1447 */
1448 static int
1449 aic_dataout_pio(struct aic_softc *sc, u_char *p, int n)
1450 {
1451 bus_space_tag_t iot = sc->sc_iot;
1452 bus_space_handle_t ioh = sc->sc_ioh;
1453 u_char dmastat = 0;
1454 int out = 0;
1455 #define DOUTAMOUNT 128 /* Full FIFO */
1456
1457 AIC_MISC(("%02x%02x ", bus_space_read_1(iot, ioh, FIFOSTAT),
1458 bus_space_read_1(iot, ioh, SSTAT2)));
1459
1460 /* Clear host FIFO and counter. */
1461 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO | WRITE);
1462 /* Enable FIFOs. */
1463 bus_space_write_1(iot, ioh, DMACNTRL0, ENDMA | DWORDPIO | WRITE);
1464 bus_space_write_1(iot, ioh, SXFRCTL0, SCSIEN | DMAEN | CHEN);
1465
1466 /* Turn off ENREQINIT for now. */
1467 bus_space_write_1(iot, ioh, SIMODE1,
1468 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENPHASECHG);
1469
1470 /* I have tried to make the main loop as tight as possible. This
1471 * means that some of the code following the loop is a bit more
1472 * complex than otherwise.
1473 */
1474 while (n > 0) {
1475 for (;;) {
1476 dmastat = bus_space_read_1(iot, ioh, DMASTAT);
1477 if ((dmastat & (DFIFOEMP | INTSTAT)) != 0)
1478 break;
1479 }
1480
1481 if ((dmastat & INTSTAT) != 0)
1482 goto phasechange;
1483
1484 if (n >= DOUTAMOUNT) {
1485 n -= DOUTAMOUNT;
1486 out += DOUTAMOUNT;
1487
1488 #if AIC_USE_DWORDS
1489 bus_space_write_multi_4(iot, ioh, DMADATALONG,
1490 (u_int32_t *) p, DOUTAMOUNT >> 2);
1491 #else
1492 bus_space_write_multi_2(iot, ioh, DMADATA,
1493 (u_int16_t *) p, DOUTAMOUNT >> 1);
1494 #endif
1495
1496 p += DOUTAMOUNT;
1497 } else {
1498 int xfer;
1499
1500 xfer = n;
1501 AIC_MISC(("%d> ", xfer));
1502
1503 n -= xfer;
1504 out += xfer;
1505
1506 #if AIC_USE_DWORDS
1507 if (xfer >= 12) {
1508 bus_space_write_multi_4(iot, ioh, DMADATALONG,
1509 (u_int32_t *) p, xfer >> 2);
1510 p += xfer & ~3;
1511 xfer &= 3;
1512 }
1513 #else
1514 if (xfer >= 8) {
1515 bus_space_write_multi_2(iot, ioh, DMADATA,
1516 (u_int16_t *) p, xfer >> 1);
1517 p += xfer & ~1;
1518 xfer &= 1;
1519 }
1520 #endif
1521
1522 if (xfer > 0) {
1523 bus_space_write_1(iot, ioh, DMACNTRL0,
1524 ENDMA | B8MODE | WRITE);
1525 bus_space_write_multi_1(iot, ioh, DMADATA,
1526 p, xfer);
1527 p += xfer;
1528 bus_space_write_1(iot, ioh, DMACNTRL0,
1529 ENDMA | DWORDPIO | WRITE);
1530 }
1531 }
1532 }
1533
1534 if (out == 0) {
1535 bus_space_write_1(iot, ioh, SXFRCTL1, BITBUCKET);
1536 for (;;) {
1537 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT)
1538 != 0)
1539 break;
1540 }
1541 bus_space_write_1(iot, ioh, SXFRCTL1, 0);
1542 AIC_MISC(("extra data "));
1543 } else {
1544 /* See the bytes off chip */
1545 for (;;) {
1546 dmastat = bus_space_read_1(iot, ioh, DMASTAT);
1547 if ((dmastat & INTSTAT) != 0)
1548 goto phasechange;
1549 if ((dmastat & DFIFOEMP) != 0 &&
1550 (bus_space_read_1(iot, ioh, SSTAT2) & SEMPTY) != 0)
1551 break;
1552 }
1553 }
1554
1555 phasechange:
1556 if ((dmastat & INTSTAT) != 0) {
1557 /* Some sort of phase change. */
1558 int amount;
1559
1560 /* Stop transfers, do some accounting */
1561 amount = bus_space_read_1(iot, ioh, FIFOSTAT)
1562 + (bus_space_read_1(iot, ioh, SSTAT2) & 15);
1563 if (amount > 0) {
1564 out -= amount;
1565 bus_space_write_1(iot, ioh, DMACNTRL0,
1566 RSTFIFO | WRITE);
1567 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRCH);
1568 AIC_MISC(("+%d ", amount));
1569 }
1570 }
1571
1572 /* Turn on ENREQINIT again. */
1573 bus_space_write_1(iot, ioh, SIMODE1,
1574 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | ENPHASECHG);
1575
1576 /* Stop the FIFO data path. */
1577 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
1578 bus_space_write_1(iot, ioh, DMACNTRL0, 0);
1579
1580 return out;
1581 }
1582
1583 /* aic_datain_pio: perform data transfers using the FIFO datapath in the
1584 * aic6360
1585 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
1586 * and ACK deasserted (i.e. at least one byte is ready).
1587 * For now, uses a pretty dumb algorithm, hangs around until all data has been
1588 * transferred. This, is OK for fast targets, but not so smart for slow
1589 * targets which don't disconnect or for huge transfers.
1590 */
1591 static int
1592 aic_datain_pio(struct aic_softc *sc, u_char *p, int n)
1593 {
1594 bus_space_tag_t iot = sc->sc_iot;
1595 bus_space_handle_t ioh = sc->sc_ioh;
1596 u_char dmastat;
1597 int in = 0;
1598 #define DINAMOUNT 128 /* Full FIFO */
1599
1600 AIC_MISC(("%02x%02x ", bus_space_read_1(iot, ioh, FIFOSTAT),
1601 bus_space_read_1(iot, ioh, SSTAT2)));
1602
1603 /* Clear host FIFO and counter. */
1604 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO);
1605 /* Enable FIFOs. */
1606 bus_space_write_1(iot, ioh, DMACNTRL0, ENDMA | DWORDPIO);
1607 bus_space_write_1(iot, ioh, SXFRCTL0, SCSIEN | DMAEN | CHEN);
1608
1609 /* Turn off ENREQINIT for now. */
1610 bus_space_write_1(iot, ioh, SIMODE1,
1611 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENPHASECHG);
1612
1613 /* We leave this loop if one or more of the following is true:
1614 * a) phase != PH_DATAIN && FIFOs are empty
1615 * b) SCSIRSTI is set (a reset has occurred) or busfree is detected.
1616 */
1617 while (n > 0) {
1618 /* Wait for fifo half full or phase mismatch */
1619 for (;;) {
1620 dmastat = bus_space_read_1(iot, ioh, DMASTAT);
1621 if ((dmastat & (DFIFOFULL | INTSTAT)) != 0)
1622 break;
1623 }
1624
1625 if ((dmastat & DFIFOFULL) != 0) {
1626 n -= DINAMOUNT;
1627 in += DINAMOUNT;
1628
1629 #if AIC_USE_DWORDS
1630 bus_space_read_multi_4(iot, ioh, DMADATALONG,
1631 (u_int32_t *) p, DINAMOUNT >> 2);
1632 #else
1633 bus_space_read_multi_2(iot, ioh, DMADATA,
1634 (u_int16_t *) p, DINAMOUNT >> 1);
1635 #endif
1636
1637 p += DINAMOUNT;
1638 } else {
1639 int xfer;
1640
1641 xfer = min(bus_space_read_1(iot, ioh, FIFOSTAT), n);
1642 AIC_MISC((">%d ", xfer));
1643
1644 n -= xfer;
1645 in += xfer;
1646
1647 #if AIC_USE_DWORDS
1648 if (xfer >= 12) {
1649 bus_space_read_multi_4(iot, ioh, DMADATALONG,
1650 (u_int32_t *) p, xfer >> 2);
1651 p += xfer & ~3;
1652 xfer &= 3;
1653 }
1654 #else
1655 if (xfer >= 8) {
1656 bus_space_read_multi_2(iot, ioh, DMADATA,
1657 (u_int16_t *) p, xfer >> 1);
1658 p += xfer & ~1;
1659 xfer &= 1;
1660 }
1661 #endif
1662
1663 if (xfer > 0) {
1664 bus_space_write_1(iot, ioh, DMACNTRL0,
1665 ENDMA | B8MODE);
1666 bus_space_read_multi_1(iot, ioh, DMADATA,
1667 p, xfer);
1668 p += xfer;
1669 bus_space_write_1(iot, ioh, DMACNTRL0,
1670 ENDMA | DWORDPIO);
1671 }
1672 }
1673
1674 if ((dmastat & INTSTAT) != 0)
1675 goto phasechange;
1676 }
1677
1678 /* Some SCSI-devices are rude enough to transfer more data than what
1679 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
1680 * requested 512. Test for progress, i.e. real transfers. If no real
1681 * transfers have been performed (n is probably already zero) and the
1682 * FIFO is not empty, waste some bytes....
1683 */
1684 if (in == 0) {
1685 bus_space_write_1(iot, ioh, SXFRCTL1, BITBUCKET);
1686 for (;;) {
1687 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT)
1688 != 0)
1689 break;
1690 }
1691 bus_space_write_1(iot, ioh, SXFRCTL1, 0);
1692 AIC_MISC(("extra data "));
1693 }
1694
1695 phasechange:
1696 /* Turn on ENREQINIT again. */
1697 bus_space_write_1(iot, ioh, SIMODE1,
1698 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | ENPHASECHG);
1699
1700 /* Stop the FIFO data path. */
1701 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
1702 bus_space_write_1(iot, ioh, DMACNTRL0, 0);
1703
1704 return in;
1705 }
1706
1707 /*
1708 * This is the workhorse routine of the driver.
1709 * Deficiencies (for now):
1710 * 1) always uses programmed I/O
1711 */
1712 int
1713 aicintr(void *arg)
1714 {
1715 struct aic_softc *sc = arg;
1716 bus_space_tag_t iot = sc->sc_iot;
1717 bus_space_handle_t ioh = sc->sc_ioh;
1718 u_char sstat0, sstat1;
1719 struct aic_acb *acb;
1720 struct scsipi_periph *periph;
1721 struct aic_tinfo *ti;
1722 int n;
1723
1724 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1725 return (0);
1726
1727 /*
1728 * Clear INTEN. We enable it again before returning. This makes the
1729 * interrupt esssentially level-triggered.
1730 */
1731 bus_space_write_1(iot, ioh, DMACNTRL0, 0);
1732
1733 AIC_TRACE(("aicintr "));
1734
1735 loop:
1736 /*
1737 * First check for abnormal conditions, such as reset.
1738 */
1739 sstat1 = bus_space_read_1(iot, ioh, SSTAT1);
1740 AIC_MISC(("sstat1:0x%02x ", sstat1));
1741
1742 if ((sstat1 & SCSIRSTI) != 0) {
1743 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
1744 goto reset;
1745 }
1746
1747 /*
1748 * Check for less serious errors.
1749 */
1750 if ((sstat1 & SCSIPERR) != 0) {
1751 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
1752 bus_space_write_1(iot, ioh, CLRSINT1, CLRSCSIPERR);
1753 if (sc->sc_prevphase == PH_MSGIN) {
1754 sc->sc_flags |= AIC_DROP_MSGIN;
1755 aic_sched_msgout(sc, SEND_PARITY_ERROR);
1756 } else
1757 aic_sched_msgout(sc, SEND_INIT_DET_ERR);
1758 }
1759
1760 /*
1761 * If we're not already busy doing something test for the following
1762 * conditions:
1763 * 1) We have been reselected by something
1764 * 2) We have selected something successfully
1765 * 3) Our selection process has timed out
1766 * 4) This is really a bus free interrupt just to get a new command
1767 * going?
1768 * 5) Spurious interrupt?
1769 */
1770 switch (sc->sc_state) {
1771 case AIC_IDLE:
1772 case AIC_SELECTING:
1773 sstat0 = bus_space_read_1(iot, ioh, SSTAT0);
1774 AIC_MISC(("sstat0:0x%02x ", sstat0));
1775
1776 if ((sstat0 & TARGET) != 0) {
1777 /*
1778 * We don't currently support target mode.
1779 */
1780 printf("%s: target mode selected; going to BUS FREE\n",
1781 sc->sc_dev.dv_xname);
1782 bus_space_write_1(iot, ioh, SCSISIG, 0);
1783
1784 goto sched;
1785 } else if ((sstat0 & SELDI) != 0) {
1786 AIC_MISC(("reselected "));
1787
1788 /*
1789 * If we're trying to select a target ourselves,
1790 * push our command back into the ready list.
1791 */
1792 if (sc->sc_state == AIC_SELECTING) {
1793 AIC_MISC(("backoff selector "));
1794 AIC_ASSERT(sc->sc_nexus != NULL);
1795 acb = sc->sc_nexus;
1796 sc->sc_nexus = NULL;
1797 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
1798 }
1799
1800 /* Save reselection ID. */
1801 sc->sc_selid = bus_space_read_1(iot, ioh, SELID);
1802
1803 sc->sc_state = AIC_RESELECTED;
1804 } else if ((sstat0 & SELDO) != 0) {
1805 AIC_MISC(("selected "));
1806
1807 /* We have selected a target. Things to do:
1808 * a) Determine what message(s) to send.
1809 * b) Verify that we're still selecting the target.
1810 * c) Mark device as busy.
1811 */
1812 if (sc->sc_state != AIC_SELECTING) {
1813 printf("%s: selection out while idle; "
1814 "resetting\n", sc->sc_dev.dv_xname);
1815 AIC_BREAK();
1816 goto reset;
1817 }
1818 AIC_ASSERT(sc->sc_nexus != NULL);
1819 acb = sc->sc_nexus;
1820 periph = acb->xs->xs_periph;
1821 ti = &sc->sc_tinfo[periph->periph_target];
1822
1823 sc->sc_msgpriq = SEND_IDENTIFY;
1824 if (acb->flags & ACB_RESET)
1825 sc->sc_msgpriq |= SEND_DEV_RESET;
1826 else if (acb->flags & ACB_ABORT)
1827 sc->sc_msgpriq |= SEND_ABORT;
1828 else {
1829 #if AIC_USE_SYNCHRONOUS
1830 if ((ti->flags & DO_SYNC) != 0)
1831 sc->sc_msgpriq |= SEND_SDTR;
1832 #endif
1833 #if AIC_USE_WIDE
1834 if ((ti->flags & DO_WIDE) != 0)
1835 sc->sc_msgpriq |= SEND_WDTR;
1836 #endif
1837 }
1838
1839 acb->flags |= ACB_NEXUS;
1840 ti->lubusy |= (1 << periph->periph_lun);
1841
1842 /* Do an implicit RESTORE POINTERS. */
1843 sc->sc_dp = acb->data_addr;
1844 sc->sc_dleft = acb->data_length;
1845 sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1846 sc->sc_cleft = acb->scsipi_cmd_length;
1847
1848 /* On our first connection, schedule a timeout. */
1849 if ((acb->xs->xs_control & XS_CTL_POLL) == 0)
1850 callout_reset(&acb->xs->xs_callout,
1851 mstohz(acb->timeout), aic_timeout, acb);
1852
1853 sc->sc_state = AIC_CONNECTED;
1854 } else if ((sstat1 & SELTO) != 0) {
1855 AIC_MISC(("selection timeout "));
1856
1857 if (sc->sc_state != AIC_SELECTING) {
1858 printf("%s: selection timeout while idle; "
1859 "resetting\n", sc->sc_dev.dv_xname);
1860 AIC_BREAK();
1861 goto reset;
1862 }
1863 AIC_ASSERT(sc->sc_nexus != NULL);
1864 acb = sc->sc_nexus;
1865
1866 bus_space_write_1(iot, ioh, SXFRCTL1, 0);
1867 bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI);
1868 bus_space_write_1(iot, ioh, CLRSINT1, CLRSELTIMO);
1869 delay(250);
1870
1871 acb->xs->error = XS_SELTIMEOUT;
1872 goto finish;
1873 } else {
1874 if (sc->sc_state != AIC_IDLE) {
1875 printf("%s: BUS FREE while not idle; "
1876 "state=%d\n",
1877 sc->sc_dev.dv_xname, sc->sc_state);
1878 AIC_BREAK();
1879 goto out;
1880 }
1881
1882 goto sched;
1883 }
1884
1885 /*
1886 * Turn off selection stuff, and prepare to catch bus free
1887 * interrupts, parity errors, and phase changes.
1888 */
1889 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRSTCNT | CLRCH);
1890 bus_space_write_1(iot, ioh, SXFRCTL1, 0);
1891 bus_space_write_1(iot, ioh, SCSISEQ, ENAUTOATNP);
1892 bus_space_write_1(iot, ioh, CLRSINT0, CLRSELDI | CLRSELDO);
1893 bus_space_write_1(iot, ioh, CLRSINT1,
1894 CLRBUSFREE | CLRPHASECHG);
1895 bus_space_write_1(iot, ioh, SIMODE0, 0);
1896 bus_space_write_1(iot, ioh, SIMODE1,
1897 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT |
1898 ENPHASECHG);
1899
1900 sc->sc_flags = 0;
1901 sc->sc_prevphase = PH_INVALID;
1902 goto dophase;
1903 }
1904
1905 if ((sstat1 & BUSFREE) != 0) {
1906 /* We've gone to BUS FREE phase. */
1907 bus_space_write_1(iot, ioh, CLRSINT1,
1908 CLRBUSFREE | CLRPHASECHG);
1909
1910 switch (sc->sc_state) {
1911 case AIC_RESELECTED:
1912 goto sched;
1913
1914 case AIC_CONNECTED:
1915 AIC_ASSERT(sc->sc_nexus != NULL);
1916 acb = sc->sc_nexus;
1917
1918 #if AIC_USE_SYNCHRONOUS + AIC_USE_WIDE
1919 if (sc->sc_prevphase == PH_MSGOUT) {
1920 /*
1921 * If the target went to BUS FREE phase during
1922 * or immediately after sending a SDTR or WDTR
1923 * message, disable negotiation.
1924 */
1925 periph = acb->xs->xs_periph;
1926 ti = &sc->sc_tinfo[periph->periph_target];
1927 switch (sc->sc_lastmsg) {
1928 #if AIC_USE_SYNCHRONOUS
1929 case SEND_SDTR:
1930 ti->flags &= ~DO_SYNC;
1931 ti->period = ti->offset = 0;
1932 break;
1933 #endif
1934 #if AIC_USE_WIDE
1935 case SEND_WDTR:
1936 ti->flags &= ~DO_WIDE;
1937 ti->width = 0;
1938 break;
1939 #endif
1940 }
1941 }
1942 #endif
1943
1944 if ((sc->sc_flags & AIC_ABORTING) == 0) {
1945 /*
1946 * Section 5.1.1 of the SCSI 2 spec suggests
1947 * issuing a REQUEST SENSE following an
1948 * unexpected disconnect. Some devices go into
1949 * a contingent allegiance condition when
1950 * disconnecting, and this is necessary to
1951 * clean up their state.
1952 */
1953 printf("%s: unexpected disconnect; "
1954 "sending REQUEST SENSE\n",
1955 sc->sc_dev.dv_xname);
1956 AIC_BREAK();
1957 aic_sense(sc, acb);
1958 goto out;
1959 }
1960
1961 acb->xs->error = XS_DRIVER_STUFFUP;
1962 goto finish;
1963
1964 case AIC_DISCONNECT:
1965 AIC_ASSERT(sc->sc_nexus != NULL);
1966 acb = sc->sc_nexus;
1967 #if 1 /* XXXX */
1968 acb->data_addr = sc->sc_dp;
1969 acb->data_length = sc->sc_dleft;
1970 #endif
1971 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
1972 sc->sc_nexus = NULL;
1973 goto sched;
1974
1975 case AIC_CMDCOMPLETE:
1976 AIC_ASSERT(sc->sc_nexus != NULL);
1977 acb = sc->sc_nexus;
1978 goto finish;
1979 }
1980 }
1981
1982 bus_space_write_1(iot, ioh, CLRSINT1, CLRPHASECHG);
1983
1984 dophase:
1985 if ((sstat1 & REQINIT) == 0) {
1986 /* Wait for REQINIT. */
1987 goto out;
1988 }
1989
1990 sc->sc_phase = bus_space_read_1(iot, ioh, SCSISIG) & PH_MASK;
1991 bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase);
1992
1993 switch (sc->sc_phase) {
1994 case PH_MSGOUT:
1995 if (sc->sc_state != AIC_CONNECTED &&
1996 sc->sc_state != AIC_RESELECTED)
1997 break;
1998 aic_msgout(sc);
1999 sc->sc_prevphase = PH_MSGOUT;
2000 goto loop;
2001
2002 case PH_MSGIN:
2003 if (sc->sc_state != AIC_CONNECTED &&
2004 sc->sc_state != AIC_RESELECTED)
2005 break;
2006 aic_msgin(sc);
2007 sc->sc_prevphase = PH_MSGIN;
2008 goto loop;
2009
2010 case PH_CMD:
2011 if (sc->sc_state != AIC_CONNECTED)
2012 break;
2013 #if AIC_DEBUG
2014 if ((aic_debug & AIC_SHOWMISC) != 0) {
2015 AIC_ASSERT(sc->sc_nexus != NULL);
2016 acb = sc->sc_nexus;
2017 printf("cmd=0x%02x+%d ",
2018 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length-1);
2019 }
2020 #endif
2021 n = aic_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
2022 sc->sc_cp += n;
2023 sc->sc_cleft -= n;
2024 sc->sc_prevphase = PH_CMD;
2025 goto loop;
2026
2027 case PH_DATAOUT:
2028 if (sc->sc_state != AIC_CONNECTED)
2029 break;
2030 AIC_MISC(("dataout %ld ", (long)sc->sc_dleft));
2031 n = aic_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
2032 sc->sc_dp += n;
2033 sc->sc_dleft -= n;
2034 sc->sc_prevphase = PH_DATAOUT;
2035 goto loop;
2036
2037 case PH_DATAIN:
2038 if (sc->sc_state != AIC_CONNECTED)
2039 break;
2040 AIC_MISC(("datain %ld ", (long)sc->sc_dleft));
2041 n = aic_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
2042 sc->sc_dp += n;
2043 sc->sc_dleft -= n;
2044 sc->sc_prevphase = PH_DATAIN;
2045 goto loop;
2046
2047 case PH_STAT:
2048 if (sc->sc_state != AIC_CONNECTED)
2049 break;
2050 AIC_ASSERT(sc->sc_nexus != NULL);
2051 acb = sc->sc_nexus;
2052 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN);
2053 acb->target_stat = bus_space_read_1(iot, ioh, SCSIDAT);
2054 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN);
2055 AIC_MISC(("target_stat=0x%02x ", acb->target_stat));
2056 sc->sc_prevphase = PH_STAT;
2057 goto loop;
2058 }
2059
2060 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
2061 AIC_BREAK();
2062 reset:
2063 aic_init(sc, 1);
2064 return 1;
2065
2066 finish:
2067 callout_stop(&acb->xs->xs_callout);
2068 aic_done(sc, acb);
2069 goto out;
2070
2071 sched:
2072 sc->sc_state = AIC_IDLE;
2073 aic_sched(sc);
2074 goto out;
2075
2076 out:
2077 bus_space_write_1(iot, ioh, DMACNTRL0, INTEN);
2078 return 1;
2079 }
2080
2081 static void
2082 aic_abort(struct aic_softc *sc, struct aic_acb *acb)
2083 {
2084
2085 /* 2 secs for the abort */
2086 acb->timeout = AIC_ABORT_TIMEOUT;
2087 acb->flags |= ACB_ABORT;
2088
2089 if (acb == sc->sc_nexus) {
2090 /*
2091 * If we're still selecting, the message will be scheduled
2092 * after selection is complete.
2093 */
2094 if (sc->sc_state == AIC_CONNECTED)
2095 aic_sched_msgout(sc, SEND_ABORT);
2096 } else {
2097 aic_dequeue(sc, acb);
2098 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
2099 if (sc->sc_state == AIC_IDLE)
2100 aic_sched(sc);
2101 }
2102 }
2103
2104 static void
2105 aic_timeout(void *arg)
2106 {
2107 struct aic_acb *acb = arg;
2108 struct scsipi_xfer *xs = acb->xs;
2109 struct scsipi_periph *periph = xs->xs_periph;
2110 struct aic_softc *sc =
2111 (void *)periph->periph_channel->chan_adapter->adapt_dev;
2112 int s;
2113
2114 scsipi_printaddr(periph);
2115 printf("timed out");
2116
2117 s = splbio();
2118
2119 if (acb->flags & ACB_ABORT) {
2120 /* abort timed out */
2121 printf(" AGAIN\n");
2122 /* XXX Must reset! */
2123 } else {
2124 /* abort the operation that has timed out */
2125 printf("\n");
2126 acb->xs->error = XS_TIMEOUT;
2127 aic_abort(sc, acb);
2128 }
2129
2130 splx(s);
2131 }
2132
2133 #ifdef AIC_DEBUG
2134 /*
2135 * The following functions are mostly used for debugging purposes, either
2136 * directly called from the driver or from the kernel debugger.
2137 */
2138
2139 static void
2140 aic_show_scsi_cmd(struct aic_acb *acb)
2141 {
2142 u_char *b = (u_char *)&acb->scsipi_cmd;
2143 struct scsipi_periph *periph = acb->xs->xs_periph;
2144 int i;
2145
2146 scsipi_printaddr(periph);
2147 if ((acb->xs->xs_control & XS_CTL_RESET) == 0) {
2148 for (i = 0; i < acb->scsipi_cmd_length; i++) {
2149 if (i)
2150 printf(",");
2151 printf("%x", b[i]);
2152 }
2153 printf("\n");
2154 } else
2155 printf("RESET\n");
2156 }
2157
2158 static void
2159 aic_print_acb(struct aic_acb *acb)
2160 {
2161
2162 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
2163 printf(" dp=%p dleft=%d target_stat=%x\n",
2164 acb->data_addr, acb->data_length, acb->target_stat);
2165 aic_show_scsi_cmd(acb);
2166 }
2167
2168 void
2169 aic_print_active_acb(void)
2170 {
2171 extern struct cfdriver aic_cd;
2172 struct aic_acb *acb;
2173 struct aic_softc *sc = aic_cd.cd_devs[0];
2174
2175 printf("ready list:\n");
2176 for (acb = sc->ready_list.tqh_first; acb != NULL;
2177 acb = acb->chain.tqe_next)
2178 aic_print_acb(acb);
2179 printf("nexus:\n");
2180 if (sc->sc_nexus != NULL)
2181 aic_print_acb(sc->sc_nexus);
2182 printf("nexus list:\n");
2183 for (acb = sc->nexus_list.tqh_first; acb != NULL;
2184 acb = acb->chain.tqe_next)
2185 aic_print_acb(acb);
2186 }
2187
2188 void
2189 aic_dump6360(struct aic_softc *sc)
2190 {
2191 bus_space_tag_t iot = sc->sc_iot;
2192 bus_space_handle_t ioh = sc->sc_ioh;
2193
2194 printf("aic6360: SCSISEQ=%x SXFRCTL0=%x SXFRCTL1=%x SCSISIG=%x\n",
2195 bus_space_read_1(iot, ioh, SCSISEQ),
2196 bus_space_read_1(iot, ioh, SXFRCTL0),
2197 bus_space_read_1(iot, ioh, SXFRCTL1),
2198 bus_space_read_1(iot, ioh, SCSISIG));
2199 printf(" SSTAT0=%x SSTAT1=%x SSTAT2=%x SSTAT3=%x SSTAT4=%x\n",
2200 bus_space_read_1(iot, ioh, SSTAT0),
2201 bus_space_read_1(iot, ioh, SSTAT1),
2202 bus_space_read_1(iot, ioh, SSTAT2),
2203 bus_space_read_1(iot, ioh, SSTAT3),
2204 bus_space_read_1(iot, ioh, SSTAT4));
2205 printf(" SIMODE0=%x SIMODE1=%x DMACNTRL0=%x DMACNTRL1=%x "
2206 "DMASTAT=%x\n",
2207 bus_space_read_1(iot, ioh, SIMODE0),
2208 bus_space_read_1(iot, ioh, SIMODE1),
2209 bus_space_read_1(iot, ioh, DMACNTRL0),
2210 bus_space_read_1(iot, ioh, DMACNTRL1),
2211 bus_space_read_1(iot, ioh, DMASTAT));
2212 printf(" FIFOSTAT=%d SCSIBUS=0x%x\n",
2213 bus_space_read_1(iot, ioh, FIFOSTAT),
2214 bus_space_read_1(iot, ioh, SCSIBUS));
2215 }
2216
2217 void
2218 aic_dump_driver(struct aic_softc *sc)
2219 {
2220 struct aic_tinfo *ti;
2221 int i;
2222
2223 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
2224 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x "
2225 "currmsg=%x\n",
2226 sc->sc_state, sc->sc_imess[0],
2227 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
2228 for (i = 0; i < 7; i++) {
2229 ti = &sc->sc_tinfo[i];
2230 printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2231 i, ti->cmds, ti->dconns, ti->touts);
2232 printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2233 }
2234 }
2235 #endif
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