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sys/dev/ic/aic6360.c
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1 /* $NetBSD: aic6360.c,v 1.95 2008/06/11 16:09:16 drochner Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995, 1996 Charles M. Hannum. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Charles M. Hannum. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * Copyright (c) 1994 Jarle Greipsland 21 * All rights reserved. 22 * 23 * Redistribution and use in source and binary forms, with or without 24 * modification, are permitted provided that the following conditions 25 * are met: 26 * 1. Redistributions of source code must retain the above copyright 27 * notice, this list of conditions and the following disclaimer. 28 * 2. Redistributions in binary form must reproduce the above copyright 29 * notice, this list of conditions and the following disclaimer in the 30 * documentation and/or other materials provided with the distribution. 31 * 3. The name of the author may not be used to endorse or promote products 32 * derived from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 35 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 36 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 37 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 38 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 39 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 40 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 41 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 42 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 43 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 44 * POSSIBILITY OF SUCH DAMAGE. 45 */ 46 47 /* 48 * Acknowledgements: Many of the algorithms used in this driver are 49 * inspired by the work of Julian Elischer (julian@tfs.com) and 50 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 51 */ 52 53 /* TODO list: 54 * 1) Get the DMA stuff working. 55 * 2) Get the iov/uio stuff working. Is this a good thing ??? 56 * 3) Get the synch stuff working. 57 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 58 */ 59 60 #include <sys/cdefs.h> 61 __KERNEL_RCSID(0, "$NetBSD: aic6360.c,v 1.95 2008/06/11 16:09:16 drochner Exp $"); 62 63 #include "opt_ddb.h" 64 65 /* 66 * A few customizable items: 67 */ 68 69 /* Use doubleword transfers to/from SCSI chip. Note: This requires 70 * motherboard support. Basicly, some motherboard chipsets are able to 71 * split a 32 bit I/O operation into two 16 bit I/O operations, 72 * transparently to the processor. This speeds up some things, notably long 73 * data transfers. 74 */ 75 #define AIC_USE_DWORDS 0 76 77 /* Synchronous data transfers? */ 78 #define AIC_USE_SYNCHRONOUS 0 79 #define AIC_SYNC_REQ_ACK_OFS 8 80 81 /* Wide data transfers? */ 82 #define AIC_USE_WIDE 0 83 #define AIC_MAX_WIDTH 0 84 85 /* Max attempts made to transmit a message */ 86 #define AIC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 87 88 /* Use DMA (else we do programmed I/O using string instructions) (not yet!)*/ 89 #define AIC_USE_EISA_DMA 0 90 #define AIC_USE_ISA_DMA 0 91 92 /* How to behave on the (E)ISA bus when/if DMAing (on<<4) + off in us */ 93 #define EISA_BRST_TIM ((15<<4) + 1) /* 15us on, 1us off */ 94 95 /* Some spin loop parameters (essentially how long to wait some places) 96 * The problem(?) is that sometimes we expect either to be able to transmit a 97 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 98 * returning from the interrupt just to get yanked back for the next byte we 99 * may spin in the interrupt routine waiting for this byte to come. How long? 100 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 101 */ 102 #define AIC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 103 #define AIC_MSGOUT_SPIN 1 104 105 /* Include debug functions? At the end of this file there are a bunch of 106 * functions that will print out various information regarding queued SCSI 107 * commands, driver state and chip contents. You can call them from the 108 * kernel debugger. If you set AIC_DEBUG to 0 they are not included (the 109 * kernel uses less memory) but you lose the debugging facilities. 110 */ 111 #define AIC_DEBUG 1 112 113 #define AIC_ABORT_TIMEOUT 2000 /* time to wait for abort */ 114 115 /* End of customizable parameters */ 116 117 #if AIC_USE_EISA_DMA || AIC_USE_ISA_DMA 118 #error "I said not yet! Start paying attention... grumble" 119 #endif 120 121 #include <sys/param.h> 122 #include <sys/systm.h> 123 #include <sys/callout.h> 124 #include <sys/kernel.h> 125 #include <sys/errno.h> 126 #include <sys/ioctl.h> 127 #include <sys/device.h> 128 #include <sys/buf.h> 129 #include <sys/proc.h> 130 #include <sys/user.h> 131 #include <sys/queue.h> 132 133 #include <sys/bus.h> 134 #include <sys/intr.h> 135 136 #include <dev/scsipi/scsi_spc.h> 137 #include <dev/scsipi/scsi_all.h> 138 #include <dev/scsipi/scsipi_all.h> 139 #include <dev/scsipi/scsi_message.h> 140 #include <dev/scsipi/scsiconf.h> 141 142 #include <dev/ic/aic6360reg.h> 143 #include <dev/ic/aic6360var.h> 144 145 #ifndef DDB 146 #define Debugger() panic("should call debugger here (aic6360.c)") 147 #endif /* ! DDB */ 148 149 #if AIC_DEBUG 150 int aic_debug = 0x00; /* AIC_SHOWSTART|AIC_SHOWMISC|AIC_SHOWTRACE; */ 151 #endif 152 153 static void aic_minphys(struct buf *); 154 static void aic_done(struct aic_softc *, struct aic_acb *); 155 static void aic_dequeue(struct aic_softc *, struct aic_acb *); 156 static void aic_scsipi_request(struct scsipi_channel *, 157 scsipi_adapter_req_t, void *); 158 static int aic_poll(struct aic_softc *, struct scsipi_xfer *, int); 159 static void aic_select(struct aic_softc *, struct aic_acb *); 160 static void aic_timeout(void *); 161 static void aic_sched(struct aic_softc *); 162 static void aic_scsi_reset(struct aic_softc *); 163 static void aic_reset(struct aic_softc *); 164 static void aic_free_acb(struct aic_softc *, struct aic_acb *); 165 static struct aic_acb* aic_get_acb(struct aic_softc *); 166 static int aic_reselect(struct aic_softc *, int); 167 static void aic_sense(struct aic_softc *, struct aic_acb *); 168 static void aic_msgin(struct aic_softc *); 169 static void aic_abort(struct aic_softc *, struct aic_acb *); 170 static void aic_msgout(struct aic_softc *); 171 static int aic_dataout_pio(struct aic_softc *, u_char *, int); 172 static int aic_datain_pio(struct aic_softc *, u_char *, int); 173 static void aic_update_xfer_mode(struct aic_softc *, int); 174 #if AIC_DEBUG 175 static void aic_print_acb(struct aic_acb *); 176 void aic_dump_driver(struct aic_softc *); 177 void aic_dump6360(struct aic_softc *); 178 static void aic_show_scsi_cmd(struct aic_acb *); 179 void aic_print_active_acb(void); 180 #endif 181 182 /* 183 * INITIALIZATION ROUTINES (probe, attach ++) 184 */ 185 186 /* Do the real search-for-device. 187 * Prerequisite: sc->sc_iobase should be set to the proper value 188 */ 189 int 190 aic_find(bus_space_tag_t iot, bus_space_handle_t ioh) 191 { 192 char chip_id[sizeof(IDSTRING)]; /* For chips that support it */ 193 int i; 194 195 /* Remove aic6360 from possible powerdown mode */ 196 bus_space_write_1(iot, ioh, DMACNTRL0, 0); 197 198 /* Thanks to mark@aggregate.com for the new method for detecting 199 * whether the chip is present or not. Bonus: may also work for 200 * the AIC-6260! 201 */ 202 AIC_TRACE(("aic: probing for aic-chip\n")); 203 /* 204 * Linux also init's the stack to 1-16 and then clears it, 205 * 6260's don't appear to have an ID reg - mpg 206 */ 207 /* Push the sequence 0,1,..,15 on the stack */ 208 #define STSIZE 16 209 bus_space_write_1(iot, ioh, DMACNTRL1, 0); /* Reset stack pointer */ 210 for (i = 0; i < STSIZE; i++) 211 bus_space_write_1(iot, ioh, STACK, i); 212 213 /* See if we can pull out the same sequence */ 214 bus_space_write_1(iot, ioh, DMACNTRL1, 0); 215 for (i = 0; i < STSIZE && bus_space_read_1(iot, ioh, STACK) == i; i++) 216 ; 217 if (i != STSIZE) { 218 AIC_START(("STACK futzed at %d.\n", i)); 219 return 0; 220 } 221 222 /* See if we can pull the id string out of the ID register, 223 * now only used for informational purposes. 224 */ 225 memset(chip_id, 0, sizeof(chip_id)); 226 bus_space_read_multi_1(iot, ioh, ID, chip_id, sizeof(IDSTRING) - 1); 227 AIC_START(("AIC found ID: %s ",chip_id)); 228 AIC_START(("chip revision %d\n", 229 (int)bus_space_read_1(iot, ioh, REV))); 230 231 return 1; 232 } 233 234 /* 235 * Attach the AIC6360, fill out some high and low level data structures 236 */ 237 void 238 aicattach(struct aic_softc *sc) 239 { 240 struct scsipi_adapter *adapt = &sc->sc_adapter; 241 struct scsipi_channel *chan = &sc->sc_channel; 242 243 AIC_TRACE(("aicattach ")); 244 sc->sc_state = AIC_INIT; 245 246 sc->sc_initiator = 7; 247 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */ 248 249 /* 250 * These are the bounds of the sync period, based on the frequency of 251 * the chip's clock input and the size and offset of the sync period 252 * register. 253 * 254 * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a 255 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a 256 * minimum transfer rate. 257 */ 258 sc->sc_minsync = (2 * 250) / sc->sc_freq; 259 sc->sc_maxsync = (9 * 250) / sc->sc_freq; 260 261 /* 262 * Fill in the scsipi_adapter. 263 */ 264 adapt->adapt_dev = &sc->sc_dev; 265 adapt->adapt_nchannels = 1; 266 adapt->adapt_openings = 8; 267 adapt->adapt_max_periph = 1; 268 adapt->adapt_request = aic_scsipi_request; 269 adapt->adapt_minphys = aic_minphys; 270 271 /* 272 * Fill in the scsipi_channel. 273 */ 274 chan->chan_adapter = adapt; 275 chan->chan_bustype = &scsi_bustype; 276 chan->chan_channel = 0; 277 chan->chan_ntargets = 8; 278 chan->chan_nluns = 8; 279 chan->chan_id = sc->sc_initiator; 280 281 /* 282 * Add reference to adapter so that we drop the reference after 283 * config_found() to make sure the adatper is disabled. 284 */ 285 if (scsipi_adapter_addref(adapt) != 0) { 286 aprint_error_dev(&sc->sc_dev, "unable to enable controller\n"); 287 return; 288 } 289 290 aic_init(sc, 1); /* Init chip and driver */ 291 292 /* 293 * Ask the adapter what subunits are present 294 */ 295 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 296 scsipi_adapter_delref(adapt); 297 } 298 299 int 300 aic_activate(struct device *self, enum devact act) 301 { 302 struct aic_softc *sc = (struct aic_softc *) self; 303 int s, rv = 0; 304 305 s = splhigh(); 306 switch (act) { 307 case DVACT_ACTIVATE: 308 rv = EOPNOTSUPP; 309 break; 310 311 case DVACT_DEACTIVATE: 312 if (sc->sc_child != NULL) 313 rv = config_deactivate(sc->sc_child); 314 break; 315 } 316 splx(s); 317 318 return (rv); 319 } 320 321 int 322 aic_detach(struct device *self, int flags) 323 { 324 struct aic_softc *sc = (struct aic_softc *) self; 325 int rv = 0; 326 327 if (sc->sc_child != NULL) 328 rv = config_detach(sc->sc_child, flags); 329 330 return (rv); 331 } 332 333 /* Initialize AIC6360 chip itself 334 * The following conditions should hold: 335 * aic_isa_probe should have succeeded, i.e. the iobase address in aic_softc 336 * must be valid. 337 */ 338 static void 339 aic_reset(struct aic_softc *sc) 340 { 341 bus_space_tag_t iot = sc->sc_iot; 342 bus_space_handle_t ioh = sc->sc_ioh; 343 344 /* 345 * Doc. recommends to clear these two registers before 346 * operations commence 347 */ 348 bus_space_write_1(iot, ioh, SCSITEST, 0); 349 bus_space_write_1(iot, ioh, TEST, 0); 350 351 /* Reset SCSI-FIFO and abort any transfers */ 352 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRCH | CLRSTCNT); 353 354 /* Reset DMA-FIFO */ 355 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO); 356 bus_space_write_1(iot, ioh, DMACNTRL1, 0); 357 358 /* Disable all selection features */ 359 bus_space_write_1(iot, ioh, SCSISEQ, 0); 360 bus_space_write_1(iot, ioh, SXFRCTL1, 0); 361 362 /* Disable some interrupts */ 363 bus_space_write_1(iot, ioh, SIMODE0, 0x00); 364 /* Clear a slew of interrupts */ 365 bus_space_write_1(iot, ioh, CLRSINT0, 0x7f); 366 367 /* Disable some more interrupts */ 368 bus_space_write_1(iot, ioh, SIMODE1, 0x00); 369 /* Clear another slew of interrupts */ 370 bus_space_write_1(iot, ioh, CLRSINT1, 0xef); 371 372 /* Disable synchronous transfers */ 373 bus_space_write_1(iot, ioh, SCSIRATE, 0); 374 375 /* Haven't seen ant errors (yet) */ 376 bus_space_write_1(iot, ioh, CLRSERR, 0x07); 377 378 /* Set our SCSI-ID */ 379 bus_space_write_1(iot, ioh, SCSIID, sc->sc_initiator << OID_S); 380 bus_space_write_1(iot, ioh, BRSTCNTRL, EISA_BRST_TIM); 381 } 382 383 /* Pull the SCSI RST line for 500 us */ 384 static void 385 aic_scsi_reset(struct aic_softc *sc) 386 { 387 bus_space_tag_t iot = sc->sc_iot; 388 bus_space_handle_t ioh = sc->sc_ioh; 389 390 bus_space_write_1(iot, ioh, SCSISEQ, SCSIRSTO); 391 delay(500); 392 bus_space_write_1(iot, ioh, SCSISEQ, 0); 393 delay(50); 394 } 395 396 /* 397 * Initialize aic SCSI driver. 398 */ 399 void 400 aic_init(struct aic_softc *sc, int bus_reset) 401 { 402 struct aic_acb *acb; 403 int r; 404 405 if (bus_reset) { 406 aic_reset(sc); 407 aic_scsi_reset(sc); 408 } 409 aic_reset(sc); 410 411 if (sc->sc_state == AIC_INIT) { 412 /* First time through; initialize. */ 413 TAILQ_INIT(&sc->ready_list); 414 TAILQ_INIT(&sc->nexus_list); 415 TAILQ_INIT(&sc->free_list); 416 sc->sc_nexus = NULL; 417 acb = sc->sc_acb; 418 memset(acb, 0, sizeof(sc->sc_acb)); 419 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) { 420 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain); 421 acb++; 422 } 423 memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 424 } else { 425 /* Cancel any active commands. */ 426 sc->sc_state = AIC_CLEANING; 427 if ((acb = sc->sc_nexus) != NULL) { 428 acb->xs->error = XS_DRIVER_STUFFUP; 429 callout_stop(&acb->xs->xs_callout); 430 aic_done(sc, acb); 431 } 432 while ((acb = sc->nexus_list.tqh_first) != NULL) { 433 acb->xs->error = XS_DRIVER_STUFFUP; 434 callout_stop(&acb->xs->xs_callout); 435 aic_done(sc, acb); 436 } 437 } 438 439 sc->sc_prevphase = PH_INVALID; 440 for (r = 0; r < 8; r++) { 441 struct aic_tinfo *ti = &sc->sc_tinfo[r]; 442 443 ti->flags = 0; 444 ti->period = ti->offset = 0; 445 ti->width = 0; 446 } 447 448 sc->sc_state = AIC_IDLE; 449 bus_space_write_1(sc->sc_iot, sc->sc_ioh, DMACNTRL0, INTEN); 450 } 451 452 static void 453 aic_free_acb(struct aic_softc *sc, struct aic_acb *acb) 454 { 455 int s; 456 457 s = splbio(); 458 acb->flags = 0; 459 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain); 460 splx(s); 461 } 462 463 static struct aic_acb * 464 aic_get_acb(struct aic_softc *sc) 465 { 466 struct aic_acb *acb; 467 int s; 468 469 s = splbio(); 470 acb = TAILQ_FIRST(&sc->free_list); 471 if (acb != NULL) { 472 TAILQ_REMOVE(&sc->free_list, acb, chain); 473 acb->flags |= ACB_ALLOC; 474 } 475 splx(s); 476 return (acb); 477 } 478 479 /* 480 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 481 */ 482 483 /* 484 * Expected sequence: 485 * 1) Command inserted into ready list 486 * 2) Command selected for execution 487 * 3) Command won arbitration and has selected target device 488 * 4) Send message out (identify message, eventually also sync.negotiations) 489 * 5) Send command 490 * 5a) Receive disconnect message, disconnect. 491 * 5b) Reselected by target 492 * 5c) Receive identify message from target. 493 * 6) Send or receive data 494 * 7) Receive status 495 * 8) Receive message (command complete etc.) 496 * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd. 497 * Repeat 2-8 (no disconnects please...) 498 */ 499 500 /* 501 * Perform a request from the SCSIPI midlayer. 502 */ 503 static void 504 aic_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 505 void *arg) 506 { 507 struct scsipi_xfer *xs; 508 struct scsipi_periph *periph; 509 struct aic_softc *sc = (void *)chan->chan_adapter->adapt_dev; 510 struct aic_acb *acb; 511 int s, flags; 512 513 AIC_TRACE(("aic_request ")); 514 515 switch (req) { 516 case ADAPTER_REQ_RUN_XFER: 517 xs = arg; 518 periph = xs->xs_periph; 519 520 AIC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 521 periph->periph_target)); 522 523 if (! device_is_active(&sc->sc_dev)) { 524 xs->error = XS_DRIVER_STUFFUP; 525 scsipi_done(xs); 526 return; 527 } 528 529 flags = xs->xs_control; 530 acb = aic_get_acb(sc); 531 #ifdef DIAGNOSTIC 532 /* 533 * This should never happen as we track the resources 534 * in the mid-layer. 535 */ 536 if (acb == NULL) { 537 scsipi_printaddr(periph); 538 printf("unable to allocate acb\n"); 539 panic("aic_scsipi_request"); 540 } 541 #endif 542 543 /* Initialize acb */ 544 acb->xs = xs; 545 acb->timeout = xs->timeout; 546 547 if (xs->xs_control & XS_CTL_RESET) { 548 acb->flags |= ACB_RESET; 549 acb->scsipi_cmd_length = 0; 550 acb->data_length = 0; 551 } else { 552 memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen); 553 acb->scsipi_cmd_length = xs->cmdlen; 554 acb->data_addr = xs->data; 555 acb->data_length = xs->datalen; 556 } 557 acb->target_stat = 0; 558 559 s = splbio(); 560 561 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain); 562 if (sc->sc_state == AIC_IDLE) 563 aic_sched(sc); 564 565 splx(s); 566 567 if ((flags & XS_CTL_POLL) == 0) 568 return; 569 570 /* Not allowed to use interrupts, use polling instead */ 571 if (aic_poll(sc, xs, acb->timeout)) { 572 aic_timeout(acb); 573 if (aic_poll(sc, xs, acb->timeout)) 574 aic_timeout(acb); 575 } 576 return; 577 578 case ADAPTER_REQ_GROW_RESOURCES: 579 /* XXX Not supported. */ 580 return; 581 582 case ADAPTER_REQ_SET_XFER_MODE: 583 { 584 struct aic_tinfo *ti; 585 struct scsipi_xfer_mode *xm = arg; 586 587 ti = &sc->sc_tinfo[xm->xm_target]; 588 ti->flags &= ~(DO_SYNC|DO_WIDE); 589 ti->period = 0; 590 ti->offset = 0; 591 592 #if AIC_USE_SYNCHRONOUS 593 if (xm->xm_mode & PERIPH_CAP_SYNC) { 594 ti->flags |= DO_SYNC; 595 ti->period = sc->sc_minsync; 596 ti->offset = AIC_SYNC_REQ_ACK_OFS; 597 } 598 #endif 599 #if AIC_USE_WIDE 600 if (xm->xm_mode & PERIPH_CAP_WIDE16) { 601 ti->flags |= DO_WIDE; 602 ti->width = AIC_MAX_WIDTH; 603 } 604 #endif 605 /* 606 * If we're not going to negotiate, send the notification 607 * now, since it won't happen later. 608 */ 609 if ((ti->flags & (DO_SYNC|DO_WIDE)) == 0) 610 aic_update_xfer_mode(sc, xm->xm_target); 611 return; 612 } 613 } 614 } 615 616 static void 617 aic_update_xfer_mode(struct aic_softc *sc, int target) 618 { 619 struct scsipi_xfer_mode xm; 620 struct aic_tinfo *ti = &sc->sc_tinfo[target]; 621 622 xm.xm_target = target; 623 xm.xm_mode = 0; 624 xm.xm_period = 0; 625 xm.xm_offset = 0; 626 627 if (ti->offset != 0) { 628 xm.xm_mode |= PERIPH_CAP_SYNC; 629 xm.xm_period = ti->period; 630 xm.xm_offset = ti->offset; 631 } 632 switch (ti->width) { 633 case 2: 634 xm.xm_mode |= PERIPH_CAP_WIDE32; 635 break; 636 case 1: 637 xm.xm_mode |= PERIPH_CAP_WIDE16; 638 break; 639 } 640 641 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 642 } 643 644 /* 645 * Adjust transfer size in buffer structure 646 */ 647 static void 648 aic_minphys(struct buf *bp) 649 { 650 651 AIC_TRACE(("aic_minphys ")); 652 if (bp->b_bcount > (AIC_NSEG << PGSHIFT)) 653 bp->b_bcount = (AIC_NSEG << PGSHIFT); 654 minphys(bp); 655 } 656 657 /* 658 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 659 */ 660 static int 661 aic_poll(struct aic_softc *sc, struct scsipi_xfer *xs, int count) 662 { 663 bus_space_tag_t iot = sc->sc_iot; 664 bus_space_handle_t ioh = sc->sc_ioh; 665 666 AIC_TRACE(("aic_poll ")); 667 while (count) { 668 /* 669 * If we had interrupts enabled, would we 670 * have got an interrupt? 671 */ 672 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) != 0) 673 aicintr(sc); 674 if ((xs->xs_status & XS_STS_DONE) != 0) 675 return 0; 676 delay(1000); 677 count--; 678 } 679 return 1; 680 } 681 682 /* 683 * LOW LEVEL SCSI UTILITIES 684 */ 685 686 static inline void 687 aic_sched_msgout(struct aic_softc *sc, u_char m) 688 { 689 bus_space_tag_t iot = sc->sc_iot; 690 bus_space_handle_t ioh = sc->sc_ioh; 691 692 if (sc->sc_msgpriq == 0) 693 bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase | ATNO); 694 sc->sc_msgpriq |= m; 695 } 696 697 /* 698 * Set synchronous transfer offset and period. 699 */ 700 #if !AIC_USE_SYNCHRONOUS 701 /* ARGSUSED */ 702 #endif 703 static inline void 704 aic_setsync(struct aic_softc *sc, struct aic_tinfo *ti) 705 { 706 #if AIC_USE_SYNCHRONOUS 707 bus_space_tag_t iot = sc->sc_iot; 708 bus_space_handle_t ioh = sc->sc_ioh; 709 710 if (ti->offset != 0) 711 bus_space_write_1(iot, ioh, SCSIRATE, 712 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset); 713 else 714 bus_space_write_1(iot, ioh, SCSIRATE, 0); 715 #endif 716 } 717 718 /* 719 * Start a selection. This is used by aic_sched() to select an idle target, 720 * and by aic_done() to immediately reselect a target to get sense information. 721 */ 722 static void 723 aic_select(struct aic_softc *sc, struct aic_acb *acb) 724 { 725 struct scsipi_periph *periph = acb->xs->xs_periph; 726 int target = periph->periph_target; 727 struct aic_tinfo *ti = &sc->sc_tinfo[target]; 728 bus_space_tag_t iot = sc->sc_iot; 729 bus_space_handle_t ioh = sc->sc_ioh; 730 731 bus_space_write_1(iot, ioh, SCSIID, 732 sc->sc_initiator << OID_S | target); 733 aic_setsync(sc, ti); 734 bus_space_write_1(iot, ioh, SXFRCTL1, STIMO_256ms | ENSTIMER); 735 736 /* Always enable reselections. */ 737 bus_space_write_1(iot, ioh, SIMODE0, ENSELDI | ENSELDO); 738 bus_space_write_1(iot, ioh, SIMODE1, ENSCSIRST | ENSELTIMO); 739 bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI | ENSELO | ENAUTOATNO); 740 741 sc->sc_state = AIC_SELECTING; 742 } 743 744 static int 745 aic_reselect(struct aic_softc *sc, int message) 746 { 747 u_char selid, target, lun; 748 struct aic_acb *acb; 749 struct scsipi_periph *periph; 750 struct aic_tinfo *ti; 751 752 /* 753 * The SCSI chip made a snapshot of the data bus while the reselection 754 * was being negotiated. This enables us to determine which target did 755 * the reselect. 756 */ 757 selid = sc->sc_selid & ~(1 << sc->sc_initiator); 758 if (selid & (selid - 1)) { 759 aprint_error_dev(&sc->sc_dev, "reselect with invalid selid %02x; " 760 "sending DEVICE RESET\n", selid); 761 AIC_BREAK(); 762 goto reset; 763 } 764 765 /* Search wait queue for disconnected cmd 766 * The list should be short, so I haven't bothered with 767 * any more sophisticated structures than a simple 768 * singly linked list. 769 */ 770 target = ffs(selid) - 1; 771 lun = message & 0x07; 772 for (acb = sc->nexus_list.tqh_first; acb != NULL; 773 acb = acb->chain.tqe_next) { 774 periph = acb->xs->xs_periph; 775 if (periph->periph_target == target && 776 periph->periph_lun == lun) 777 break; 778 } 779 if (acb == NULL) { 780 printf("%s: reselect from target %d lun %d with no nexus; " 781 "sending ABORT\n", device_xname(&sc->sc_dev), target, lun); 782 AIC_BREAK(); 783 goto abort; 784 } 785 786 /* Make this nexus active again. */ 787 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 788 sc->sc_state = AIC_CONNECTED; 789 sc->sc_nexus = acb; 790 ti = &sc->sc_tinfo[target]; 791 ti->lubusy |= (1 << lun); 792 aic_setsync(sc, ti); 793 794 if (acb->flags & ACB_RESET) 795 aic_sched_msgout(sc, SEND_DEV_RESET); 796 else if (acb->flags & ACB_ABORT) 797 aic_sched_msgout(sc, SEND_ABORT); 798 799 /* Do an implicit RESTORE POINTERS. */ 800 sc->sc_dp = acb->data_addr; 801 sc->sc_dleft = acb->data_length; 802 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 803 sc->sc_cleft = acb->scsipi_cmd_length; 804 805 return (0); 806 807 reset: 808 aic_sched_msgout(sc, SEND_DEV_RESET); 809 return (1); 810 811 abort: 812 aic_sched_msgout(sc, SEND_ABORT); 813 return (1); 814 } 815 816 /* 817 * Schedule a SCSI operation. This has now been pulled out of the interrupt 818 * handler so that we may call it from aic_scsipi_request and aic_done. This 819 * may save us an unnecessary interrupt just to get things going. Should only 820 * be called when state == AIC_IDLE and at bio pl. 821 */ 822 static void 823 aic_sched(struct aic_softc *sc) 824 { 825 struct aic_acb *acb; 826 struct scsipi_periph *periph; 827 struct aic_tinfo *ti; 828 bus_space_tag_t iot = sc->sc_iot; 829 bus_space_handle_t ioh = sc->sc_ioh; 830 831 if (! device_is_active(&sc->sc_dev)) 832 return; 833 834 /* 835 * Find first acb in ready queue that is for a target/lunit pair that 836 * is not busy. 837 */ 838 bus_space_write_1(iot, ioh, CLRSINT1, 839 CLRSELTIMO | CLRBUSFREE | CLRSCSIPERR); 840 for (acb = sc->ready_list.tqh_first; acb != NULL; 841 acb = acb->chain.tqe_next) { 842 periph = acb->xs->xs_periph; 843 ti = &sc->sc_tinfo[periph->periph_target]; 844 if ((ti->lubusy & (1 << periph->periph_lun)) == 0) { 845 AIC_MISC(("selecting %d:%d ", 846 periph->periph_target, periph->periph_lun)); 847 TAILQ_REMOVE(&sc->ready_list, acb, chain); 848 sc->sc_nexus = acb; 849 aic_select(sc, acb); 850 return; 851 } else 852 AIC_MISC(("%d:%d busy\n", 853 periph->periph_target, periph->periph_lun)); 854 } 855 AIC_MISC(("idle ")); 856 /* Nothing to start; just enable reselections and wait. */ 857 bus_space_write_1(iot, ioh, SIMODE0, ENSELDI); 858 bus_space_write_1(iot, ioh, SIMODE1, ENSCSIRST); 859 bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI); 860 } 861 862 static void 863 aic_sense(struct aic_softc *sc, struct aic_acb *acb) 864 { 865 struct scsipi_xfer *xs = acb->xs; 866 struct scsipi_periph *periph = xs->xs_periph; 867 struct aic_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 868 struct scsi_request_sense *ss = (void *)&acb->scsipi_cmd; 869 870 AIC_MISC(("requesting sense ")); 871 /* Next, setup a request sense command block */ 872 memset(ss, 0, sizeof(*ss)); 873 ss->opcode = SCSI_REQUEST_SENSE; 874 ss->byte2 = periph->periph_lun << 5; 875 ss->length = sizeof(struct scsi_sense_data); 876 acb->scsipi_cmd_length = sizeof(*ss); 877 acb->data_addr = (char *)&xs->sense.scsi_sense; 878 acb->data_length = sizeof(struct scsi_sense_data); 879 acb->flags |= ACB_SENSE; 880 ti->senses++; 881 if (acb->flags & ACB_NEXUS) 882 ti->lubusy &= ~(1 << periph->periph_lun); 883 if (acb == sc->sc_nexus) { 884 aic_select(sc, acb); 885 } else { 886 aic_dequeue(sc, acb); 887 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 888 if (sc->sc_state == AIC_IDLE) 889 aic_sched(sc); 890 } 891 } 892 893 /* 894 * POST PROCESSING OF SCSI_CMD (usually current) 895 */ 896 static void 897 aic_done(struct aic_softc *sc, struct aic_acb *acb) 898 { 899 struct scsipi_xfer *xs = acb->xs; 900 struct scsipi_periph *periph = xs->xs_periph; 901 struct aic_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 902 903 AIC_TRACE(("aic_done ")); 904 905 /* 906 * Now, if we've come here with no error code, i.e. we've kept the 907 * initial XS_NOERROR, and the status code signals that we should 908 * check sense, we'll need to set up a request sense cmd block and 909 * push the command back into the ready queue *before* any other 910 * commands for this target/lunit, else we lose the sense info. 911 * We don't support chk sense conditions for the request sense cmd. 912 */ 913 if (xs->error == XS_NOERROR) { 914 if (acb->flags & ACB_ABORT) { 915 xs->error = XS_DRIVER_STUFFUP; 916 } else if (acb->flags & ACB_SENSE) { 917 xs->error = XS_SENSE; 918 } else if (acb->target_stat == SCSI_CHECK) { 919 /* First, save the return values */ 920 xs->resid = acb->data_length; 921 xs->status = acb->target_stat; 922 aic_sense(sc, acb); 923 return; 924 } else { 925 xs->resid = acb->data_length; 926 } 927 } 928 929 #if AIC_DEBUG 930 if ((aic_debug & AIC_SHOWMISC) != 0) { 931 if (xs->resid != 0) 932 printf("resid=%d ", xs->resid); 933 if (xs->error == XS_SENSE) 934 printf("sense=0x%02x\n", xs->sense.scsi_sense.response_code); 935 else 936 printf("error=%d\n", xs->error); 937 } 938 #endif 939 940 /* 941 * Remove the ACB from whatever queue it happens to be on. 942 */ 943 if (acb->flags & ACB_NEXUS) 944 ti->lubusy &= ~(1 << periph->periph_lun); 945 if (acb == sc->sc_nexus) { 946 sc->sc_nexus = NULL; 947 sc->sc_state = AIC_IDLE; 948 aic_sched(sc); 949 } else 950 aic_dequeue(sc, acb); 951 952 aic_free_acb(sc, acb); 953 ti->cmds++; 954 scsipi_done(xs); 955 } 956 957 static void 958 aic_dequeue(struct aic_softc *sc, struct aic_acb *acb) 959 { 960 961 if (acb->flags & ACB_NEXUS) { 962 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 963 } else { 964 TAILQ_REMOVE(&sc->ready_list, acb, chain); 965 } 966 } 967 968 /* 969 * INTERRUPT/PROTOCOL ENGINE 970 */ 971 972 /* 973 * Precondition: 974 * The SCSI bus is already in the MSGI phase and there is a message byte 975 * on the bus, along with an asserted REQ signal. 976 */ 977 static void 978 aic_msgin(struct aic_softc *sc) 979 { 980 bus_space_tag_t iot = sc->sc_iot; 981 bus_space_handle_t ioh = sc->sc_ioh; 982 u_char sstat1; 983 int n; 984 985 AIC_TRACE(("aic_msgin ")); 986 987 if (sc->sc_prevphase == PH_MSGIN) { 988 /* This is a continuation of the previous message. */ 989 n = sc->sc_imp - sc->sc_imess; 990 goto nextbyte; 991 } 992 993 /* This is a new MESSAGE IN phase. Clean up our state. */ 994 sc->sc_flags &= ~AIC_DROP_MSGIN; 995 996 nextmsg: 997 n = 0; 998 sc->sc_imp = &sc->sc_imess[n]; 999 1000 nextbyte: 1001 /* 1002 * Read a whole message, but don't ack the last byte. If we reject the 1003 * message, we have to assert ATN during the message transfer phase 1004 * itself. 1005 */ 1006 for (;;) { 1007 for (;;) { 1008 sstat1 = bus_space_read_1(iot, ioh, SSTAT1); 1009 if ((sstat1 & (REQINIT | PHASECHG | BUSFREE)) != 0) 1010 break; 1011 /* Wait for REQINIT. XXX Need timeout. */ 1012 } 1013 if ((sstat1 & (PHASECHG | BUSFREE)) != 0) { 1014 /* 1015 * Target left MESSAGE IN, probably because it 1016 * a) noticed our ATN signal, or 1017 * b) ran out of messages. 1018 */ 1019 goto out; 1020 } 1021 1022 /* If parity error, just dump everything on the floor. */ 1023 if ((sstat1 & SCSIPERR) != 0) { 1024 sc->sc_flags |= AIC_DROP_MSGIN; 1025 aic_sched_msgout(sc, SEND_PARITY_ERROR); 1026 } 1027 1028 /* Gather incoming message bytes if needed. */ 1029 if ((sc->sc_flags & AIC_DROP_MSGIN) == 0) { 1030 if (n >= AIC_MAX_MSG_LEN) { 1031 (void) bus_space_read_1(iot, ioh, SCSIDAT); 1032 sc->sc_flags |= AIC_DROP_MSGIN; 1033 aic_sched_msgout(sc, SEND_REJECT); 1034 } else { 1035 *sc->sc_imp++ = bus_space_read_1(iot, ioh, 1036 SCSIDAT); 1037 n++; 1038 /* 1039 * This testing is suboptimal, but most 1040 * messages will be of the one byte variety, so 1041 * it should not affect performance 1042 * significantly. 1043 */ 1044 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0])) 1045 break; 1046 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0])) 1047 break; 1048 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) && 1049 n == sc->sc_imess[1] + 2) 1050 break; 1051 } 1052 } else 1053 (void) bus_space_read_1(iot, ioh, SCSIDAT); 1054 1055 /* 1056 * If we reach this spot we're either: 1057 * a) in the middle of a multi-byte message, or 1058 * b) dropping bytes. 1059 */ 1060 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN); 1061 /* Ack the last byte read. */ 1062 (void) bus_space_read_1(iot, ioh, SCSIDAT); 1063 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); 1064 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0) 1065 ; 1066 } 1067 1068 AIC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1069 1070 /* We now have a complete message. Parse it. */ 1071 switch (sc->sc_state) { 1072 struct aic_acb *acb; 1073 struct aic_tinfo *ti; 1074 1075 case AIC_CONNECTED: 1076 AIC_ASSERT(sc->sc_nexus != NULL); 1077 acb = sc->sc_nexus; 1078 ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target]; 1079 1080 switch (sc->sc_imess[0]) { 1081 case MSG_CMDCOMPLETE: 1082 #if 0 1083 /* impossible dleft is unsigned */ 1084 if (sc->sc_dleft < 0) { 1085 periph = acb->xs->xs_periph; 1086 printf("%s: %ld extra bytes from %d:%d\n", 1087 device_xname(&sc->sc_dev), (long)-sc->sc_dleft, 1088 periph->periph_target, periph->periph_lun); 1089 sc->sc_dleft = 0; 1090 } 1091 #endif 1092 acb->xs->resid = acb->data_length = sc->sc_dleft; 1093 sc->sc_state = AIC_CMDCOMPLETE; 1094 break; 1095 1096 case MSG_PARITY_ERROR: 1097 /* Resend the last message. */ 1098 aic_sched_msgout(sc, sc->sc_lastmsg); 1099 break; 1100 1101 case MSG_MESSAGE_REJECT: 1102 AIC_MISC(("message rejected %02x ", sc->sc_lastmsg)); 1103 switch (sc->sc_lastmsg) { 1104 #if AIC_USE_SYNCHRONOUS + AIC_USE_WIDE 1105 case SEND_IDENTIFY: 1106 ti->flags &= ~(DO_SYNC | DO_WIDE); 1107 ti->period = ti->offset = 0; 1108 aic_setsync(sc, ti); 1109 ti->width = 0; 1110 break; 1111 #endif 1112 #if AIC_USE_SYNCHRONOUS 1113 case SEND_SDTR: 1114 ti->flags &= ~DO_SYNC; 1115 ti->period = ti->offset = 0; 1116 aic_setsync(sc, ti); 1117 aic_update_xfer_mode(sc, 1118 acb->xs->xs_periph->periph_target); 1119 break; 1120 #endif 1121 #if AIC_USE_WIDE 1122 case SEND_WDTR: 1123 ti->flags &= ~DO_WIDE; 1124 ti->width = 0; 1125 aic_update_xfer_mode(sc, 1126 acb->xs->xs_periph->periph_target); 1127 break; 1128 #endif 1129 case SEND_INIT_DET_ERR: 1130 aic_sched_msgout(sc, SEND_ABORT); 1131 break; 1132 } 1133 break; 1134 1135 case MSG_NOOP: 1136 break; 1137 1138 case MSG_DISCONNECT: 1139 ti->dconns++; 1140 sc->sc_state = AIC_DISCONNECT; 1141 break; 1142 1143 case MSG_SAVEDATAPOINTER: 1144 acb->data_addr = sc->sc_dp; 1145 acb->data_length = sc->sc_dleft; 1146 break; 1147 1148 case MSG_RESTOREPOINTERS: 1149 sc->sc_dp = acb->data_addr; 1150 sc->sc_dleft = acb->data_length; 1151 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 1152 sc->sc_cleft = acb->scsipi_cmd_length; 1153 break; 1154 1155 case MSG_EXTENDED: 1156 switch (sc->sc_imess[2]) { 1157 #if AIC_USE_SYNCHRONOUS 1158 case MSG_EXT_SDTR: 1159 if (sc->sc_imess[1] != 3) 1160 goto reject; 1161 ti->period = sc->sc_imess[3]; 1162 ti->offset = sc->sc_imess[4]; 1163 ti->flags &= ~DO_SYNC; 1164 if (ti->offset == 0) { 1165 } else if (ti->period < sc->sc_minsync || 1166 ti->period > sc->sc_maxsync || 1167 ti->offset > 8) { 1168 ti->period = ti->offset = 0; 1169 aic_sched_msgout(sc, SEND_SDTR); 1170 } else { 1171 aic_update_xfer_mode(sc, 1172 acb->xs->xs_periph->periph_target); 1173 } 1174 aic_setsync(sc, ti); 1175 break; 1176 #endif 1177 1178 #if AIC_USE_WIDE 1179 case MSG_EXT_WDTR: 1180 if (sc->sc_imess[1] != 2) 1181 goto reject; 1182 ti->width = sc->sc_imess[3]; 1183 ti->flags &= ~DO_WIDE; 1184 if (ti->width == 0) { 1185 } else if (ti->width > AIC_MAX_WIDTH) { 1186 ti->width = 0; 1187 aic_sched_msgout(sc, SEND_WDTR); 1188 } else { 1189 aic_update_xfer_mode(sc, 1190 acb->xs->xs_periph->periph_target); 1191 } 1192 break; 1193 #endif 1194 1195 default: 1196 printf("%s: unrecognized MESSAGE EXTENDED; " 1197 "sending REJECT\n", device_xname(&sc->sc_dev)); 1198 AIC_BREAK(); 1199 goto reject; 1200 } 1201 break; 1202 1203 default: 1204 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1205 device_xname(&sc->sc_dev)); 1206 AIC_BREAK(); 1207 reject: 1208 aic_sched_msgout(sc, SEND_REJECT); 1209 break; 1210 } 1211 break; 1212 1213 case AIC_RESELECTED: 1214 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { 1215 printf("%s: reselect without IDENTIFY; " 1216 "sending DEVICE RESET\n", device_xname(&sc->sc_dev)); 1217 AIC_BREAK(); 1218 goto reset; 1219 } 1220 1221 (void) aic_reselect(sc, sc->sc_imess[0]); 1222 break; 1223 1224 default: 1225 aprint_error_dev(&sc->sc_dev, "unexpected MESSAGE IN; sending DEVICE RESET\n"); 1226 AIC_BREAK(); 1227 reset: 1228 aic_sched_msgout(sc, SEND_DEV_RESET); 1229 break; 1230 1231 #ifdef notdef 1232 abort: 1233 aic_sched_msgout(sc, SEND_ABORT); 1234 break; 1235 #endif 1236 } 1237 1238 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN); 1239 /* Ack the last message byte. */ 1240 (void) bus_space_read_1(iot, ioh, SCSIDAT); 1241 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); 1242 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0) 1243 ; 1244 1245 /* Go get the next message, if any. */ 1246 goto nextmsg; 1247 1248 out: 1249 AIC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1250 } 1251 1252 /* 1253 * Send the highest priority, scheduled message. 1254 */ 1255 static void 1256 aic_msgout(struct aic_softc *sc) 1257 { 1258 bus_space_tag_t iot = sc->sc_iot; 1259 bus_space_handle_t ioh = sc->sc_ioh; 1260 #if AIC_USE_SYNCHRONOUS 1261 struct aic_tinfo *ti; 1262 #endif 1263 u_char sstat1; 1264 int n; 1265 1266 AIC_TRACE(("aic_msgout ")); 1267 1268 /* Reset the FIFO. */ 1269 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO); 1270 /* Enable REQ/ACK protocol. */ 1271 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN); 1272 1273 if (sc->sc_prevphase == PH_MSGOUT) { 1274 if (sc->sc_omp == sc->sc_omess) { 1275 /* 1276 * This is a retransmission. 1277 * 1278 * We get here if the target stayed in MESSAGE OUT 1279 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates 1280 * that all of the previously transmitted messages must 1281 * be sent again, in the same order. Therefore, we 1282 * requeue all the previously transmitted messages, and 1283 * start again from the top. Our simple priority 1284 * scheme keeps the messages in the right order. 1285 */ 1286 AIC_MISC(("retransmitting ")); 1287 sc->sc_msgpriq |= sc->sc_msgoutq; 1288 /* 1289 * Set ATN. If we're just sending a trivial 1-byte 1290 * message, we'll clear ATN later on anyway. 1291 */ 1292 bus_space_write_1(iot, ioh, SCSISIG, PH_MSGOUT | ATNO); 1293 } else { 1294 /* This is a continuation of the previous message. */ 1295 n = sc->sc_omp - sc->sc_omess; 1296 goto nextbyte; 1297 } 1298 } 1299 1300 /* No messages transmitted so far. */ 1301 sc->sc_msgoutq = 0; 1302 sc->sc_lastmsg = 0; 1303 1304 nextmsg: 1305 /* Pick up highest priority message. */ 1306 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq; 1307 sc->sc_msgpriq &= ~sc->sc_currmsg; 1308 sc->sc_msgoutq |= sc->sc_currmsg; 1309 1310 /* Build the outgoing message data. */ 1311 switch (sc->sc_currmsg) { 1312 case SEND_IDENTIFY: 1313 AIC_ASSERT(sc->sc_nexus != NULL); 1314 sc->sc_omess[0] = 1315 MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1); 1316 n = 1; 1317 break; 1318 1319 #if AIC_USE_SYNCHRONOUS 1320 case SEND_SDTR: 1321 AIC_ASSERT(sc->sc_nexus != NULL); 1322 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1323 sc->sc_omess[4] = MSG_EXTENDED; 1324 sc->sc_omess[3] = 3; 1325 sc->sc_omess[2] = MSG_EXT_SDTR; 1326 sc->sc_omess[1] = ti->period >> 2; 1327 sc->sc_omess[0] = ti->offset; 1328 n = 5; 1329 break; 1330 #endif 1331 1332 #if AIC_USE_WIDE 1333 case SEND_WDTR: 1334 AIC_ASSERT(sc->sc_nexus != NULL); 1335 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1336 sc->sc_omess[3] = MSG_EXTENDED; 1337 sc->sc_omess[2] = 2; 1338 sc->sc_omess[1] = MSG_EXT_WDTR; 1339 sc->sc_omess[0] = ti->width; 1340 n = 4; 1341 break; 1342 #endif 1343 1344 case SEND_DEV_RESET: 1345 sc->sc_flags |= AIC_ABORTING; 1346 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1347 n = 1; 1348 break; 1349 1350 case SEND_REJECT: 1351 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1352 n = 1; 1353 break; 1354 1355 case SEND_PARITY_ERROR: 1356 sc->sc_omess[0] = MSG_PARITY_ERROR; 1357 n = 1; 1358 break; 1359 1360 case SEND_INIT_DET_ERR: 1361 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1362 n = 1; 1363 break; 1364 1365 case SEND_ABORT: 1366 sc->sc_flags |= AIC_ABORTING; 1367 sc->sc_omess[0] = MSG_ABORT; 1368 n = 1; 1369 break; 1370 1371 default: 1372 aprint_error_dev(&sc->sc_dev, "unexpected MESSAGE OUT; sending NOOP\n"); 1373 AIC_BREAK(); 1374 sc->sc_omess[0] = MSG_NOOP; 1375 n = 1; 1376 break; 1377 } 1378 sc->sc_omp = &sc->sc_omess[n]; 1379 1380 nextbyte: 1381 /* Send message bytes. */ 1382 for (;;) { 1383 for (;;) { 1384 sstat1 = bus_space_read_1(iot, ioh, SSTAT1); 1385 if ((sstat1 & (REQINIT | PHASECHG | BUSFREE)) != 0) 1386 break; 1387 /* Wait for REQINIT. XXX Need timeout. */ 1388 } 1389 if ((sstat1 & (PHASECHG | BUSFREE)) != 0) { 1390 /* 1391 * Target left MESSAGE OUT, possibly to reject 1392 * our message. 1393 * 1394 * If this is the last message being sent, then we 1395 * deassert ATN, since either the target is going to 1396 * ignore this message, or it's going to ask for a 1397 * retransmission via MESSAGE PARITY ERROR (in which 1398 * case we reassert ATN anyway). 1399 */ 1400 if (sc->sc_msgpriq == 0) 1401 bus_space_write_1(iot, ioh, CLRSINT1, CLRATNO); 1402 goto out; 1403 } 1404 1405 /* Clear ATN before last byte if this is the last message. */ 1406 if (n == 1 && sc->sc_msgpriq == 0) 1407 bus_space_write_1(iot, ioh, CLRSINT1, CLRATNO); 1408 /* Send message byte. */ 1409 bus_space_write_1(iot, ioh, SCSIDAT, *--sc->sc_omp); 1410 --n; 1411 /* Keep track of the last message we've sent any bytes of. */ 1412 sc->sc_lastmsg = sc->sc_currmsg; 1413 /* Wait for ACK to be negated. XXX Need timeout. */ 1414 while ((bus_space_read_1(iot, ioh, SCSISIG) & ACKI) != 0) 1415 ; 1416 1417 if (n == 0) 1418 break; 1419 } 1420 1421 /* We get here only if the entire message has been transmitted. */ 1422 if (sc->sc_msgpriq != 0) { 1423 /* There are more outgoing messages. */ 1424 goto nextmsg; 1425 } 1426 1427 /* 1428 * The last message has been transmitted. We need to remember the last 1429 * message transmitted (in case the target switches to MESSAGE IN phase 1430 * and sends a MESSAGE REJECT), and the list of messages transmitted 1431 * this time around (in case the target stays in MESSAGE OUT phase to 1432 * request a retransmit). 1433 */ 1434 1435 out: 1436 /* Disable REQ/ACK protocol. */ 1437 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); 1438 } 1439 1440 /* aic_dataout_pio: perform a data transfer using the FIFO datapath in the 1441 * aic6360 1442 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1443 * and ACK deasserted (i.e. waiting for a data byte) 1444 * This new revision has been optimized (I tried) to make the common case fast, 1445 * and the rarer cases (as a result) somewhat more comlex 1446 */ 1447 static int 1448 aic_dataout_pio(struct aic_softc *sc, u_char *p, int n) 1449 { 1450 bus_space_tag_t iot = sc->sc_iot; 1451 bus_space_handle_t ioh = sc->sc_ioh; 1452 u_char dmastat = 0; 1453 int out = 0; 1454 #define DOUTAMOUNT 128 /* Full FIFO */ 1455 1456 AIC_MISC(("%02x%02x ", bus_space_read_1(iot, ioh, FIFOSTAT), 1457 bus_space_read_1(iot, ioh, SSTAT2))); 1458 1459 /* Clear host FIFO and counter. */ 1460 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO | WRITE); 1461 /* Enable FIFOs. */ 1462 bus_space_write_1(iot, ioh, DMACNTRL0, ENDMA | DWORDPIO | WRITE); 1463 bus_space_write_1(iot, ioh, SXFRCTL0, SCSIEN | DMAEN | CHEN); 1464 1465 /* Turn off ENREQINIT for now. */ 1466 bus_space_write_1(iot, ioh, SIMODE1, 1467 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENPHASECHG); 1468 1469 /* I have tried to make the main loop as tight as possible. This 1470 * means that some of the code following the loop is a bit more 1471 * complex than otherwise. 1472 */ 1473 while (n > 0) { 1474 for (;;) { 1475 dmastat = bus_space_read_1(iot, ioh, DMASTAT); 1476 if ((dmastat & (DFIFOEMP | INTSTAT)) != 0) 1477 break; 1478 } 1479 1480 if ((dmastat & INTSTAT) != 0) 1481 goto phasechange; 1482 1483 if (n >= DOUTAMOUNT) { 1484 n -= DOUTAMOUNT; 1485 out += DOUTAMOUNT; 1486 1487 #if AIC_USE_DWORDS 1488 bus_space_write_multi_4(iot, ioh, DMADATALONG, 1489 (u_int32_t *) p, DOUTAMOUNT >> 2); 1490 #else 1491 bus_space_write_multi_2(iot, ioh, DMADATA, 1492 (u_int16_t *) p, DOUTAMOUNT >> 1); 1493 #endif 1494 1495 p += DOUTAMOUNT; 1496 } else { 1497 int xfer; 1498 1499 xfer = n; 1500 AIC_MISC(("%d> ", xfer)); 1501 1502 n -= xfer; 1503 out += xfer; 1504 1505 #if AIC_USE_DWORDS 1506 if (xfer >= 12) { 1507 bus_space_write_multi_4(iot, ioh, DMADATALONG, 1508 (u_int32_t *) p, xfer >> 2); 1509 p += xfer & ~3; 1510 xfer &= 3; 1511 } 1512 #else 1513 if (xfer >= 8) { 1514 bus_space_write_multi_2(iot, ioh, DMADATA, 1515 (u_int16_t *) p, xfer >> 1); 1516 p += xfer & ~1; 1517 xfer &= 1; 1518 } 1519 #endif 1520 1521 if (xfer > 0) { 1522 bus_space_write_1(iot, ioh, DMACNTRL0, 1523 ENDMA | B8MODE | WRITE); 1524 bus_space_write_multi_1(iot, ioh, DMADATA, 1525 p, xfer); 1526 p += xfer; 1527 bus_space_write_1(iot, ioh, DMACNTRL0, 1528 ENDMA | DWORDPIO | WRITE); 1529 } 1530 } 1531 } 1532 1533 if (out == 0) { 1534 bus_space_write_1(iot, ioh, SXFRCTL1, BITBUCKET); 1535 for (;;) { 1536 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) 1537 != 0) 1538 break; 1539 } 1540 bus_space_write_1(iot, ioh, SXFRCTL1, 0); 1541 AIC_MISC(("extra data ")); 1542 } else { 1543 /* See the bytes off chip */ 1544 for (;;) { 1545 dmastat = bus_space_read_1(iot, ioh, DMASTAT); 1546 if ((dmastat & INTSTAT) != 0) 1547 goto phasechange; 1548 if ((dmastat & DFIFOEMP) != 0 && 1549 (bus_space_read_1(iot, ioh, SSTAT2) & SEMPTY) != 0) 1550 break; 1551 } 1552 } 1553 1554 phasechange: 1555 if ((dmastat & INTSTAT) != 0) { 1556 /* Some sort of phase change. */ 1557 int amount; 1558 1559 /* Stop transfers, do some accounting */ 1560 amount = bus_space_read_1(iot, ioh, FIFOSTAT) 1561 + (bus_space_read_1(iot, ioh, SSTAT2) & 15); 1562 if (amount > 0) { 1563 out -= amount; 1564 bus_space_write_1(iot, ioh, DMACNTRL0, 1565 RSTFIFO | WRITE); 1566 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRCH); 1567 AIC_MISC(("+%d ", amount)); 1568 } 1569 } 1570 1571 /* Turn on ENREQINIT again. */ 1572 bus_space_write_1(iot, ioh, SIMODE1, 1573 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | ENPHASECHG); 1574 1575 /* Stop the FIFO data path. */ 1576 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); 1577 bus_space_write_1(iot, ioh, DMACNTRL0, 0); 1578 1579 return out; 1580 } 1581 1582 /* aic_datain_pio: perform data transfers using the FIFO datapath in the 1583 * aic6360 1584 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1585 * and ACK deasserted (i.e. at least one byte is ready). 1586 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1587 * transferred. This, is OK for fast targets, but not so smart for slow 1588 * targets which don't disconnect or for huge transfers. 1589 */ 1590 static int 1591 aic_datain_pio(struct aic_softc *sc, u_char *p, int n) 1592 { 1593 bus_space_tag_t iot = sc->sc_iot; 1594 bus_space_handle_t ioh = sc->sc_ioh; 1595 u_char dmastat; 1596 int in = 0; 1597 #define DINAMOUNT 128 /* Full FIFO */ 1598 1599 AIC_MISC(("%02x%02x ", bus_space_read_1(iot, ioh, FIFOSTAT), 1600 bus_space_read_1(iot, ioh, SSTAT2))); 1601 1602 /* Clear host FIFO and counter. */ 1603 bus_space_write_1(iot, ioh, DMACNTRL0, RSTFIFO); 1604 /* Enable FIFOs. */ 1605 bus_space_write_1(iot, ioh, DMACNTRL0, ENDMA | DWORDPIO); 1606 bus_space_write_1(iot, ioh, SXFRCTL0, SCSIEN | DMAEN | CHEN); 1607 1608 /* Turn off ENREQINIT for now. */ 1609 bus_space_write_1(iot, ioh, SIMODE1, 1610 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENPHASECHG); 1611 1612 /* We leave this loop if one or more of the following is true: 1613 * a) phase != PH_DATAIN && FIFOs are empty 1614 * b) SCSIRSTI is set (a reset has occurred) or busfree is detected. 1615 */ 1616 while (n > 0) { 1617 /* Wait for fifo half full or phase mismatch */ 1618 for (;;) { 1619 dmastat = bus_space_read_1(iot, ioh, DMASTAT); 1620 if ((dmastat & (DFIFOFULL | INTSTAT)) != 0) 1621 break; 1622 } 1623 1624 if ((dmastat & DFIFOFULL) != 0) { 1625 n -= DINAMOUNT; 1626 in += DINAMOUNT; 1627 1628 #if AIC_USE_DWORDS 1629 bus_space_read_multi_4(iot, ioh, DMADATALONG, 1630 (u_int32_t *) p, DINAMOUNT >> 2); 1631 #else 1632 bus_space_read_multi_2(iot, ioh, DMADATA, 1633 (u_int16_t *) p, DINAMOUNT >> 1); 1634 #endif 1635 1636 p += DINAMOUNT; 1637 } else { 1638 int xfer; 1639 1640 xfer = min(bus_space_read_1(iot, ioh, FIFOSTAT), n); 1641 AIC_MISC((">%d ", xfer)); 1642 1643 n -= xfer; 1644 in += xfer; 1645 1646 #if AIC_USE_DWORDS 1647 if (xfer >= 12) { 1648 bus_space_read_multi_4(iot, ioh, DMADATALONG, 1649 (u_int32_t *) p, xfer >> 2); 1650 p += xfer & ~3; 1651 xfer &= 3; 1652 } 1653 #else 1654 if (xfer >= 8) { 1655 bus_space_read_multi_2(iot, ioh, DMADATA, 1656 (u_int16_t *) p, xfer >> 1); 1657 p += xfer & ~1; 1658 xfer &= 1; 1659 } 1660 #endif 1661 1662 if (xfer > 0) { 1663 bus_space_write_1(iot, ioh, DMACNTRL0, 1664 ENDMA | B8MODE); 1665 bus_space_read_multi_1(iot, ioh, DMADATA, 1666 p, xfer); 1667 p += xfer; 1668 bus_space_write_1(iot, ioh, DMACNTRL0, 1669 ENDMA | DWORDPIO); 1670 } 1671 } 1672 1673 if ((dmastat & INTSTAT) != 0) 1674 goto phasechange; 1675 } 1676 1677 /* Some SCSI-devices are rude enough to transfer more data than what 1678 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 1679 * requested 512. Test for progress, i.e. real transfers. If no real 1680 * transfers have been performed (n is probably already zero) and the 1681 * FIFO is not empty, waste some bytes.... 1682 */ 1683 if (in == 0) { 1684 bus_space_write_1(iot, ioh, SXFRCTL1, BITBUCKET); 1685 for (;;) { 1686 if ((bus_space_read_1(iot, ioh, DMASTAT) & INTSTAT) 1687 != 0) 1688 break; 1689 } 1690 bus_space_write_1(iot, ioh, SXFRCTL1, 0); 1691 AIC_MISC(("extra data ")); 1692 } 1693 1694 phasechange: 1695 /* Turn on ENREQINIT again. */ 1696 bus_space_write_1(iot, ioh, SIMODE1, 1697 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | ENPHASECHG); 1698 1699 /* Stop the FIFO data path. */ 1700 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); 1701 bus_space_write_1(iot, ioh, DMACNTRL0, 0); 1702 1703 return in; 1704 } 1705 1706 /* 1707 * This is the workhorse routine of the driver. 1708 * Deficiencies (for now): 1709 * 1) always uses programmed I/O 1710 */ 1711 int 1712 aicintr(void *arg) 1713 { 1714 struct aic_softc *sc = arg; 1715 bus_space_tag_t iot = sc->sc_iot; 1716 bus_space_handle_t ioh = sc->sc_ioh; 1717 u_char sstat0, sstat1; 1718 struct aic_acb *acb; 1719 struct scsipi_periph *periph; 1720 struct aic_tinfo *ti; 1721 int n; 1722 1723 if (! device_is_active(&sc->sc_dev)) 1724 return (0); 1725 1726 /* 1727 * Clear INTEN. We enable it again before returning. This makes the 1728 * interrupt esssentially level-triggered. 1729 */ 1730 bus_space_write_1(iot, ioh, DMACNTRL0, 0); 1731 1732 AIC_TRACE(("aicintr ")); 1733 1734 loop: 1735 /* 1736 * First check for abnormal conditions, such as reset. 1737 */ 1738 sstat1 = bus_space_read_1(iot, ioh, SSTAT1); 1739 AIC_MISC(("sstat1:0x%02x ", sstat1)); 1740 1741 if ((sstat1 & SCSIRSTI) != 0) { 1742 printf("%s: SCSI bus reset\n", device_xname(&sc->sc_dev)); 1743 goto reset; 1744 } 1745 1746 /* 1747 * Check for less serious errors. 1748 */ 1749 if ((sstat1 & SCSIPERR) != 0) { 1750 printf("%s: SCSI bus parity error\n", device_xname(&sc->sc_dev)); 1751 bus_space_write_1(iot, ioh, CLRSINT1, CLRSCSIPERR); 1752 if (sc->sc_prevphase == PH_MSGIN) { 1753 sc->sc_flags |= AIC_DROP_MSGIN; 1754 aic_sched_msgout(sc, SEND_PARITY_ERROR); 1755 } else 1756 aic_sched_msgout(sc, SEND_INIT_DET_ERR); 1757 } 1758 1759 /* 1760 * If we're not already busy doing something test for the following 1761 * conditions: 1762 * 1) We have been reselected by something 1763 * 2) We have selected something successfully 1764 * 3) Our selection process has timed out 1765 * 4) This is really a bus free interrupt just to get a new command 1766 * going? 1767 * 5) Spurious interrupt? 1768 */ 1769 switch (sc->sc_state) { 1770 case AIC_IDLE: 1771 case AIC_SELECTING: 1772 sstat0 = bus_space_read_1(iot, ioh, SSTAT0); 1773 AIC_MISC(("sstat0:0x%02x ", sstat0)); 1774 1775 if ((sstat0 & TARGET) != 0) { 1776 /* 1777 * We don't currently support target mode. 1778 */ 1779 printf("%s: target mode selected; going to BUS FREE\n", 1780 device_xname(&sc->sc_dev)); 1781 bus_space_write_1(iot, ioh, SCSISIG, 0); 1782 1783 goto sched; 1784 } else if ((sstat0 & SELDI) != 0) { 1785 AIC_MISC(("reselected ")); 1786 1787 /* 1788 * If we're trying to select a target ourselves, 1789 * push our command back into the ready list. 1790 */ 1791 if (sc->sc_state == AIC_SELECTING) { 1792 AIC_MISC(("backoff selector ")); 1793 AIC_ASSERT(sc->sc_nexus != NULL); 1794 acb = sc->sc_nexus; 1795 sc->sc_nexus = NULL; 1796 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1797 } 1798 1799 /* Save reselection ID. */ 1800 sc->sc_selid = bus_space_read_1(iot, ioh, SELID); 1801 1802 sc->sc_state = AIC_RESELECTED; 1803 } else if ((sstat0 & SELDO) != 0) { 1804 AIC_MISC(("selected ")); 1805 1806 /* We have selected a target. Things to do: 1807 * a) Determine what message(s) to send. 1808 * b) Verify that we're still selecting the target. 1809 * c) Mark device as busy. 1810 */ 1811 if (sc->sc_state != AIC_SELECTING) { 1812 printf("%s: selection out while idle; " 1813 "resetting\n", device_xname(&sc->sc_dev)); 1814 AIC_BREAK(); 1815 goto reset; 1816 } 1817 AIC_ASSERT(sc->sc_nexus != NULL); 1818 acb = sc->sc_nexus; 1819 periph = acb->xs->xs_periph; 1820 ti = &sc->sc_tinfo[periph->periph_target]; 1821 1822 sc->sc_msgpriq = SEND_IDENTIFY; 1823 if (acb->flags & ACB_RESET) 1824 sc->sc_msgpriq |= SEND_DEV_RESET; 1825 else if (acb->flags & ACB_ABORT) 1826 sc->sc_msgpriq |= SEND_ABORT; 1827 else { 1828 #if AIC_USE_SYNCHRONOUS 1829 if ((ti->flags & DO_SYNC) != 0) 1830 sc->sc_msgpriq |= SEND_SDTR; 1831 #endif 1832 #if AIC_USE_WIDE 1833 if ((ti->flags & DO_WIDE) != 0) 1834 sc->sc_msgpriq |= SEND_WDTR; 1835 #endif 1836 } 1837 1838 acb->flags |= ACB_NEXUS; 1839 ti->lubusy |= (1 << periph->periph_lun); 1840 1841 /* Do an implicit RESTORE POINTERS. */ 1842 sc->sc_dp = acb->data_addr; 1843 sc->sc_dleft = acb->data_length; 1844 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 1845 sc->sc_cleft = acb->scsipi_cmd_length; 1846 1847 /* On our first connection, schedule a timeout. */ 1848 if ((acb->xs->xs_control & XS_CTL_POLL) == 0) 1849 callout_reset(&acb->xs->xs_callout, 1850 mstohz(acb->timeout), aic_timeout, acb); 1851 1852 sc->sc_state = AIC_CONNECTED; 1853 } else if ((sstat1 & SELTO) != 0) { 1854 AIC_MISC(("selection timeout ")); 1855 1856 if (sc->sc_state != AIC_SELECTING) { 1857 printf("%s: selection timeout while idle; " 1858 "resetting\n", device_xname(&sc->sc_dev)); 1859 AIC_BREAK(); 1860 goto reset; 1861 } 1862 AIC_ASSERT(sc->sc_nexus != NULL); 1863 acb = sc->sc_nexus; 1864 1865 bus_space_write_1(iot, ioh, SXFRCTL1, 0); 1866 bus_space_write_1(iot, ioh, SCSISEQ, ENRESELI); 1867 bus_space_write_1(iot, ioh, CLRSINT1, CLRSELTIMO); 1868 delay(250); 1869 1870 acb->xs->error = XS_SELTIMEOUT; 1871 goto finish; 1872 } else { 1873 if (sc->sc_state != AIC_IDLE) { 1874 printf("%s: BUS FREE while not idle; " 1875 "state=%d\n", 1876 device_xname(&sc->sc_dev), sc->sc_state); 1877 AIC_BREAK(); 1878 goto out; 1879 } 1880 1881 goto sched; 1882 } 1883 1884 /* 1885 * Turn off selection stuff, and prepare to catch bus free 1886 * interrupts, parity errors, and phase changes. 1887 */ 1888 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | CLRSTCNT | CLRCH); 1889 bus_space_write_1(iot, ioh, SXFRCTL1, 0); 1890 bus_space_write_1(iot, ioh, SCSISEQ, ENAUTOATNP); 1891 bus_space_write_1(iot, ioh, CLRSINT0, CLRSELDI | CLRSELDO); 1892 bus_space_write_1(iot, ioh, CLRSINT1, 1893 CLRBUSFREE | CLRPHASECHG); 1894 bus_space_write_1(iot, ioh, SIMODE0, 0); 1895 bus_space_write_1(iot, ioh, SIMODE1, 1896 ENSCSIRST | ENSCSIPERR | ENBUSFREE | ENREQINIT | 1897 ENPHASECHG); 1898 1899 sc->sc_flags = 0; 1900 sc->sc_prevphase = PH_INVALID; 1901 goto dophase; 1902 } 1903 1904 if ((sstat1 & BUSFREE) != 0) { 1905 /* We've gone to BUS FREE phase. */ 1906 bus_space_write_1(iot, ioh, CLRSINT1, 1907 CLRBUSFREE | CLRPHASECHG); 1908 1909 switch (sc->sc_state) { 1910 case AIC_RESELECTED: 1911 goto sched; 1912 1913 case AIC_CONNECTED: 1914 AIC_ASSERT(sc->sc_nexus != NULL); 1915 acb = sc->sc_nexus; 1916 1917 #if AIC_USE_SYNCHRONOUS + AIC_USE_WIDE 1918 if (sc->sc_prevphase == PH_MSGOUT) { 1919 /* 1920 * If the target went to BUS FREE phase during 1921 * or immediately after sending a SDTR or WDTR 1922 * message, disable negotiation. 1923 */ 1924 periph = acb->xs->xs_periph; 1925 ti = &sc->sc_tinfo[periph->periph_target]; 1926 switch (sc->sc_lastmsg) { 1927 #if AIC_USE_SYNCHRONOUS 1928 case SEND_SDTR: 1929 ti->flags &= ~DO_SYNC; 1930 ti->period = ti->offset = 0; 1931 break; 1932 #endif 1933 #if AIC_USE_WIDE 1934 case SEND_WDTR: 1935 ti->flags &= ~DO_WIDE; 1936 ti->width = 0; 1937 break; 1938 #endif 1939 } 1940 } 1941 #endif 1942 1943 if ((sc->sc_flags & AIC_ABORTING) == 0) { 1944 /* 1945 * Section 5.1.1 of the SCSI 2 spec suggests 1946 * issuing a REQUEST SENSE following an 1947 * unexpected disconnect. Some devices go into 1948 * a contingent allegiance condition when 1949 * disconnecting, and this is necessary to 1950 * clean up their state. 1951 */ 1952 aprint_error_dev(&sc->sc_dev, "unexpected disconnect; " 1953 "sending REQUEST SENSE\n"); 1954 AIC_BREAK(); 1955 aic_sense(sc, acb); 1956 goto out; 1957 } 1958 1959 acb->xs->error = XS_DRIVER_STUFFUP; 1960 goto finish; 1961 1962 case AIC_DISCONNECT: 1963 AIC_ASSERT(sc->sc_nexus != NULL); 1964 acb = sc->sc_nexus; 1965 #if 1 /* XXXX */ 1966 acb->data_addr = sc->sc_dp; 1967 acb->data_length = sc->sc_dleft; 1968 #endif 1969 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain); 1970 sc->sc_nexus = NULL; 1971 goto sched; 1972 1973 case AIC_CMDCOMPLETE: 1974 AIC_ASSERT(sc->sc_nexus != NULL); 1975 acb = sc->sc_nexus; 1976 goto finish; 1977 } 1978 } 1979 1980 bus_space_write_1(iot, ioh, CLRSINT1, CLRPHASECHG); 1981 1982 dophase: 1983 if ((sstat1 & REQINIT) == 0) { 1984 /* Wait for REQINIT. */ 1985 goto out; 1986 } 1987 1988 sc->sc_phase = bus_space_read_1(iot, ioh, SCSISIG) & PH_MASK; 1989 bus_space_write_1(iot, ioh, SCSISIG, sc->sc_phase); 1990 1991 switch (sc->sc_phase) { 1992 case PH_MSGOUT: 1993 if (sc->sc_state != AIC_CONNECTED && 1994 sc->sc_state != AIC_RESELECTED) 1995 break; 1996 aic_msgout(sc); 1997 sc->sc_prevphase = PH_MSGOUT; 1998 goto loop; 1999 2000 case PH_MSGIN: 2001 if (sc->sc_state != AIC_CONNECTED && 2002 sc->sc_state != AIC_RESELECTED) 2003 break; 2004 aic_msgin(sc); 2005 sc->sc_prevphase = PH_MSGIN; 2006 goto loop; 2007 2008 case PH_CMD: 2009 if (sc->sc_state != AIC_CONNECTED) 2010 break; 2011 #if AIC_DEBUG 2012 if ((aic_debug & AIC_SHOWMISC) != 0) { 2013 AIC_ASSERT(sc->sc_nexus != NULL); 2014 acb = sc->sc_nexus; 2015 printf("cmd=0x%02x+%d ", 2016 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length-1); 2017 } 2018 #endif 2019 n = aic_dataout_pio(sc, sc->sc_cp, sc->sc_cleft); 2020 sc->sc_cp += n; 2021 sc->sc_cleft -= n; 2022 sc->sc_prevphase = PH_CMD; 2023 goto loop; 2024 2025 case PH_DATAOUT: 2026 if (sc->sc_state != AIC_CONNECTED) 2027 break; 2028 AIC_MISC(("dataout %ld ", (long)sc->sc_dleft)); 2029 n = aic_dataout_pio(sc, sc->sc_dp, sc->sc_dleft); 2030 sc->sc_dp += n; 2031 sc->sc_dleft -= n; 2032 sc->sc_prevphase = PH_DATAOUT; 2033 goto loop; 2034 2035 case PH_DATAIN: 2036 if (sc->sc_state != AIC_CONNECTED) 2037 break; 2038 AIC_MISC(("datain %ld ", (long)sc->sc_dleft)); 2039 n = aic_datain_pio(sc, sc->sc_dp, sc->sc_dleft); 2040 sc->sc_dp += n; 2041 sc->sc_dleft -= n; 2042 sc->sc_prevphase = PH_DATAIN; 2043 goto loop; 2044 2045 case PH_STAT: 2046 if (sc->sc_state != AIC_CONNECTED) 2047 break; 2048 AIC_ASSERT(sc->sc_nexus != NULL); 2049 acb = sc->sc_nexus; 2050 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN | SPIOEN); 2051 acb->target_stat = bus_space_read_1(iot, ioh, SCSIDAT); 2052 bus_space_write_1(iot, ioh, SXFRCTL0, CHEN); 2053 AIC_MISC(("target_stat=0x%02x ", acb->target_stat)); 2054 sc->sc_prevphase = PH_STAT; 2055 goto loop; 2056 } 2057 2058 aprint_error_dev(&sc->sc_dev, "unexpected bus phase; resetting\n"); 2059 AIC_BREAK(); 2060 reset: 2061 aic_init(sc, 1); 2062 return 1; 2063 2064 finish: 2065 callout_stop(&acb->xs->xs_callout); 2066 aic_done(sc, acb); 2067 goto out; 2068 2069 sched: 2070 sc->sc_state = AIC_IDLE; 2071 aic_sched(sc); 2072 goto out; 2073 2074 out: 2075 bus_space_write_1(iot, ioh, DMACNTRL0, INTEN); 2076 return 1; 2077 } 2078 2079 static void 2080 aic_abort(struct aic_softc *sc, struct aic_acb *acb) 2081 { 2082 2083 /* 2 secs for the abort */ 2084 acb->timeout = AIC_ABORT_TIMEOUT; 2085 acb->flags |= ACB_ABORT; 2086 2087 if (acb == sc->sc_nexus) { 2088 /* 2089 * If we're still selecting, the message will be scheduled 2090 * after selection is complete. 2091 */ 2092 if (sc->sc_state == AIC_CONNECTED) 2093 aic_sched_msgout(sc, SEND_ABORT); 2094 } else { 2095 aic_dequeue(sc, acb); 2096 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 2097 if (sc->sc_state == AIC_IDLE) 2098 aic_sched(sc); 2099 } 2100 } 2101 2102 static void 2103 aic_timeout(void *arg) 2104 { 2105 struct aic_acb *acb = arg; 2106 struct scsipi_xfer *xs = acb->xs; 2107 struct scsipi_periph *periph = xs->xs_periph; 2108 struct aic_softc *sc = 2109 (void *)periph->periph_channel->chan_adapter->adapt_dev; 2110 int s; 2111 2112 scsipi_printaddr(periph); 2113 printf("timed out"); 2114 2115 s = splbio(); 2116 2117 if (acb->flags & ACB_ABORT) { 2118 /* abort timed out */ 2119 printf(" AGAIN\n"); 2120 /* XXX Must reset! */ 2121 } else { 2122 /* abort the operation that has timed out */ 2123 printf("\n"); 2124 acb->xs->error = XS_TIMEOUT; 2125 aic_abort(sc, acb); 2126 } 2127 2128 splx(s); 2129 } 2130 2131 #ifdef AIC_DEBUG 2132 /* 2133 * The following functions are mostly used for debugging purposes, either 2134 * directly called from the driver or from the kernel debugger. 2135 */ 2136 2137 static void 2138 aic_show_scsi_cmd(struct aic_acb *acb) 2139 { 2140 u_char *b = (u_char *)&acb->scsipi_cmd; 2141 struct scsipi_periph *periph = acb->xs->xs_periph; 2142 int i; 2143 2144 scsipi_printaddr(periph); 2145 if ((acb->xs->xs_control & XS_CTL_RESET) == 0) { 2146 for (i = 0; i < acb->scsipi_cmd_length; i++) { 2147 if (i) 2148 printf(","); 2149 printf("%x", b[i]); 2150 } 2151 printf("\n"); 2152 } else 2153 printf("RESET\n"); 2154 } 2155 2156 static void 2157 aic_print_acb(struct aic_acb *acb) 2158 { 2159 2160 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags); 2161 printf(" dp=%p dleft=%d target_stat=%x\n", 2162 acb->data_addr, acb->data_length, acb->target_stat); 2163 aic_show_scsi_cmd(acb); 2164 } 2165 2166 void 2167 aic_print_active_acb(void) 2168 { 2169 extern struct cfdriver aic_cd; 2170 struct aic_acb *acb; 2171 struct aic_softc *sc = device_lookup_private(&aic_cd, 0); 2172 2173 printf("ready list:\n"); 2174 for (acb = sc->ready_list.tqh_first; acb != NULL; 2175 acb = acb->chain.tqe_next) 2176 aic_print_acb(acb); 2177 printf("nexus:\n"); 2178 if (sc->sc_nexus != NULL) 2179 aic_print_acb(sc->sc_nexus); 2180 printf("nexus list:\n"); 2181 for (acb = sc->nexus_list.tqh_first; acb != NULL; 2182 acb = acb->chain.tqe_next) 2183 aic_print_acb(acb); 2184 } 2185 2186 void 2187 aic_dump6360(struct aic_softc *sc) 2188 { 2189 bus_space_tag_t iot = sc->sc_iot; 2190 bus_space_handle_t ioh = sc->sc_ioh; 2191 2192 printf("aic6360: SCSISEQ=%x SXFRCTL0=%x SXFRCTL1=%x SCSISIG=%x\n", 2193 bus_space_read_1(iot, ioh, SCSISEQ), 2194 bus_space_read_1(iot, ioh, SXFRCTL0), 2195 bus_space_read_1(iot, ioh, SXFRCTL1), 2196 bus_space_read_1(iot, ioh, SCSISIG)); 2197 printf(" SSTAT0=%x SSTAT1=%x SSTAT2=%x SSTAT3=%x SSTAT4=%x\n", 2198 bus_space_read_1(iot, ioh, SSTAT0), 2199 bus_space_read_1(iot, ioh, SSTAT1), 2200 bus_space_read_1(iot, ioh, SSTAT2), 2201 bus_space_read_1(iot, ioh, SSTAT3), 2202 bus_space_read_1(iot, ioh, SSTAT4)); 2203 printf(" SIMODE0=%x SIMODE1=%x DMACNTRL0=%x DMACNTRL1=%x " 2204 "DMASTAT=%x\n", 2205 bus_space_read_1(iot, ioh, SIMODE0), 2206 bus_space_read_1(iot, ioh, SIMODE1), 2207 bus_space_read_1(iot, ioh, DMACNTRL0), 2208 bus_space_read_1(iot, ioh, DMACNTRL1), 2209 bus_space_read_1(iot, ioh, DMASTAT)); 2210 printf(" FIFOSTAT=%d SCSIBUS=0x%x\n", 2211 bus_space_read_1(iot, ioh, FIFOSTAT), 2212 bus_space_read_1(iot, ioh, SCSIBUS)); 2213 } 2214 2215 void 2216 aic_dump_driver(struct aic_softc *sc) 2217 { 2218 struct aic_tinfo *ti; 2219 int i; 2220 2221 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase); 2222 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x " 2223 "currmsg=%x\n", 2224 sc->sc_state, sc->sc_imess[0], 2225 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg); 2226 for (i = 0; i < 7; i++) { 2227 ti = &sc->sc_tinfo[i]; 2228 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2229 i, ti->cmds, ti->dconns, ti->touts); 2230 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2231 } 2232 } 2233 #endif
Cache object: 7ff0e866be5ae1f190a39819439589a2
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