The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/aic6915var.h

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    1 /*      $NetBSD: aic6915var.h,v 1.1 2001/06/18 22:05:36 thorpej Exp $   */
    2 
    3 /*-
    4  * Copyright (c) 2001 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Jason R. Thorpe.
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *      This product includes software developed by the NetBSD
   21  *      Foundation, Inc. and its contributors.
   22  * 4. Neither the name of The NetBSD Foundation nor the names of its
   23  *    contributors may be used to endorse or promote products derived
   24  *    from this software without specific prior written permission.
   25  *
   26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   36  * POSSIBILITY OF SUCH DAMAGE.
   37  */
   38 
   39 #ifndef _DEV_IC_AIC6915VAR_H_
   40 #define _DEV_IC_AIC6915VAR_H_
   41 
   42 #include <sys/callout.h>
   43 
   44 /*
   45  * Data structure definitions for the Adaptec AIC-6915 (``Starfire'')
   46  * PCI 10/100 Ethernet controller driver.
   47  */
   48 
   49 /*
   50  * Transmit descriptor list size.
   51  */
   52 #define SF_NTXDESC              256
   53 #define SF_NTXDESC_MASK         (SF_NTXDESC - 1)
   54 #define SF_NEXTTX(x)            ((x + 1) & SF_NTXDESC_MASK)
   55 
   56 /*
   57  * Transmit completion queue size.  1024 is a hardware requirement.
   58  */
   59 #define SF_NTCD                 1024
   60 #define SF_NTCD_MASK            (SF_NTCD - 1)
   61 #define SF_NEXTTCD(x)           ((x + 1) & SF_NTCD_MASK)
   62 
   63 /*
   64  * Receive descriptor list size.
   65  */
   66 #define SF_NRXDESC              256
   67 #define SF_NRXDESC_MASK         (SF_NRXDESC - 1)
   68 #define SF_NEXTRX(x)            ((x + 1) & SF_NRXDESC_MASK)
   69 
   70 /*
   71  * Receive completion queue size.  1024 is a hardware requirement.
   72  */
   73 #define SF_NRCD                 1024
   74 #define SF_NRCD_MASK            (SF_NRCD - 1)
   75 #define SF_NEXTRCD(x)           ((x + 1) & SF_NRCD_MASK)
   76 
   77 /*
   78  * Control structures are DMA to the Starfire chip.  We allocate them in
   79  * a single clump that maps to a single DMA segment to make several things
   80  * easier.
   81  */
   82 struct sf_control_data {
   83         /*
   84          * The transmit descriptors.
   85          */
   86         struct sf_txdesc0 scd_txdescs[SF_NTXDESC];
   87 
   88         /*
   89          * The transmit completion queue entires.
   90          */
   91         struct sf_tcd scd_txcomp[SF_NTCD];
   92 
   93         /*
   94          * The receive buffer descriptors.
   95          */
   96         struct sf_rbd32 scd_rxbufdescs[SF_NRXDESC];
   97 
   98         /*
   99          * The receive completion queue entries.
  100          */
  101         struct sf_rcd_full scd_rxcomp[SF_NRCD];
  102 };
  103 
  104 #define SF_CDOFF(x)             offsetof(struct sf_control_data, x)
  105 #define SF_CDTXDOFF(x)          SF_CDOFF(scd_txdescs[(x)])
  106 #define SF_CDTXCOFF(x)          SF_CDOFF(scd_txcomp[(x)])
  107 #define SF_CDRXDOFF(x)          SF_CDOFF(scd_rxbufdescs[(x)])
  108 #define SF_CDRXCOFF(x)          SF_CDOFF(scd_rxcomp[(x)])
  109 
  110 /*
  111  * Software state for transmit and receive descriptors.
  112  */
  113 struct sf_descsoft {
  114         struct mbuf *ds_mbuf;           /* head of mbuf chain */
  115         bus_dmamap_t ds_dmamap;         /* our DMA map */
  116 };
  117 
  118 /*
  119  * Software state per device.
  120  */
  121 struct sf_softc {
  122         struct device sc_dev;           /* generic device information */
  123         bus_space_tag_t sc_st;          /* bus space tag */
  124         bus_space_handle_t sc_sh;       /* bus space handle */
  125         bus_space_handle_t sc_sh_func;  /* sub-handle for func regs */
  126         bus_dma_tag_t sc_dmat;          /* bus DMA tag */
  127         struct ethercom sc_ethercom;    /* ethernet common data */
  128         void *sc_sdhook;                /* shutdown hook */
  129         int sc_iomapped;                /* are we I/O mapped? */
  130 
  131         struct mii_data sc_mii;         /* MII/media information */
  132         struct callout sc_tick_callout; /* MII callout */
  133 
  134         bus_dmamap_t sc_cddmamap;       /* control data DMA map */
  135 #define sc_cddma        sc_cddmamap->dm_segs[0].ds_addr
  136 
  137         /*
  138          * Software state for transmit and receive descriptors.
  139          */
  140         struct sf_descsoft sc_txsoft[SF_NTXDESC];
  141         struct sf_descsoft sc_rxsoft[SF_NRXDESC];
  142 
  143         /*
  144          * Control data structures.
  145          */
  146         struct sf_control_data *sc_control_data;
  147 #define sc_txdescs      sc_control_data->scd_txdescs
  148 #define sc_txcomp       sc_control_data->scd_txcomp
  149 #define sc_rxbufdescs   sc_control_data->scd_rxbufdescs
  150 #define sc_rxcomp       sc_control_data->scd_rxcomp
  151 
  152         int     sc_txpending;           /* number of Tx requests pending */
  153 
  154         uint32_t sc_InterruptEn;        /* prototype InterruptEn register */
  155 
  156         uint32_t sc_TransmitFrameCSR;   /* prototype TransmitFrameCSR reg */
  157         uint32_t sc_TxDescQueueCtrl;    /* prototype TxDescQueueCtrl reg */
  158         int     sc_txthresh;            /* current Tx threshold */
  159 
  160         uint32_t sc_MacConfig1;         /* prototype MacConfig1 register */
  161 
  162         uint32_t sc_RxAddressFilteringCtl;
  163 };
  164 
  165 #define SF_CDTXDADDR(sc, x)     ((sc)->sc_cddma + SF_CDTXDOFF((x)))
  166 #define SF_CDTXCADDR(sc, x)     ((sc)->sc_cddma + SF_CDTXCOFF((x)))
  167 #define SF_CDRXDADDR(sc, x)     ((sc)->sc_cddma + SF_CDRXDOFF((x)))
  168 #define SF_CDRXCADDR(sc, x)     ((sc)->sc_cddma + SF_CDRXCOFF((x)))
  169 
  170 #define SF_CDTXDSYNC(sc, x, ops)                                        \
  171         bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,               \
  172             SF_CDTXDOFF((x)), sizeof(struct sf_txdesc0), (ops))
  173 
  174 #define SF_CDTXCSYNC(sc, x, ops)                                        \
  175         bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,               \
  176             SF_CDTXCOFF((x)), sizeof(struct sf_tcd), (ops))
  177 
  178 #define SF_CDRXDSYNC(sc, x, ops)                                        \
  179         bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,               \
  180             SF_CDRXDOFF((x)), sizeof(struct sf_rbd32), (ops))
  181 
  182 #define SF_CDRXCSYNC(sc, x, ops)                                        \
  183         bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_cddmamap,               \
  184             SF_CDRXCOFF((x)), sizeof(struct sf_rcd_full), (ops))
  185 
  186 #define SF_INIT_RXDESC(sc, x)                                           \
  187 do {                                                                    \
  188         struct sf_descsoft *__ds = &sc->sc_rxsoft[(x)];                 \
  189                                                                         \
  190         (sc)->sc_rxbufdescs[(x)].rbd32_addr =                           \
  191             __ds->ds_dmamap->dm_segs[0].ds_addr | RBD_V;                \
  192         SF_CDRXDSYNC((sc), (x), BUS_DMASYNC_PREWRITE);                  \
  193 } while (/*CONSTCOND*/0)
  194 
  195 #ifdef _KERNEL
  196 void    sf_attach(struct sf_softc *);
  197 int     sf_intr(void *);
  198 #endif /* _KERNEL */
  199 
  200 #endif /* _DEV_IC_AIC6915VAR_H_ */

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