FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/al2210reg.h
1 /* $NetBSD: al2210reg.h,v 1.4 2006/03/08 08:26:50 dyoung Exp $ */
2
3 /*
4 * Copyright (c) 2004 David Young. All rights reserved.
5 *
6 * This code was written by David Young.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the name of the author nor the names of any co-contributors
17 * may be used to endorse or promote products derived from this software
18 * without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
24 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
26 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 * OF SUCH DAMAGE.
32 */
33
34 #ifndef _DEV_IC_AL2210REG_H_
35 #define _DEV_IC_AL2210REG_H_
36
37 /*
38 * Register definitions for the Airoha AL2210 2.4GHz 802.11b
39 * transceiver.
40 */
41
42 /* NOTE WELL: These register definitions, in spite of being derived
43 * from an "official" Airoha AL2210 datasheet, contain a lot of
44 * "magic." Comparing with the magic in this header file with a
45 * reference driver that also contains AL2210 magic, the magic does
46 * not match!
47 */
48
49 /*
50 * Serial bus format for Airoha AL2210 2.4GHz transceiver.
51 */
52 #define AL2210_TWI_DATA_MASK __BITS(23, 4)
53 #define AL2210_TWI_ADDR_MASK __BITS(3, 0)
54
55 /*
56 * Registers for Airoha AL2210.
57 */
58
59 /* The synthesizer magic should be decipherable, but I'm not going
60 * to waste my time right now.
61 */
62 #define AL2210_CHANNEL 0x0
63 #define AL2210_CHANNEL_B_MASK __BITS(10, 5) /* Counter B */
64 #define AL2210_CHANNEL_B_2412MHZ 0x396
65 #define AL2210_CHANNEL_B_2417MHZ 0x396
66 #define AL2210_CHANNEL_B_2422MHZ 0x396
67 #define AL2210_CHANNEL_B_2427MHZ 0x396
68 #define AL2210_CHANNEL_B_2432MHZ 0x398
69 #define AL2210_CHANNEL_B_2437MHZ 0x398
70 #define AL2210_CHANNEL_B_2442MHZ 0x398
71 #define AL2210_CHANNEL_B_2447MHZ 0x398
72 #define AL2210_CHANNEL_B_2452MHZ 0x398
73 #define AL2210_CHANNEL_B_2457MHZ 0x398
74 #define AL2210_CHANNEL_B_2462MHZ 0x398
75 #define AL2210_CHANNEL_B_2467MHZ 0x39a
76 #define AL2210_CHANNEL_B_2472MHZ 0x39a
77 #define AL2210_CHANNEL_B_2484MHZ 0x39b
78 #define AL2210_CHANNEL_A_MASK __BITS(4, 0) /* Counter A */
79 #define AL2210_CHANNEL_A_2412MHZ 0x0c
80 #define AL2210_CHANNEL_A_2417MHZ 0x11
81 #define AL2210_CHANNEL_A_2422MHZ 0x16
82 #define AL2210_CHANNEL_A_2427MHZ 0x1b
83 #define AL2210_CHANNEL_A_2432MHZ 0x00
84 #define AL2210_CHANNEL_A_2437MHZ 0x05
85 #define AL2210_CHANNEL_A_2442MHZ 0x0a
86 #define AL2210_CHANNEL_A_2447MHZ 0x0f
87 #define AL2210_CHANNEL_A_2452MHZ 0x14
88 #define AL2210_CHANNEL_A_2457MHZ 0x10
89 #define AL2210_CHANNEL_A_2462MHZ 0x1e
90 #define AL2210_CHANNEL_A_2467MHZ 0x03
91 #define AL2210_CHANNEL_A_2472MHZ 0x08
92 #define AL2210_CHANNEL_A_2484MHZ 0x14
93
94 #define AL2210_SYNTHESIZER 0x1
95 #define AL2210_SYNTHESIZER_R_MASK __BITS(4, 0) /* Reference
96 * divider
97 */
98 #define AL2210_RECEIVER 0x2
99 /* Rx VAGC Detector Negative Edge Threshold */
100 #define AL2210_RECEIVER_AGCDET_P_MASK __BITS(16, 15)
101 #define AL2210_RECEIVER_AGCDET_P_0_4V 0 /* 0.4V */
102 #define AL2210_RECEIVER_AGCDET_P_0_3V 1 /* 0.3V */
103 #define AL2210_RECEIVER_AGCDET_P_0_2V 2 /* 0.2V */
104 #define AL2210_RECEIVER_AGCDET_P_RSVD 3 /* reserved */
105 /* Rx VAGC Detector Negative Edge Threshold */
106 #define AL2210_RECEIVER_AGCDET_N_MASK __BITS(14, 13)
107 #define AL2210_RECEIVER_AGCDET_N_0_4V 0 /* 0.4V */
108 #define AL2210_RECEIVER_AGCDET_N_0_3V 1 /* 0.3V */
109 #define AL2210_RECEIVER_AGCDET_N_0_2V 2 /* 0.2V */
110 #define AL2210_RECEIVER_AGCDET_N_RSVD 3 /* reserved */
111 /* AGC detector control, 1: enable, 0: disable. */
112 #define AL2210_RECEIVER_AGCDETENA __BIT(11)
113 /* Rx filter bandwidth select */
114 #define AL2210_RECEIVER_BW_SEL_MASK __BITS(4, 2)
115 #define AL2210_RECEIVER_BW_SEL_9_5MHZ 0
116 #define AL2210_RECEIVER_BW_SEL_9MHZ 1
117 #define AL2210_RECEIVER_BW_SEL_8_5MHZ 2
118 #define AL2210_RECEIVER_BW_SEL_8MHZ 3
119 #define AL2210_RECEIVER_BW_SEL_7_5MHZ 4
120 #define AL2210_RECEIVER_BW_SEL_7MHZ 5
121 #define AL2210_RECEIVER_BW_SEL_6_5MHZ 6
122 #define AL2210_RECEIVER_BW_SEL_6MHZ 7
123
124 #define AL2210_TRANSMITTER 0x3
125 /* 2nd-stage power amplifier current control. Units of 20uA.
126 * "Full scale" current is 300uA. (Is full-scale at PABIAS2 = 0 or
127 * at PABIAS2 = 15?)
128 */
129 #define AL2210_TRANSMITTER_PABIAS2_MASK __BITS(7, 4)
130 /* 1st-stage power amplifier current control. Units of 20uA.
131 * "Full scale" current is 300uA. (Is full-scale at PABIAS2 = 0 or
132 * at PABIAS2 = 15?)
133 */
134 #define AL2210_TRANSMITTER_PABIAS1_MASK __BITS(3, 0)
135
136 #define AL2210_CONFIG1 0x4
137
138 #define AL2210_CONFIG2 0x5
139 /* Regulator power. 0: on, 1: off. */
140 #define AL2210_CONFIG2_REGPD_MASK __BIT(19)
141 /* XO clock setting. 0: 44MHz, 1: 22MHz. */
142 #define AL2210_CONFIG2_XTAL_SC_MASK __BIT(10)
143
144 /* DC Offset Calibration (DCOC) */
145 #define AL2210_CONFIG3 0x6
146 /* Select 1MHz DCOC timing. */
147 #define AL2210_CONFIG3_AGC_DET_PATT_1MHZ __BIT(17)
148 /* Select 100kHz DCOC timing. */
149 #define AL2210_CONFIG3_AGC_DET_PATT_100KHZ __BIT(16)
150 #define AL2210_CONFIG3_LNA_GAIN_PATT_1MHZ __BITS(15)
151 #define AL2210_CONFIG3_LNA_GAIN_PATT_100KHZ __BITS(14)
152 #define AL2210_CONFIG3_RXON_PATT_1MHZ __BITS(13)
153 #define AL2210_CONFIG3_RXON_PATT_1OOKHZ __BITS(12)
154 /* 1MHz DCOC duration? Microseconds. */
155 #define AL2210_CONFIG3_CNT_1M_AGC_MASK __BITS(11, 8)
156 #define AL2210_CONFIG3_CNT_1M_LNA_MASK __BITS(7, 4)
157 #define AL2210_CONFIG3_CNT_1M_RXON_MASK __BITS(3, 0)
158
159 #define AL2210_CONFIG4 0x7
160 /* 100kHz DCOC duration? Microseconds. */
161 #define AL2210_CONFIG4_CNT_100K_AGC_MASK __BITS(11, 8)
162 #define AL2210_CONFIG4_CNT_100K_LNA_MASK __BITS(7, 4)
163 #define AL2210_CONFIG4_CNT_100K_RXON_MASK __BITS(3, 0)
164
165 #define AL2210_CONFIG5 0x8
166 #define AL2210_CONFIG5_TXF_BW_MASK __BITS(9, 8)
167 #define AL2210_CONFIG5_TXF_BW_12MHZ 3
168 #define AL2210_CONFIG5_TXF_BW_11MHZ 2
169 #define AL2210_CONFIG5_TXF_BW_10MHZ 1
170 #define AL2210_CONFIG5_TXF_BW_9MHZ 0
171
172 #define AL2210_CONFIG6 0x9
173 #define AL2210_CONFIG6_DEFAULT 0x2c0009 /* magic */
174
175 #define AL2210_CONFIG7 0xa
176 #define AL2210_CONFIG7_DEFAULT 0x001c0a /* magic */
177
178 #define AL2210_CONFIG8 0xb
179 #define AL2210_CONFIG8_DEFAULT 0x01000b /* magic */
180
181 #endif /* _DEV_IC_AL2210REG_H_ */
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