FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/apcdmareg.h
1 /* $NetBSD: apcdmareg.h,v 1.5 2005/12/11 12:21:25 christos Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Paul Kranenburg.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * APC DMA hardware; from SunOS header
41 * Thanks to Derrick J. Brashear for additional info on the
42 * meaning of some of these bits.
43 */
44 #ifndef _DEV_IC_APCDMAREG_H_
45 #define _DEV_IC_APCDMAREG_H_
46
47 struct apc_dma {
48 volatile u_int32_t dmacsr; /* APC CSR */
49 volatile u_int32_t lpad[3]; /* */
50 volatile u_int32_t dmacva; /* Capture Virtual Address */
51 volatile u_int32_t dmacc; /* Capture Count */
52 volatile u_int32_t dmacnva; /* Capture Next Virtual Address */
53 volatile u_int32_t dmacnc; /* Capture next count */
54 volatile u_int32_t dmapva; /* Playback Virtual Address */
55 volatile u_int32_t dmapc; /* Playback Count */
56 volatile u_int32_t dmapnva; /* Playback Next VAddress */
57 volatile u_int32_t dmapnc; /* Playback Next Count */
58 };
59
60 /* same as above but as offsets for bus_space ops */
61 #define APC_DMA_CSR 0
62 #define APC_DMA_CVA 16
63 #define APC_DMA_CC 20
64 #define APC_DMA_CNVA 24
65 #define APC_DMA_CNC 28
66 #define APC_DMA_PVA 32
67 #define APC_DMA_PC 36
68 #define APC_DMA_PNVA 40
69 #define APC_DMA_PNC 44
70
71 #define APC_DMA_SIZE 48
72
73 /*
74 * APC CSR Register bit definitions
75 */
76 #define APC_IP 0x00800000 /* Interrupt Pending */
77 #define APC_PI 0x00400000 /* Playback interrupt */
78 #define APC_CI 0x00200000 /* Capture interrupt */
79 #define APC_EI 0x00100000 /* General interrupt */
80 #define APC_IE 0x00080000 /* General ext int. enable */
81 #define APC_PIE 0x00040000 /* Playback ext intr */
82 #define APC_CIE 0x00020000 /* Capture ext intr */
83 #define APC_EIE 0x00010000 /* Error ext intr */
84 #define APC_PMI 0x00008000 /* Pipe empty interrupt */
85 #define APC_PM 0x00004000 /* Play pipe empty */
86 #define APC_PD 0x00002000 /* Playback NVA dirty */
87 #define APC_PMIE 0x00001000 /* play pipe empty Int enable */
88 #define APC_CM 0x00000800 /* Cap data dropped on floor */
89 #define APC_CD 0x00000400 /* Capture NVA dirty */
90 #define APC_CMI 0x00000200 /* Capture pipe empty interrupt */
91 #define APC_CMIE 0x00000100 /* Cap. pipe empty int enable */
92 #define APC_PPAUSE 0x00000080 /* Pause the play DMA */
93 #define APC_CPAUSE 0x00000040 /* Pause the capture DMA */
94 #define APC_CODEC_PDN 0x00000020 /* CODEC RESET */
95 #define PDMA_GO 0x00000008
96 #define CDMA_GO 0x00000004 /* bit 2 of the csr */
97 #define APC_RESET 0x00000001 /* Reset the chip */
98
99 #define APC_BITS \
100 "\2\30IP\27PI\26CI\25EI\24IE" \
101 "\23PIE\22CIE\21EIE\20PMI\17PM\16PD\15PMIE" \
102 "\14CM\13CD\12CMI\11CMIE\10PPAUSE\7CPAUSE\6PDN\4PGO\3CGO"
103
104 /*
105 * Note that when we program CSR, we should be careful to not
106 * accidentally clear any pending interrupt bits (a pending interrupt
107 * reads as 1 and writing back 1 will clear), so instead of
108 *
109 * dma->dmacsr |= bits;
110 *
111 * we should do
112 *
113 * temp = dma->dmacsr & ~APC_INTR_MASK;
114 * temp |= bits;
115 * dma->dmacsr = temp;
116 *
117 * When clearing bits, always add APC_INTR_MASK, i.e.
118 *
119 * dma->dmacsr &= ~(bits | APC_INTR_MASK);
120 */
121 #define APC_INTR_MASK (APC_IP|APC_PI|APC_CI|APC_EI|APC_PMI|APC_CMI)
122
123 #endif /* _DEV_IC_APCDMAREG_H_ */
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