The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/atxxreg.h

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    1 /*      $OpenBSD: atxxreg.h,v 1.1 2008/04/15 20:23:54 miod Exp $        */
    2 
    3 /*
    4  * Copyright (c) 2008 Miodrag Vallat.
    5  *
    6  * Permission to use, copy, modify, and distribute this software for any
    7  * purpose with or without fee is hereby granted, provided that the above
    8  * copyright notice and this permission notice appear in all copies.
    9  *
   10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
   12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
   13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
   14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
   15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
   16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
   17  */
   18 
   19 /*
   20  * Alliance Promotion AP6422, AT24 and AT3D extended register set definitions.
   21  *
   22  * This has been reconstructed from XFree86 ``apm'' driver, whose authors
   23  * apparently do not believe in meaningful constants for numbers. See
   24  * apm_regs.h for more madness.
   25  */
   26 
   27 /*
   28  * Dual coordinates encoding
   29  */
   30 
   31 #define ATR_DUAL(y,x)                   (((y) << 16) | (x))
   32 
   33 /*
   34  * Clipping Control
   35  */
   36 
   37 #define ATR_CLIP_CONTROL                0x0030  /* byte access */
   38 #define ATR_CLIP_LEFT                   0x0038
   39 #define ATR_CLIP_TOP                    0x003a
   40 #define ATR_CLIP_LEFTTOP                0x0038
   41 #define ATR_CLIP_RIGHT                  0x003c
   42 #define ATR_CLIP_BOTTOM                 0x003e
   43 #define ATR_CLIP_RIGHTBOTTOM            0x003c
   44 
   45 /*
   46  * Drawing Engine
   47  */
   48 
   49 #define ATR_DEC                         0x0040
   50 #define ATR_ROP                         0x0046
   51 #define ATR_BYTEMASK                    0x0047
   52 #define ATR_PATTERN1                    0x0048
   53 #define ATR_PATTERN2                    0x004c
   54 #define ATR_SRC_X                       0x0050
   55 #define ATR_SRC_Y                       0x0052
   56 #define ATR_SRC_XY                      0x0050
   57 #define ATR_DST_X                       0x0054
   58 #define ATR_DST_Y                       0x0056
   59 #define ATR_DST_XY                      0x0054
   60 #define ATR_W                           0x0058
   61 #define ATR_H                           0x005a
   62 #define ATR_WH                          0x0058
   63 #define ATR_OFFSET                      0x005c
   64 #define ATR_SRC_OFFSET                  0x005e
   65 #define ATR_FG                          0x0060
   66 #define ATR_BG                          0x0064
   67 
   68 /* DEC layout */
   69 #define DEC_COMMAND_MASK                0x0000003f
   70 #define DEC_COMMAND_SHIFT               0
   71 #define DEC_DIR_X_REVERSE               0x00000040
   72 #define DEC_DIR_Y_REVERSE               0x00000080
   73 #define DEC_DIR_Y_MAJOR                 0x00000100
   74 #define DEC_SRC_LINEAR                  0x00000200
   75 #define DEC_SRC_CONTIGUOUS              0x00000800
   76 #define DEC_MONOCHROME                  0x00001000
   77 #define DEC_SRC_TRANSPARENT             0x00002000
   78 #define DEC_DEPTH_MASK                  0x0001c000
   79 #define DEC_DEPTH_SHIFT                 14
   80 #define DEC_DST_LINEAR                  0x00040000
   81 #define DEC_DST_CONTIGUOUS              0x00080000
   82 #define DEC_DST_TRANSPARENT             0x00100000
   83 #define DEC_DST_TRANSPARENT_POLARITY    0x00200000
   84 #define DEC_PATTERN_MASK                0x00c00000
   85 #define DEC_PATTERN_SHIFT               22
   86 #define DEC_WIDTH_MASK                  0x07000000
   87 #define DEC_WIDTH_SHIFT                 24
   88 #define DEC_UPDATE_MASK                 0x18000000
   89 #define DEC_UPDATE_SHIFT                27
   90 #define DEC_START_MASK                  0x60000000
   91 #define DEC_START_SHIFT                 29
   92 #define DEC_START                       0x80000000
   93 
   94 /* DEC commands */
   95 #define DEC_COMMAND_NOP                 0x00
   96 #define DEC_COMMAND_BLT                 0x01    /* screen to screen blt */
   97 #define DEC_COMMAND_RECT                0x02    /* rectangle fill */
   98 #define DEC_COMMAND_BLT_STRETCH         0x03    /* blt and stretch */
   99 #define DEC_COMMAND_STRIP               0x04    /* strip pattern */
  100 #define DEC_COMMAND_HOST_BLT            0x08    /* host to screen blt */
  101 #define DEC_COMMAND_SCREEN_BLT          0x09    /* screen to host blt */
  102 #define DEC_COMMAND_VECT_ENDP           0x0c    /* vector with end point */
  103 #define DEC_COMMAND_VECT_NO_ENDP        0x0d    /* vector without end point */
  104 
  105 /* depth */
  106 #define DEC_DEPTH_8                     0x01
  107 #define DEC_DEPTH_16                    0x02
  108 #define DEC_DEPTH_32                    0x03
  109 #define DEC_DEPTH_24                    0x04
  110 
  111 /* width */
  112 #define DEC_WIDTH_LINEAR                0x00
  113 #define DEC_WIDTH_640                   0x01
  114 #define DEC_WIDTH_800                   0x02
  115 #define DEC_WIDTH_1024                  0x04
  116 #define DEC_WIDTH_1152                  0x05
  117 #define DEC_WIDTH_1280                  0x06
  118 #define DEC_WIDTH_1600                  0x07
  119 
  120 /* update mode */
  121 #define DEC_UPDATE_NONE                 0x00
  122 #define DEC_UPDATE_TOP_RIGHT            0x01
  123 #define DEC_UPDATE_BOTTOM_LEFT          0x02
  124 #define DEC_UPDATE_LASTPIX              0x03
  125 
  126 /* quickstart mode - operation starts as soon as given register is written to */
  127 #define DEC_START_DIMX                  0x01
  128 #define DEC_START_SRC                   0x02
  129 #define DEC_START_DST                   0x03
  130 
  131 /* ROP */
  132 #define ROP_DST                         0x66
  133 #define ROP_SRC                         0xcc
  134 #define ROP_PATTERN                     0xf0
  135 
  136 /*
  137  * Configuration Registers
  138  */
  139 
  140 #define ATR_PIXEL                       0x0080  /* byte access */
  141 #define PIXEL_DEPTH_MASK                0x0f
  142 #define PIXEL_DEPTH_SHIFT               0
  143 
  144 /* pixel depth */
  145 #define PIXEL_4                         0x01
  146 #define PIXEL_8                         0x02
  147 #define PIXEL_15                        0x0c
  148 #define PIXEL_16                        0x0d
  149 #define PIXEL_24                        0x0e
  150 #define PIXEL_32                        0x0f
  151 
  152 #define ATR_APERTURE                    0x00c0  /* short access */
  153 
  154 /*
  155  * DPMS Control
  156  */
  157 
  158 #define ATR_DPMS                        0x00d0  /* byte access */
  159 
  160 #define DPMS_HSYNC_DISABLE              0x01
  161 #define DPMS_VSYNC_DISABLE              0x02
  162 
  163 /*
  164  * RAMDAC
  165  */
  166 
  167 #define ATR_COLOR_CORRECTION            0x00e0
  168 #define ATR_MCLK                        0x00e8
  169 #define ATR_PCLK                        0x00ec
  170 
  171 /*
  172  * Hardware Cursor
  173  *
  174  * The position can not become negative; the offset register, encoded as
  175  * (signed y delta << 8) | signed x delta, allow the cursor image to
  176  * cross the upper-left corner.
  177  */
  178 
  179 #define ATR_CURSOR_ENABLE               0x0140
  180 #define ATR_CURSOR_FG                   0x0141  /* 3:3:2 */
  181 #define ATR_CURSOR_BG                   0x0142  /* 3:3:2 */
  182 #define ATR_CURSOR_ADDRESS              0x0144  /* in KB from vram */
  183 #define ATR_CURSOR_POSITION             0x0148
  184 #define ATR_CURSOR_OFFSET               0x014c  /* short access */
  185 
  186 /*
  187  * Identification Register
  188  */
  189 
  190 #define ATR_ID                          0x0182
  191 
  192 #define ID_AP6422                       0x6422
  193 #define ID_AT24                         0x6424
  194 #define ID_AT3D                         0x643d
  195 
  196 /*
  197  * Status Registers
  198  */
  199 
  200 #define ATR_FIFO_STATUS                 0x01fc
  201 #define ATR_BLT_STATUS                  0x01fd
  202 
  203 #define FIFO_MASK                       0x0f
  204 #define FIFO_SHIFT                      0
  205 #define FIFO_AP6422             4
  206 #define FIFO_AT24               8
  207 
  208 #define BLT_HOST_BUSY                   0x01
  209 #define BLT_ENGINE_BUSY                 0x04

Cache object: 5cdae4efec32d3b3b1bcc3299454ad36


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