The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/bt485reg.h

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    1 /* $NetBSD: bt485reg.h,v 1.3 2005/12/11 12:21:26 christos Exp $ */
    2 
    3 /*
    4  * Copyright (c) 1995, 1996 Carnegie-Mellon University.
    5  * All rights reserved.
    6  *
    7  * Author: Chris G. Demetriou
    8  *
    9  * Permission to use, copy, modify and distribute this software and
   10  * its documentation is hereby granted, provided that both the copyright
   11  * notice and this permission notice appear in all copies of the
   12  * software, derivative works or modified versions, and any portions
   13  * thereof, and that both notices appear in supporting documentation.
   14  *
   15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
   16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
   17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
   18  *
   19  * Carnegie Mellon requests users of this software to return to
   20  *
   21  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
   22  *  School of Computer Science
   23  *  Carnegie Mellon University
   24  *  Pittsburgh PA 15213-3890
   25  *
   26  * any improvements or extensions that they make and grant Carnegie the
   27  * rights to redistribute these changes.
   28  */
   29 
   30 /*
   31  * Register definitions for the Brooktree Bt485A 170MHz Monolithic
   32  * CMOS True-Color RAMDAC.
   33  */
   34 
   35 
   36 /*
   37  * Directly-addressed registers.
   38  */
   39 #define BT485_REG_PCRAM_WRADDR  0x00
   40 #define BT485_REG_PALETTE       0x01
   41 #define BT485_REG_PIXMASK       0x02
   42 #define BT485_REG_PCRAM_RDADDR  0x03
   43 #define BT485_REG_COC_WRADDR    0x04
   44 #define BT485_REG_COCDATA       0x05
   45 #define BT485_REG_COMMAND_0     0x06
   46 #define BT485_REG_COC_RDADDR    0x07
   47 #define BT485_REG_COMMAND_1     0x08
   48 #define BT485_REG_COMMAND_2     0x09
   49 #define BT485_REG_STATUS        0x0a
   50 #define BT485_REG_EXTENDED      BT485_REG_STATUS
   51 #define BT485_REG_CURSOR_RAM    0x0b
   52 #define BT485_REG_CURSOR_X_LOW  0x0c
   53 #define BT485_REG_CURSOR_X_HIGH 0x0d
   54 #define BT485_REG_CURSOR_Y_LOW  0x0e
   55 #define BT485_REG_CURSOR_Y_HIGH 0x0f
   56 
   57 #define BT485_REG_MAX           0x0f
   58 
   59 #define BT485_IREG_STATUS       0x00
   60 #define BT485_IREG_COMMAND_3    0x01
   61 #define BT485_IREG_COMMAND_4    0x02
   62 #define BT485_IREG_RSA          0x20
   63 #define BT485_IREG_GSA          0x21
   64 #define BT485_IREG_BSA          0x22

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