FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/cacreg.h
1 /* $OpenBSD: cacreg.h,v 1.7 2022/01/09 05:42:38 jsg Exp $ */
2 /* $NetBSD: cacreg.h,v 1.5 2001/01/10 16:48:04 ad Exp $ */
3
4 /*-
5 * Copyright (c) 2000 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Andrew Doran.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*-
34 * Copyright (c) 1999 Jonathan Lemon
35 * All rights reserved.
36 *
37 * Redistribution and use in source and binary forms, with or without
38 * modification, are permitted provided that the following conditions
39 * are met:
40 * 1. Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * 2. Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in the
44 * documentation and/or other materials provided with the distribution.
45 *
46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
47 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
49 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
50 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
52 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
55 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
56 * SUCH DAMAGE.
57 */
58
59 #ifndef _IC_CACREG_H_
60 #define _IC_CACREG_H_
61
62 /* Board register offsets */
63 #define CAC_REG_CMD_FIFO 0x04
64 #define CAC_REG_DONE_FIFO 0x08
65 #define CAC_REG_INTR_MASK 0x0C
66 #define CAC_REG_STATUS 0x10
67 #define CAC_REG_INTR_PENDING 0x14
68
69 #define CAC_42REG_CMD_FIFO 0x40
70 #define CAC_42REG_DONE_FIFO 0x44
71 #define CAC_42REG_INTR_MASK 0x34
72 #define CAC_42REG_STATUS 0x30
73
74 #define CAC_42_EXTINT 0x08
75
76 #define CAC_EISAREG_INTR_MASK 0x01
77 #define CAC_EISAREG_LOCAL_MASK 0x04
78 #define CAC_EISAREG_LOCAL_DOORBELL 0x05
79 #define CAC_EISAREG_SYSTEM_MASK 0x06
80 #define CAC_EISAREG_SYSTEM_DOORBELL 0x07
81 #define CAC_EISAREG_LIST_ADDR 0x08
82 #define CAC_EISAREG_LIST_LEN 0x0c
83 #define CAC_EISAREG_TAG 0x0f
84 #define CAC_EISAREG_COMPLETE_ADDR 0x10
85 #define CAC_EISAREG_LIST_STATUS 0x16
86
87 /* EISA channel control */
88 #define CAC_EISA_CHANNEL_BUSY 0x01
89 #define CAC_EISA_CHANNEL_CLEAR 0x02
90
91 /* Interrupt mask values */
92 #define CAC_INTR_DISABLE 0x00
93 #define CAC_INTR_ENABLE 0x01
94
95 /* Interrupt status masks */
96 #define CAC_INTR_FIFO_NEMPTY 0x01
97
98 /* Command types */
99 #define CAC_CMD_GET_LOG_DRV_INFO 0x10
100 #define CAC_CMD_GET_CTRL_INFO 0x11
101 #define CAC_CMD_SENSE_DRV_STATUS 0x12
102 #define CAC_CMD_START_RECOVERY 0x13
103 #define CAC_CMD_GET_PHYS_DRV_INFO 0x15
104 #define CAC_CMD_BLINK_DRV_LEDS 0x16
105 #define CAC_CMD_SENSE_DRV_LEDS 0x17
106 #define CAC_CMD_GET_LOG_DRV_EXT 0x18
107 #define CAC_CMD_GET_CTRL_INFO 0x11
108 #define CAC_CMD_READ 0x20
109 #define CAC_CMD_WRITE 0x30
110 #define CAC_CMD_WRITE_MEDIA 0x31
111 #define CAC_CMD_GET_CONFIG 0x50
112 #define CAC_CMD_SET_CONFIG 0x51
113 #define CAC_CMD_START_FIRMWARE 0x99
114 #define CAC_CMD_FLUSH_CACHE 0xc2
115
116 /* Return status codes */
117 #define CAC_RET_SOFT_ERROR 0x02
118 #define CAC_RET_HARD_ERROR 0x04
119 #define CAC_RET_CMD_INVALID 0x10
120 #define CAC_RET_CMD_REJECTED 0x14
121
122 struct cac_drive_info {
123 u_int16_t secsize;
124 u_int32_t secperunit;
125 u_int16_t ncylinders;
126 u_int8_t nheads;
127 u_int8_t signature;
128 u_int8_t psectors;
129 u_int16_t wprecomp;
130 u_int8_t max_acc;
131 u_int8_t control;
132 u_int16_t pcylinders;
133 u_int8_t ptracks;
134 u_int16_t landing_zone;
135 u_int8_t nsectors;
136 u_int8_t checksum;
137 u_int8_t mirror;
138 } __packed;
139
140 struct cac_controller_info {
141 u_int8_t num_drvs;
142 u_int32_t signature;
143 u_int8_t firm_rev[4];
144 u_int8_t rom_rev[4];
145 u_int8_t hw_rev;
146 u_int32_t bb_rev;
147 u_int32_t drv_present_map;
148 u_int32_t ext_drv_map;
149 u_int32_t board_id;
150 u_int8_t cfg_error;
151 u_int32_t non_disk_bits;
152 u_int8_t bad_ram_addr;
153 u_int8_t cpu_rev;
154 u_int8_t pdpi_rev;
155 u_int8_t epic_rev;
156 u_int8_t wcxc_rev;
157 u_int8_t marketing_rev;
158 u_int8_t ctlr_flags;
159 u_int8_t host_flags;
160 u_int8_t expand_dis;
161 u_int8_t scsi_chips;
162 u_int32_t max_req_blocks;
163 u_int32_t ctlr_clock;
164 u_int8_t drvs_per_bus;
165 u_int16_t big_drv_present_map[8];
166 u_int16_t big_ext_drv_map[8];
167 u_int16_t big_non_disk_map[8];
168 u_int16_t task_flags;
169 u_int8_t icl_bus;
170 u_int8_t red_modes;
171 u_int8_t cur_red_mode;
172 u_int8_t red_ctlr_stat;
173 u_int8_t red_fail_reason;
174 u_int8_t reserved[403];
175 } __packed;
176
177 struct cac_drive_status {
178 u_int8_t stat;
179 #define CAC_LD_OK 0
180 #define CAC_LD_FAILED 1
181 #define CAC_LD_UNCONF 2
182 #define CAC_LD_DEGRAD 3
183 #define CAC_LD_RBLDRD 4 /* ready for rebuild */
184 #define CAC_LD_REBLD 5
185 #define CAC_LD_PDINV 6 /* wrong phys drive replaced */
186 #define CAC_LD_PDUNC 7 /* phys drive is not connected proper */
187 #define CAC_LD_EXPND 10 /* expanding */
188 #define CAC_LD_NORDY 11 /* volume is not ready */
189 #define CAC_LD_QEXPND 12 /* queued for expansion */
190 u_int8_t failed[4]; /* failed map */
191 u_int8_t res0[416];
192 u_int8_t prog[4]; /* blocks left to rebuild/expand */
193 u_int8_t rebuild; /* drive that is rebuilding */
194 u_int16_t remapcnt[32]; /* count of re3mapped blocks for pds */
195 u_int8_t replaced[4]; /* replaced drives map */
196 u_int8_t spare[4]; /* used spares map */
197 u_int8_t sparestat; /* spare status */
198 #define CAC_LD_CONF 0x01 /* spare configured */
199 #define CAC_LD_RBLD 0x02 /* spare is used and rebuilding */
200 #define CAC_LD_DONE 0x04 /* spare rebuild done */
201 #define CAC_LD_FAIL 0x08 /* at least one spare drive has failed */
202 #define CAC_LD_USED 0x10 /* at least one spare drive is used */
203 #define CAC_LD_AVAIL 0x20 /* at least one spare is available */
204 u_int8_t sparemap[32]; /* spare->pd replacement map */
205 u_int8_t replok[4]; /* replaced failed map */
206 u_int8_t readyok; /* ready to become ok */
207 u_int8_t memfail; /* cache mem failure */
208 u_int8_t expfail; /* expansion failure */
209 u_int8_t rebldfail; /* rebuild failure */
210 #define CAC_LD_RBLD_READ 0x01 /* read failed */
211 #define CAC_LD_RBLD_WRITE 0x02 /* write fail */
212 u_int8_t bigfailed[16]; /* bigmap vers of same of the above */
213 u_int8_t bigremapcnt[256];
214 u_int8_t bigreplaced[16];
215 u_int8_t bigspare[16];
216 u_int8_t bigsparemap[128];
217 u_int8_t bigreplok[16];
218 u_int8_t bigrebuild; /* big-number rebuilding driveno */
219 } __packed;
220
221 struct cac_blink {
222 u_int32_t duration; /* x100ms */
223 u_int32_t elapsed; /* only for sense */
224 u_int8_t pdtab[256];
225 #define CAC_BLINK_ALL 1
226 #define CAC_BLINK_TIMED 2
227 u_int8_t res[248];
228 } __packed;
229
230 struct cac_hdr {
231 u_int8_t drive; /* logical drive */
232 u_int8_t priority; /* block priority */
233 u_int16_t size; /* size of request, in words */
234 } __packed;
235
236 struct cac_req {
237 u_int16_t next; /* offset of next request */
238 u_int8_t command; /* command */
239 u_int8_t error; /* return error code */
240 u_int32_t blkno; /* block number */
241 u_int16_t bcount; /* block count */
242 u_int8_t sgcount; /* number of scatter/gather entries */
243 u_int8_t reserved; /* reserved */
244 } __packed;
245
246 struct cac_sgb {
247 u_int32_t length; /* length of S/G segment */
248 u_int32_t addr; /* physical address of block */
249 } __packed;
250
251 #endif /* !_IC_CACREG_H_ */
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