The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]

FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/cd1400.h

Version: -  FREEBSD  -  FREEBSD-12-STABLE  -  FREEBSD-12-0  -  FREEBSD-11-STABLE  -  FREEBSD-11-2  -  FREEBSD-11-1  -  FREEBSD-11-0  -  FREEBSD-10-STABLE  -  FREEBSD-10-4  -  FREEBSD-10-3  -  FREEBSD-10-2  -  FREEBSD-10-1  -  FREEBSD-10-0  -  FREEBSD-9-STABLE  -  FREEBSD-9-3  -  FREEBSD-9-2  -  FREEBSD-9-1  -  FREEBSD-9-0  -  FREEBSD-8-STABLE  -  FREEBSD-8-4  -  FREEBSD-8-3  -  FREEBSD-8-2  -  FREEBSD-8-1  -  FREEBSD-8-0  -  FREEBSD-7-STABLE  -  FREEBSD-7-4  -  FREEBSD-7-3  -  FREEBSD-7-2  -  FREEBSD-7-1  -  FREEBSD-7-0  -  FREEBSD-6-STABLE  -  FREEBSD-6-4  -  FREEBSD-6-3  -  FREEBSD-6-2  -  FREEBSD-6-1  -  FREEBSD-6-0  -  FREEBSD-5-STABLE  -  FREEBSD-5-5  -  FREEBSD-5-4  -  FREEBSD-5-3  -  FREEBSD-5-2  -  FREEBSD-5-1  -  FREEBSD-5-0  -  FREEBSD-4-STABLE  -  FREEBSD-3-STABLE  -  FREEBSD22  -  linux-2.6  -  linux-2.4.22  -  MK83  -  MK84  -  PLAN9  -  DFBSD  -  NETBSD  -  NETBSD5  -  NETBSD4  -  NETBSD3  -  NETBSD20  -  OPENBSD  -  xnu-517  -  xnu-792  -  xnu-792.6.70  -  xnu-1228  -  xnu-1456.1.26  -  xnu-1699.24.8  -  xnu-2050.18.24  -  OPENSOLARIS  -  minix-3-1-1 
SearchContext: -  none  -  3  -  10 

    1 /*-
    2  * cyclades cyclom-y serial driver
    3  *      Andrew Herbert <andrew@werple.apana.org.au>, 17 August 1993
    4  *
    5  * Copyright (c) 1993 Andrew Herbert.
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. The name Andrew Herbert may not be used to endorse or promote products
   17  *    derived from this software without specific prior written permission.
   18  *
   19  * THIS SOFTWARE IS PROVIDED BY ``AS IS'' AND ANY EXPRESS OR IMPLIED
   20  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
   21  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
   22  * NO EVENT SHALL I BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
   23  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
   24  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
   25  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
   26  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
   27  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
   28  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   29  *
   30  * $FreeBSD: releng/9.0/sys/dev/ic/cd1400.h 50477 1999-08-28 01:08:13Z peter $
   31  */
   32 
   33 /*
   34  * Definitions for Cirrus Logic CD1400 serial/parallel chips.
   35  */
   36 
   37 #define CD1400_NO_OF_CHANNELS   4       /* 4 serial channels per chip */
   38 #define CD1400_RX_FIFO_SIZE     12
   39 #define CD1400_TX_FIFO_SIZE     12
   40 
   41 /*
   42  * Global registers.
   43  */
   44 #define CD1400_GFRCR            0x40    /* global firmware revision code */
   45 #define CD1400_CAR              0x68    /* channel access */
   46 #define CD1400_CAR_CHAN                 (3<<0)  /* channel select */
   47 #define CD1400_GCR              0x4B    /* global configuration */
   48 #define CD1400_GCR_PARALLEL             (1<<7)  /* channel 0 is parallel */
   49 #define CD1400_SVRR             0x67    /* service request */
   50 #define CD1400_SVRR_MDMCH               (1<<2)
   51 #define CD1400_SVRR_TXRDY               (1<<1)
   52 #define CD1400_SVRR_RXRDY               (1<<0)
   53 #define CD1400_RICR             0x44    /* receive interrupting channel */
   54 #define CD1400_TICR             0x45    /* transmit interrupting channel */
   55 #define CD1400_MICR             0x46    /* modem interrupting channel */
   56 #define CD1400_RIR              0x6B    /* receive interrupt status */
   57 #define CD1400_RIR_RDIREQ               (1<<7)  /* rx service required */
   58 #define CD1400_RIR_RBUSY                (1<<6)  /* rx service in progress */
   59 #define CD1400_RIR_CHAN                 (3<<0)  /* channel select */
   60 #define CD1400_TIR              0x6A    /* transmit interrupt status */
   61 #define CD1400_TIR_RDIREQ               (1<<7)  /* tx service required */
   62 #define CD1400_TIR_RBUSY                (1<<6)  /* tx service in progress */
   63 #define CD1400_TIR_CHAN                 (3<<0)  /* channel select */
   64 #define CD1400_MIR              0x69    /* modem interrupt status */
   65 #define CD1400_MIR_RDIREQ               (1<<7)  /* modem service required */
   66 #define CD1400_MIR_RBUSY                (1<<6)  /* modem service in progress */
   67 #define CD1400_MIR_CHAN                 (3<<0)  /* channel select */
   68 #define CD1400_PPR              0x7E    /* prescaler period */
   69 #define CD1400_PPR_PRESCALER            512
   70 
   71 /*
   72  * Virtual registers.
   73  */
   74 #define CD1400_RIVR             0x43    /* receive interrupt vector */
   75 #define CD1400_RIVR_EXCEPTION           (1<<2)  /* receive exception bit */
   76 #define CD1400_TIVR             0x42    /* transmit interrupt vector */
   77 #define CD1400_MIVR             0x41    /* modem interrupt vector */
   78 #define CD1400_TDR              0x63    /* transmit data */
   79 #define CD1400_RDSR             0x62    /* receive data/status */
   80 #define CD1400_RDSR_TIMEOUT             (1<<7)  /* rx timeout */
   81 #define CD1400_RDSR_SPECIAL_SHIFT       4       /* rx special char shift */
   82 #define CD1400_RDSR_SPECIAL             (7<<4)  /* rx special char */
   83 #define CD1400_RDSR_BREAK               (1<<3)  /* rx break */
   84 #define CD1400_RDSR_PE                  (1<<2)  /* rx parity error */
   85 #define CD1400_RDSR_FE                  (1<<1)  /* rx framing error */
   86 #define CD1400_RDSR_OE                  (1<<0)  /* rx overrun error */
   87 #define CD1400_MISR             0x4C    /* modem interrupt status */
   88 #define CD1400_MISR_DSRd                (1<<7)  /* DSR delta */
   89 #define CD1400_MISR_CTSd                (1<<6)  /* CTS delta */
   90 #define CD1400_MISR_RId                 (1<<5)  /* RI delta */
   91 #define CD1400_MISR_CDd                 (1<<4)  /* CD delta */
   92 #define CD1400_EOSRR            0x60    /* end of service request */
   93 
   94 /*
   95  * Channel registers.
   96  */
   97 #define CD1400_LIVR             0x18    /* local interrupt vector */
   98 #define CD1400_CCR              0x05    /* channel control */
   99 #define CD1400_CCR_CMDRESET             (1<<7)  /* enables following: */
  100 #define CD1400_CCR_FTF                          (1<<1)  /* flush tx fifo */
  101 #define CD1400_CCR_FULLRESET                    (1<<0)  /* full reset */
  102 #define CD1400_CCR_CHANRESET                    0       /*  current channel */
  103 #define CD1400_CCR_CMDCORCHG            (1<<6)  /* enables following: */
  104 #define CD1400_CCR_COR3                         (1<<3)  /* COR3 changed */
  105 #define CD1400_CCR_COR2                         (1<<2)  /* COR2 changed */
  106 #define CD1400_CCR_COR1                         (1<<1)  /* COR1 changed */
  107 #define CD1400_CCR_CMDSENDSC            (1<<5)  /* enables following: */
  108 #define CD1400_CCR_SC                           (7<<0)  /* special char 1-4 */
  109 #define CD1400_CCR_CMDCHANCTL           (1<<4)  /* enables following: */
  110 #define CD1400_CCR_XMTEN                        (1<<3)  /* tx enable */
  111 #define CD1400_CCR_XMTDIS                       (1<<2)  /* tx disable */
  112 #define CD1400_CCR_RCVEN                        (1<<1)  /* rx enable */
  113 #define CD1400_CCR_RCVDIS                       (1<<0)  /* rx disable */
  114 #define CD1400_SRER             0x06    /* service request enable */
  115 #define CD1400_SRER_MDMCH               (1<<7)  /* modem change */
  116 #define CD1400_SRER_RXDATA              (1<<4)  /* rx data */
  117 #define CD1400_SRER_TXRDY               (1<<2)  /* tx fifo empty */
  118 #define CD1400_SRER_TXMPTY              (1<<1)  /* tx shift reg empty */
  119 #define CD1400_SRER_NNDT                (1<<0)  /* no new data */
  120 #define CD1400_COR1             0x08    /* channel option 1 */
  121 #define CD1400_COR1_PARODD              (1<<7)
  122 #define CD1400_COR1_PARNORMAL           (2<<5)
  123 #define CD1400_COR1_PARFORCE            (1<<5)  /* odd/even = force 1/0 */
  124 #define CD1400_COR1_PARNONE             (0<<5)
  125 #define CD1400_COR1_NOINPCK             (1<<4)
  126 #define CD1400_COR1_STOP2               (2<<2)
  127 #define CD1400_COR1_STOP15              (1<<2)  /* 1.5 stop bits */
  128 #define CD1400_COR1_STOP1               (0<<2)
  129 #define CD1400_COR1_CS8                 (3<<0)
  130 #define CD1400_COR1_CS7                 (2<<0)
  131 #define CD1400_COR1_CS6                 (1<<0)
  132 #define CD1400_COR1_CS5                 (0<<0)
  133 #define CD1400_COR2             0x09    /* channel option 2 */
  134 #define CD1400_COR2_IXANY               (1<<7)  /* implied XON mode */
  135 #define CD1400_COR2_IXOFF               (1<<6)  /* in-band tx flow control */
  136 #define CD1400_COR2_ETC                 (1<<5)  /* embedded tx command */
  137 #define CD1400_ETC_CMD                          0x00    /* start an ETC */
  138 #define CD1400_ETC_SENDBREAK                    0x81
  139 #define CD1400_ETC_INSERTDELAY                  0x82
  140 #define CD1400_ETC_STOPBREAK                    0x83
  141 #define CD1400_COR2_LLM                 (1<<4)  /* local loopback mode */
  142 #define CD1400_COR2_RLM                 (1<<3)  /* remote loopback mode */
  143 #define CD1400_COR2_RTSAO               (1<<2)  /* RTS auto output */
  144 #define CD1400_COR2_CCTS_OFLOW          (1<<1)  /* CTS auto enable */
  145 #define CD1400_COR2_CDSR_OFLOW          (1<<0)  /* DSR auto enable */
  146 #define CD1400_COR3             0x0A    /* channel option 3 */
  147 #define CD1400_COR3_SCDRNG              (1<<7)  /* special char detect range */
  148 #define CD1400_COR3_SCD34               (1<<6)  /* special char detect 3-4 */
  149 #define CD1400_COR3_FTC                 (1<<5)  /* flow control transparency */
  150 #define CD1400_COR3_SCD12               (1<<4)  /* special char detect 1-2 */
  151 #define CD1400_COR3_RXTH                (15<<0) /* rx fifo threshold */
  152 #define CD1400_COR4             0x1E    /* channel option 4 */
  153 #define CD1400_COR4_IGNCR               (1<<7)
  154 #define CD1400_COR4_ICRNL               (1<<6)
  155 #define CD1400_COR4_INLCR               (1<<5)
  156 #define CD1400_COR4_IGNBRK              (1<<4)
  157 #define CD1400_COR4_NOBRKINT            (1<<3)
  158 #define CD1400_COR4_PFO_ESC             (4<<0)  /* parity/framing/overrun... */
  159 #define CD1400_COR4_PFO_NUL             (3<<0)
  160 #define CD1400_COR4_PFO_DISCARD         (2<<0)
  161 #define CD1400_COR4_PFO_GOOD            (1<<0)
  162 #define CD1400_COR4_PFO_EXCEPTION       (0<<0)
  163 #define CD1400_COR5             0x1F    /* channel option 5 */
  164 #define CD1400_COR5_ISTRIP              (1<<7)
  165 #define CD1400_COR5_LNEXT               (1<<6)
  166 #define CD1400_COR5_CMOE                (1<<5)  /* char matching on error */
  167 #define CD1400_COR5_EBD                 (1<<2)  /* end of break detected */
  168 #define CD1400_COR5_ONLCR               (1<<1)
  169 #define CD1400_COR5_OCRNL               (1<<0)
  170 #define CD1400_CCSR             0x0B    /* channel control status */
  171 #define CD1400_RDCR             0x0E    /* received data count */
  172 #define CD1400_SCHR1            0x1A    /* special character 1 */
  173 #define CD1400_SCHR2            0x1B    /* special character 2 */
  174 #define CD1400_SCHR3            0x1C    /* special character 3 */
  175 #define CD1400_SCHR4            0x1D    /* special character 4 */
  176 #define CD1400_SCRL             0x22    /* special character range, low */
  177 #define CD1400_SCRH             0x23    /* special character range, high */
  178 #define CD1400_LNC              0x24    /* lnext character */
  179 #define CD1400_MCOR1            0x15    /* modem change option 1 */
  180 #define CD1400_MCOR1_DSRzd              (1<<7)  /* DSR one-to-zero delta */
  181 #define CD1400_MCOR1_CTSzd              (1<<6)
  182 #define CD1400_MCOR1_RIzd               (1<<5)
  183 #define CD1400_MCOR1_CDzd               (1<<4)
  184 #define CD1400_MCOR1_DTRth              (15<<0) /* dtrflow threshold */
  185 #define CD1400_MCOR2            0x16    /* modem change option 2 */
  186 #define CD1400_MCOR2_DSRod              (1<<7)  /* DSR zero-to-one delta */
  187 #define CD1400_MCOR2_CTSod              (1<<6)
  188 #define CD1400_MCOR2_RIod               (1<<5)
  189 #define CD1400_MCOR2_CDod               (1<<4)
  190 #define CD1400_RTPR             0x21    /* receive timeout period */
  191 #define CD1400_MSVR1            0x6C    /* modem signal value 1 */
  192 #define CD1400_MSVR1_RTS                (1<<0)  /* RTS line (r/w) */
  193 #define CD1400_MSVR2            0x6D    /* modem signal value 2 */
  194 #define CD1400_MSVR2_DSR                (1<<7)  /* !DSR line (r) */
  195 #define CD1400_MSVR2_CTS                (1<<6)  /* !CTS line (r) */
  196 #define CD1400_MSVR2_RI                 (1<<5)  /* !RI line (r) */
  197 #define CD1400_MSVR2_CD                 (1<<4)  /* !CD line (r) */
  198 #define CD1400_MSVR2_DTR                (1<<1)  /* DTR line (r/w) */
  199 #define CD1400_PSVR             0x6F    /* printer signal value */
  200 #define CD1400_RBPR             0x78    /* receive baud rate period */
  201 #define CD1400_RCOR             0x7C    /* receive clock option */
  202 #define CD1400_TBPR             0x72    /* transmit baud rate period */
  203 #define CD1400_TCOR             0x76    /* transmit clock option */

Cache object: eab2f339c045b836020a7594d356fab8


[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]


This page is part of the FreeBSD/Linux Linux Kernel Cross-Reference, and was automatically generated using a modified version of the LXR engine.