The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/cd18xxvar.h

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    1 /*      $NetBSD: cd18xxvar.h,v 1.1 2001/10/03 04:25:30 mrg Exp $        */
    2 
    3 /*
    4  * Copyright (c) 1998, 2001 Matthew R. Green
    5  * All rights reserved.
    6  *
    7  * Redistribution and use in source and binary forms, with or without
    8  * modification, are permitted provided that the following conditions
    9  * are met:
   10  * 1. Redistributions of source code must retain the above copyright
   11  *    notice, this list of conditions and the following disclaimer.
   12  * 2. Redistributions in binary form must reproduce the above copyright
   13  *    notice, this list of conditions and the following disclaimer in the
   14  *    documentation and/or other materials provided with the distribution.
   15  * 3. The name of the author may not be used to endorse or promote products
   16  *    derived from this software without specific prior written permission.
   17  *
   18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
   23  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
   24  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
   25  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
   26  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   27  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
   28  * SUCH DAMAGE.
   29  */
   30 
   31 /*
   32  * cd18xxvar.h:  header file for cirrus-logic CL-CD180/CD1864/CD1865 8
   33  * port serial chip.
   34  */
   35 
   36 #include <sys/tty.h>
   37 
   38 /* allocated per-serial port */
   39 struct cdtty_port {
   40         struct  tty             *p_tty;
   41 
   42         int                     p_swflags;      /* TIOCFLAG_SOFTCAR, etc. */
   43         int                     p_defspeed;     /* default speed */
   44         int                     p_defcflag;     /* default termios cflag */
   45 
   46         u_int                   p_r_hiwat;      /* high water mark */
   47         u_int                   p_r_lowat;      /* low water mark */
   48         u_char *volatile        p_rbget;        /* ring buffer get ptr */
   49         u_char *volatile        p_rbput;        /* ring buffer put ptr */
   50         volatile u_int          p_rbavail;      /* size available */
   51         u_char                  *p_rbuf;        /* ring buffer */
   52         u_char                  *p_ebuf;        /* end of ring buffer */
   53 
   54         u_char *                p_tba;          /* transmit buffer address */
   55         u_int                   p_tbc,          /* transmit byte count */
   56                                 p_heldtbc;      /* held tbc; waiting for tx */
   57 #define CDTTY_RING_SIZE 2048
   58 
   59         u_int                   p_parityerr,    /* number of parity errors */
   60                                 p_frameerr,     /* number of framing errors */
   61                                 p_overflows,    /* number of overruns */
   62                                 p_floods;       /* number of rbuf floods */
   63 
   64         volatile u_char         p_break,        /* current break status */
   65                                 p_needbreak,    /* need to generate a break */
   66                                 p_rx_flags,     /* software state */
   67 #define RX_TTY_BLOCKED          0x01
   68 #define RX_TTY_OVERFLOWED       0x02
   69 #define RX_IBUF_BLOCKED         0x04
   70 #define RX_IBUF_OVERFLOWED      0x08
   71 #define RX_ANY_BLOCK            0x0f
   72                                 p_rx_ready,     /* soft rx interrupt ready */
   73                                 p_rx_busy,
   74                                 p_tx_done,      /* soft tx interrupt ready */
   75                                 p_tx_busy,
   76                                 p_tx_stopped,
   77                                 p_st_check,     /* soft modem interrupt ready */
   78                                 p_heldchange;   /* waiting to update regs */
   79 
   80         /*
   81          * cd18xx channel registers we keep a copy of, for writing in
   82          * loadchannelregs().
   83          */
   84         u_char                  p_srer,         /* service request enable */
   85                                 p_msvr,         /* modem signal value */
   86                                 p_msvr_cts, p_msvr_rts, p_msvr_dcd,
   87                                 p_msvr_mask, p_msvr_active, p_msvr_delta,
   88                                 p_cor1,         /* channel option reg 1 */
   89                                 p_cor2,         /* channel option reg 2 */
   90                                 p_cor3,         /* channel option reg 3 */
   91                                 p_mcor1,        /* modem option reg 1 */
   92                                 p_mcor1_dtr,
   93                                 p_rbprh,        /* recv bps high */
   94                                 p_rbprl,        /* recv bps low */
   95                                 p_tbprh,        /* xmit bps high */
   96                                 p_tbprl,        /* xmit bps low */
   97                                 p_chanctl;      /* chanctl command */
   98 };
   99 
  100 /* softc allocated per-cd18xx */
  101 struct cd18xx_softc {
  102         struct device           sc_dev;
  103 
  104         /* tag and handle for our registers (128 bytes) */
  105         bus_space_tag_t         sc_tag;
  106         bus_space_handle_t      sc_handle;
  107 
  108         /*
  109          * cd18xx has weird interrupt acknowledgement and configuration,
  110          * so we have to defer this to our parent.  this function must
  111          * do whatever is required to genereate *iack signals that are
  112          * required for the cd180.  this probably also depends on the
  113          * values of the sc_rsmr, sc_tsmr and sc_msmr variables.  the
  114          * function is called with the provided argument, and with any
  115          * of the 4 #defines below, depending on the ack needing to be
  116          * generated.
  117          */
  118         u_char                  (*sc_ackfunc)(void *, int);
  119 #define CD18xx_INTRACK_MxINT    0x01            /* modem interrupt */
  120 #define CD18xx_INTRACK_TxINT    0x02            /* tx interrupt */
  121 #define CD18xx_INTRACK_RxINT    0x04            /* rx (good data) interrupt */
  122 #define CD18xx_INTRACK_REINT    0x08            /* rx (exception) interrupt */
  123         void                    *sc_ackfunc_arg;
  124 
  125         u_char                  sc_rsmr;
  126         u_char                  sc_tsmr;
  127         u_char                  sc_msmr;
  128 
  129         u_int                   sc_osc;
  130 
  131         /*
  132          * everything above here needs to be setup by our caller, and
  133          * everything below here is setup by the generic cd18xx code.
  134          */
  135         u_int                   sc_chip_id;     /* unique per-cd18xx value */
  136         void                    *sc_si;         /* softintr(9) cookie */
  137 
  138         struct cdtty_port       sc_ports[8];
  139 
  140         u_char                  sc_pprh;
  141         u_char                  sc_pprl;
  142 };
  143 
  144 /* hard interrupt, to be configured by our caller */
  145 int cd18xx_hardintr(void *);
  146 
  147 /* main attach routine called by the high level driver */
  148 void cd18xx_attach(struct cd18xx_softc *);
  149 
  150 /*
  151  * device minor layout has bit 19 for dialout and bits 0..18 for the unit.
  152  * the first 3 bits of the unit are the channel number inside a single
  153  * cd18xx instance, and the remaining bits indicate the instance number.
  154  */
  155 #define CD18XX_TTY(x)           (minor(x) & 0x7ffff)
  156 #define CD18XX_CHANNEL(x)       (minor(x) & 7)
  157 #define CD18XX_INSTANCE(x)      ((minor(x) >> 3) & 0xffff)
  158 #define CD18XX_DIALOUT(x)       ((minor(x) & 0x80000) != 0)
  159 
  160 /* short helpers for read/write */
  161 #define cd18xx_read(sc, o)              \
  162         bus_space_read_1((sc)->sc_tag, (sc)->sc_handle, o)
  163 #define cd18xx_read_multi(sc, o, b, c)  \
  164         bus_space_read_multi_1((sc)->sc_tag, (sc)->sc_handle, o, b, c)
  165 
  166 #define cd18xx_write(sc, o, v)          \
  167         bus_space_write_1((sc)->sc_tag, (sc)->sc_handle, o, v)
  168 #define cd18xx_write_multi(sc, o, b, c) \
  169         bus_space_write_multi_1((sc)->sc_tag, (sc)->sc_handle, o, b, c)
  170 
  171 /* set the current channel */
  172 #define cd18xx_set_car(sc, c)           \
  173 do { \
  174         bus_space_write_1((sc)->sc_tag, (sc)->sc_handle, CD18xx_CAR, c); \
  175         delay(1); \
  176 } while (0)
  177 
  178 /* get the current channel */
  179 #define cd18xx_get_gscr1_channel(sc)    \
  180         ((bus_space_read_1((sc)->sc_tag, (sc)->sc_handle, CD18xx_GSCR1) >> 2)&7)

Cache object: 4160de87f959fdcaab0a0886c0917064


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