Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]
FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/cissreg.h
Version:
- FREEBSD - FREEBSD-13-STABLE - FREEBSD-13-0 - FREEBSD-12-STABLE - FREEBSD-12-0 - FREEBSD-11-STABLE - FREEBSD-11-0 - FREEBSD-10-STABLE - FREEBSD-10-0 - FREEBSD-9-STABLE - FREEBSD-9-0 - FREEBSD-8-STABLE - FREEBSD-8-0 - FREEBSD-7-STABLE - FREEBSD-7-0 - FREEBSD-6-STABLE - FREEBSD-6-0 - FREEBSD-5-STABLE - FREEBSD-5-0 - FREEBSD-4-STABLE - FREEBSD-3-STABLE - FREEBSD22 - l41 - OPENBSD - linux-2.6 - MK84 - PLAN9 - xnu-8792
SearchContext: - none - 3 - 10
SearchContext: - none - 3 - 10
1 /* $OpenBSD: cissreg.h,v 1.12 2022/01/09 05:42:38 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 2005,2006 Michael Shalayeff 5 * All rights reserved. 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN 16 * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT 17 * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #define CISS_BIGBIT 0x80 /* texas radio and the big beat! */ 21 22 #define CISS_IDB 0x20 23 #define CISS_IDB_CFG 0x01 24 #define CISS_ISR 0x30 25 #define CISS_IMR 0x34 26 #define CISS_READYENAB 4 27 #define CISS_READYENA 8 28 #define CISS_INQ 0x40 29 #define CISS_OUTQ 0x44 30 #define CISS_CFG_BAR 0xb4 31 #define CISS_CFG_OFF 0xb8 32 33 /* 64bit FIFO mode input/output post queues */ 34 #define CISS_INQ64_LO 0xc0 35 #define CISS_INQ64_HI 0xc4 36 #define CISS_OUTQ64_LO 0xc8 37 #define CISS_OUTQ64_HI 0xcc 38 39 #define CISS_DRVMAP_SIZE (128 / 8) 40 41 #define CISS_CMD_CTRL_GET 0x26 42 #define CISS_CMD_CTRL_SET 0x27 43 /* sub-commands for GET/SET */ 44 #define CISS_CMS_CTRL_LDID 0x10 45 #define CISS_CMS_CTRL_CTRL 0x11 46 #define CISS_CMS_CTRL_LDSTAT 0x12 47 #define CISS_CMS_CTRL_PDID 0x15 48 #define CISS_CMS_CTRL_PDBLINK 0x16 49 #define CISS_CMS_CTRL_PDBLSENS 0x17 50 #define CISS_CMS_CTRL_LDIDEXT 0x18 51 #define CISS_CMS_CTRL_REDSTAT 0x82 52 #define CISS_CMS_CTRL_FLUSH 0xc2 53 #define CISS_CMS_CTRL_ACCEPT 0xe0 54 55 #define CISS_CMD_READ 0xc0 56 #define CISS_CMD_READ_EVENT 0xd0 57 #define CISS_EVENT_RECENT 0x08 /* ignore previous events */ 58 #define CISS_EVENT_RSTOLD 0x04 /* start w/ the oldest one */ 59 #define CISS_EVENT_ORDER 0x02 /* keep the order */ 60 #define CISS_EVENT_SYNC 0x01 /* sync mode: wait till new come */ 61 #define CISS_CMD_LDMAP 0xc2 62 #define CISS_CMD_PDMAP 0xc3 63 64 #define ciss_bitset(d, v) ((v)[(d) >> 3] & (1 << ((d) & 7))) 65 66 struct ciss_softc; 67 68 struct ciss_config { 69 u_int32_t signature; 70 #define CISS_SIGNATURE (*(u_int32_t *)"CISS") 71 u_int32_t version; 72 u_int32_t methods; 73 #define CISS_METH_READY 0x00000001 /* indicate to accept commands */ 74 #define CISS_METH_SIMPL 0x00000002 /* simple mode */ 75 #define CISS_METH_PERF 0x00000004 /* performant mode */ 76 #define CISS_METH_EMQ 0x00000008 /* MEMQ method */ 77 #define CISS_METH_BIT63 0x08000000 /* address bit 63 is valid */ 78 #define CISS_METH_FIFO64_RRO 0x10000000 /* 64bit FIFO reverse read order */ 79 #define CISS_METH_SHORT_TAG 0x20000000 /* short 4 byte tag support */ 80 #define CISS_METH_MSIX 0x40000000 /* directed MSI-X support */ 81 #define CISS_METH_FIFO64 0x80000000 /* 64bit FIFO support */ 82 u_int32_t amethod; 83 u_int32_t rmethod; 84 u_int32_t paddr_lim; 85 u_int32_t int_delay; 86 u_int32_t int_count; 87 u_int32_t maxcmd; 88 u_int32_t scsibus; 89 #define CISS_BUS_U2 0x0001 90 #define CISS_BUS_U3 0x0002 91 #define CISS_BUS_FC1 0x0100 92 #define CISS_BUS_FC2 0x0200 93 u_int32_t troff; 94 u_int8_t hostname[16]; 95 u_int32_t heartbeat; 96 u_int32_t driverf; 97 #define CISS_DRV_UATT 0x0001 98 #define CISS_DRV_QINI 0x0002 99 #define CISS_DRV_LCKINT 0x0004 100 #define CISS_DRV_QTAGS 0x0008 101 #define CISS_DRV_ALPHA 0x0010 102 #define CISS_DRV_LUNS 0x0020 103 #define CISS_DRV_MSGRQ 0x0080 104 #define CISS_DRV_DBRD 0x0100 105 #define CISS_DRV_PRF 0x0200 106 u_int32_t maxsg; 107 } __packed; 108 109 struct ciss_inquiry { 110 u_int8_t numld; 111 u_int8_t sign[4]; 112 u_int8_t fw_running[4]; 113 u_int8_t fw_stored[4]; 114 u_int8_t hw_rev; 115 u_int8_t resv0[12]; 116 u_int16_t pci_vendor; 117 u_int16_t pci_product; 118 u_int8_t resv1[10]; 119 u_int8_t market_rev; 120 u_int8_t flags; 121 #define CISS_INQ_WIDE 0x08 122 #define CISS_INQ_BIGMAP 0x80 123 #define CISS_INQ_BITS "\020\04WIDE\010BIGMAP" 124 u_int8_t resv2[2]; 125 u_int8_t nscsi_bus; 126 u_int8_t resv3[4]; 127 u_int8_t clk[4]; /* unaligned dumbness */ 128 u_int8_t buswidth; 129 u_int8_t disks[CISS_DRVMAP_SIZE]; 130 u_int8_t extdisks[CISS_DRVMAP_SIZE]; 131 u_int8_t nondisks[CISS_DRVMAP_SIZE]; 132 } __packed; 133 134 struct ciss_ldmap { 135 u_int32_t size; 136 u_int32_t resv; 137 struct { 138 u_int32_t tgt; 139 u_int32_t tgt2; 140 } map[1]; 141 } __packed; 142 143 struct ciss_flush { 144 u_int16_t flush; 145 #define CISS_FLUSH_ENABLE 0 146 #define CISS_FLUSH_DISABLE 1 147 u_int16_t resv[255]; 148 } __packed; 149 150 struct ciss_blink { 151 u_int32_t duration; /* x100ms */ 152 u_int32_t elapsed; /* only for sense */ 153 u_int8_t pdtab[256]; 154 #define CISS_BLINK_ALL 1 155 #define CISS_BLINK_TIMED 2 156 u_int8_t res[248]; 157 } __packed; 158 159 struct ciss_ldid { 160 u_int16_t blksize; 161 u_int16_t nblocks[2]; /* UNALIGNED! */ 162 u_int8_t params[16]; 163 u_int8_t type; 164 #define CISS_LD_RAID0 0 165 #define CISS_LD_RAID4 1 166 #define CISS_LD_RAID1 2 167 #define CISS_LD_RAID5 3 168 #define CISS_LD_RAID51 4 169 #define CISS_LD_RAIDADG 5 170 u_int8_t res0; 171 u_int8_t bios_dis; 172 u_int8_t res1; 173 u_int32_t id; 174 u_int8_t label[64]; 175 u_int64_t nbigblocks; 176 u_int8_t res2[410]; 177 } __packed; 178 179 struct ciss_ldstat { 180 u_int8_t stat; 181 #define CISS_LD_OK 0 182 #define CISS_LD_FAILED 1 183 #define CISS_LD_UNCONF 2 184 #define CISS_LD_DEGRAD 3 185 #define CISS_LD_RBLDRD 4 /* ready for rebuild */ 186 #define CISS_LD_REBLD 5 187 #define CISS_LD_PDINV 6 /* wrong phys drive replaced */ 188 #define CISS_LD_PDUNC 7 /* phys drive is not connected proper */ 189 #define CISS_LD_EXPND 10 /* expanding */ 190 #define CISS_LD_NORDY 11 /* volume is not ready */ 191 #define CISS_LD_QEXPND 12 /* queued for expansion */ 192 u_int8_t failed[4]; /* failed map */ 193 u_int8_t res0[416]; 194 u_int8_t prog[4]; /* blocks left to rebuild/expand */ 195 u_int8_t rebuild; /* drive that is rebuilding */ 196 u_int16_t remapcnt[32]; /* count of re3mapped blocks for pds */ 197 u_int8_t replaced[4]; /* replaced drives map */ 198 u_int8_t spare[4]; /* used spares map */ 199 u_int8_t sparestat; /* spare status */ 200 #define CISS_LD_CONF 0x01 /* spare configured */ 201 #define CISS_LD_RBLD 0x02 /* spare is used and rebuilding */ 202 #define CISS_LD_DONE 0x04 /* spare rebuild done */ 203 #define CISS_LD_FAIL 0x08 /* at least one spare drive has failed */ 204 #define CISS_LD_USED 0x10 /* at least one spare drive is used */ 205 #define CISS_LD_AVAIL 0x20 /* at least one spare is available */ 206 u_int8_t sparemap[32]; /* spare->pd replacement map */ 207 u_int8_t replok[4]; /* replaced failed map */ 208 u_int8_t readyok; /* ready to become ok */ 209 u_int8_t memfail; /* cache mem failure */ 210 u_int8_t expfail; /* expansion failure */ 211 u_int8_t rebldfail; /* rebuild failure */ 212 #define CISS_LD_RBLD_READ 0x01 /* read failed */ 213 #define CISS_LD_RBLD_WRITE 0x02 /* write fail */ 214 u_int8_t bigfailed[16]; /* bigmap vers of same of the above */ 215 u_int8_t bigremapcnt[256]; 216 u_int8_t bigreplaced[16]; 217 u_int8_t bigspare[16]; 218 u_int8_t bigsparemap[128]; 219 u_int8_t bigreplok[16]; 220 u_int8_t bigrebuild; /* big-number rebuilding driveno */ 221 } __packed; 222 223 struct ciss_pdid { 224 u_int8_t bus; 225 u_int8_t target; 226 u_int16_t blksz; 227 u_int32_t nblocks; 228 u_int32_t resblks; 229 u_int8_t model[40]; 230 u_int8_t serial[40]; 231 u_int8_t revision[8]; 232 u_int8_t bits; 233 u_int8_t res0[2]; 234 u_int8_t present; 235 #define CISS_PD_PRESENT 0x01 236 #define CISS_PD_NONDSK 0x02 237 #define CISS_PD_WIDE 0x04 238 #define CISS_PD_SYNC 0x08 239 #define CISS_PD_NARROW 0x10 240 #define CISS_PD_W2NARR 0x20 /* wide downgrade to narrow */ 241 #define CISS_PD_ULTRA 0x40 242 #define CISS_PD_ULTRA2 0x80 243 u_int8_t config; 244 #define CISS_PD_SMART 0x01 245 #define CISS_PD_SMERRR 0x02 246 #define CISS_PD_SMERRE 0x04 247 #define CISS_PD_SMERRD 0x08 248 #define CISS_PD_EXT 0x10 249 #define CISS_PD_CONF 0x20 250 #define CISS_PD_SPARE 0x40 251 #define CISS_PD_CASAVE 0x80 252 u_int8_t res1; 253 u_int8_t cache; 254 #define CISS_PD_CACHE 0x01 255 #define CISS_PD_CASAFE 0x01 256 u_int8_t res2[5]; 257 u_int8_t connector[2]; 258 u_int8_t res3; 259 u_int8_t bay; 260 u_int16_t rpm; 261 u_int8_t type; 262 u_int8_t res4[393]; 263 } __packed; 264 265 struct ciss_event { 266 u_int32_t reltime; /* time since controller boot */ 267 u_int16_t event; 268 #define CISS_EVCLS_PROTO 0 269 #define CISS_EVCLS_PLUG 1 270 #define CISS_EVCLS_HW 2 271 #define CISS_EVCLS_ENV 3 272 #define CISS_EVCLS_PD 4 /* ciss_evpdchg in details */ 273 #define CISS_EVCLS_LD 5 274 #define CISS_EVCLS_CTRL 6 275 #define CISS_EVCLS_CISS 8 /* funky errors */ 276 #define CISS_EVCLS_RESV 9 277 u_int16_t subevent; 278 #define CISS_EVPROTO_STAT 0 279 #define CISS_EVPROTO_ERR 1 280 #define CISS_EVPLUG_PDCHG 0 /* ciss_evpdchg */ 281 #define CISS_EVPLUG_POWER 1 /* ciss_evpschg */ 282 #define CISS_EVPLUG_FAN 2 /* ciss_evfanchg */ 283 #define CISS_EVPLUG_UPS 3 /* ciss_evupschg */ 284 #define CISS_EVPLUG_CTRL 4 /* ciss_evctrlchg: ctrl removed? (; */ 285 #define CISS_EVHW_CABLES 0 286 #define CISS_EVHW_MEMORY 1 287 #define CISS_EVHW_FAN 2 /* detail as in CISS_EVPLUG_FAN */ 288 #define CISS_EVHW_VRM 3 289 #define CISS_EVENV_TEMP 0 /* ciss_evtempchg */ 290 #define CISS_EVENV_PS 1 291 #define CISS_EVENV_CHASSIS 2 292 #define CISS_EVENV_AC 3 293 #define CISS_EVPD_STAT 0 294 #define CISS_EVLD_STAT 0 295 #define CISS_EVLD_ERR 1 296 #define CISS_EVLD_CHECK 2 /* surface check */ 297 #define CISS_EVCTRL_STAT 0 298 u_int16_t detail; 299 #define CISS_EVSTAT_NONE 0 300 #define CISS_EVSTAT_DISABLE 1 301 #define CISS_EVSTAT_TMO 2 /* async event poll timeout */ 302 #define CISS_EVERR_OVERFLOW 0 /* event queue overflow */ 303 #define CISS_EVPLUG_REMOVE 0 304 #define CISS_EVPLUG_INSERT 1 305 #define CISS_EVFAN_FAULT 0 306 #define CISS_EVFAN_DEGRADED 1 307 #define CISS_EVFAN_OK 2 308 #define CISS_EVVRM_REMOVE 0 309 #define CISS_EVVRM_INSERT 1 310 #define CISS_EVVRM_FAILED 2 311 #define CISS_EVVRM_OK 3 312 #define CISS_EVTEMP_LIMEX 0 /* limit exceeded */ 313 #define CISS_EVTEMP_WARN 1 314 #define CISS_EVTEMP_OK 2 315 #define CISS_EVPS_FAIL 0 316 #define CISS_EVPS_OK 2 317 #define CISS_EVCHAS_OPEN 0 318 #define CISS_EVCHAS_CLOSE 2 319 #define CISS_EVAC_FAIL 0 320 #define CISS_EVAC_BATTLOW 1 321 #define CISS_EVPDSTAT_FAIL 0 322 #define CISS_EVLDSTAT_CHG 0 /* ciss_evldchg */ 323 #define CISS_EVLDSTAT_EXMEDIA 1 /* untolerant cfg got drive replaced */ 324 #define CISS_EVLDSTAT_RERDERR 2 /* ciss_evldrblderr */ 325 #define CISS_EVLDSTAT_REWRERR 3 /* ciss_evldrblderr */ 326 #define CISS_EVLDERR_FATAL 0 /* ciss_evlderr */ 327 #define CISS_EVCHECK_DONE 0 /* details have onle 16bit ld num */ 328 #define CISS_EVCTRLSTAT_CHG 0 /* ciss_evctrlstat */ 329 u_int8_t data[64]; 330 u_int8_t msg[80]; 331 u_int32_t tag; 332 u_int16_t monday; 333 u_int16_t year; 334 u_int32_t time; 335 u_int16_t presec; /* time for events before boot */ 336 u_int8_t device[8]; 337 u_int8_t resv[336]; 338 } __packed; 339 340 struct ciss_evpdchg { /* details pointer */ 341 u_int16_t pd; 342 u_int8_t flag; /* 1 for configured */ 343 u_int8_t spare; 344 u_int8_t bigpd; /* big number of the pd */ 345 u_int8_t baynum; 346 } __packed; 347 348 struct ciss_evpschg { /* details pointer */ 349 u_int16_t port; 350 u_int16_t psid; 351 u_int16_t box; 352 } __packed; 353 354 struct ciss_evfanchg { /* details pointer */ 355 u_int16_t port; 356 u_int16_t fanid; 357 u_int16_t box; 358 } __packed; 359 360 struct ciss_evupschg { /* details pointer */ 361 u_int16_t port; 362 u_int16_t upsid; 363 } __packed; 364 365 struct ciss_evctrlchg { /* details pointer */ 366 u_int16_t slot; 367 } __packed; 368 369 struct ciss_evtempchg { /* details pointer */ 370 u_int16_t port; 371 u_int16_t sensid; 372 u_int16_t box; 373 } __packed; 374 375 struct ciss_evldchg { /* details pointer */ 376 u_int16_t ld; 377 u_int8_t prevstat; /* same as ldstat->state */ 378 u_int8_t newstat; /* same as ldstat->state */ 379 u_int8_t sparestat; 380 } __packed; 381 382 struct ciss_evldrblderr { /* details pointer */ 383 u_int16_t ld; 384 u_int8_t replace; 385 u_int8_t errpd; 386 u_int8_t bigreplace; 387 u_int8_t bigerrpd; 388 } __packed; 389 390 struct ciss_evlderr { /* details pointer */ 391 u_int16_t ld; 392 u_int16_t blkno[2]; /* unaligned; if >2tb see big later */ 393 u_int16_t count; 394 u_int8_t ldcmd; 395 u_int8_t bus; 396 u_int8_t target; 397 u_int8_t bigblkno[8]; /* unaligned */ 398 } __packed; 399 400 struct ciss_evctrlstat { /* details pointer */ 401 u_int8_t prefctrl; 402 u_int8_t currmode; 403 u_int8_t redctrl; 404 u_int8_t redfail; 405 u_int8_t prevctrl; 406 u_int8_t prevmode; 407 u_int8_t prevred; 408 u_int8_t prevfail; 409 } __packed; 410 411 struct ciss_cmd { 412 u_int8_t resv0; /* 00 */ 413 u_int8_t sgin; /* 01: #sg in the cmd */ 414 u_int16_t sglen; /* 02: #sg total */ 415 u_int32_t id; /* 04: cmd id << 2 and status bits */ 416 #define CISS_CMD_ERR 0x02 417 u_int32_t id_hi; /* 08: not used */ 418 u_int32_t tgt; /* 0c: tgt:bus:mode or lun:mode */ 419 #define CISS_CMD_MODE_PERIPH 0x00000000 420 #define CISS_CMD_MODE_LD 0x40000000 421 #define CISS_CMD_TGT_MASK 0x40ffffff 422 #define CISS_CMD_BUS_MASK 0x3f000000 423 #define CISS_CMD_BUS_SHIFT 24 424 u_int32_t tgt2; /* 10: scsi-3 address bytes */ 425 426 u_int8_t cdblen; /* 14: valid length of cdb */ 427 u_int8_t flags; /* 15 */ 428 #define CISS_CDB_CMD 0x00 429 #define CISS_CDB_MSG 0x01 430 #define CISS_CDB_NOTAG 0x00 431 #define CISS_CDB_SIMPL 0x20 432 #define CISS_CDB_QHEAD 0x28 433 #define CISS_CDB_ORDR 0x30 434 #define CISS_CDB_AUTO 0x38 435 #define CISS_CDB_IN 0x80 436 #define CISS_CDB_OUT 0x40 437 u_int16_t tmo; /* 16: timeout in seconds */ 438 #define CISS_MAX_CDB 16 439 u_int8_t cdb[CISS_MAX_CDB]; /* 18 */ 440 441 u_int64_t err_pa; /* 28: pa(struct ciss_error *) */ 442 u_int32_t err_len;/* 30 */ 443 444 struct { /* 34 */ 445 u_int32_t addr_lo; 446 u_int32_t addr_hi; 447 u_int32_t len; 448 u_int32_t flags; 449 #define CISS_SG_EXT 0x0001 450 } sgl[1]; 451 } __packed; 452 453 struct ciss_error { 454 u_int8_t scsi_stat; /* SCSI_OK etc */ 455 u_int8_t senselen; 456 u_int16_t cmd_stat; 457 #define CISS_ERR_OK 0 458 #define CISS_ERR_TGTST 1 /* target status */ 459 #define CISS_ERR_UNRUN 2 460 #define CISS_ERR_OVRUN 3 461 #define CISS_ERR_INVCMD 4 462 #define CISS_ERR_PROTE 5 463 #define CISS_ERR_HWERR 6 464 #define CISS_ERR_CLOSS 7 465 #define CISS_ERR_ABRT 8 466 #define CISS_ERR_FABRT 9 467 #define CISS_ERR_UABRT 10 468 #define CISS_ERR_TMO 11 469 #define CISS_ERR_NABRT 12 470 u_int32_t resid; 471 u_int8_t err_type[4]; 472 u_int32_t err_info; 473 u_int8_t sense[32]; 474 } __packed; 475 476 struct ciss_ccb { 477 SLIST_ENTRY(ciss_ccb) ccb_link; 478 struct ciss_softc *ccb_sc; 479 u_int64_t ccb_cmdpa; 480 enum { 481 CISS_CCB_FREE = 0x01, 482 CISS_CCB_READY = 0x02, 483 CISS_CCB_ONQ = 0x04, 484 CISS_CCB_PREQ = 0x08, 485 CISS_CCB_POLL = 0x10, 486 CISS_CCB_FAIL = 0x80 487 #define CISS_CCB_BITS "\020\01FREE\02READY\03ONQ\04PREQ\05POLL\010FAIL" 488 } ccb_state; 489 490 struct scsi_xfer *ccb_xs; 491 size_t ccb_len; 492 void *ccb_data; 493 bus_dmamap_t ccb_dmamap; 494 495 struct ciss_error ccb_err; 496 struct ciss_cmd ccb_cmd; /* followed by sgl */ 497 }; 498 499 SLIST_HEAD(ciss_ccb_list, ciss_ccb); 500
Cache object: 55409858a927b74c2886d67c6eb2e94a
[ source navigation ] [ diff markup ] [ identifier search ] [ freetext search ] [ file search ] [ list types ] [ track identifier ]