FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/clmpccvar.h
1 /* $NetBSD: clmpccvar.h,v 1.8 2003/11/02 11:07:45 wiz Exp $ */
2
3 /*-
4 * Copyright (c) 1999 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Steve C. Woodford.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #ifndef __clmpccvar_h
40 #define __clmpccvar_h
41
42
43 /* Buffer size for character buffer */
44 #define CLMPCC_RING_SIZE 512
45
46 /* How many channels per chip */
47 #define CLMPCC_NUM_CHANS 4
48
49 /* Reasons for calling the MD code's iack hook function */
50 #define CLMPCC_IACK_MODEM 0
51 #define CLMPCC_IACK_RX 1
52 #define CLMPCC_IACK_TX 2
53
54
55 struct clmpcc_softc;
56
57 /*
58 * Each channel is represented by one of the following structures
59 */
60 struct clmpcc_chan {
61 struct tty *ch_tty; /* This channel's tty structure */
62 struct clmpcc_softc *ch_sc; /* Pointer to chip's softc structure */
63 u_char ch_car; /* Channel number (CD2400_REG_CAR) */
64 u_char ch_openflags; /* Persistent TIOC flags */
65 volatile u_short ch_flags; /* Various channel-specific flags */
66 #define CLMPCC_FLG_IS_CONSOLE 0x0001 /* Channel is system console */
67 #define CLMPCC_FLG_START_BREAK 0x0002
68 #define CLMPCC_FLG_END_BREAK 0x0004
69 #define CLMPCC_FLG_FIFO_CLEAR 0x0008
70 #define CLMPCC_FLG_UPDATE_PARMS 0x0010
71 #define CLMPCC_FLG_NEED_INIT 0x0020
72
73 u_char ch_tx_done;
74
75 u_char ch_control;
76
77 /* New port parameters wait here until written by the Tx ISR */
78 u_char ch_tcor;
79 u_char ch_tbpr;
80 u_char ch_rcor;
81 u_char ch_rbpr;
82 u_char ch_cor1;
83 u_char ch_cor2;
84 u_char ch_cor3;
85 u_char ch_cor4; /* Current Rx Fifo threshold */
86 u_char ch_cor5;
87
88 u_int8_t *ch_ibuf; /* Start of input ring buffer */
89 u_int8_t *ch_ibuf_end; /* End of input ring buffer */
90 u_int8_t *ch_ibuf_rd; /* Input buffer tail (reader) */
91 u_int8_t *ch_ibuf_wr; /* Input buffer head (writer) */
92
93 u_int8_t *ch_obuf_addr; /* Output buffer address */
94 u_int ch_obuf_size; /* Output buffer size (in bytes) */
95 };
96
97
98 struct clmpcc_softc {
99 struct device sc_dev;
100
101 /*
102 * The bus/MD-specific attachment code must initialise the
103 * following fields before calling 'clmpcc_attach_subr()'.
104 */
105 bus_space_tag_t sc_iot; /* Tag for parent bus */
106 bus_space_handle_t sc_ioh; /* Handle for chip's regs */
107 void *sc_data; /* MD-specific data */
108 int sc_clk; /* Clock-rate, in Hz */
109 struct evcnt *sc_evcnt; /* Parent Event Counter (or NULL) */
110 u_char sc_vector_base; /* Vector base reg, or 0 for auto */
111 u_char sc_rpilr; /* Receive Priority Interrupt Level */
112 u_char sc_tpilr; /* Transmit Priority Interrupt Level */
113 u_char sc_mpilr; /* Modem Priority Interrupt Level */
114 int sc_swaprtsdtr; /* Non-zero if RTS and DTR swapped */
115 u_int sc_byteswap; /* One of the following ... */
116 #define CLMPCC_BYTESWAP_LOW 0x00 /* *byteswap pin is low */
117 #define CLMPCC_BYTESWAP_HIGH 0x03 /* *byteswap pin is high */
118
119 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS
120 /* Called to request a soft interrupt callback to clmpcc_softintr */
121 void (*sc_softhook) __P((struct clmpcc_softc *));
122 volatile int sc_soft_running;
123 #else
124 void *sc_softintr_cookie;
125 #endif
126
127 /* Called when an interrupt has to be acknowledged in polled mode. */
128 void (*sc_iackhook) __P((struct clmpcc_softc *, int));
129
130 /*
131 * No user-serviceable parts below
132 */
133 struct clmpcc_chan sc_chans[CLMPCC_NUM_CHANS];
134 };
135
136 extern void clmpcc_attach __P((struct clmpcc_softc *));
137 extern int clmpcc_cnattach __P((struct clmpcc_softc *, int, int));
138 extern int clmpcc_rxintr __P((void *));
139 extern int clmpcc_txintr __P((void *));
140 extern int clmpcc_mdintr __P((void *));
141 extern void clmpcc_softintr __P((void *));
142
143 #endif /* __clmpccvar_h */
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