FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/cs89x0var.h
1 /* $NetBSD: cs89x0var.h,v 1.6 2003/07/08 10:06:30 itojun Exp $ */
2
3 /*
4 * Copyright 1997
5 * Digital Equipment Corporation. All rights reserved.
6 *
7 * This software is furnished under license and may be used and
8 * copied only in accordance with the following terms and conditions.
9 * Subject to these conditions, you may download, copy, install,
10 * use, modify and distribute this software in source and/or binary
11 * form. No title or ownership is transferred hereby.
12 *
13 * 1) Any source code used, modified or distributed must reproduce
14 * and retain this copyright notice and list of conditions as
15 * they appear in the source file.
16 *
17 * 2) No right is granted to use any trade name, trademark, or logo of
18 * Digital Equipment Corporation. Neither the "Digital Equipment
19 * Corporation" name nor any trademark or logo of Digital Equipment
20 * Corporation may be used to endorse or promote products derived
21 * from this software without the prior written permission of
22 * Digital Equipment Corporation.
23 *
24 * 3) This software is provided "AS-IS" and any express or implied
25 * warranties, including but not limited to, any implied warranties
26 * of merchantability, fitness for a particular purpose, or
27 * non-infringement are disclaimed. In no event shall DIGITAL be
28 * liable for any damages whatsoever, and in particular, DIGITAL
29 * shall not be liable for special, indirect, consequential, or
30 * incidental damages or damages for lost profits, loss of
31 * revenue or loss of use, whether such damages arise in contract,
32 * negligence, tort, under statute, in equity, at law or otherwise,
33 * even if advised of the possibility of such damage.
34 */
35
36 /*
37 **++
38 ** FACILITY Crystal CS8900 Ethernet driver header file
39 **
40 ** ABSTRACT
41 **
42 ** This module provides CS8900 driver softc and related definitions
43 **
44 ** AUTHORS
45 **
46 ** Peter Dettori SEA - Software Engineering.
47 **
48 ** CREATION DATE:
49 **
50 ** 13-Feb-1997.
51 **
52 ** MODIFICATION HISTORY:
53 **
54 **--
55 */
56
57 #ifndef _DEV_IC_CS89X0VAR_H_
58 #define _DEV_IC_CS89X0VAR_H_
59
60 /*
61 * Ethernet software status per interface.
62 *
63 * Each interface is referenced by a network interface structure,
64 * arpcom.ac_if, which the routing code uses to locate the interface.
65 * This structure contains the output queue for the interface,
66 * its address, ...
67 */
68 struct cs_softc {
69 struct device sc_dev; /* base device glue */
70 struct ethercom sc_ethercom; /* Ethernet common */
71 struct ifmedia sc_media; /* media control structures */
72
73 void *sc_ih; /* interrupt handler */
74 void *sc_sh; /* shutdown hook */
75
76 bus_space_tag_t sc_iot; /* bus space tag for IO */
77 bus_space_tag_t sc_memt; /* bus space tag for memory mode */
78 bus_space_handle_t sc_ioh; /* bus space handles */
79 bus_space_handle_t sc_memh;
80
81 #if 0
82 isa_chipset_tag_t sc_ic; /* ISA chipset */
83 #endif
84
85 int sc_irq; /* IRQ line */
86
87 int sc_prodid; /* saved product ID */
88 int sc_prodrev; /* saved product rev */
89
90 bus_addr_t sc_pktpgaddr; /* PacketPage bus memory address */
91
92 int sc_cfgflags; /* software configuration flags */
93
94 int sc_memorymode; /* are we in memory mode? */
95 int sc_txbusy; /* transmit in progress */
96 int sc_resetting; /* reset in progress */
97
98 int sc_xe_ent; /* current early-xmit table entry */
99 int sc_xe_togo; /* # of packets to go at this ent */
100
101 int sc_carrier; /* has carrier */
102
103 u_int8_t sc_enaddr[ETHER_ADDR_LEN]; /* MAC address */
104
105 #if NRND > 0
106 rndsource_element_t rnd_source; /* random source */
107 #endif
108
109 /* power management */
110 int (*sc_enable)(struct cs_softc *);
111 void (*sc_disable)(struct cs_softc *);
112 void *sc_powerhook;
113
114 /* DMA hooks */
115 void (*sc_dma_process_rx)(struct cs_softc *);
116 void (*sc_dma_chipinit)(struct cs_softc *);
117 void (*sc_dma_attach)(struct cs_softc *);
118
119 /* register access hooks */
120 u_int8_t (*sc_io_read_1)(struct cs_softc *, bus_size_t);
121 u_int16_t (*sc_io_read_2)(struct cs_softc *, bus_size_t);
122 void (*sc_io_read_multi_2)(struct cs_softc *, bus_size_t, u_int16_t *,
123 bus_size_t);
124 void (*sc_io_write_2)(struct cs_softc *, bus_size_t, u_int16_t);
125 void (*sc_io_write_multi_2)(struct cs_softc *, bus_size_t,
126 const u_int16_t *, bus_size_t);
127 u_int16_t (*sc_mem_read_2)(struct cs_softc *, bus_size_t);
128 void (*sc_mem_write_2)(struct cs_softc *, bus_size_t, u_int16_t);
129 void (*sc_mem_write_region_2)(struct cs_softc *, bus_size_t,
130 const u_int16_t *, bus_size_t);
131 };
132
133 #define IO_READ_1(sc, a) \
134 (sc)->sc_io_read_1 ? \
135 (sc)->sc_io_read_1((sc), (a)) : \
136 bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (a))
137 #define IO_READ_2(sc, a) \
138 (sc)->sc_io_read_2 ? \
139 (sc)->sc_io_read_2((sc), (a)) : \
140 bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (a))
141 #define IO_READ_MULTI_2(sc, a, b, c) \
142 if ((sc)->sc_io_read_multi_2) \
143 (sc)->sc_io_read_multi_2((sc), (a), (b), (c)); else \
144 bus_space_read_multi_2((sc)->sc_iot, (sc)->sc_ioh, (a), (b), (c))
145 #define IO_WRITE_2(sc, a, d) \
146 if ((sc)->sc_io_write_2) \
147 (sc)->sc_io_write_2((sc), (a), (d)); else \
148 bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (a), (d))
149 #define IO_WRITE_MULTI_2(sc, a, d, c) \
150 if ((sc)->sc_io_write_multi_2) \
151 (sc)->sc_io_write_multi_2((sc), (a), (d), (c)); else \
152 bus_space_write_multi_2((sc)->sc_iot, (sc)->sc_ioh, (a), (d), (c))
153 #define MEM_READ_2(sc, a) \
154 (sc)->sc_mem_read_2 ? \
155 (sc)->sc_mem_read_2((sc), (a)) : \
156 bus_space_read_2((sc)->sc_memt, (sc)->sc_memh, (a))
157 #define MEM_WRITE_2(sc, a, d) \
158 if ((sc)->sc_mem_write_2) \
159 (sc)->sc_mem_write_2((sc), (a), (d)); else \
160 bus_space_write_2((sc)->sc_memt, (sc)->sc_memh, (a), (d))
161 #define MEM_WRITE_REGION_2(sc, a, d, c) \
162 if ((sc)->sc_mem_write_region_2) \
163 (sc)->sc_mem_write_region_2((sc), (a), (d), (c)); else \
164 bus_space_write_region_2((sc)->sc_memt, (sc)->sc_memh, (a), (d), (c))
165
166
167 /* Config Flags in cs_softc */
168
169 #define CFGFLG_MEM_MODE 0x0001
170 #define CFGFLG_USE_SA 0x0002
171 #define CFGFLG_IOCHRDY 0x0004
172 #define CFGFLG_DCDC_POL 0x0008
173 #define CFGFLG_DMA_MODE 0x0020
174 #define CFGFLG_ATTACHED 0x0040 /* XXX should not be here? */
175 #define CFGFLG_CARDBUS_HACK 0x0080
176 #define CFGFLG_ENABLED 0x0100 /* XXX should not be here? */
177 #define CFGFLG_NOT_EEPROM 0x8000
178
179
180 /*
181 * Inlines for reading/writing the packet page area.
182 */
183
184 static __inline__ u_int16_t _cs_read_port(struct cs_softc *, int);
185
186 static __inline__ u_int16_t
187 _cs_read_port(struct cs_softc *sc, int off)
188 {
189 u_int16_t result;
190
191 if (sc->sc_cfgflags & CFGFLG_CARDBUS_HACK) {
192 /*
193 * hack for EtherJet PCMCIA and cardbus (obtained from freebsd)
194 *
195 * EtherJet PCMCIA don't work with cardbus bridges
196 * (at least TI1250) without this hack.
197 */
198 result = (IO_READ_1(sc, off) & 0xff);
199 result |= ((IO_READ_1(sc, off+1) & 0xff) << 8);
200 }
201 else {
202 result = IO_READ_2(sc, off);
203 }
204
205 return result;
206 }
207
208 static __inline__ u_int16_t _CS_READ_PACKET_PAGE_IO(struct cs_softc *, int);
209
210 static __inline__ u_int16_t
211 _CS_READ_PACKET_PAGE_IO(struct cs_softc *sc, int offset)
212 {
213
214 IO_WRITE_2(sc, PORT_PKTPG_PTR, offset);
215 return (_cs_read_port(sc, PORT_PKTPG_DATA));
216 }
217
218 static __inline__ u_int16_t CS_READ_PACKET_PAGE_IO(struct cs_softc *, int);
219
220 static __inline__ u_int16_t
221 CS_READ_PACKET_PAGE_IO(struct cs_softc *sc, int offset)
222 {
223
224 IO_WRITE_2(sc, PORT_PKTPG_PTR, offset);
225 return (IO_READ_2(sc, PORT_PKTPG_DATA));
226 }
227
228 #define CS_READ_PACKET_PAGE_MEM(sc, offset) \
229 MEM_READ_2((sc), (offset))
230
231 #define CS_READ_PACKET_PAGE(sc, offset) \
232 ((sc)->sc_memorymode ? CS_READ_PACKET_PAGE_MEM((sc), (offset)) :\
233 _CS_READ_PACKET_PAGE_IO((sc), (offset)))
234
235 #define CS_WRITE_PACKET_PAGE_IO(sc, offset, val) \
236 do { \
237 IO_WRITE_2((sc), PORT_PKTPG_PTR, (offset)); \
238 IO_WRITE_2((sc), PORT_PKTPG_DATA, (val)); \
239 } while (0)
240
241 #define CS_WRITE_PACKET_PAGE_MEM(sc, offset, val) \
242 MEM_WRITE_2((sc), (offset), (val))
243
244 #define CS_WRITE_PACKET_PAGE(sc, offset, val) \
245 do { \
246 if ((sc)->sc_memorymode) \
247 CS_WRITE_PACKET_PAGE_MEM((sc), (offset), (val)); \
248 else \
249 CS_WRITE_PACKET_PAGE_IO((sc), (offset), (val)); \
250 } while (0)
251
252 #define CS_READ_PORT(sc, off)\
253 IO_READ_2((sc), (off))
254
255 #define CS_WRITE_PORT(sc, off, val)\
256 IO_WRITE_2((sc), (off), (val))
257
258
259 /* Return Status */
260 #define CS_ERROR -1
261 #define CS_OK 1
262
263
264 /* Media Type in cs_softc */
265
266 #define MEDIA_AUI 0x0001
267 #define MEDIA_10BASE2 0x0002
268 #define MEDIA_10BASET 0x0003
269
270
271 /* Miscellaneous definitions */
272
273 #define MAXLOOP 0x8888
274
275 int cs_attach(struct cs_softc *, u_int8_t *, int *, int, int);
276 int cs_detach(struct cs_softc *);
277 int cs_verify_eeprom(struct cs_softc *);
278 int cs_read_eeprom(struct cs_softc *, int, u_int16_t *);
279 int cs_intr(void *);
280 int cs_activate(struct device *, enum devact);
281 void cs_ether_input(struct cs_softc *, struct mbuf *);
282 void cs_print_rx_errors(struct cs_softc *, u_int16_t);
283 int cs_init(struct ifnet *);
284
285 #define CS_IS_ENABLED(sc) ((sc)->sc_cfgflags & CFGFLG_ENABLED)
286
287 #endif /* _DEV_IC_CS89X0VAR_H_ */
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