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sys/dev/ic/elink3.c
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1 /* $NetBSD: elink3.c,v 1.106 2003/01/31 00:26:29 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan@NetBSD.org> 42 * Copyright (c) 1994 Herb Peyerl <hpeyerl@beer.org> 43 * All rights reserved. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by Herb Peyerl. 56 * 4. The name of Herb Peyerl may not be used to endorse or promote products 57 * derived from this software without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 #include <sys/cdefs.h> 72 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.106 2003/01/31 00:26:29 thorpej Exp $"); 73 74 #include "opt_inet.h" 75 #include "opt_ns.h" 76 #include "bpfilter.h" 77 #include "rnd.h" 78 79 #include <sys/param.h> 80 #include <sys/systm.h> 81 #include <sys/callout.h> 82 #include <sys/kernel.h> 83 #include <sys/mbuf.h> 84 #include <sys/socket.h> 85 #include <sys/ioctl.h> 86 #include <sys/errno.h> 87 #include <sys/syslog.h> 88 #include <sys/select.h> 89 #include <sys/device.h> 90 #if NRND > 0 91 #include <sys/rnd.h> 92 #endif 93 94 #include <net/if.h> 95 #include <net/if_dl.h> 96 #include <net/if_ether.h> 97 #include <net/if_media.h> 98 99 #if NBPFILTER > 0 100 #include <net/bpf.h> 101 #include <net/bpfdesc.h> 102 #endif 103 104 #include <machine/cpu.h> 105 #include <machine/bus.h> 106 #include <machine/intr.h> 107 108 #include <dev/mii/mii.h> 109 #include <dev/mii/miivar.h> 110 #include <dev/mii/mii_bitbang.h> 111 112 #include <dev/ic/elink3var.h> 113 #include <dev/ic/elink3reg.h> 114 115 #ifdef DEBUG 116 int epdebug = 0; 117 #endif 118 119 /* 120 * XXX endian workaround for big-endian CPUs with pcmcia: 121 * if stream methods for bus_space_multi are not provided, define them 122 * using non-stream bus_space_{read,write}_multi_. 123 * Assumes host CPU is same endian-ness as bus. 124 */ 125 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 126 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 127 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 128 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 129 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 130 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 131 132 /* 133 * Structure to map media-present bits in boards to ifmedia codes and 134 * printable media names. Used for table-driven ifmedia initialization. 135 */ 136 struct ep_media { 137 int epm_mpbit; /* media present bit */ 138 const char *epm_name; /* name of medium */ 139 int epm_ifmedia; /* ifmedia word for medium */ 140 int epm_epmedia; /* ELINKMEDIA_* constant */ 141 }; 142 143 /* 144 * Media table for the Demon/Vortex/Boomerang chipsets. 145 * 146 * Note that MII on the Demon and Vortex (3c59x) indicates an external 147 * MII connector (for connecting an external PHY) ... I think. Treat 148 * it as `manual' on these chips. 149 * 150 * Any Boomerang (3c90x) chips with MII really do have an internal 151 * MII and real PHYs attached; no `native' media. 152 */ 153 const struct ep_media ep_vortex_media[] = { 154 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T, 155 ELINKMEDIA_10BASE_T }, 156 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX, 157 ELINKMEDIA_10BASE_T }, 158 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5, 159 ELINKMEDIA_AUI }, 160 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2, 161 ELINKMEDIA_10BASE_2 }, 162 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX, 163 ELINKMEDIA_100BASE_TX }, 164 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX, 165 ELINKMEDIA_100BASE_TX }, 166 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX, 167 ELINKMEDIA_100BASE_FX }, 168 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL, 169 ELINKMEDIA_MII }, 170 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4, 171 ELINKMEDIA_100BASE_T4 }, 172 { 0, NULL, 0, 173 0 }, 174 }; 175 176 /* 177 * Media table for the older 3Com Etherlink III chipset, used 178 * in the 3c509, 3c579, and 3c589. 179 */ 180 const struct ep_media ep_509_media[] = { 181 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T, 182 ELINKMEDIA_10BASE_T }, 183 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5, 184 ELINKMEDIA_AUI }, 185 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2, 186 ELINKMEDIA_10BASE_2 }, 187 { 0, NULL, 0, 188 0 }, 189 }; 190 191 void ep_internalconfig __P((struct ep_softc *sc)); 192 void ep_vortex_probemedia __P((struct ep_softc *sc)); 193 void ep_509_probemedia __P((struct ep_softc *sc)); 194 195 static void eptxstat __P((struct ep_softc *)); 196 static int epstatus __P((struct ep_softc *)); 197 int epinit __P((struct ifnet *)); 198 void epstop __P((struct ifnet *, int)); 199 int epioctl __P((struct ifnet *, u_long, caddr_t)); 200 void epstart __P((struct ifnet *)); 201 void epwatchdog __P((struct ifnet *)); 202 void epreset __P((struct ep_softc *)); 203 static void epshutdown __P((void *)); 204 void epread __P((struct ep_softc *)); 205 struct mbuf *epget __P((struct ep_softc *, int)); 206 void epmbuffill __P((void *)); 207 void epmbufempty __P((struct ep_softc *)); 208 void epsetfilter __P((struct ep_softc *)); 209 void ep_roadrunner_mii_enable __P((struct ep_softc *)); 210 void epsetmedia __P((struct ep_softc *)); 211 212 /* ifmedia callbacks */ 213 int ep_media_change __P((struct ifnet *ifp)); 214 void ep_media_status __P((struct ifnet *ifp, struct ifmediareq *req)); 215 216 /* MII callbacks */ 217 int ep_mii_readreg __P((struct device *, int, int)); 218 void ep_mii_writereg __P((struct device *, int, int, int)); 219 void ep_statchg __P((struct device *)); 220 221 void ep_tick __P((void *)); 222 223 static int epbusyeeprom __P((struct ep_softc *)); 224 u_int16_t ep_read_eeprom __P((struct ep_softc *, u_int16_t)); 225 static inline void ep_reset_cmd __P((struct ep_softc *sc, 226 u_int cmd, u_int arg)); 227 static inline void ep_finish_reset __P((bus_space_tag_t, bus_space_handle_t)); 228 static inline void ep_discard_rxtop __P((bus_space_tag_t, bus_space_handle_t)); 229 static __inline int ep_w1_reg __P((struct ep_softc *, int)); 230 231 /* 232 * MII bit-bang glue. 233 */ 234 u_int32_t ep_mii_bitbang_read __P((struct device *)); 235 void ep_mii_bitbang_write __P((struct device *, u_int32_t)); 236 237 const struct mii_bitbang_ops ep_mii_bitbang_ops = { 238 ep_mii_bitbang_read, 239 ep_mii_bitbang_write, 240 { 241 PHYSMGMT_DATA, /* MII_BIT_MDO */ 242 PHYSMGMT_DATA, /* MII_BIT_MDI */ 243 PHYSMGMT_CLK, /* MII_BIT_MDC */ 244 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */ 245 0, /* MII_BIT_DIR_PHY_HOST */ 246 } 247 }; 248 249 /* 250 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have 251 * Window 1 registers offset! 252 */ 253 static __inline int 254 ep_w1_reg(sc, reg) 255 struct ep_softc *sc; 256 int reg; 257 { 258 259 switch (sc->ep_chipset) { 260 case ELINK_CHIPSET_CORKSCREW: 261 return (reg + 0x10); 262 263 case ELINK_CHIPSET_ROADRUNNER: 264 switch (reg) { 265 case ELINK_W1_FREE_TX: 266 case ELINK_W1_RUNNER_RDCTL: 267 case ELINK_W1_RUNNER_WRCTL: 268 return (reg); 269 } 270 return (reg + 0x10); 271 } 272 273 return (reg); 274 } 275 276 /* 277 * Wait for any pending reset to complete. 278 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS, 279 * but older hardware doesn't implement it and we must delay. 280 */ 281 static inline void 282 ep_finish_reset(iot, ioh) 283 bus_space_tag_t iot; 284 bus_space_handle_t ioh; 285 { 286 int i; 287 288 for (i = 0; i < 10000; i++) { 289 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 290 COMMAND_IN_PROGRESS) == 0) 291 break; 292 DELAY(10); 293 } 294 } 295 296 /* 297 * Issue a (reset) command, and be sure it has completed. 298 * Used for global reset, TX_RESET, RX_RESET. 299 */ 300 static inline void 301 ep_reset_cmd(sc, cmd, arg) 302 struct ep_softc *sc; 303 u_int cmd, arg; 304 { 305 bus_space_tag_t iot = sc->sc_iot; 306 bus_space_handle_t ioh = sc->sc_ioh; 307 308 bus_space_write_2(iot, ioh, cmd, arg); 309 ep_finish_reset(iot, ioh); 310 } 311 312 313 static inline void 314 ep_discard_rxtop(iot, ioh) 315 bus_space_tag_t iot; 316 bus_space_handle_t ioh; 317 { 318 int i; 319 320 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK); 321 322 /* 323 * Spin for about 1 msec, to avoid forcing a DELAY() between 324 * every received packet (adding latency and limiting pkt-recv rate). 325 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations 326 * is about right. 327 */ 328 for (i = 0; i < 8000; i++) { 329 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) & 330 COMMAND_IN_PROGRESS) == 0) 331 return; 332 } 333 334 /* Didn't complete in a hurry. Do DELAY()s. */ 335 ep_finish_reset(iot, ioh); 336 } 337 338 /* 339 * Back-end attach and configure. 340 */ 341 int 342 epconfig(sc, chipset, enaddr) 343 struct ep_softc *sc; 344 u_short chipset; 345 u_int8_t *enaddr; 346 { 347 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 348 bus_space_tag_t iot = sc->sc_iot; 349 bus_space_handle_t ioh = sc->sc_ioh; 350 u_int16_t i; 351 u_int8_t myla[ETHER_ADDR_LEN]; 352 353 callout_init(&sc->sc_mii_callout); 354 callout_init(&sc->sc_mbuf_callout); 355 356 sc->ep_chipset = chipset; 357 358 /* 359 * We could have been groveling around in other register 360 * windows in the front-end; make sure we're in window 0 361 * to read the EEPROM. 362 */ 363 GO_WINDOW(0); 364 365 if (enaddr == NULL) { 366 /* 367 * Read the station address from the eeprom. 368 */ 369 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) { 370 u_int16_t x = ep_read_eeprom(sc, i); 371 myla[(i << 1)] = x >> 8; 372 myla[(i << 1) + 1] = x; 373 } 374 enaddr = myla; 375 } 376 377 /* 378 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards 379 * allow FDDI-sized (4500) byte packets. Commands only take an 380 * 11-bit parameter, and 11 bits isn't enough to hold a full-size 381 * packet length. 382 * Commands to these cards implicitly upshift a packet size 383 * or threshold by 2 bits. 384 * To detect cards with large-packet support, we probe by setting 385 * the transmit threshold register, then change windows and 386 * read back the threshold register directly, and see if the 387 * threshold value was shifted or not. 388 */ 389 bus_space_write_2(iot, ioh, ELINK_COMMAND, 390 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE); 391 GO_WINDOW(5); 392 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH); 393 GO_WINDOW(1); 394 switch (i) { 395 case ELINK_LARGEWIN_PROBE: 396 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK): 397 sc->ep_pktlenshift = 0; 398 break; 399 400 case (ELINK_LARGEWIN_PROBE << 2): 401 sc->ep_pktlenshift = 2; 402 break; 403 404 default: 405 aprint_error( 406 "%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. " 407 "Interface disabled\n", 408 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i); 409 return (1); 410 } 411 412 /* 413 * Ensure Tx-available interrupts are enabled for 414 * start the interface. 415 * XXX should be in epinit()? 416 */ 417 bus_space_write_2(iot, ioh, ELINK_COMMAND, 418 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 419 420 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 421 ifp->if_softc = sc; 422 ifp->if_start = epstart; 423 ifp->if_ioctl = epioctl; 424 ifp->if_watchdog = epwatchdog; 425 ifp->if_init = epinit; 426 ifp->if_stop = epstop; 427 ifp->if_flags = 428 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST; 429 IFQ_SET_READY(&ifp->if_snd); 430 431 if_attach(ifp); 432 ether_ifattach(ifp, enaddr); 433 434 /* 435 * Finish configuration: 436 * determine chipset if the front-end couldn't do so, 437 * show board details, set media. 438 */ 439 440 /* 441 * Print RAM size. We also print the Ethernet address in here. 442 * It's extracted from the ifp, so we have to make sure it's 443 * been attached first. 444 */ 445 ep_internalconfig(sc); 446 GO_WINDOW(0); 447 448 /* 449 * Display some additional information, if pertinent. 450 */ 451 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 452 aprint_normal("%s: RoadRunner FIFO buffer enabled\n", 453 sc->sc_dev.dv_xname); 454 455 /* 456 * Initialize our media structures and MII info. We'll 457 * probe the MII if we discover that we have one. 458 */ 459 sc->sc_mii.mii_ifp = ifp; 460 sc->sc_mii.mii_readreg = ep_mii_readreg; 461 sc->sc_mii.mii_writereg = ep_mii_writereg; 462 sc->sc_mii.mii_statchg = ep_statchg; 463 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, ep_media_change, 464 ep_media_status); 465 466 /* 467 * All CORKSCREW chips have MII. 468 */ 469 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) 470 sc->ep_flags |= ELINK_FLAGS_MII; 471 472 /* 473 * Now, determine which media we have. 474 */ 475 switch (sc->ep_chipset) { 476 case ELINK_CHIPSET_ROADRUNNER: 477 if (sc->ep_flags & ELINK_FLAGS_MII) { 478 ep_roadrunner_mii_enable(sc); 479 GO_WINDOW(0); 480 } 481 /* FALLTHROUGH */ 482 483 case ELINK_CHIPSET_CORKSCREW: 484 case ELINK_CHIPSET_BOOMERANG: 485 /* 486 * If the device has MII, probe it. We won't be using 487 * any `native' media in this case, only PHYs. If 488 * we don't, just treat the Boomerang like the Vortex. 489 */ 490 if (sc->ep_flags & ELINK_FLAGS_MII) { 491 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff, 492 MII_PHY_ANY, MII_OFFSET_ANY, 0); 493 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) { 494 ifmedia_add(&sc->sc_mii.mii_media, 495 IFM_ETHER|IFM_NONE, 0, NULL); 496 ifmedia_set(&sc->sc_mii.mii_media, 497 IFM_ETHER|IFM_NONE); 498 } else { 499 ifmedia_set(&sc->sc_mii.mii_media, 500 IFM_ETHER|IFM_AUTO); 501 } 502 break; 503 } 504 /* FALLTHROUGH */ 505 506 case ELINK_CHIPSET_VORTEX: 507 ep_vortex_probemedia(sc); 508 break; 509 510 default: 511 ep_509_probemedia(sc); 512 break; 513 } 514 515 GO_WINDOW(1); /* Window 1 is operating window */ 516 517 #if NRND > 0 518 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 519 RND_TYPE_NET, 0); 520 #endif 521 522 sc->tx_start_thresh = 20; /* probably a good starting point. */ 523 524 /* Establish callback to reset card when we reboot. */ 525 sc->sd_hook = shutdownhook_establish(epshutdown, sc); 526 527 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 528 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 529 530 /* The attach is successful. */ 531 sc->sc_flags |= ELINK_FLAGS_ATTACHED; 532 return (0); 533 } 534 535 536 /* 537 * Show interface-model-independent info from window 3 538 * internal-configuration register. 539 */ 540 void 541 ep_internalconfig(sc) 542 struct ep_softc *sc; 543 { 544 bus_space_tag_t iot = sc->sc_iot; 545 bus_space_handle_t ioh = sc->sc_ioh; 546 547 u_int config0; 548 u_int config1; 549 550 int ram_size, ram_width, ram_split; 551 /* 552 * NVRAM buffer Rx:Tx config names for busmastering cards 553 * (Demon, Vortex, and later). 554 */ 555 const char *const onboard_ram_config[] = { 556 "5:3", "3:1", "1:1", "3:5" }; 557 558 GO_WINDOW(3); 559 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG); 560 config1 = (u_int)bus_space_read_2(iot, ioh, 561 ELINK_W3_INTERNAL_CONFIG + 2); 562 GO_WINDOW(0); 563 564 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT; 565 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT; 566 567 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT; 568 569 aprint_normal("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n", 570 sc->sc_dev.dv_xname, 571 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)), 572 8 << ram_size, 573 (ram_width) ? "word" : "byte", 574 onboard_ram_config[ram_split]); 575 } 576 577 578 /* 579 * Find supported media on 3c509-generation hardware that doesn't have 580 * a "reset_options" register in window 3. 581 * Use the config_cntrl register in window 0 instead. 582 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards 583 * that implement CONFIG_CTRL. We don't have a good way to set the 584 * default active medium; punt to ifconfig instead. 585 */ 586 void 587 ep_509_probemedia(sc) 588 struct ep_softc *sc; 589 { 590 bus_space_tag_t iot = sc->sc_iot; 591 bus_space_handle_t ioh = sc->sc_ioh; 592 struct ifmedia *ifm = &sc->sc_mii.mii_media; 593 u_int16_t ep_w0_config, port; 594 const struct ep_media *epm; 595 const char *sep = "", *defmedianame = NULL; 596 int defmedia = 0; 597 598 GO_WINDOW(0); 599 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL); 600 601 aprint_normal("%s: ", sc->sc_dev.dv_xname); 602 603 /* Sanity check that there are any media! */ 604 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) { 605 aprint_error("no media present!\n"); 606 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 607 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 608 return; 609 } 610 611 /* 612 * Get the default media from the EEPROM. 613 */ 614 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14; 615 616 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 617 618 for (epm = ep_509_media; epm->epm_name != NULL; epm++) { 619 if (ep_w0_config & epm->epm_mpbit) { 620 /* 621 * This simple test works because 509 chipsets 622 * don't do full-duplex. 623 */ 624 if (epm->epm_epmedia == port || defmedia == 0) { 625 defmedia = epm->epm_ifmedia; 626 defmedianame = epm->epm_name; 627 } 628 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 629 NULL); 630 PRINT(epm->epm_name); 631 } 632 } 633 634 #undef PRINT 635 636 #ifdef DIAGNOSTIC 637 if (defmedia == 0) 638 panic("ep_509_probemedia: impossible"); 639 #endif 640 641 aprint_normal(" (default %s)\n", defmedianame); 642 ifmedia_set(ifm, defmedia); 643 } 644 645 /* 646 * Find media present on large-packet-capable elink3 devices. 647 * Show onboard configuration of large-packet-capable elink3 devices 648 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0. 649 * Use media and card-version info in window 3 instead. 650 */ 651 void 652 ep_vortex_probemedia(sc) 653 struct ep_softc *sc; 654 { 655 bus_space_tag_t iot = sc->sc_iot; 656 bus_space_handle_t ioh = sc->sc_ioh; 657 struct ifmedia *ifm = &sc->sc_mii.mii_media; 658 const struct ep_media *epm; 659 u_int config1; 660 int reset_options; 661 int default_media; /* 3-bit encoding of default (EEPROM) media */ 662 int defmedia = 0; 663 const char *sep = "", *defmedianame = NULL; 664 665 GO_WINDOW(3); 666 config1 = (u_int)bus_space_read_2(iot, ioh, 667 ELINK_W3_INTERNAL_CONFIG + 2); 668 reset_options = (int)bus_space_read_1(iot, ioh, ELINK_W3_RESET_OPTIONS); 669 GO_WINDOW(0); 670 671 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT; 672 673 aprint_normal("%s: ", sc->sc_dev.dv_xname); 674 675 /* Sanity check that there are any media! */ 676 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) { 677 aprint_error("no media present!\n"); 678 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL); 679 ifmedia_set(ifm, IFM_ETHER|IFM_NONE); 680 return; 681 } 682 683 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", " 684 685 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) { 686 if (reset_options & epm->epm_mpbit) { 687 /* 688 * Default media is a little more complicated 689 * on the Vortex. We support full-duplex which 690 * uses the same reset options bit. 691 * 692 * XXX Check EEPROM for default to FDX? 693 */ 694 if (epm->epm_epmedia == default_media) { 695 if ((epm->epm_ifmedia & IFM_FDX) == 0) { 696 defmedia = epm->epm_ifmedia; 697 defmedianame = epm->epm_name; 698 } 699 } else if (defmedia == 0) { 700 defmedia = epm->epm_ifmedia; 701 defmedianame = epm->epm_name; 702 } 703 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia, 704 NULL); 705 PRINT(epm->epm_name); 706 } 707 } 708 709 #undef PRINT 710 711 #ifdef DIAGNOSTIC 712 if (defmedia == 0) 713 panic("ep_vortex_probemedia: impossible"); 714 #endif 715 716 aprint_normal(" (default %s)\n", defmedianame); 717 ifmedia_set(ifm, defmedia); 718 } 719 720 /* 721 * One second timer, used to tick the MII. 722 */ 723 void 724 ep_tick(arg) 725 void *arg; 726 { 727 struct ep_softc *sc = arg; 728 int s; 729 730 #ifdef DIAGNOSTIC 731 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0) 732 panic("ep_tick"); 733 #endif 734 735 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 736 return; 737 738 s = splnet(); 739 mii_tick(&sc->sc_mii); 740 splx(s); 741 742 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 743 } 744 745 /* 746 * Bring device up. 747 * 748 * The order in here seems important. Otherwise we may not receive 749 * interrupts. ?! 750 */ 751 int 752 epinit(ifp) 753 struct ifnet *ifp; 754 { 755 struct ep_softc *sc = ifp->if_softc; 756 bus_space_tag_t iot = sc->sc_iot; 757 bus_space_handle_t ioh = sc->sc_ioh; 758 int i, error; 759 760 if (!sc->enabled && (error = epenable(sc)) != 0) 761 return (error); 762 763 /* Make sure any pending reset has completed before touching board */ 764 ep_finish_reset(iot, ioh); 765 766 /* 767 * Cancel any pending I/O. 768 */ 769 epstop(ifp, 0); 770 771 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA 772 && sc->bustype != ELINK_BUS_MCA) { 773 GO_WINDOW(0); 774 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0); 775 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 776 ENABLE_DRQ_IRQ); 777 } 778 779 if (sc->bustype == ELINK_BUS_PCMCIA) { 780 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00); 781 } 782 783 GO_WINDOW(2); 784 for (i = 0; i < 6; i++) /* Reload the ether_addr. */ 785 bus_space_write_1(iot, ioh, ELINK_W2_ADDR_0 + i, 786 LLADDR(ifp->if_sadl)[i]); 787 788 /* 789 * Reset the station-address receive filter. 790 * A bug workaround for busmastering (Vortex, Demon) cards. 791 */ 792 for (i = 0; i < 6; i++) 793 bus_space_write_1(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0); 794 795 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 796 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 797 798 GO_WINDOW(1); /* Window 1 is operating window */ 799 for (i = 0; i < 31; i++) 800 bus_space_read_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS)); 801 802 /* Set threshold for Tx-space available interrupt. */ 803 bus_space_write_2(iot, ioh, ELINK_COMMAND, 804 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift)); 805 806 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 807 /* 808 * Enable options in the PCMCIA LAN COR register, via 809 * RoadRunner Window 1. 810 * 811 * XXX MAGIC CONSTANTS! 812 */ 813 u_int16_t cor; 814 815 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11)); 816 817 cor = bus_space_read_2(iot, ioh, 0) & ~0x30; 818 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM) 819 cor |= 0x10; 820 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT) 821 cor |= 0x20; 822 bus_space_write_2(iot, ioh, 0, cor); 823 824 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 825 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 826 827 if (sc->ep_flags & ELINK_FLAGS_MII) { 828 ep_roadrunner_mii_enable(sc); 829 GO_WINDOW(1); 830 } 831 } 832 833 /* Enable interrupts. */ 834 bus_space_write_2(iot, ioh, ELINK_COMMAND, 835 SET_RD_0_MASK | WATCHED_INTERRUPTS); 836 bus_space_write_2(iot, ioh, ELINK_COMMAND, 837 SET_INTR_MASK | WATCHED_INTERRUPTS); 838 839 /* 840 * Attempt to get rid of any stray interrupts that occurred during 841 * configuration. On the i386 this isn't possible because one may 842 * already be queued. However, a single stray interrupt is 843 * unimportant. 844 */ 845 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff); 846 847 epsetfilter(sc); 848 epsetmedia(sc); 849 850 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE); 851 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 852 853 epmbuffill(sc); 854 855 /* Interface is now `running', with no output active. */ 856 ifp->if_flags |= IFF_RUNNING; 857 ifp->if_flags &= ~IFF_OACTIVE; 858 859 if (sc->ep_flags & ELINK_FLAGS_MII) { 860 /* Start the one second clock. */ 861 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc); 862 } 863 864 /* Attempt to start output, if any. */ 865 epstart(ifp); 866 867 return (0); 868 } 869 870 871 /* 872 * Set multicast receive filter. 873 * elink3 hardware has no selective multicast filter in hardware. 874 * Enable reception of all multicasts and filter in software. 875 */ 876 void 877 epsetfilter(sc) 878 struct ep_softc *sc; 879 { 880 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 881 882 GO_WINDOW(1); /* Window 1 is operating window */ 883 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND, 884 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST | 885 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) | 886 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0)); 887 } 888 889 int 890 ep_media_change(ifp) 891 struct ifnet *ifp; 892 { 893 struct ep_softc *sc = ifp->if_softc; 894 895 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0) 896 epreset(sc); 897 898 return (0); 899 } 900 901 /* 902 * Reset and enable the MII on the RoadRunner. 903 */ 904 void 905 ep_roadrunner_mii_enable(sc) 906 struct ep_softc *sc; 907 { 908 bus_space_tag_t iot = sc->sc_iot; 909 bus_space_handle_t ioh = sc->sc_ioh; 910 911 GO_WINDOW(3); 912 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 913 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 914 delay(1000); 915 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 916 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET| 917 ELINK_RUNNER_ENABLE_MII); 918 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 919 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 920 delay(1000); 921 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 922 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII); 923 } 924 925 /* 926 * Set the card to use the specified media. 927 */ 928 void 929 epsetmedia(sc) 930 struct ep_softc *sc; 931 { 932 bus_space_tag_t iot = sc->sc_iot; 933 bus_space_handle_t ioh = sc->sc_ioh; 934 935 /* Turn everything off. First turn off linkbeat and UTP. */ 936 GO_WINDOW(4); 937 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0); 938 939 /* Turn off coax */ 940 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 941 delay(1000); 942 943 /* 944 * If the device has MII, select it, and then tell the 945 * PHY which media to use. 946 */ 947 if (sc->ep_flags & ELINK_FLAGS_MII) { 948 int config0, config1; 949 950 GO_WINDOW(3); 951 952 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 953 int resopt; 954 955 resopt = bus_space_read_2(iot, ioh, 956 ELINK_W3_RESET_OPTIONS); 957 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS, 958 resopt | ELINK_RUNNER_ENABLE_MII); 959 } 960 961 config0 = (u_int)bus_space_read_2(iot, ioh, 962 ELINK_W3_INTERNAL_CONFIG); 963 config1 = (u_int)bus_space_read_2(iot, ioh, 964 ELINK_W3_INTERNAL_CONFIG + 2); 965 966 config1 = config1 & ~CONFIG_MEDIAMASK; 967 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT); 968 969 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 970 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 971 config1); 972 GO_WINDOW(1); /* back to operating window */ 973 974 mii_mediachg(&sc->sc_mii); 975 return; 976 } 977 978 /* 979 * Now turn on the selected media/transceiver. 980 */ 981 GO_WINDOW(4); 982 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) { 983 case IFM_10_T: 984 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 985 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE); 986 break; 987 988 case IFM_10_2: 989 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER); 990 DELAY(1000); /* 50ms not enmough? */ 991 break; 992 993 case IFM_100_TX: 994 case IFM_100_FX: 995 case IFM_100_T4: /* XXX check documentation */ 996 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 997 LINKBEAT_ENABLE); 998 DELAY(1000); /* not strictly necessary? */ 999 break; 1000 1001 case IFM_10_5: 1002 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 1003 SQE_ENABLE); 1004 DELAY(1000); /* not strictly necessary? */ 1005 break; 1006 1007 case IFM_MANUAL: 1008 /* 1009 * Nothing to do here; we are actually enabling the 1010 * external PHY on the MII port. 1011 */ 1012 break; 1013 1014 case IFM_NONE: 1015 printf("%s: interface disabled\n", sc->sc_dev.dv_xname); 1016 return; 1017 1018 default: 1019 panic("epsetmedia: impossible"); 1020 } 1021 1022 /* 1023 * Tell the chip which port to use. 1024 */ 1025 switch (sc->ep_chipset) { 1026 case ELINK_CHIPSET_VORTEX: 1027 case ELINK_CHIPSET_BOOMERANG: 1028 { 1029 int mctl, config0, config1; 1030 1031 GO_WINDOW(3); 1032 config0 = (u_int)bus_space_read_2(iot, ioh, 1033 ELINK_W3_INTERNAL_CONFIG); 1034 config1 = (u_int)bus_space_read_2(iot, ioh, 1035 ELINK_W3_INTERNAL_CONFIG + 2); 1036 1037 config1 = config1 & ~CONFIG_MEDIAMASK; 1038 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data << 1039 CONFIG_MEDIAMASK_SHIFT); 1040 1041 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0); 1042 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2, 1043 config1); 1044 1045 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 1046 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX) 1047 mctl |= MAC_CONTROL_FDX; 1048 else 1049 mctl &= ~MAC_CONTROL_FDX; 1050 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 1051 break; 1052 } 1053 default: 1054 { 1055 int w0_addr_cfg; 1056 1057 GO_WINDOW(0); 1058 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG); 1059 w0_addr_cfg &= 0x3fff; 1060 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg | 1061 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14)); 1062 DELAY(1000); 1063 break; 1064 } 1065 } 1066 1067 GO_WINDOW(1); /* Window 1 is operating window */ 1068 } 1069 1070 /* 1071 * Get currently-selected media from card. 1072 * (if_media callback, may be called before interface is brought up). 1073 */ 1074 void 1075 ep_media_status(ifp, req) 1076 struct ifnet *ifp; 1077 struct ifmediareq *req; 1078 { 1079 struct ep_softc *sc = ifp->if_softc; 1080 bus_space_tag_t iot = sc->sc_iot; 1081 bus_space_handle_t ioh = sc->sc_ioh; 1082 1083 if (sc->enabled == 0) { 1084 req->ifm_active = IFM_ETHER|IFM_NONE; 1085 req->ifm_status = 0; 1086 return; 1087 } 1088 1089 /* 1090 * If we have MII, go ask the PHY what's going on. 1091 */ 1092 if (sc->ep_flags & ELINK_FLAGS_MII) { 1093 mii_pollstat(&sc->sc_mii); 1094 req->ifm_active = sc->sc_mii.mii_media_active; 1095 req->ifm_status = sc->sc_mii.mii_media_status; 1096 return; 1097 } 1098 1099 /* 1100 * Ok, at this point we claim that our active media is 1101 * the currently selected media. We'll update our status 1102 * if our chipset allows us to detect link. 1103 */ 1104 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media; 1105 req->ifm_status = 0; 1106 1107 switch (sc->ep_chipset) { 1108 case ELINK_CHIPSET_VORTEX: 1109 case ELINK_CHIPSET_BOOMERANG: 1110 GO_WINDOW(4); 1111 req->ifm_status = IFM_AVALID; 1112 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) & 1113 LINKBEAT_DETECT) 1114 req->ifm_status |= IFM_ACTIVE; 1115 GO_WINDOW(1); /* back to operating window */ 1116 break; 1117 } 1118 } 1119 1120 1121 1122 /* 1123 * Start outputting on the interface. 1124 * Always called as splnet(). 1125 */ 1126 void 1127 epstart(ifp) 1128 struct ifnet *ifp; 1129 { 1130 struct ep_softc *sc = ifp->if_softc; 1131 bus_space_tag_t iot = sc->sc_iot; 1132 bus_space_handle_t ioh = sc->sc_ioh; 1133 struct mbuf *m, *m0; 1134 int sh, len, pad; 1135 bus_size_t txreg; 1136 1137 /* Don't transmit if interface is busy or not running */ 1138 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 1139 return; 1140 1141 startagain: 1142 /* Sneak a peek at the next packet */ 1143 IFQ_POLL(&ifp->if_snd, m0); 1144 if (m0 == 0) 1145 return; 1146 1147 /* We need to use m->m_pkthdr.len, so require the header */ 1148 if ((m0->m_flags & M_PKTHDR) == 0) 1149 panic("epstart: no header mbuf"); 1150 len = m0->m_pkthdr.len; 1151 1152 pad = (4 - len) & 3; 1153 1154 /* 1155 * The 3c509 automatically pads short packets to minimum ethernet 1156 * length, but we drop packets that are too large. Perhaps we should 1157 * truncate them instead? 1158 */ 1159 if (len + pad > ETHER_MAX_LEN) { 1160 /* packet is obviously too large: toss it */ 1161 ++ifp->if_oerrors; 1162 IFQ_DEQUEUE(&ifp->if_snd, m0); 1163 m_freem(m0); 1164 goto readcheck; 1165 } 1166 1167 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) < 1168 len + pad + 4) { 1169 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1170 SET_TX_AVAIL_THRESH | 1171 ((len + pad + 4) >> sc->ep_pktlenshift)); 1172 /* not enough room in FIFO */ 1173 ifp->if_flags |= IFF_OACTIVE; 1174 return; 1175 } else { 1176 bus_space_write_2(iot, ioh, ELINK_COMMAND, 1177 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE); 1178 } 1179 1180 IFQ_DEQUEUE(&ifp->if_snd, m0); 1181 if (m0 == 0) /* not really needed */ 1182 return; 1183 1184 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH | 1185 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/)); 1186 1187 #if NBPFILTER > 0 1188 if (ifp->if_bpf) 1189 bpf_mtap(ifp->if_bpf, m0); 1190 #endif 1191 1192 /* 1193 * Do the output at a high interrupt priority level so that an 1194 * interrupt from another device won't cause a FIFO underrun. 1195 * We choose splsched() since that blocks essentially everything 1196 * except for interrupts from serial devices (which typically 1197 * lose data if their interrupt isn't serviced fast enough). 1198 * 1199 * XXX THIS CAN CAUSE CLOCK DRIFT! 1200 */ 1201 sh = splsched(); 1202 1203 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1); 1204 1205 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1206 /* 1207 * Prime the FIFO buffer counter (number of 16-bit 1208 * words about to be written to the FIFO). 1209 * 1210 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1211 * COUNTER IS NON-ZERO! 1212 */ 1213 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 1214 (len + pad) >> 1); 1215 } 1216 1217 bus_space_write_2(iot, ioh, txreg, len); 1218 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */ 1219 if (ELINK_IS_BUS_32(sc->bustype)) { 1220 for (m = m0; m;) { 1221 if (m->m_len > 3) { 1222 /* align our reads from core */ 1223 if (mtod(m, u_long) & 3) { 1224 u_long count = 1225 4 - (mtod(m, u_long) & 3); 1226 bus_space_write_multi_1(iot, ioh, 1227 txreg, mtod(m, u_int8_t *), count); 1228 m->m_data = 1229 (void *)(mtod(m, u_long) + count); 1230 m->m_len -= count; 1231 } 1232 bus_space_write_multi_stream_4(iot, ioh, 1233 txreg, mtod(m, u_int32_t *), m->m_len >> 2); 1234 m->m_data = (void *)(mtod(m, u_long) + 1235 (u_long)(m->m_len & ~3)); 1236 m->m_len -= m->m_len & ~3; 1237 } 1238 if (m->m_len) { 1239 bus_space_write_multi_1(iot, ioh, 1240 txreg, mtod(m, u_int8_t *), m->m_len); 1241 } 1242 MFREE(m, m0); 1243 m = m0; 1244 } 1245 } else { 1246 for (m = m0; m;) { 1247 if (m->m_len > 1) { 1248 if (mtod(m, u_long) & 1) { 1249 bus_space_write_1(iot, ioh, 1250 txreg, *(mtod(m, u_int8_t *))); 1251 m->m_data = 1252 (void *)(mtod(m, u_long) + 1); 1253 m->m_len -= 1; 1254 } 1255 bus_space_write_multi_stream_2(iot, ioh, 1256 txreg, mtod(m, u_int16_t *), 1257 m->m_len >> 1); 1258 } 1259 if (m->m_len & 1) { 1260 bus_space_write_1(iot, ioh, txreg, 1261 *(mtod(m, u_int8_t *) + m->m_len - 1)); 1262 } 1263 MFREE(m, m0); 1264 m = m0; 1265 } 1266 } 1267 while (pad--) 1268 bus_space_write_1(iot, ioh, txreg, 0); 1269 1270 splx(sh); 1271 1272 ++ifp->if_opackets; 1273 1274 readcheck: 1275 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) & 1276 ERR_INCOMPLETE) == 0) { 1277 /* We received a complete packet. */ 1278 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1279 1280 if ((status & INTR_LATCH) == 0) { 1281 /* 1282 * No interrupt, read the packet and continue 1283 * Is this supposed to happen? Is my motherboard 1284 * completely busted? 1285 */ 1286 epread(sc); 1287 } else { 1288 /* Got an interrupt, return so that it gets serviced. */ 1289 return; 1290 } 1291 } else { 1292 /* Check if we are stuck and reset [see XXX comment] */ 1293 if (epstatus(sc)) { 1294 if (ifp->if_flags & IFF_DEBUG) 1295 printf("%s: adapter reset\n", 1296 sc->sc_dev.dv_xname); 1297 epreset(sc); 1298 } 1299 } 1300 1301 goto startagain; 1302 } 1303 1304 1305 /* 1306 * XXX: The 3c509 card can get in a mode where both the fifo status bit 1307 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set 1308 * We detect this situation and we reset the adapter. 1309 * It happens at times when there is a lot of broadcast traffic 1310 * on the cable (once in a blue moon). 1311 */ 1312 static int 1313 epstatus(sc) 1314 struct ep_softc *sc; 1315 { 1316 bus_space_tag_t iot = sc->sc_iot; 1317 bus_space_handle_t ioh = sc->sc_ioh; 1318 u_int16_t fifost; 1319 1320 /* 1321 * Check the FIFO status and act accordingly 1322 */ 1323 GO_WINDOW(4); 1324 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG); 1325 GO_WINDOW(1); 1326 1327 if (fifost & FIFOS_RX_UNDERRUN) { 1328 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1329 printf("%s: RX underrun\n", sc->sc_dev.dv_xname); 1330 epreset(sc); 1331 return 0; 1332 } 1333 1334 if (fifost & FIFOS_RX_STATUS_OVERRUN) { 1335 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1336 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname); 1337 return 1; 1338 } 1339 1340 if (fifost & FIFOS_RX_OVERRUN) { 1341 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1342 printf("%s: RX overrun\n", sc->sc_dev.dv_xname); 1343 return 1; 1344 } 1345 1346 if (fifost & FIFOS_TX_OVERRUN) { 1347 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1348 printf("%s: TX overrun\n", sc->sc_dev.dv_xname); 1349 epreset(sc); 1350 return 0; 1351 } 1352 1353 return 0; 1354 } 1355 1356 1357 static void 1358 eptxstat(sc) 1359 struct ep_softc *sc; 1360 { 1361 bus_space_tag_t iot = sc->sc_iot; 1362 bus_space_handle_t ioh = sc->sc_ioh; 1363 int i; 1364 1365 /* 1366 * We need to read+write TX_STATUS until we get a 0 status 1367 * in order to turn off the interrupt flag. 1368 */ 1369 while ((i = bus_space_read_1(iot, ioh, 1370 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) { 1371 bus_space_write_1(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS), 1372 0x0); 1373 1374 if (i & TXS_JABBER) { 1375 ++sc->sc_ethercom.ec_if.if_oerrors; 1376 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1377 printf("%s: jabber (%x)\n", 1378 sc->sc_dev.dv_xname, i); 1379 epreset(sc); 1380 } else if (i & TXS_UNDERRUN) { 1381 ++sc->sc_ethercom.ec_if.if_oerrors; 1382 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG) 1383 printf("%s: fifo underrun (%x) @%d\n", 1384 sc->sc_dev.dv_xname, i, 1385 sc->tx_start_thresh); 1386 if (sc->tx_succ_ok < 100) 1387 sc->tx_start_thresh = min(ETHER_MAX_LEN, 1388 sc->tx_start_thresh + 20); 1389 sc->tx_succ_ok = 0; 1390 epreset(sc); 1391 } else if (i & TXS_MAX_COLLISION) { 1392 ++sc->sc_ethercom.ec_if.if_collisions; 1393 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE); 1394 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1395 } else 1396 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127; 1397 } 1398 } 1399 1400 int 1401 epintr(arg) 1402 void *arg; 1403 { 1404 struct ep_softc *sc = arg; 1405 bus_space_tag_t iot = sc->sc_iot; 1406 bus_space_handle_t ioh = sc->sc_ioh; 1407 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1408 u_int16_t status; 1409 int ret = 0; 1410 1411 if (sc->enabled == 0 || 1412 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) 1413 return (0); 1414 1415 1416 for (;;) { 1417 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1418 1419 if ((status & WATCHED_INTERRUPTS) == 0) { 1420 if ((status & INTR_LATCH) == 0) { 1421 #if 0 1422 printf("%s: intr latch cleared\n", 1423 sc->sc_dev.dv_xname); 1424 #endif 1425 break; 1426 } 1427 } 1428 1429 ret = 1; 1430 1431 /* 1432 * Acknowledge any interrupts. It's important that we do this 1433 * first, since there would otherwise be a race condition. 1434 * Due to the i386 interrupt queueing, we may get spurious 1435 * interrupts occasionally. 1436 */ 1437 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 1438 (status & (INTR_LATCH | ALL_INTERRUPTS))); 1439 1440 #if 0 1441 status = bus_space_read_2(iot, ioh, ELINK_STATUS); 1442 1443 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname, 1444 (status & RX_COMPLETE)?" RX_COMPLETE":"", 1445 (status & TX_COMPLETE)?" TX_COMPLETE":"", 1446 (status & TX_AVAIL)?" TX_AVAIL":"", 1447 (status & CARD_FAILURE)?" CARD_FAILURE":""); 1448 #endif 1449 1450 if (status & RX_COMPLETE) { 1451 epread(sc); 1452 } 1453 if (status & TX_AVAIL) { 1454 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE; 1455 epstart(&sc->sc_ethercom.ec_if); 1456 } 1457 if (status & CARD_FAILURE) { 1458 printf("%s: adapter failure (%x)\n", 1459 sc->sc_dev.dv_xname, status); 1460 #if 1 1461 epinit(ifp); 1462 #else 1463 epreset(sc); 1464 #endif 1465 return (1); 1466 } 1467 if (status & TX_COMPLETE) { 1468 eptxstat(sc); 1469 epstart(ifp); 1470 } 1471 1472 #if NRND > 0 1473 if (status) 1474 rnd_add_uint32(&sc->rnd_source, status); 1475 #endif 1476 } 1477 1478 /* no more interrupts */ 1479 return (ret); 1480 } 1481 1482 void 1483 epread(sc) 1484 struct ep_softc *sc; 1485 { 1486 bus_space_tag_t iot = sc->sc_iot; 1487 bus_space_handle_t ioh = sc->sc_ioh; 1488 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1489 struct mbuf *m; 1490 int len; 1491 1492 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1493 1494 again: 1495 if (ifp->if_flags & IFF_DEBUG) { 1496 int err = len & ERR_MASK; 1497 char *s = NULL; 1498 1499 if (len & ERR_INCOMPLETE) 1500 s = "incomplete packet"; 1501 else if (err == ERR_OVERRUN) 1502 s = "packet overrun"; 1503 else if (err == ERR_RUNT) 1504 s = "runt packet"; 1505 else if (err == ERR_ALIGNMENT) 1506 s = "bad alignment"; 1507 else if (err == ERR_CRC) 1508 s = "bad crc"; 1509 else if (err == ERR_OVERSIZE) 1510 s = "oversized packet"; 1511 else if (err == ERR_DRIBBLE) 1512 s = "dribble bits"; 1513 1514 if (s) 1515 printf("%s: %s\n", sc->sc_dev.dv_xname, s); 1516 } 1517 1518 if (len & ERR_INCOMPLETE) 1519 return; 1520 1521 if (len & ERR_RX) { 1522 ++ifp->if_ierrors; 1523 goto abort; 1524 } 1525 1526 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */ 1527 1528 /* Pull packet off interface. */ 1529 m = epget(sc, len); 1530 if (m == 0) { 1531 ifp->if_ierrors++; 1532 goto abort; 1533 } 1534 1535 ++ifp->if_ipackets; 1536 1537 #if NBPFILTER > 0 1538 /* 1539 * Check if there's a BPF listener on this interface. 1540 * If so, hand off the raw packet to BPF. 1541 */ 1542 if (ifp->if_bpf) 1543 bpf_mtap(ifp->if_bpf, m); 1544 #endif 1545 1546 (*ifp->if_input)(ifp, m); 1547 1548 /* 1549 * In periods of high traffic we can actually receive enough 1550 * packets so that the fifo overrun bit will be set at this point, 1551 * even though we just read a packet. In this case we 1552 * are not going to receive any more interrupts. We check for 1553 * this condition and read again until the fifo is not full. 1554 * We could simplify this test by not using epstatus(), but 1555 * rechecking the RX_STATUS register directly. This test could 1556 * result in unnecessary looping in cases where there is a new 1557 * packet but the fifo is not full, but it will not fix the 1558 * stuck behavior. 1559 * 1560 * Even with this improvement, we still get packet overrun errors 1561 * which are hurting performance. Maybe when I get some more time 1562 * I'll modify epread() so that it can handle RX_EARLY interrupts. 1563 */ 1564 if (epstatus(sc)) { 1565 len = bus_space_read_2(iot, ioh, 1566 ep_w1_reg(sc, ELINK_W1_RX_STATUS)); 1567 /* Check if we are stuck and reset [see XXX comment] */ 1568 if (len & ERR_INCOMPLETE) { 1569 if (ifp->if_flags & IFF_DEBUG) 1570 printf("%s: adapter reset\n", 1571 sc->sc_dev.dv_xname); 1572 epreset(sc); 1573 return; 1574 } 1575 goto again; 1576 } 1577 1578 return; 1579 1580 abort: 1581 ep_discard_rxtop(iot, ioh); 1582 1583 } 1584 1585 struct mbuf * 1586 epget(sc, totlen) 1587 struct ep_softc *sc; 1588 int totlen; 1589 { 1590 bus_space_tag_t iot = sc->sc_iot; 1591 bus_space_handle_t ioh = sc->sc_ioh; 1592 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 1593 struct mbuf *m; 1594 bus_size_t rxreg; 1595 int len, remaining; 1596 int s; 1597 caddr_t newdata; 1598 u_long offset; 1599 1600 m = sc->mb[sc->next_mb]; 1601 sc->mb[sc->next_mb] = 0; 1602 if (m == 0) { 1603 MGETHDR(m, M_DONTWAIT, MT_DATA); 1604 if (m == 0) 1605 return 0; 1606 } else { 1607 /* If the queue is no longer full, refill. */ 1608 if (sc->last_mb == sc->next_mb) 1609 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1610 1611 /* Convert one of our saved mbuf's. */ 1612 sc->next_mb = (sc->next_mb + 1) % MAX_MBS; 1613 m->m_data = m->m_pktdat; 1614 m->m_flags = M_PKTHDR; 1615 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr)); 1616 } 1617 m->m_pkthdr.rcvif = ifp; 1618 m->m_pkthdr.len = totlen; 1619 len = MHLEN; 1620 1621 /* 1622 * Allocate big enough space to hold whole packet, to avoid 1623 * allocating new mbufs on splsched(). 1624 */ 1625 if (totlen + ALIGNBYTES > len) { 1626 if (totlen + ALIGNBYTES > MCLBYTES) { 1627 len = ALIGN(totlen + ALIGNBYTES); 1628 MEXTMALLOC(m, len, M_DONTWAIT); 1629 } else { 1630 len = MCLBYTES; 1631 MCLGET(m, M_DONTWAIT); 1632 } 1633 if ((m->m_flags & M_EXT) == 0) { 1634 m_free(m); 1635 return 0; 1636 } 1637 } 1638 1639 /* align the struct ip header */ 1640 newdata = (caddr_t) ALIGN(m->m_data + sizeof(struct ether_header)) 1641 - sizeof(struct ether_header); 1642 m->m_data = newdata; 1643 m->m_len = totlen; 1644 1645 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1); 1646 remaining = totlen; 1647 offset = mtod(m, u_long); 1648 1649 /* 1650 * We read the packet at a high interrupt priority level so that 1651 * an interrupt from another device won't cause the card's packet 1652 * buffer to overflow. We choose splsched() since that blocks 1653 * essentially everything except for interrupts from serial 1654 * devices (which typically lose data if their interrupt isn't 1655 * serviced fast enough). 1656 * 1657 * XXX THIS CAN CAUSE CLOCK DRIFT! 1658 */ 1659 s = splsched(); 1660 1661 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) { 1662 /* 1663 * Prime the FIFO buffer counter (number of 16-bit 1664 * words about to be read from the FIFO). 1665 * 1666 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS 1667 * COUNTER IS NON-ZERO! 1668 */ 1669 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1); 1670 } 1671 1672 if (ELINK_IS_BUS_32(sc->bustype)) { 1673 /* 1674 * Read bytes up to the point where we are aligned. 1675 * (We can align to 4 bytes, rather than ALIGNBYTES, 1676 * here because we're later reading 4-byte chunks.) 1677 */ 1678 if ((remaining > 3) && (offset & 3)) { 1679 int count = (4 - (offset & 3)); 1680 bus_space_read_multi_1(iot, ioh, 1681 rxreg, (u_int8_t *) offset, count); 1682 offset += count; 1683 remaining -= count; 1684 } 1685 if (remaining > 3) { 1686 bus_space_read_multi_stream_4(iot, ioh, 1687 rxreg, (u_int32_t *) offset, 1688 remaining >> 2); 1689 offset += remaining & ~3; 1690 remaining &= 3; 1691 } 1692 if (remaining) { 1693 bus_space_read_multi_1(iot, ioh, 1694 rxreg, (u_int8_t *) offset, remaining); 1695 } 1696 } else { 1697 if ((remaining > 1) && (offset & 1)) { 1698 bus_space_read_multi_1(iot, ioh, 1699 rxreg, (u_int8_t *) offset, 1); 1700 remaining -= 1; 1701 offset += 1; 1702 } 1703 if (remaining > 1) { 1704 bus_space_read_multi_stream_2(iot, ioh, 1705 rxreg, (u_int16_t *) offset, 1706 remaining >> 1); 1707 offset += remaining & ~1; 1708 } 1709 if (remaining & 1) { 1710 bus_space_read_multi_1(iot, ioh, 1711 rxreg, (u_int8_t *) offset, remaining & 1); 1712 } 1713 } 1714 1715 ep_discard_rxtop(iot, ioh); 1716 1717 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) 1718 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1719 splx(s); 1720 1721 return (m); 1722 } 1723 1724 int 1725 epioctl(ifp, cmd, data) 1726 struct ifnet *ifp; 1727 u_long cmd; 1728 caddr_t data; 1729 { 1730 struct ep_softc *sc = ifp->if_softc; 1731 struct ifreq *ifr = (struct ifreq *)data; 1732 int s, error = 0; 1733 1734 s = splnet(); 1735 1736 switch (cmd) { 1737 1738 case SIOCSIFMEDIA: 1739 case SIOCGIFMEDIA: 1740 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd); 1741 break; 1742 1743 case SIOCADDMULTI: 1744 case SIOCDELMULTI: 1745 if (sc->enabled == 0) { 1746 error = EIO; 1747 break; 1748 } 1749 1750 default: 1751 error = ether_ioctl(ifp, cmd, data); 1752 1753 if (error == ENETRESET) { 1754 /* 1755 * Multicast list has changed; set the hardware filter 1756 * accordingly. 1757 */ 1758 epreset(sc); 1759 error = 0; 1760 } 1761 break; 1762 } 1763 1764 splx(s); 1765 return (error); 1766 } 1767 1768 void 1769 epreset(sc) 1770 struct ep_softc *sc; 1771 { 1772 int s; 1773 1774 s = splnet(); 1775 epinit(&sc->sc_ethercom.ec_if); 1776 splx(s); 1777 } 1778 1779 void 1780 epwatchdog(ifp) 1781 struct ifnet *ifp; 1782 { 1783 struct ep_softc *sc = ifp->if_softc; 1784 1785 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname); 1786 ++sc->sc_ethercom.ec_if.if_oerrors; 1787 1788 epreset(sc); 1789 } 1790 1791 void 1792 epstop(ifp, disable) 1793 struct ifnet *ifp; 1794 int disable; 1795 { 1796 struct ep_softc *sc = ifp->if_softc; 1797 bus_space_tag_t iot = sc->sc_iot; 1798 bus_space_handle_t ioh = sc->sc_ioh; 1799 1800 if (sc->ep_flags & ELINK_FLAGS_MII) { 1801 /* Stop the one second clock. */ 1802 callout_stop(&sc->sc_mbuf_callout); 1803 1804 /* Down the MII. */ 1805 mii_down(&sc->sc_mii); 1806 } 1807 1808 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) { 1809 /* 1810 * Clear the FIFO buffer count, thus halting 1811 * any currently-running transactions. 1812 */ 1813 GO_WINDOW(1); /* sanity */ 1814 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0); 1815 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0); 1816 } 1817 1818 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE); 1819 ep_discard_rxtop(iot, ioh); 1820 1821 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE); 1822 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER); 1823 1824 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET); 1825 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET); 1826 1827 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH); 1828 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK); 1829 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK); 1830 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER); 1831 1832 epmbufempty(sc); 1833 1834 if (disable) 1835 epdisable(sc); 1836 1837 ifp->if_flags &= ~IFF_RUNNING; 1838 } 1839 1840 1841 /* 1842 * Before reboots, reset card completely. 1843 */ 1844 static void 1845 epshutdown(arg) 1846 void *arg; 1847 { 1848 struct ep_softc *sc = arg; 1849 int s = splnet(); 1850 1851 if (sc->enabled) { 1852 epstop(&sc->sc_ethercom.ec_if, 1); 1853 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET); 1854 sc->enabled = 0; 1855 } 1856 splx(s); 1857 } 1858 1859 /* 1860 * We get eeprom data from the id_port given an offset into the 1861 * eeprom. Basically; after the ID_sequence is sent to all of 1862 * the cards; they enter the ID_CMD state where they will accept 1863 * command requests. 0x80-0xbf loads the eeprom data. We then 1864 * read the port 16 times and with every read; the cards check 1865 * for contention (ie: if one card writes a 0 bit and another 1866 * writes a 1 bit then the host sees a 0. At the end of the cycle; 1867 * each card compares the data on the bus; if there is a difference 1868 * then that card goes into ID_WAIT state again). In the meantime; 1869 * one bit of data is returned in the AX register which is conveniently 1870 * returned to us by bus_space_read_1(). Hence; we read 16 times getting one 1871 * bit of data with each read. 1872 * 1873 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT! 1874 */ 1875 u_int16_t 1876 epreadeeprom(iot, ioh, offset) 1877 bus_space_tag_t iot; 1878 bus_space_handle_t ioh; 1879 int offset; 1880 { 1881 u_int16_t data = 0; 1882 int i; 1883 1884 bus_space_write_1(iot, ioh, 0, 0x80 + offset); 1885 delay(1000); 1886 for (i = 0; i < 16; i++) 1887 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1); 1888 return (data); 1889 } 1890 1891 static int 1892 epbusyeeprom(sc) 1893 struct ep_softc *sc; 1894 { 1895 bus_space_tag_t iot = sc->sc_iot; 1896 bus_space_handle_t ioh = sc->sc_ioh; 1897 bus_size_t eecmd; 1898 int i = 100, j; 1899 uint16_t busybit; 1900 1901 if (sc->bustype == ELINK_BUS_PCMCIA) { 1902 delay(1000); 1903 return 0; 1904 } 1905 1906 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1907 eecmd = CORK_ASIC_EEPROM_COMMAND; 1908 busybit = CORK_EEPROM_BUSY; 1909 } else { 1910 eecmd = ELINK_W0_EEPROM_COMMAND; 1911 busybit = EEPROM_BUSY; 1912 } 1913 1914 j = 0; /* bad GCC flow analysis */ 1915 while (i--) { 1916 j = bus_space_read_2(iot, ioh, eecmd); 1917 if (j & busybit) 1918 delay(100); 1919 else 1920 break; 1921 } 1922 if (i == 0) { 1923 printf("\n%s: eeprom failed to come ready\n", 1924 sc->sc_dev.dv_xname); 1925 return (1); 1926 } 1927 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW && 1928 (j & EEPROM_TST_MODE) != 0) { 1929 /* XXX PnP mode? */ 1930 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname); 1931 return (1); 1932 } 1933 return (0); 1934 } 1935 1936 u_int16_t 1937 ep_read_eeprom(sc, offset) 1938 struct ep_softc *sc; 1939 u_int16_t offset; 1940 { 1941 bus_size_t eecmd, eedata; 1942 u_int16_t readcmd; 1943 1944 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) { 1945 eecmd = CORK_ASIC_EEPROM_COMMAND; 1946 eedata = CORK_ASIC_EEPROM_DATA; 1947 } else { 1948 eecmd = ELINK_W0_EEPROM_COMMAND; 1949 eedata = ELINK_W0_EEPROM_DATA; 1950 } 1951 1952 /* 1953 * RoadRunner has a larger EEPROM, so a different read command 1954 * is required. 1955 */ 1956 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) 1957 readcmd = READ_EEPROM_RR; 1958 else 1959 readcmd = READ_EEPROM; 1960 1961 if (epbusyeeprom(sc)) 1962 return (0); /* XXX why is eeprom busy? */ 1963 1964 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset); 1965 1966 if (epbusyeeprom(sc)) 1967 return (0); /* XXX why is eeprom busy? */ 1968 1969 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata)); 1970 } 1971 1972 void 1973 epmbuffill(v) 1974 void *v; 1975 { 1976 struct ep_softc *sc = v; 1977 struct mbuf *m; 1978 int s, i; 1979 1980 s = splnet(); 1981 i = sc->last_mb; 1982 do { 1983 if (sc->mb[i] == 0) { 1984 MGET(m, M_DONTWAIT, MT_DATA); 1985 if (m == 0) 1986 break; 1987 sc->mb[i] = m; 1988 } 1989 i = (i + 1) % MAX_MBS; 1990 } while (i != sc->next_mb); 1991 sc->last_mb = i; 1992 /* If the queue was not filled, try again. */ 1993 if (sc->last_mb != sc->next_mb) 1994 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc); 1995 splx(s); 1996 } 1997 1998 void 1999 epmbufempty(sc) 2000 struct ep_softc *sc; 2001 { 2002 int s, i; 2003 2004 s = splnet(); 2005 for (i = 0; i<MAX_MBS; i++) { 2006 if (sc->mb[i]) { 2007 m_freem(sc->mb[i]); 2008 sc->mb[i] = NULL; 2009 } 2010 } 2011 sc->last_mb = sc->next_mb = 0; 2012 callout_stop(&sc->sc_mbuf_callout); 2013 splx(s); 2014 } 2015 2016 int 2017 epenable(sc) 2018 struct ep_softc *sc; 2019 { 2020 2021 if (sc->enabled == 0 && sc->enable != NULL) { 2022 if ((*sc->enable)(sc) != 0) { 2023 printf("%s: device enable failed\n", 2024 sc->sc_dev.dv_xname); 2025 return (EIO); 2026 } 2027 } 2028 2029 sc->enabled = 1; 2030 return (0); 2031 } 2032 2033 void 2034 epdisable(sc) 2035 struct ep_softc *sc; 2036 { 2037 2038 if (sc->enabled != 0 && sc->disable != NULL) { 2039 (*sc->disable)(sc); 2040 sc->enabled = 0; 2041 } 2042 } 2043 2044 /* 2045 * ep_activate: 2046 * 2047 * Handle device activation/deactivation requests. 2048 */ 2049 int 2050 ep_activate(self, act) 2051 struct device *self; 2052 enum devact act; 2053 { 2054 struct ep_softc *sc = (struct ep_softc *)self; 2055 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2056 int error = 0, s; 2057 2058 s = splnet(); 2059 switch (act) { 2060 case DVACT_ACTIVATE: 2061 error = EOPNOTSUPP; 2062 break; 2063 2064 case DVACT_DEACTIVATE: 2065 if (sc->ep_flags & ELINK_FLAGS_MII) 2066 mii_activate(&sc->sc_mii, act, MII_PHY_ANY, 2067 MII_OFFSET_ANY); 2068 if_deactivate(ifp); 2069 break; 2070 } 2071 splx(s); 2072 return (error); 2073 } 2074 2075 /* 2076 * ep_detach: 2077 * 2078 * Detach a elink3 interface. 2079 */ 2080 int 2081 ep_detach(self, flags) 2082 struct device *self; 2083 int flags; 2084 { 2085 struct ep_softc *sc = (struct ep_softc *)self; 2086 struct ifnet *ifp = &sc->sc_ethercom.ec_if; 2087 2088 /* Succeed now if there's no work to do. */ 2089 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0) 2090 return (0); 2091 2092 epdisable(sc); 2093 2094 callout_stop(&sc->sc_mii_callout); 2095 callout_stop(&sc->sc_mbuf_callout); 2096 2097 if (sc->ep_flags & ELINK_FLAGS_MII) { 2098 /* Detach all PHYs */ 2099 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 2100 } 2101 2102 /* Delete all remaining media. */ 2103 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 2104 2105 #if NRND > 0 2106 rnd_detach_source(&sc->rnd_source); 2107 #endif 2108 ether_ifdetach(ifp); 2109 if_detach(ifp); 2110 2111 shutdownhook_disestablish(sc->sd_hook); 2112 2113 return (0); 2114 } 2115 2116 u_int32_t 2117 ep_mii_bitbang_read(self) 2118 struct device *self; 2119 { 2120 struct ep_softc *sc = (void *) self; 2121 2122 /* We're already in Window 4. */ 2123 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, 2124 ELINK_W4_BOOM_PHYSMGMT)); 2125 } 2126 2127 void 2128 ep_mii_bitbang_write(self, val) 2129 struct device *self; 2130 u_int32_t val; 2131 { 2132 struct ep_softc *sc = (void *) self; 2133 2134 /* We're already in Window 4. */ 2135 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 2136 ELINK_W4_BOOM_PHYSMGMT, val); 2137 } 2138 2139 int 2140 ep_mii_readreg(self, phy, reg) 2141 struct device *self; 2142 int phy, reg; 2143 { 2144 struct ep_softc *sc = (void *) self; 2145 int val; 2146 2147 GO_WINDOW(4); 2148 2149 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg); 2150 2151 GO_WINDOW(1); 2152 2153 return (val); 2154 } 2155 2156 void 2157 ep_mii_writereg(self, phy, reg, val) 2158 struct device *self; 2159 int phy, reg, val; 2160 { 2161 struct ep_softc *sc = (void *) self; 2162 2163 GO_WINDOW(4); 2164 2165 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val); 2166 2167 GO_WINDOW(1); 2168 } 2169 2170 void 2171 ep_statchg(self) 2172 struct device *self; 2173 { 2174 struct ep_softc *sc = (struct ep_softc *)self; 2175 bus_space_tag_t iot = sc->sc_iot; 2176 bus_space_handle_t ioh = sc->sc_ioh; 2177 int mctl; 2178 2179 GO_WINDOW(3); 2180 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL); 2181 if (sc->sc_mii.mii_media_active & IFM_FDX) 2182 mctl |= MAC_CONTROL_FDX; 2183 else 2184 mctl &= ~MAC_CONTROL_FDX; 2185 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl); 2186 GO_WINDOW(1); /* back to operating window */ 2187 }
Cache object: 550a6564148cce17166678133fc50351
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