FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/elink3.c
1 /* $NetBSD: elink3.c,v 1.111 2005/02/27 00:27:01 perry Exp $ */
2
3 /*-
4 * Copyright (c) 1998, 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Copyright (c) 1996, 1997 Jonathan Stone <jonathan@NetBSD.org>
42 * Copyright (c) 1994 Herb Peyerl <hpeyerl@beer.org>
43 * All rights reserved.
44 *
45 * Redistribution and use in source and binary forms, with or without
46 * modification, are permitted provided that the following conditions
47 * are met:
48 * 1. Redistributions of source code must retain the above copyright
49 * notice, this list of conditions and the following disclaimer.
50 * 2. Redistributions in binary form must reproduce the above copyright
51 * notice, this list of conditions and the following disclaimer in the
52 * documentation and/or other materials provided with the distribution.
53 * 3. All advertising materials mentioning features or use of this software
54 * must display the following acknowledgement:
55 * This product includes software developed by Herb Peyerl.
56 * 4. The name of Herb Peyerl may not be used to endorse or promote products
57 * derived from this software without specific prior written permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
69 */
70
71 #include <sys/cdefs.h>
72 __KERNEL_RCSID(0, "$NetBSD: elink3.c,v 1.111 2005/02/27 00:27:01 perry Exp $");
73
74 #include "opt_inet.h"
75 #include "opt_ns.h"
76 #include "bpfilter.h"
77 #include "rnd.h"
78
79 #include <sys/param.h>
80 #include <sys/systm.h>
81 #include <sys/callout.h>
82 #include <sys/kernel.h>
83 #include <sys/mbuf.h>
84 #include <sys/socket.h>
85 #include <sys/ioctl.h>
86 #include <sys/errno.h>
87 #include <sys/syslog.h>
88 #include <sys/select.h>
89 #include <sys/device.h>
90 #if NRND > 0
91 #include <sys/rnd.h>
92 #endif
93
94 #include <net/if.h>
95 #include <net/if_dl.h>
96 #include <net/if_ether.h>
97 #include <net/if_media.h>
98
99 #if NBPFILTER > 0
100 #include <net/bpf.h>
101 #include <net/bpfdesc.h>
102 #endif
103
104 #include <machine/cpu.h>
105 #include <machine/bus.h>
106 #include <machine/intr.h>
107
108 #include <dev/mii/mii.h>
109 #include <dev/mii/miivar.h>
110 #include <dev/mii/mii_bitbang.h>
111
112 #include <dev/ic/elink3var.h>
113 #include <dev/ic/elink3reg.h>
114
115 #ifdef DEBUG
116 int epdebug = 0;
117 #endif
118
119 /*
120 * XXX endian workaround for big-endian CPUs with pcmcia:
121 * if stream methods for bus_space_multi are not provided, define them
122 * using non-stream bus_space_{read,write}_multi_.
123 * Assumes host CPU is same endian-ness as bus.
124 */
125 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
126 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
127 #define bus_space_read_multi_stream_4 bus_space_read_multi_4
128 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
129 #define bus_space_write_multi_stream_4 bus_space_write_multi_4
130 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
131
132 /*
133 * Structure to map media-present bits in boards to ifmedia codes and
134 * printable media names. Used for table-driven ifmedia initialization.
135 */
136 struct ep_media {
137 int epm_mpbit; /* media present bit */
138 const char *epm_name; /* name of medium */
139 int epm_ifmedia; /* ifmedia word for medium */
140 int epm_epmedia; /* ELINKMEDIA_* constant */
141 };
142
143 /*
144 * Media table for the Demon/Vortex/Boomerang chipsets.
145 *
146 * Note that MII on the Demon and Vortex (3c59x) indicates an external
147 * MII connector (for connecting an external PHY) ... I think. Treat
148 * it as `manual' on these chips.
149 *
150 * Any Boomerang (3c90x) chips with MII really do have an internal
151 * MII and real PHYs attached; no `native' media.
152 */
153 const struct ep_media ep_vortex_media[] = {
154 { ELINK_PCI_10BASE_T, "10baseT", IFM_ETHER|IFM_10_T,
155 ELINKMEDIA_10BASE_T },
156 { ELINK_PCI_10BASE_T, "10baseT-FDX", IFM_ETHER|IFM_10_T|IFM_FDX,
157 ELINKMEDIA_10BASE_T },
158 { ELINK_PCI_AUI, "10base5", IFM_ETHER|IFM_10_5,
159 ELINKMEDIA_AUI },
160 { ELINK_PCI_BNC, "10base2", IFM_ETHER|IFM_10_2,
161 ELINKMEDIA_10BASE_2 },
162 { ELINK_PCI_100BASE_TX, "100baseTX", IFM_ETHER|IFM_100_TX,
163 ELINKMEDIA_100BASE_TX },
164 { ELINK_PCI_100BASE_TX, "100baseTX-FDX",IFM_ETHER|IFM_100_TX|IFM_FDX,
165 ELINKMEDIA_100BASE_TX },
166 { ELINK_PCI_100BASE_FX, "100baseFX", IFM_ETHER|IFM_100_FX,
167 ELINKMEDIA_100BASE_FX },
168 { ELINK_PCI_100BASE_MII,"manual", IFM_ETHER|IFM_MANUAL,
169 ELINKMEDIA_MII },
170 { ELINK_PCI_100BASE_T4, "100baseT4", IFM_ETHER|IFM_100_T4,
171 ELINKMEDIA_100BASE_T4 },
172 { 0, NULL, 0,
173 0 },
174 };
175
176 /*
177 * Media table for the older 3Com Etherlink III chipset, used
178 * in the 3c509, 3c579, and 3c589.
179 */
180 const struct ep_media ep_509_media[] = {
181 { ELINK_W0_CC_UTP, "10baseT", IFM_ETHER|IFM_10_T,
182 ELINKMEDIA_10BASE_T },
183 { ELINK_W0_CC_AUI, "10base5", IFM_ETHER|IFM_10_5,
184 ELINKMEDIA_AUI },
185 { ELINK_W0_CC_BNC, "10base2", IFM_ETHER|IFM_10_2,
186 ELINKMEDIA_10BASE_2 },
187 { 0, NULL, 0,
188 0 },
189 };
190
191 void ep_internalconfig(struct ep_softc *sc);
192 void ep_vortex_probemedia(struct ep_softc *sc);
193 void ep_509_probemedia(struct ep_softc *sc);
194
195 static void eptxstat(struct ep_softc *);
196 static int epstatus(struct ep_softc *);
197 int epinit(struct ifnet *);
198 void epstop(struct ifnet *, int);
199 int epioctl(struct ifnet *, u_long, caddr_t);
200 void epstart(struct ifnet *);
201 void epwatchdog(struct ifnet *);
202 void epreset(struct ep_softc *);
203 static void epshutdown(void *);
204 void epread(struct ep_softc *);
205 struct mbuf *epget(struct ep_softc *, int);
206 void epmbuffill(void *);
207 void epmbufempty(struct ep_softc *);
208 void epsetfilter(struct ep_softc *);
209 void ep_roadrunner_mii_enable(struct ep_softc *);
210 void epsetmedia(struct ep_softc *);
211
212 /* ifmedia callbacks */
213 int ep_media_change(struct ifnet *ifp);
214 void ep_media_status(struct ifnet *ifp, struct ifmediareq *req);
215
216 /* MII callbacks */
217 int ep_mii_readreg(struct device *, int, int);
218 void ep_mii_writereg(struct device *, int, int, int);
219 void ep_statchg(struct device *);
220
221 void ep_tick(void *);
222
223 static int epbusyeeprom(struct ep_softc *);
224 u_int16_t ep_read_eeprom(struct ep_softc *, u_int16_t);
225 static inline void ep_reset_cmd(struct ep_softc *sc, u_int cmd, u_int arg);
226 static inline void ep_finish_reset(bus_space_tag_t, bus_space_handle_t);
227 static inline void ep_discard_rxtop(bus_space_tag_t, bus_space_handle_t);
228 static __inline int ep_w1_reg(struct ep_softc *, int);
229
230 /*
231 * MII bit-bang glue.
232 */
233 u_int32_t ep_mii_bitbang_read(struct device *);
234 void ep_mii_bitbang_write(struct device *, u_int32_t);
235
236 const struct mii_bitbang_ops ep_mii_bitbang_ops = {
237 ep_mii_bitbang_read,
238 ep_mii_bitbang_write,
239 {
240 PHYSMGMT_DATA, /* MII_BIT_MDO */
241 PHYSMGMT_DATA, /* MII_BIT_MDI */
242 PHYSMGMT_CLK, /* MII_BIT_MDC */
243 PHYSMGMT_DIR, /* MII_BIT_DIR_HOST_PHY */
244 0, /* MII_BIT_DIR_PHY_HOST */
245 }
246 };
247
248 /*
249 * Some chips (3c515 [Corkscrew] and 3c574 [RoadRunner]) have
250 * Window 1 registers offset!
251 */
252 static __inline int
253 ep_w1_reg(sc, reg)
254 struct ep_softc *sc;
255 int reg;
256 {
257
258 switch (sc->ep_chipset) {
259 case ELINK_CHIPSET_CORKSCREW:
260 return (reg + 0x10);
261
262 case ELINK_CHIPSET_ROADRUNNER:
263 switch (reg) {
264 case ELINK_W1_FREE_TX:
265 case ELINK_W1_RUNNER_RDCTL:
266 case ELINK_W1_RUNNER_WRCTL:
267 return (reg);
268 }
269 return (reg + 0x10);
270 }
271
272 return (reg);
273 }
274
275 /*
276 * Wait for any pending reset to complete.
277 * On newer hardware we could poll SC_COMMAND_IN_PROGRESS,
278 * but older hardware doesn't implement it and we must delay.
279 */
280 static inline void
281 ep_finish_reset(iot, ioh)
282 bus_space_tag_t iot;
283 bus_space_handle_t ioh;
284 {
285 int i;
286
287 for (i = 0; i < 10000; i++) {
288 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) &
289 COMMAND_IN_PROGRESS) == 0)
290 break;
291 DELAY(10);
292 }
293 }
294
295 /*
296 * Issue a (reset) command, and be sure it has completed.
297 * Used for global reset, TX_RESET, RX_RESET.
298 */
299 static inline void
300 ep_reset_cmd(sc, cmd, arg)
301 struct ep_softc *sc;
302 u_int cmd, arg;
303 {
304 bus_space_tag_t iot = sc->sc_iot;
305 bus_space_handle_t ioh = sc->sc_ioh;
306
307 bus_space_write_2(iot, ioh, cmd, arg);
308 ep_finish_reset(iot, ioh);
309 }
310
311
312 static inline void
313 ep_discard_rxtop(iot, ioh)
314 bus_space_tag_t iot;
315 bus_space_handle_t ioh;
316 {
317 int i;
318
319 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISCARD_TOP_PACK);
320
321 /*
322 * Spin for about 1 msec, to avoid forcing a DELAY() between
323 * every received packet (adding latency and limiting pkt-recv rate).
324 * On PCI, at 4 30-nsec PCI bus cycles for a read, 8000 iterations
325 * is about right.
326 */
327 for (i = 0; i < 8000; i++) {
328 if ((bus_space_read_2(iot, ioh, ELINK_STATUS) &
329 COMMAND_IN_PROGRESS) == 0)
330 return;
331 }
332
333 /* Didn't complete in a hurry. Do DELAY()s. */
334 ep_finish_reset(iot, ioh);
335 }
336
337 /*
338 * Back-end attach and configure.
339 */
340 int
341 epconfig(sc, chipset, enaddr)
342 struct ep_softc *sc;
343 u_short chipset;
344 u_int8_t *enaddr;
345 {
346 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
347 bus_space_tag_t iot = sc->sc_iot;
348 bus_space_handle_t ioh = sc->sc_ioh;
349 u_int16_t i;
350 u_int8_t myla[ETHER_ADDR_LEN];
351
352 callout_init(&sc->sc_mii_callout);
353 callout_init(&sc->sc_mbuf_callout);
354
355 sc->ep_chipset = chipset;
356
357 /*
358 * We could have been groveling around in other register
359 * windows in the front-end; make sure we're in window 0
360 * to read the EEPROM.
361 */
362 GO_WINDOW(0);
363
364 if (enaddr == NULL) {
365 /*
366 * Read the station address from the eeprom.
367 */
368 for (i = 0; i < ETHER_ADDR_LEN / 2; i++) {
369 u_int16_t x = ep_read_eeprom(sc, i);
370 myla[(i << 1)] = x >> 8;
371 myla[(i << 1) + 1] = x;
372 }
373 enaddr = myla;
374 }
375
376 /*
377 * Vortex-based (3c59x pci,eisa) and Boomerang (3c900) cards
378 * allow FDDI-sized (4500) byte packets. Commands only take an
379 * 11-bit parameter, and 11 bits isn't enough to hold a full-size
380 * packet length.
381 * Commands to these cards implicitly upshift a packet size
382 * or threshold by 2 bits.
383 * To detect cards with large-packet support, we probe by setting
384 * the transmit threshold register, then change windows and
385 * read back the threshold register directly, and see if the
386 * threshold value was shifted or not.
387 */
388 bus_space_write_2(iot, ioh, ELINK_COMMAND,
389 SET_TX_AVAIL_THRESH | ELINK_LARGEWIN_PROBE);
390 GO_WINDOW(5);
391 i = bus_space_read_2(iot, ioh, ELINK_W5_TX_AVAIL_THRESH);
392 GO_WINDOW(1);
393 switch (i) {
394 case ELINK_LARGEWIN_PROBE:
395 case (ELINK_LARGEWIN_PROBE & ELINK_LARGEWIN_MASK):
396 sc->ep_pktlenshift = 0;
397 break;
398
399 case (ELINK_LARGEWIN_PROBE << 2):
400 sc->ep_pktlenshift = 2;
401 break;
402
403 default:
404 aprint_error(
405 "%s: wrote 0x%x to TX_AVAIL_THRESH, read back 0x%x. "
406 "Interface disabled\n",
407 sc->sc_dev.dv_xname, ELINK_LARGEWIN_PROBE, (int) i);
408 return (1);
409 }
410
411 /*
412 * Ensure Tx-available interrupts are enabled for
413 * start the interface.
414 * XXX should be in epinit()?
415 */
416 bus_space_write_2(iot, ioh, ELINK_COMMAND,
417 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift));
418
419 strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
420 ifp->if_softc = sc;
421 ifp->if_start = epstart;
422 ifp->if_ioctl = epioctl;
423 ifp->if_watchdog = epwatchdog;
424 ifp->if_init = epinit;
425 ifp->if_stop = epstop;
426 ifp->if_flags =
427 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
428 IFQ_SET_READY(&ifp->if_snd);
429
430 if_attach(ifp);
431 ether_ifattach(ifp, enaddr);
432
433 /*
434 * Finish configuration:
435 * determine chipset if the front-end couldn't do so,
436 * show board details, set media.
437 */
438
439 /*
440 * Print RAM size. We also print the Ethernet address in here.
441 * It's extracted from the ifp, so we have to make sure it's
442 * been attached first.
443 */
444 ep_internalconfig(sc);
445 GO_WINDOW(0);
446
447 /*
448 * Display some additional information, if pertinent.
449 */
450 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER)
451 aprint_normal("%s: RoadRunner FIFO buffer enabled\n",
452 sc->sc_dev.dv_xname);
453
454 /*
455 * Initialize our media structures and MII info. We'll
456 * probe the MII if we discover that we have one.
457 */
458 sc->sc_mii.mii_ifp = ifp;
459 sc->sc_mii.mii_readreg = ep_mii_readreg;
460 sc->sc_mii.mii_writereg = ep_mii_writereg;
461 sc->sc_mii.mii_statchg = ep_statchg;
462 ifmedia_init(&sc->sc_mii.mii_media, IFM_IMASK, ep_media_change,
463 ep_media_status);
464
465 /*
466 * All CORKSCREW chips have MII.
467 */
468 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW)
469 sc->ep_flags |= ELINK_FLAGS_MII;
470
471 /*
472 * Now, determine which media we have.
473 */
474 switch (sc->ep_chipset) {
475 case ELINK_CHIPSET_ROADRUNNER:
476 if (sc->ep_flags & ELINK_FLAGS_MII) {
477 ep_roadrunner_mii_enable(sc);
478 GO_WINDOW(0);
479 }
480 /* FALLTHROUGH */
481
482 case ELINK_CHIPSET_CORKSCREW:
483 case ELINK_CHIPSET_BOOMERANG:
484 /*
485 * If the device has MII, probe it. We won't be using
486 * any `native' media in this case, only PHYs. If
487 * we don't, just treat the Boomerang like the Vortex.
488 */
489 if (sc->ep_flags & ELINK_FLAGS_MII) {
490 mii_attach(&sc->sc_dev, &sc->sc_mii, 0xffffffff,
491 MII_PHY_ANY, MII_OFFSET_ANY, 0);
492 if (LIST_FIRST(&sc->sc_mii.mii_phys) == NULL) {
493 ifmedia_add(&sc->sc_mii.mii_media,
494 IFM_ETHER|IFM_NONE, 0, NULL);
495 ifmedia_set(&sc->sc_mii.mii_media,
496 IFM_ETHER|IFM_NONE);
497 } else {
498 ifmedia_set(&sc->sc_mii.mii_media,
499 IFM_ETHER|IFM_AUTO);
500 }
501 break;
502 }
503 /* FALLTHROUGH */
504
505 case ELINK_CHIPSET_VORTEX:
506 ep_vortex_probemedia(sc);
507 break;
508
509 default:
510 ep_509_probemedia(sc);
511 break;
512 }
513
514 GO_WINDOW(1); /* Window 1 is operating window */
515
516 #if NRND > 0
517 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname,
518 RND_TYPE_NET, 0);
519 #endif
520
521 sc->tx_start_thresh = 20; /* probably a good starting point. */
522
523 /* Establish callback to reset card when we reboot. */
524 sc->sd_hook = shutdownhook_establish(epshutdown, sc);
525
526 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET);
527 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET);
528
529 /* The attach is successful. */
530 sc->sc_flags |= ELINK_FLAGS_ATTACHED;
531 return (0);
532 }
533
534
535 /*
536 * Show interface-model-independent info from window 3
537 * internal-configuration register.
538 */
539 void
540 ep_internalconfig(sc)
541 struct ep_softc *sc;
542 {
543 bus_space_tag_t iot = sc->sc_iot;
544 bus_space_handle_t ioh = sc->sc_ioh;
545
546 u_int config0;
547 u_int config1;
548
549 int ram_size, ram_width, ram_split;
550 /*
551 * NVRAM buffer Rx:Tx config names for busmastering cards
552 * (Demon, Vortex, and later).
553 */
554 const char *const onboard_ram_config[] = {
555 "5:3", "3:1", "1:1", "3:5" };
556
557 GO_WINDOW(3);
558 config0 = (u_int)bus_space_read_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG);
559 config1 = (u_int)bus_space_read_2(iot, ioh,
560 ELINK_W3_INTERNAL_CONFIG + 2);
561 GO_WINDOW(0);
562
563 ram_size = (config0 & CONFIG_RAMSIZE) >> CONFIG_RAMSIZE_SHIFT;
564 ram_width = (config0 & CONFIG_RAMWIDTH) >> CONFIG_RAMWIDTH_SHIFT;
565
566 ram_split = (config1 & CONFIG_RAMSPLIT) >> CONFIG_RAMSPLIT_SHIFT;
567
568 aprint_normal("%s: address %s, %dKB %s-wide FIFO, %s Rx:Tx split\n",
569 sc->sc_dev.dv_xname,
570 ether_sprintf(LLADDR(sc->sc_ethercom.ec_if.if_sadl)),
571 8 << ram_size,
572 (ram_width) ? "word" : "byte",
573 onboard_ram_config[ram_split]);
574 }
575
576
577 /*
578 * Find supported media on 3c509-generation hardware that doesn't have
579 * a "reset_options" register in window 3.
580 * Use the config_cntrl register in window 0 instead.
581 * Used on original, 10Mbit ISA (3c509), 3c509B, and pre-Demon EISA cards
582 * that implement CONFIG_CTRL. We don't have a good way to set the
583 * default active medium; punt to ifconfig instead.
584 */
585 void
586 ep_509_probemedia(sc)
587 struct ep_softc *sc;
588 {
589 bus_space_tag_t iot = sc->sc_iot;
590 bus_space_handle_t ioh = sc->sc_ioh;
591 struct ifmedia *ifm = &sc->sc_mii.mii_media;
592 u_int16_t ep_w0_config, port;
593 const struct ep_media *epm;
594 const char *sep = "", *defmedianame = NULL;
595 int defmedia = 0;
596
597 GO_WINDOW(0);
598 ep_w0_config = bus_space_read_2(iot, ioh, ELINK_W0_CONFIG_CTRL);
599
600 aprint_normal("%s: ", sc->sc_dev.dv_xname);
601
602 /* Sanity check that there are any media! */
603 if ((ep_w0_config & ELINK_W0_CC_MEDIAMASK) == 0) {
604 aprint_error("no media present!\n");
605 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL);
606 ifmedia_set(ifm, IFM_ETHER|IFM_NONE);
607 return;
608 }
609
610 /*
611 * Get the default media from the EEPROM.
612 */
613 port = ep_read_eeprom(sc, EEPROM_ADDR_CFG) >> 14;
614
615 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", "
616
617 for (epm = ep_509_media; epm->epm_name != NULL; epm++) {
618 if (ep_w0_config & epm->epm_mpbit) {
619 /*
620 * This simple test works because 509 chipsets
621 * don't do full-duplex.
622 */
623 if (epm->epm_epmedia == port || defmedia == 0) {
624 defmedia = epm->epm_ifmedia;
625 defmedianame = epm->epm_name;
626 }
627 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia,
628 NULL);
629 PRINT(epm->epm_name);
630 }
631 }
632
633 #undef PRINT
634
635 #ifdef DIAGNOSTIC
636 if (defmedia == 0)
637 panic("ep_509_probemedia: impossible");
638 #endif
639
640 aprint_normal(" (default %s)\n", defmedianame);
641 ifmedia_set(ifm, defmedia);
642 }
643
644 /*
645 * Find media present on large-packet-capable elink3 devices.
646 * Show onboard configuration of large-packet-capable elink3 devices
647 * (Demon, Vortex, Boomerang), which do not implement CONFIG_CTRL in window 0.
648 * Use media and card-version info in window 3 instead.
649 */
650 void
651 ep_vortex_probemedia(sc)
652 struct ep_softc *sc;
653 {
654 bus_space_tag_t iot = sc->sc_iot;
655 bus_space_handle_t ioh = sc->sc_ioh;
656 struct ifmedia *ifm = &sc->sc_mii.mii_media;
657 const struct ep_media *epm;
658 u_int config1;
659 int reset_options;
660 int default_media; /* 3-bit encoding of default (EEPROM) media */
661 int defmedia = 0;
662 const char *sep = "", *defmedianame = NULL;
663
664 GO_WINDOW(3);
665 config1 = (u_int)bus_space_read_2(iot, ioh,
666 ELINK_W3_INTERNAL_CONFIG + 2);
667 reset_options = (int)bus_space_read_2(iot, ioh, ELINK_W3_RESET_OPTIONS);
668 GO_WINDOW(0);
669
670 default_media = (config1 & CONFIG_MEDIAMASK) >> CONFIG_MEDIAMASK_SHIFT;
671
672 aprint_normal("%s: ", sc->sc_dev.dv_xname);
673
674 /* Sanity check that there are any media! */
675 if ((reset_options & ELINK_PCI_MEDIAMASK) == 0) {
676 aprint_error("no media present!\n");
677 ifmedia_add(ifm, IFM_ETHER|IFM_NONE, 0, NULL);
678 ifmedia_set(ifm, IFM_ETHER|IFM_NONE);
679 return;
680 }
681
682 #define PRINT(str) aprint_normal("%s%s", sep, str); sep = ", "
683
684 for (epm = ep_vortex_media; epm->epm_name != NULL; epm++) {
685 if (reset_options & epm->epm_mpbit) {
686 /*
687 * Default media is a little more complicated
688 * on the Vortex. We support full-duplex which
689 * uses the same reset options bit.
690 *
691 * XXX Check EEPROM for default to FDX?
692 */
693 if (epm->epm_epmedia == default_media) {
694 if ((epm->epm_ifmedia & IFM_FDX) == 0) {
695 defmedia = epm->epm_ifmedia;
696 defmedianame = epm->epm_name;
697 }
698 } else if (defmedia == 0) {
699 defmedia = epm->epm_ifmedia;
700 defmedianame = epm->epm_name;
701 }
702 ifmedia_add(ifm, epm->epm_ifmedia, epm->epm_epmedia,
703 NULL);
704 PRINT(epm->epm_name);
705 }
706 }
707
708 #undef PRINT
709
710 #ifdef DIAGNOSTIC
711 if (defmedia == 0)
712 panic("ep_vortex_probemedia: impossible");
713 #endif
714
715 aprint_normal(" (default %s)\n", defmedianame);
716 ifmedia_set(ifm, defmedia);
717 }
718
719 /*
720 * One second timer, used to tick the MII.
721 */
722 void
723 ep_tick(arg)
724 void *arg;
725 {
726 struct ep_softc *sc = arg;
727 int s;
728
729 #ifdef DIAGNOSTIC
730 if ((sc->ep_flags & ELINK_FLAGS_MII) == 0)
731 panic("ep_tick");
732 #endif
733
734 if ((sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
735 return;
736
737 s = splnet();
738 mii_tick(&sc->sc_mii);
739 splx(s);
740
741 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc);
742 }
743
744 /*
745 * Bring device up.
746 *
747 * The order in here seems important. Otherwise we may not receive
748 * interrupts. ?!
749 */
750 int
751 epinit(ifp)
752 struct ifnet *ifp;
753 {
754 struct ep_softc *sc = ifp->if_softc;
755 bus_space_tag_t iot = sc->sc_iot;
756 bus_space_handle_t ioh = sc->sc_ioh;
757 int i, error;
758 u_int8_t *addr;
759
760 if (!sc->enabled && (error = epenable(sc)) != 0)
761 return (error);
762
763 /* Make sure any pending reset has completed before touching board */
764 ep_finish_reset(iot, ioh);
765
766 /*
767 * Cancel any pending I/O.
768 */
769 epstop(ifp, 0);
770
771 if (sc->bustype != ELINK_BUS_PCI && sc->bustype != ELINK_BUS_EISA
772 && sc->bustype != ELINK_BUS_MCA) {
773 GO_WINDOW(0);
774 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL, 0);
775 bus_space_write_2(iot, ioh, ELINK_W0_CONFIG_CTRL,
776 ENABLE_DRQ_IRQ);
777 }
778
779 if (sc->bustype == ELINK_BUS_PCMCIA) {
780 bus_space_write_2(iot, ioh, ELINK_W0_RESOURCE_CFG, 0x3f00);
781 }
782
783 GO_WINDOW(2);
784 /* Reload the ether_addr. */
785 addr = LLADDR(ifp->if_sadl);
786 for (i = 0; i < 6; i += 2)
787 bus_space_write_2(iot, ioh, ELINK_W2_ADDR_0 + i,
788 (addr[i] << 0) | (addr[i + 1] << 8));
789
790 /*
791 * Reset the station-address receive filter.
792 * A bug workaround for busmastering (Vortex, Demon) cards.
793 */
794 for (i = 0; i < 6; i += 2)
795 bus_space_write_2(iot, ioh, ELINK_W2_RECVMASK_0 + i, 0);
796
797 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET);
798 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET);
799
800 GO_WINDOW(1); /* Window 1 is operating window */
801 for (i = 0; i < 31; i++)
802 bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS));
803
804 /* Set threshold for Tx-space available interrupt. */
805 bus_space_write_2(iot, ioh, ELINK_COMMAND,
806 SET_TX_AVAIL_THRESH | (1600 >> sc->ep_pktlenshift));
807
808 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) {
809 /*
810 * Enable options in the PCMCIA LAN COR register, via
811 * RoadRunner Window 1.
812 *
813 * XXX MAGIC CONSTANTS!
814 */
815 u_int16_t cor;
816
817 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, (1 << 11));
818
819 cor = bus_space_read_2(iot, ioh, 0) & ~0x30;
820 if (sc->ep_flags & ELINK_FLAGS_USESHAREDMEM)
821 cor |= 0x10;
822 if (sc->ep_flags & ELINK_FLAGS_FORCENOWAIT)
823 cor |= 0x20;
824 bus_space_write_2(iot, ioh, 0, cor);
825
826 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0);
827 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0);
828
829 if (sc->ep_flags & ELINK_FLAGS_MII) {
830 ep_roadrunner_mii_enable(sc);
831 GO_WINDOW(1);
832 }
833 }
834
835 /* Enable interrupts. */
836 bus_space_write_2(iot, ioh, ELINK_COMMAND,
837 SET_RD_0_MASK | WATCHED_INTERRUPTS);
838 bus_space_write_2(iot, ioh, ELINK_COMMAND,
839 SET_INTR_MASK | WATCHED_INTERRUPTS);
840
841 /*
842 * Attempt to get rid of any stray interrupts that occurred during
843 * configuration. On the i386 this isn't possible because one may
844 * already be queued. However, a single stray interrupt is
845 * unimportant.
846 */
847 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | 0xff);
848
849 epsetfilter(sc);
850 epsetmedia(sc);
851
852 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_ENABLE);
853 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
854
855 epmbuffill(sc);
856
857 /* Interface is now `running', with no output active. */
858 ifp->if_flags |= IFF_RUNNING;
859 ifp->if_flags &= ~IFF_OACTIVE;
860
861 if (sc->ep_flags & ELINK_FLAGS_MII) {
862 /* Start the one second clock. */
863 callout_reset(&sc->sc_mii_callout, hz, ep_tick, sc);
864 }
865
866 /* Attempt to start output, if any. */
867 epstart(ifp);
868
869 return (0);
870 }
871
872
873 /*
874 * Set multicast receive filter.
875 * elink3 hardware has no selective multicast filter in hardware.
876 * Enable reception of all multicasts and filter in software.
877 */
878 void
879 epsetfilter(sc)
880 struct ep_softc *sc;
881 {
882 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
883
884 GO_WINDOW(1); /* Window 1 is operating window */
885 bus_space_write_2(sc->sc_iot, sc->sc_ioh, ELINK_COMMAND,
886 SET_RX_FILTER | FIL_INDIVIDUAL | FIL_BRDCST |
887 ((ifp->if_flags & IFF_MULTICAST) ? FIL_MULTICAST : 0) |
888 ((ifp->if_flags & IFF_PROMISC) ? FIL_PROMISC : 0));
889 }
890
891 int
892 ep_media_change(ifp)
893 struct ifnet *ifp;
894 {
895 struct ep_softc *sc = ifp->if_softc;
896
897 if (sc->enabled && (ifp->if_flags & IFF_UP) != 0)
898 epreset(sc);
899
900 return (0);
901 }
902
903 /*
904 * Reset and enable the MII on the RoadRunner.
905 */
906 void
907 ep_roadrunner_mii_enable(sc)
908 struct ep_softc *sc;
909 {
910 bus_space_tag_t iot = sc->sc_iot;
911 bus_space_handle_t ioh = sc->sc_ioh;
912
913 GO_WINDOW(3);
914 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS,
915 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII);
916 delay(1000);
917 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS,
918 ELINK_PCI_100BASE_MII|ELINK_RUNNER_MII_RESET|
919 ELINK_RUNNER_ENABLE_MII);
920 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET);
921 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET);
922 delay(1000);
923 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS,
924 ELINK_PCI_100BASE_MII|ELINK_RUNNER_ENABLE_MII);
925 }
926
927 /*
928 * Set the card to use the specified media.
929 */
930 void
931 epsetmedia(sc)
932 struct ep_softc *sc;
933 {
934 bus_space_tag_t iot = sc->sc_iot;
935 bus_space_handle_t ioh = sc->sc_ioh;
936
937 /* Turn everything off. First turn off linkbeat and UTP. */
938 GO_WINDOW(4);
939 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE, 0x0);
940
941 /* Turn off coax */
942 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
943 delay(1000);
944
945 /*
946 * If the device has MII, select it, and then tell the
947 * PHY which media to use.
948 */
949 if (sc->ep_flags & ELINK_FLAGS_MII) {
950 int config0, config1;
951
952 GO_WINDOW(3);
953
954 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) {
955 int resopt;
956
957 resopt = bus_space_read_2(iot, ioh,
958 ELINK_W3_RESET_OPTIONS);
959 bus_space_write_2(iot, ioh, ELINK_W3_RESET_OPTIONS,
960 resopt | ELINK_RUNNER_ENABLE_MII);
961 }
962
963 config0 = (u_int)bus_space_read_2(iot, ioh,
964 ELINK_W3_INTERNAL_CONFIG);
965 config1 = (u_int)bus_space_read_2(iot, ioh,
966 ELINK_W3_INTERNAL_CONFIG + 2);
967
968 config1 = config1 & ~CONFIG_MEDIAMASK;
969 config1 |= (ELINKMEDIA_MII << CONFIG_MEDIAMASK_SHIFT);
970
971 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0);
972 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2,
973 config1);
974 GO_WINDOW(1); /* back to operating window */
975
976 mii_mediachg(&sc->sc_mii);
977 return;
978 }
979
980 /*
981 * Now turn on the selected media/transceiver.
982 */
983 GO_WINDOW(4);
984 switch (IFM_SUBTYPE(sc->sc_mii.mii_media.ifm_cur->ifm_media)) {
985 case IFM_10_T:
986 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
987 JABBER_GUARD_ENABLE|LINKBEAT_ENABLE);
988 break;
989
990 case IFM_10_2:
991 bus_space_write_2(iot, ioh, ELINK_COMMAND, START_TRANSCEIVER);
992 DELAY(1000); /* 50ms not enmough? */
993 break;
994
995 case IFM_100_TX:
996 case IFM_100_FX:
997 case IFM_100_T4: /* XXX check documentation */
998 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
999 LINKBEAT_ENABLE);
1000 DELAY(1000); /* not strictly necessary? */
1001 break;
1002
1003 case IFM_10_5:
1004 bus_space_write_2(iot, ioh, ELINK_W4_MEDIA_TYPE,
1005 SQE_ENABLE);
1006 DELAY(1000); /* not strictly necessary? */
1007 break;
1008
1009 case IFM_MANUAL:
1010 /*
1011 * Nothing to do here; we are actually enabling the
1012 * external PHY on the MII port.
1013 */
1014 break;
1015
1016 case IFM_NONE:
1017 printf("%s: interface disabled\n", sc->sc_dev.dv_xname);
1018 return;
1019
1020 default:
1021 panic("epsetmedia: impossible");
1022 }
1023
1024 /*
1025 * Tell the chip which port to use.
1026 */
1027 switch (sc->ep_chipset) {
1028 case ELINK_CHIPSET_VORTEX:
1029 case ELINK_CHIPSET_BOOMERANG:
1030 {
1031 int mctl, config0, config1;
1032
1033 GO_WINDOW(3);
1034 config0 = (u_int)bus_space_read_2(iot, ioh,
1035 ELINK_W3_INTERNAL_CONFIG);
1036 config1 = (u_int)bus_space_read_2(iot, ioh,
1037 ELINK_W3_INTERNAL_CONFIG + 2);
1038
1039 config1 = config1 & ~CONFIG_MEDIAMASK;
1040 config1 |= (sc->sc_mii.mii_media.ifm_cur->ifm_data <<
1041 CONFIG_MEDIAMASK_SHIFT);
1042
1043 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG, config0);
1044 bus_space_write_2(iot, ioh, ELINK_W3_INTERNAL_CONFIG + 2,
1045 config1);
1046
1047 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL);
1048 if (sc->sc_mii.mii_media.ifm_cur->ifm_media & IFM_FDX)
1049 mctl |= MAC_CONTROL_FDX;
1050 else
1051 mctl &= ~MAC_CONTROL_FDX;
1052 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl);
1053 break;
1054 }
1055 default:
1056 {
1057 int w0_addr_cfg;
1058
1059 GO_WINDOW(0);
1060 w0_addr_cfg = bus_space_read_2(iot, ioh, ELINK_W0_ADDRESS_CFG);
1061 w0_addr_cfg &= 0x3fff;
1062 bus_space_write_2(iot, ioh, ELINK_W0_ADDRESS_CFG, w0_addr_cfg |
1063 (sc->sc_mii.mii_media.ifm_cur->ifm_data << 14));
1064 DELAY(1000);
1065 break;
1066 }
1067 }
1068
1069 GO_WINDOW(1); /* Window 1 is operating window */
1070 }
1071
1072 /*
1073 * Get currently-selected media from card.
1074 * (if_media callback, may be called before interface is brought up).
1075 */
1076 void
1077 ep_media_status(ifp, req)
1078 struct ifnet *ifp;
1079 struct ifmediareq *req;
1080 {
1081 struct ep_softc *sc = ifp->if_softc;
1082 bus_space_tag_t iot = sc->sc_iot;
1083 bus_space_handle_t ioh = sc->sc_ioh;
1084
1085 if (sc->enabled == 0) {
1086 req->ifm_active = IFM_ETHER|IFM_NONE;
1087 req->ifm_status = 0;
1088 return;
1089 }
1090
1091 /*
1092 * If we have MII, go ask the PHY what's going on.
1093 */
1094 if (sc->ep_flags & ELINK_FLAGS_MII) {
1095 mii_pollstat(&sc->sc_mii);
1096 req->ifm_active = sc->sc_mii.mii_media_active;
1097 req->ifm_status = sc->sc_mii.mii_media_status;
1098 return;
1099 }
1100
1101 /*
1102 * Ok, at this point we claim that our active media is
1103 * the currently selected media. We'll update our status
1104 * if our chipset allows us to detect link.
1105 */
1106 req->ifm_active = sc->sc_mii.mii_media.ifm_cur->ifm_media;
1107 req->ifm_status = 0;
1108
1109 switch (sc->ep_chipset) {
1110 case ELINK_CHIPSET_VORTEX:
1111 case ELINK_CHIPSET_BOOMERANG:
1112 GO_WINDOW(4);
1113 req->ifm_status = IFM_AVALID;
1114 if (bus_space_read_2(iot, ioh, ELINK_W4_MEDIA_TYPE) &
1115 LINKBEAT_DETECT)
1116 req->ifm_status |= IFM_ACTIVE;
1117 GO_WINDOW(1); /* back to operating window */
1118 break;
1119 }
1120 }
1121
1122
1123
1124 /*
1125 * Start outputting on the interface.
1126 * Always called as splnet().
1127 */
1128 void
1129 epstart(ifp)
1130 struct ifnet *ifp;
1131 {
1132 struct ep_softc *sc = ifp->if_softc;
1133 bus_space_tag_t iot = sc->sc_iot;
1134 bus_space_handle_t ioh = sc->sc_ioh;
1135 struct mbuf *m, *m0;
1136 int sh, len, pad;
1137 bus_size_t txreg;
1138
1139 /* Don't transmit if interface is busy or not running */
1140 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1141 return;
1142
1143 startagain:
1144 /* Sneak a peek at the next packet */
1145 IFQ_POLL(&ifp->if_snd, m0);
1146 if (m0 == 0)
1147 return;
1148
1149 /* We need to use m->m_pkthdr.len, so require the header */
1150 if ((m0->m_flags & M_PKTHDR) == 0)
1151 panic("epstart: no header mbuf");
1152 len = m0->m_pkthdr.len;
1153
1154 pad = (4 - len) & 3;
1155
1156 /*
1157 * The 3c509 automatically pads short packets to minimum ethernet
1158 * length, but we drop packets that are too large. Perhaps we should
1159 * truncate them instead?
1160 */
1161 if (len + pad > ETHER_MAX_LEN) {
1162 /* packet is obviously too large: toss it */
1163 ++ifp->if_oerrors;
1164 IFQ_DEQUEUE(&ifp->if_snd, m0);
1165 m_freem(m0);
1166 goto readcheck;
1167 }
1168
1169 if (bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_FREE_TX)) <
1170 len + pad + 4) {
1171 bus_space_write_2(iot, ioh, ELINK_COMMAND,
1172 SET_TX_AVAIL_THRESH |
1173 ((len + pad + 4) >> sc->ep_pktlenshift));
1174 /* not enough room in FIFO */
1175 ifp->if_flags |= IFF_OACTIVE;
1176 return;
1177 } else {
1178 bus_space_write_2(iot, ioh, ELINK_COMMAND,
1179 SET_TX_AVAIL_THRESH | ELINK_THRESH_DISABLE);
1180 }
1181
1182 IFQ_DEQUEUE(&ifp->if_snd, m0);
1183 if (m0 == 0) /* not really needed */
1184 return;
1185
1186 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_TX_START_THRESH |
1187 ((len / 4 + sc->tx_start_thresh) /* >> sc->ep_pktlenshift*/));
1188
1189 #if NBPFILTER > 0
1190 if (ifp->if_bpf)
1191 bpf_mtap(ifp->if_bpf, m0);
1192 #endif
1193
1194 /*
1195 * Do the output at a high interrupt priority level so that an
1196 * interrupt from another device won't cause a FIFO underrun.
1197 * We choose splsched() since that blocks essentially everything
1198 * except for interrupts from serial devices (which typically
1199 * lose data if their interrupt isn't serviced fast enough).
1200 *
1201 * XXX THIS CAN CAUSE CLOCK DRIFT!
1202 */
1203 sh = splsched();
1204
1205 txreg = ep_w1_reg(sc, ELINK_W1_TX_PIO_WR_1);
1206
1207 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) {
1208 /*
1209 * Prime the FIFO buffer counter (number of 16-bit
1210 * words about to be written to the FIFO).
1211 *
1212 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS
1213 * COUNTER IS NON-ZERO!
1214 */
1215 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL,
1216 (len + pad) >> 1);
1217 }
1218
1219 bus_space_write_2(iot, ioh, txreg, len);
1220 bus_space_write_2(iot, ioh, txreg, 0xffff); /* Second is meaningless */
1221 if (ELINK_IS_BUS_32(sc->bustype)) {
1222 for (m = m0; m;) {
1223 if (m->m_len > 3) {
1224 /* align our reads from core */
1225 if (mtod(m, u_long) & 3) {
1226 u_long count =
1227 4 - (mtod(m, u_long) & 3);
1228 bus_space_write_multi_1(iot, ioh,
1229 txreg, mtod(m, u_int8_t *), count);
1230 m->m_data =
1231 (void *)(mtod(m, u_long) + count);
1232 m->m_len -= count;
1233 }
1234 bus_space_write_multi_stream_4(iot, ioh,
1235 txreg, mtod(m, u_int32_t *), m->m_len >> 2);
1236 m->m_data = (void *)(mtod(m, u_long) +
1237 (u_long)(m->m_len & ~3));
1238 m->m_len -= m->m_len & ~3;
1239 }
1240 if (m->m_len) {
1241 bus_space_write_multi_1(iot, ioh,
1242 txreg, mtod(m, u_int8_t *), m->m_len);
1243 }
1244 MFREE(m, m0);
1245 m = m0;
1246 }
1247 } else {
1248 for (m = m0; m;) {
1249 if (m->m_len > 1) {
1250 if (mtod(m, u_long) & 1) {
1251 bus_space_write_1(iot, ioh,
1252 txreg, *(mtod(m, u_int8_t *)));
1253 m->m_data =
1254 (void *)(mtod(m, u_long) + 1);
1255 m->m_len -= 1;
1256 }
1257 bus_space_write_multi_stream_2(iot, ioh,
1258 txreg, mtod(m, u_int16_t *),
1259 m->m_len >> 1);
1260 }
1261 if (m->m_len & 1) {
1262 bus_space_write_1(iot, ioh, txreg,
1263 *(mtod(m, u_int8_t *) + m->m_len - 1));
1264 }
1265 MFREE(m, m0);
1266 m = m0;
1267 }
1268 }
1269 while (pad--)
1270 bus_space_write_1(iot, ioh, txreg, 0);
1271
1272 splx(sh);
1273
1274 ++ifp->if_opackets;
1275
1276 readcheck:
1277 if ((bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS)) &
1278 ERR_INCOMPLETE) == 0) {
1279 /* We received a complete packet. */
1280 u_int16_t status = bus_space_read_2(iot, ioh, ELINK_STATUS);
1281
1282 if ((status & INTR_LATCH) == 0) {
1283 /*
1284 * No interrupt, read the packet and continue
1285 * Is this supposed to happen? Is my motherboard
1286 * completely busted?
1287 */
1288 epread(sc);
1289 } else {
1290 /* Got an interrupt, return so that it gets serviced. */
1291 return;
1292 }
1293 } else {
1294 /* Check if we are stuck and reset [see XXX comment] */
1295 if (epstatus(sc)) {
1296 if (ifp->if_flags & IFF_DEBUG)
1297 printf("%s: adapter reset\n",
1298 sc->sc_dev.dv_xname);
1299 epreset(sc);
1300 }
1301 }
1302
1303 goto startagain;
1304 }
1305
1306
1307 /*
1308 * XXX: The 3c509 card can get in a mode where both the fifo status bit
1309 * FIFOS_RX_OVERRUN and the status bit ERR_INCOMPLETE are set
1310 * We detect this situation and we reset the adapter.
1311 * It happens at times when there is a lot of broadcast traffic
1312 * on the cable (once in a blue moon).
1313 */
1314 static int
1315 epstatus(sc)
1316 struct ep_softc *sc;
1317 {
1318 bus_space_tag_t iot = sc->sc_iot;
1319 bus_space_handle_t ioh = sc->sc_ioh;
1320 u_int16_t fifost;
1321
1322 /*
1323 * Check the FIFO status and act accordingly
1324 */
1325 GO_WINDOW(4);
1326 fifost = bus_space_read_2(iot, ioh, ELINK_W4_FIFO_DIAG);
1327 GO_WINDOW(1);
1328
1329 if (fifost & FIFOS_RX_UNDERRUN) {
1330 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
1331 printf("%s: RX underrun\n", sc->sc_dev.dv_xname);
1332 epreset(sc);
1333 return 0;
1334 }
1335
1336 if (fifost & FIFOS_RX_STATUS_OVERRUN) {
1337 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
1338 printf("%s: RX Status overrun\n", sc->sc_dev.dv_xname);
1339 return 1;
1340 }
1341
1342 if (fifost & FIFOS_RX_OVERRUN) {
1343 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
1344 printf("%s: RX overrun\n", sc->sc_dev.dv_xname);
1345 return 1;
1346 }
1347
1348 if (fifost & FIFOS_TX_OVERRUN) {
1349 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
1350 printf("%s: TX overrun\n", sc->sc_dev.dv_xname);
1351 epreset(sc);
1352 return 0;
1353 }
1354
1355 return 0;
1356 }
1357
1358
1359 static void
1360 eptxstat(sc)
1361 struct ep_softc *sc;
1362 {
1363 bus_space_tag_t iot = sc->sc_iot;
1364 bus_space_handle_t ioh = sc->sc_ioh;
1365 int i;
1366
1367 /*
1368 * We need to read+write TX_STATUS until we get a 0 status
1369 * in order to turn off the interrupt flag.
1370 */
1371 while ((i = bus_space_read_2(iot, ioh,
1372 ep_w1_reg(sc, ELINK_W1_TX_STATUS))) & TXS_COMPLETE) {
1373 bus_space_write_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_TX_STATUS),
1374 0x0);
1375
1376 if (i & TXS_JABBER) {
1377 ++sc->sc_ethercom.ec_if.if_oerrors;
1378 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
1379 printf("%s: jabber (%x)\n",
1380 sc->sc_dev.dv_xname, i);
1381 epreset(sc);
1382 } else if (i & TXS_UNDERRUN) {
1383 ++sc->sc_ethercom.ec_if.if_oerrors;
1384 if (sc->sc_ethercom.ec_if.if_flags & IFF_DEBUG)
1385 printf("%s: fifo underrun (%x) @%d\n",
1386 sc->sc_dev.dv_xname, i,
1387 sc->tx_start_thresh);
1388 if (sc->tx_succ_ok < 100)
1389 sc->tx_start_thresh = min(ETHER_MAX_LEN,
1390 sc->tx_start_thresh + 20);
1391 sc->tx_succ_ok = 0;
1392 epreset(sc);
1393 } else if (i & TXS_MAX_COLLISION) {
1394 ++sc->sc_ethercom.ec_if.if_collisions;
1395 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_ENABLE);
1396 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
1397 } else
1398 sc->tx_succ_ok = (sc->tx_succ_ok+1) & 127;
1399 }
1400 }
1401
1402 int
1403 epintr(arg)
1404 void *arg;
1405 {
1406 struct ep_softc *sc = arg;
1407 bus_space_tag_t iot = sc->sc_iot;
1408 bus_space_handle_t ioh = sc->sc_ioh;
1409 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1410 u_int16_t status;
1411 int ret = 0;
1412
1413 if (sc->enabled == 0 ||
1414 (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0)
1415 return (0);
1416
1417
1418 for (;;) {
1419 status = bus_space_read_2(iot, ioh, ELINK_STATUS);
1420
1421 if ((status & WATCHED_INTERRUPTS) == 0) {
1422 if ((status & INTR_LATCH) == 0) {
1423 #if 0
1424 printf("%s: intr latch cleared\n",
1425 sc->sc_dev.dv_xname);
1426 #endif
1427 break;
1428 }
1429 }
1430
1431 ret = 1;
1432
1433 /*
1434 * Acknowledge any interrupts. It's important that we do this
1435 * first, since there would otherwise be a race condition.
1436 * Due to the i386 interrupt queueing, we may get spurious
1437 * interrupts occasionally.
1438 */
1439 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR |
1440 (status & (INTR_LATCH | ALL_INTERRUPTS)));
1441
1442 #if 0
1443 status = bus_space_read_2(iot, ioh, ELINK_STATUS);
1444
1445 printf("%s: intr%s%s%s%s\n", sc->sc_dev.dv_xname,
1446 (status & RX_COMPLETE)?" RX_COMPLETE":"",
1447 (status & TX_COMPLETE)?" TX_COMPLETE":"",
1448 (status & TX_AVAIL)?" TX_AVAIL":"",
1449 (status & CARD_FAILURE)?" CARD_FAILURE":"");
1450 #endif
1451
1452 if (status & RX_COMPLETE) {
1453 epread(sc);
1454 }
1455 if (status & TX_AVAIL) {
1456 sc->sc_ethercom.ec_if.if_flags &= ~IFF_OACTIVE;
1457 epstart(&sc->sc_ethercom.ec_if);
1458 }
1459 if (status & CARD_FAILURE) {
1460 printf("%s: adapter failure (%x)\n",
1461 sc->sc_dev.dv_xname, status);
1462 #if 1
1463 epinit(ifp);
1464 #else
1465 epreset(sc);
1466 #endif
1467 return (1);
1468 }
1469 if (status & TX_COMPLETE) {
1470 eptxstat(sc);
1471 epstart(ifp);
1472 }
1473
1474 #if NRND > 0
1475 if (status)
1476 rnd_add_uint32(&sc->rnd_source, status);
1477 #endif
1478 }
1479
1480 /* no more interrupts */
1481 return (ret);
1482 }
1483
1484 void
1485 epread(sc)
1486 struct ep_softc *sc;
1487 {
1488 bus_space_tag_t iot = sc->sc_iot;
1489 bus_space_handle_t ioh = sc->sc_ioh;
1490 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1491 struct mbuf *m;
1492 int len;
1493
1494 len = bus_space_read_2(iot, ioh, ep_w1_reg(sc, ELINK_W1_RX_STATUS));
1495
1496 again:
1497 if (ifp->if_flags & IFF_DEBUG) {
1498 int err = len & ERR_MASK;
1499 char *s = NULL;
1500
1501 if (len & ERR_INCOMPLETE)
1502 s = "incomplete packet";
1503 else if (err == ERR_OVERRUN)
1504 s = "packet overrun";
1505 else if (err == ERR_RUNT)
1506 s = "runt packet";
1507 else if (err == ERR_ALIGNMENT)
1508 s = "bad alignment";
1509 else if (err == ERR_CRC)
1510 s = "bad crc";
1511 else if (err == ERR_OVERSIZE)
1512 s = "oversized packet";
1513 else if (err == ERR_DRIBBLE)
1514 s = "dribble bits";
1515
1516 if (s)
1517 printf("%s: %s\n", sc->sc_dev.dv_xname, s);
1518 }
1519
1520 if (len & ERR_INCOMPLETE)
1521 return;
1522
1523 if (len & ERR_RX) {
1524 ++ifp->if_ierrors;
1525 goto abort;
1526 }
1527
1528 len &= RX_BYTES_MASK; /* Lower 11 bits = RX bytes. */
1529
1530 /* Pull packet off interface. */
1531 m = epget(sc, len);
1532 if (m == 0) {
1533 ifp->if_ierrors++;
1534 goto abort;
1535 }
1536
1537 ++ifp->if_ipackets;
1538
1539 #if NBPFILTER > 0
1540 /*
1541 * Check if there's a BPF listener on this interface.
1542 * If so, hand off the raw packet to BPF.
1543 */
1544 if (ifp->if_bpf)
1545 bpf_mtap(ifp->if_bpf, m);
1546 #endif
1547
1548 (*ifp->if_input)(ifp, m);
1549
1550 /*
1551 * In periods of high traffic we can actually receive enough
1552 * packets so that the fifo overrun bit will be set at this point,
1553 * even though we just read a packet. In this case we
1554 * are not going to receive any more interrupts. We check for
1555 * this condition and read again until the fifo is not full.
1556 * We could simplify this test by not using epstatus(), but
1557 * rechecking the RX_STATUS register directly. This test could
1558 * result in unnecessary looping in cases where there is a new
1559 * packet but the fifo is not full, but it will not fix the
1560 * stuck behavior.
1561 *
1562 * Even with this improvement, we still get packet overrun errors
1563 * which are hurting performance. Maybe when I get some more time
1564 * I'll modify epread() so that it can handle RX_EARLY interrupts.
1565 */
1566 if (epstatus(sc)) {
1567 len = bus_space_read_2(iot, ioh,
1568 ep_w1_reg(sc, ELINK_W1_RX_STATUS));
1569 /* Check if we are stuck and reset [see XXX comment] */
1570 if (len & ERR_INCOMPLETE) {
1571 if (ifp->if_flags & IFF_DEBUG)
1572 printf("%s: adapter reset\n",
1573 sc->sc_dev.dv_xname);
1574 epreset(sc);
1575 return;
1576 }
1577 goto again;
1578 }
1579
1580 return;
1581
1582 abort:
1583 ep_discard_rxtop(iot, ioh);
1584
1585 }
1586
1587 struct mbuf *
1588 epget(sc, totlen)
1589 struct ep_softc *sc;
1590 int totlen;
1591 {
1592 bus_space_tag_t iot = sc->sc_iot;
1593 bus_space_handle_t ioh = sc->sc_ioh;
1594 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
1595 struct mbuf *m;
1596 bus_size_t rxreg;
1597 int len, remaining;
1598 int s;
1599 caddr_t newdata;
1600 u_long offset;
1601
1602 m = sc->mb[sc->next_mb];
1603 sc->mb[sc->next_mb] = 0;
1604 if (m == 0) {
1605 MGETHDR(m, M_DONTWAIT, MT_DATA);
1606 if (m == 0)
1607 return 0;
1608 } else {
1609 /* If the queue is no longer full, refill. */
1610 if (sc->last_mb == sc->next_mb)
1611 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc);
1612
1613 /* Convert one of our saved mbuf's. */
1614 sc->next_mb = (sc->next_mb + 1) % MAX_MBS;
1615 m->m_data = m->m_pktdat;
1616 m->m_flags = M_PKTHDR;
1617 memset(&m->m_pkthdr, 0, sizeof(m->m_pkthdr));
1618 }
1619 m->m_pkthdr.rcvif = ifp;
1620 m->m_pkthdr.len = totlen;
1621 len = MHLEN;
1622
1623 /*
1624 * Allocate big enough space to hold whole packet, to avoid
1625 * allocating new mbufs on splsched().
1626 */
1627 if (totlen + ALIGNBYTES > len) {
1628 if (totlen + ALIGNBYTES > MCLBYTES) {
1629 len = ALIGN(totlen + ALIGNBYTES);
1630 MEXTMALLOC(m, len, M_DONTWAIT);
1631 } else {
1632 len = MCLBYTES;
1633 MCLGET(m, M_DONTWAIT);
1634 }
1635 if ((m->m_flags & M_EXT) == 0) {
1636 m_free(m);
1637 return 0;
1638 }
1639 }
1640
1641 /* align the struct ip header */
1642 newdata = (caddr_t) ALIGN(m->m_data + sizeof(struct ether_header))
1643 - sizeof(struct ether_header);
1644 m->m_data = newdata;
1645 m->m_len = totlen;
1646
1647 rxreg = ep_w1_reg(sc, ELINK_W1_RX_PIO_RD_1);
1648 remaining = totlen;
1649 offset = mtod(m, u_long);
1650
1651 /*
1652 * We read the packet at a high interrupt priority level so that
1653 * an interrupt from another device won't cause the card's packet
1654 * buffer to overflow. We choose splsched() since that blocks
1655 * essentially everything except for interrupts from serial
1656 * devices (which typically lose data if their interrupt isn't
1657 * serviced fast enough).
1658 *
1659 * XXX THIS CAN CAUSE CLOCK DRIFT!
1660 */
1661 s = splsched();
1662
1663 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER) {
1664 /*
1665 * Prime the FIFO buffer counter (number of 16-bit
1666 * words about to be read from the FIFO).
1667 *
1668 * NOTE: NO OTHER ACCESS CAN BE PERFORMED WHILE THIS
1669 * COUNTER IS NON-ZERO!
1670 */
1671 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, totlen >> 1);
1672 }
1673
1674 if (ELINK_IS_BUS_32(sc->bustype)) {
1675 /*
1676 * Read bytes up to the point where we are aligned.
1677 * (We can align to 4 bytes, rather than ALIGNBYTES,
1678 * here because we're later reading 4-byte chunks.)
1679 */
1680 if ((remaining > 3) && (offset & 3)) {
1681 int count = (4 - (offset & 3));
1682 bus_space_read_multi_1(iot, ioh,
1683 rxreg, (u_int8_t *) offset, count);
1684 offset += count;
1685 remaining -= count;
1686 }
1687 if (remaining > 3) {
1688 bus_space_read_multi_stream_4(iot, ioh,
1689 rxreg, (u_int32_t *) offset,
1690 remaining >> 2);
1691 offset += remaining & ~3;
1692 remaining &= 3;
1693 }
1694 if (remaining) {
1695 bus_space_read_multi_1(iot, ioh,
1696 rxreg, (u_int8_t *) offset, remaining);
1697 }
1698 } else {
1699 if ((remaining > 1) && (offset & 1)) {
1700 bus_space_read_multi_1(iot, ioh,
1701 rxreg, (u_int8_t *) offset, 1);
1702 remaining -= 1;
1703 offset += 1;
1704 }
1705 if (remaining > 1) {
1706 bus_space_read_multi_stream_2(iot, ioh,
1707 rxreg, (u_int16_t *) offset,
1708 remaining >> 1);
1709 offset += remaining & ~1;
1710 }
1711 if (remaining & 1) {
1712 bus_space_read_multi_1(iot, ioh,
1713 rxreg, (u_int8_t *) offset, remaining & 1);
1714 }
1715 }
1716
1717 ep_discard_rxtop(iot, ioh);
1718
1719 if (sc->ep_flags & ELINK_FLAGS_USEFIFOBUFFER)
1720 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0);
1721 splx(s);
1722
1723 return (m);
1724 }
1725
1726 int
1727 epioctl(ifp, cmd, data)
1728 struct ifnet *ifp;
1729 u_long cmd;
1730 caddr_t data;
1731 {
1732 struct ep_softc *sc = ifp->if_softc;
1733 struct ifreq *ifr = (struct ifreq *)data;
1734 int s, error = 0;
1735
1736 s = splnet();
1737
1738 switch (cmd) {
1739
1740 case SIOCSIFMEDIA:
1741 case SIOCGIFMEDIA:
1742 error = ifmedia_ioctl(ifp, ifr, &sc->sc_mii.mii_media, cmd);
1743 break;
1744
1745 case SIOCADDMULTI:
1746 case SIOCDELMULTI:
1747 if (sc->enabled == 0) {
1748 error = EIO;
1749 break;
1750 }
1751
1752 default:
1753 error = ether_ioctl(ifp, cmd, data);
1754
1755 if (error == ENETRESET) {
1756 /*
1757 * Multicast list has changed; set the hardware filter
1758 * accordingly.
1759 */
1760 if (ifp->if_flags & IFF_RUNNING)
1761 epreset(sc);
1762 error = 0;
1763 }
1764 break;
1765 }
1766
1767 splx(s);
1768 return (error);
1769 }
1770
1771 void
1772 epreset(sc)
1773 struct ep_softc *sc;
1774 {
1775 int s;
1776
1777 s = splnet();
1778 epinit(&sc->sc_ethercom.ec_if);
1779 splx(s);
1780 }
1781
1782 void
1783 epwatchdog(ifp)
1784 struct ifnet *ifp;
1785 {
1786 struct ep_softc *sc = ifp->if_softc;
1787
1788 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1789 ++sc->sc_ethercom.ec_if.if_oerrors;
1790
1791 epreset(sc);
1792 }
1793
1794 void
1795 epstop(ifp, disable)
1796 struct ifnet *ifp;
1797 int disable;
1798 {
1799 struct ep_softc *sc = ifp->if_softc;
1800 bus_space_tag_t iot = sc->sc_iot;
1801 bus_space_handle_t ioh = sc->sc_ioh;
1802
1803 if (sc->ep_flags & ELINK_FLAGS_MII) {
1804 /* Stop the one second clock. */
1805 callout_stop(&sc->sc_mbuf_callout);
1806
1807 /* Down the MII. */
1808 mii_down(&sc->sc_mii);
1809 }
1810
1811 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER) {
1812 /*
1813 * Clear the FIFO buffer count, thus halting
1814 * any currently-running transactions.
1815 */
1816 GO_WINDOW(1); /* sanity */
1817 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_WRCTL, 0);
1818 bus_space_write_2(iot, ioh, ELINK_W1_RUNNER_RDCTL, 0);
1819 }
1820
1821 bus_space_write_2(iot, ioh, ELINK_COMMAND, RX_DISABLE);
1822 ep_discard_rxtop(iot, ioh);
1823
1824 bus_space_write_2(iot, ioh, ELINK_COMMAND, TX_DISABLE);
1825 bus_space_write_2(iot, ioh, ELINK_COMMAND, STOP_TRANSCEIVER);
1826
1827 ep_reset_cmd(sc, ELINK_COMMAND, RX_RESET);
1828 ep_reset_cmd(sc, ELINK_COMMAND, TX_RESET);
1829
1830 bus_space_write_2(iot, ioh, ELINK_COMMAND, ACK_INTR | INTR_LATCH);
1831 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RD_0_MASK);
1832 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_INTR_MASK);
1833 bus_space_write_2(iot, ioh, ELINK_COMMAND, SET_RX_FILTER);
1834
1835 epmbufempty(sc);
1836
1837 if (disable)
1838 epdisable(sc);
1839
1840 ifp->if_flags &= ~IFF_RUNNING;
1841 }
1842
1843
1844 /*
1845 * Before reboots, reset card completely.
1846 */
1847 static void
1848 epshutdown(arg)
1849 void *arg;
1850 {
1851 struct ep_softc *sc = arg;
1852 int s = splnet();
1853
1854 if (sc->enabled) {
1855 epstop(&sc->sc_ethercom.ec_if, 0);
1856 ep_reset_cmd(sc, ELINK_COMMAND, GLOBAL_RESET);
1857 epdisable(sc);
1858 sc->enabled = 0;
1859 }
1860 splx(s);
1861 }
1862
1863 /*
1864 * We get eeprom data from the id_port given an offset into the
1865 * eeprom. Basically; after the ID_sequence is sent to all of
1866 * the cards; they enter the ID_CMD state where they will accept
1867 * command requests. 0x80-0xbf loads the eeprom data. We then
1868 * read the port 16 times and with every read; the cards check
1869 * for contention (ie: if one card writes a 0 bit and another
1870 * writes a 1 bit then the host sees a 0. At the end of the cycle;
1871 * each card compares the data on the bus; if there is a difference
1872 * then that card goes into ID_WAIT state again). In the meantime;
1873 * one bit of data is returned in the AX register which is conveniently
1874 * returned to us by bus_space_read_2(). Hence; we read 16 times getting one
1875 * bit of data with each read.
1876 *
1877 * NOTE: the caller must provide an i/o handle for ELINK_ID_PORT!
1878 */
1879 u_int16_t
1880 epreadeeprom(iot, ioh, offset)
1881 bus_space_tag_t iot;
1882 bus_space_handle_t ioh;
1883 int offset;
1884 {
1885 u_int16_t data = 0;
1886 int i;
1887
1888 bus_space_write_2(iot, ioh, 0, 0x80 + offset);
1889 delay(1000);
1890 for (i = 0; i < 16; i++)
1891 data = (data << 1) | (bus_space_read_2(iot, ioh, 0) & 1);
1892 return (data);
1893 }
1894
1895 static int
1896 epbusyeeprom(sc)
1897 struct ep_softc *sc;
1898 {
1899 bus_space_tag_t iot = sc->sc_iot;
1900 bus_space_handle_t ioh = sc->sc_ioh;
1901 bus_size_t eecmd;
1902 int i = 100, j;
1903 uint16_t busybit;
1904
1905 if (sc->bustype == ELINK_BUS_PCMCIA) {
1906 delay(1000);
1907 return 0;
1908 }
1909
1910 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) {
1911 eecmd = CORK_ASIC_EEPROM_COMMAND;
1912 busybit = CORK_EEPROM_BUSY;
1913 } else {
1914 eecmd = ELINK_W0_EEPROM_COMMAND;
1915 busybit = EEPROM_BUSY;
1916 }
1917
1918 j = 0; /* bad GCC flow analysis */
1919 while (i--) {
1920 j = bus_space_read_2(iot, ioh, eecmd);
1921 if (j & busybit)
1922 delay(100);
1923 else
1924 break;
1925 }
1926 if (i == 0) {
1927 printf("\n%s: eeprom failed to come ready\n",
1928 sc->sc_dev.dv_xname);
1929 return (1);
1930 }
1931 if (sc->ep_chipset != ELINK_CHIPSET_CORKSCREW &&
1932 (j & EEPROM_TST_MODE) != 0) {
1933 /* XXX PnP mode? */
1934 printf("\n%s: erase pencil mark!\n", sc->sc_dev.dv_xname);
1935 return (1);
1936 }
1937 return (0);
1938 }
1939
1940 u_int16_t
1941 ep_read_eeprom(sc, offset)
1942 struct ep_softc *sc;
1943 u_int16_t offset;
1944 {
1945 bus_size_t eecmd, eedata;
1946 u_int16_t readcmd;
1947
1948 if (sc->ep_chipset == ELINK_CHIPSET_CORKSCREW) {
1949 eecmd = CORK_ASIC_EEPROM_COMMAND;
1950 eedata = CORK_ASIC_EEPROM_DATA;
1951 } else {
1952 eecmd = ELINK_W0_EEPROM_COMMAND;
1953 eedata = ELINK_W0_EEPROM_DATA;
1954 }
1955
1956 /*
1957 * RoadRunner has a larger EEPROM, so a different read command
1958 * is required.
1959 */
1960 if (sc->ep_chipset == ELINK_CHIPSET_ROADRUNNER)
1961 readcmd = READ_EEPROM_RR;
1962 else
1963 readcmd = READ_EEPROM;
1964
1965 if (epbusyeeprom(sc))
1966 return (0); /* XXX why is eeprom busy? */
1967
1968 bus_space_write_2(sc->sc_iot, sc->sc_ioh, eecmd, readcmd | offset);
1969
1970 if (epbusyeeprom(sc))
1971 return (0); /* XXX why is eeprom busy? */
1972
1973 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, eedata));
1974 }
1975
1976 void
1977 epmbuffill(v)
1978 void *v;
1979 {
1980 struct ep_softc *sc = v;
1981 struct mbuf *m;
1982 int s, i;
1983
1984 s = splnet();
1985 i = sc->last_mb;
1986 do {
1987 if (sc->mb[i] == 0) {
1988 MGET(m, M_DONTWAIT, MT_DATA);
1989 if (m == 0)
1990 break;
1991 sc->mb[i] = m;
1992 }
1993 i = (i + 1) % MAX_MBS;
1994 } while (i != sc->next_mb);
1995 sc->last_mb = i;
1996 /* If the queue was not filled, try again. */
1997 if (sc->last_mb != sc->next_mb)
1998 callout_reset(&sc->sc_mbuf_callout, 1, epmbuffill, sc);
1999 splx(s);
2000 }
2001
2002 void
2003 epmbufempty(sc)
2004 struct ep_softc *sc;
2005 {
2006 int s, i;
2007
2008 s = splnet();
2009 for (i = 0; i<MAX_MBS; i++) {
2010 if (sc->mb[i]) {
2011 m_freem(sc->mb[i]);
2012 sc->mb[i] = NULL;
2013 }
2014 }
2015 sc->last_mb = sc->next_mb = 0;
2016 callout_stop(&sc->sc_mbuf_callout);
2017 splx(s);
2018 }
2019
2020 int
2021 epenable(sc)
2022 struct ep_softc *sc;
2023 {
2024
2025 if (sc->enabled == 0 && sc->enable != NULL) {
2026 if ((*sc->enable)(sc) != 0) {
2027 printf("%s: device enable failed\n",
2028 sc->sc_dev.dv_xname);
2029 return (EIO);
2030 }
2031 }
2032
2033 sc->enabled = 1;
2034 return (0);
2035 }
2036
2037 void
2038 epdisable(sc)
2039 struct ep_softc *sc;
2040 {
2041
2042 if (sc->enabled != 0 && sc->disable != NULL) {
2043 (*sc->disable)(sc);
2044 sc->enabled = 0;
2045 }
2046 }
2047
2048 /*
2049 * ep_activate:
2050 *
2051 * Handle device activation/deactivation requests.
2052 */
2053 int
2054 ep_activate(self, act)
2055 struct device *self;
2056 enum devact act;
2057 {
2058 struct ep_softc *sc = (struct ep_softc *)self;
2059 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2060 int error = 0, s;
2061
2062 s = splnet();
2063 switch (act) {
2064 case DVACT_ACTIVATE:
2065 error = EOPNOTSUPP;
2066 break;
2067
2068 case DVACT_DEACTIVATE:
2069 if (sc->ep_flags & ELINK_FLAGS_MII)
2070 mii_activate(&sc->sc_mii, act, MII_PHY_ANY,
2071 MII_OFFSET_ANY);
2072 if_deactivate(ifp);
2073 break;
2074 }
2075 splx(s);
2076 return (error);
2077 }
2078
2079 /*
2080 * ep_detach:
2081 *
2082 * Detach a elink3 interface.
2083 */
2084 int
2085 ep_detach(self, flags)
2086 struct device *self;
2087 int flags;
2088 {
2089 struct ep_softc *sc = (struct ep_softc *)self;
2090 struct ifnet *ifp = &sc->sc_ethercom.ec_if;
2091
2092 /* Succeed now if there's no work to do. */
2093 if ((sc->sc_flags & ELINK_FLAGS_ATTACHED) == 0)
2094 return (0);
2095
2096 epdisable(sc);
2097
2098 callout_stop(&sc->sc_mii_callout);
2099 callout_stop(&sc->sc_mbuf_callout);
2100
2101 if (sc->ep_flags & ELINK_FLAGS_MII) {
2102 /* Detach all PHYs */
2103 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
2104 }
2105
2106 /* Delete all remaining media. */
2107 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
2108
2109 #if NRND > 0
2110 rnd_detach_source(&sc->rnd_source);
2111 #endif
2112 ether_ifdetach(ifp);
2113 if_detach(ifp);
2114
2115 shutdownhook_disestablish(sc->sd_hook);
2116
2117 return (0);
2118 }
2119
2120 u_int32_t
2121 ep_mii_bitbang_read(self)
2122 struct device *self;
2123 {
2124 struct ep_softc *sc = (void *) self;
2125
2126 /* We're already in Window 4. */
2127 return (bus_space_read_2(sc->sc_iot, sc->sc_ioh,
2128 ELINK_W4_BOOM_PHYSMGMT));
2129 }
2130
2131 void
2132 ep_mii_bitbang_write(self, val)
2133 struct device *self;
2134 u_int32_t val;
2135 {
2136 struct ep_softc *sc = (void *) self;
2137
2138 /* We're already in Window 4. */
2139 bus_space_write_2(sc->sc_iot, sc->sc_ioh,
2140 ELINK_W4_BOOM_PHYSMGMT, val);
2141 }
2142
2143 int
2144 ep_mii_readreg(self, phy, reg)
2145 struct device *self;
2146 int phy, reg;
2147 {
2148 struct ep_softc *sc = (void *) self;
2149 int val;
2150
2151 GO_WINDOW(4);
2152
2153 val = mii_bitbang_readreg(self, &ep_mii_bitbang_ops, phy, reg);
2154
2155 GO_WINDOW(1);
2156
2157 return (val);
2158 }
2159
2160 void
2161 ep_mii_writereg(self, phy, reg, val)
2162 struct device *self;
2163 int phy, reg, val;
2164 {
2165 struct ep_softc *sc = (void *) self;
2166
2167 GO_WINDOW(4);
2168
2169 mii_bitbang_writereg(self, &ep_mii_bitbang_ops, phy, reg, val);
2170
2171 GO_WINDOW(1);
2172 }
2173
2174 void
2175 ep_statchg(self)
2176 struct device *self;
2177 {
2178 struct ep_softc *sc = (struct ep_softc *)self;
2179 bus_space_tag_t iot = sc->sc_iot;
2180 bus_space_handle_t ioh = sc->sc_ioh;
2181 int mctl;
2182
2183 GO_WINDOW(3);
2184 mctl = bus_space_read_2(iot, ioh, ELINK_W3_MAC_CONTROL);
2185 if (sc->sc_mii.mii_media_active & IFM_FDX)
2186 mctl |= MAC_CONTROL_FDX;
2187 else
2188 mctl &= ~MAC_CONTROL_FDX;
2189 bus_space_write_2(iot, ioh, ELINK_W3_MAC_CONTROL, mctl);
2190 GO_WINDOW(1); /* back to operating window */
2191 }
Cache object: 0c930e0b6443f7cfb03eebe280df768f
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