FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/gdtreg.h
1 /* $OpenBSD: gdtreg.h,v 1.4 2006/05/07 23:18:59 marco Exp $ */
2
3 /*
4 * Copyright (c) 1999, 2000 Niklas Hallqvist. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27 /*
28 * This driver would not have written if it was not for the hardware donations
29 * from both ICP-Vortex and Öko.neT. I want to thank them for their support.
30 */
31
32 #define GDT_MAXBUS 6 /* XXX Why not 5? */
33 #define GDT_MAX_HDRIVES 35 /* 5 busses * 7 targets XXX correct? */
34 #define GDT_MAXID 127 /* Fibre-channel maximum ID */
35 #define GDT_MAXOFFSETS 128
36 #define GDT_MAXSG 128 /* Max. s/g elements */
37 #define GDT_PROTOCOL_VERSION 1
38 #define GDT_LINUX_OS 8 /* Used for cache optimization */
39 #define GDT_SCATTER_GATHER 1 /* s/g feature */
40 #define GDT_SECS32 0x1f /* round capacity */
41 #define GDT_LOCALBOARD 0 /* Board node always 0 */
42 #define GDT_MAXCMDS 124
43 #define GDT_SECTOR_SIZE 0x200 /* Always 512 bytes for cache devs */
44
45 /* DPMEM constants */
46 #define GDT_MPR_MAGIC 0xc0ffee11
47 #define GDT_IC_HEADER_BYTES 48
48 #define GDT_IC_QUEUE_BYTES 4
49 #define GDT_DPMEM_COMMAND_OFFSET \
50 (GDT_IC_HEADER_BYTES + GDT_IC_QUEUE_BYTES * GDT_MAXOFFSETS)
51
52 #if 1
53 /* Geometry constants. XXX probably not needed. */
54 #define GDT_MAXCYLS 1024
55 #define GDT_HEADS 64
56 #define GDT_SECS 32 /* mapping 64*32 */
57 #define GDT_MEDHEADS 127
58 #define GDT_MEDSECS 63 /* mapping 127*63 */
59 #define GDT_BIGHEADS 255
60 #define GDT_BIGSECS 63 /* mapping 255*63 */
61 #endif
62
63 /* Cache/raw service commands */
64 #define GDT_INIT 0 /* service initialization */
65 #define GDT_READ 1 /* read command */
66 #define GDT_WRITE 2 /* write command */
67 #define GDT_INFO 3 /* information about devices */
68 #define GDT_FLUSH 4 /* flush dirty cache buffers */
69 #define GDT_IOCTL 5 /* ioctl command */
70 #define GDT_DEVTYPE 9 /* additional information */
71 #define GDT_MOUNT 10 /* mount cache device */
72 #define GDT_UNMOUNT 11 /* unmount cache device */
73 #define GDT_SET_FEAT 12 /* set features (scatter/gather) */
74 #define GDT_GET_FEAT 13 /* get features */
75 #define GDT_WRITE_THR 16 /* write through */
76 #define GDT_READ_THR 17 /* read through */
77 #define GDT_EXT_INFO 18 /* extended info */
78 #define GDT_RESET 19 /* controller reset */
79
80 /* Additional raw service commands */
81 #define GDT_RESERVE 14 /* reserve device to raw service */
82 #define GDT_RELEASE 15 /* release device */
83 #define GDT_RESERVE_ALL 16 /* reserve all devices */
84 #define GDT_RELEASE_ALL 17 /* release all devices */
85 #define GDT_RESET_BUS 18 /* reset bus */
86 #define GDT_SCAN_START 19 /* start device scan */
87 #define GDT_SCAN_END 20 /* stop device scan */
88
89 /* IOCTL command defines */
90 #define GDT_SCSI_DR_INFO 0x00 /* SCSI drive info */
91 #define GDT_SCSI_CHAN_CNT 0x05 /* SCSI channel count */
92 #define GDT_SCSI_DR_LIST 0x06 /* SCSI drive list */
93 #define GDT_SCSI_DEF_CNT 0x15 /* grown/primary defects */
94 #define GDT_DSK_STATISTICS 0x4b /* SCSI disk statistics */
95 #define GDT_IOCHAN_DESC 0x5d /* description of IO channel */
96 #define GDT_IOCHAN_RAW_DESC 0x5e /* description of raw IO channel */
97
98 #define GDT_L_CTRL_PATTERN 0x20000000L /* SCSI IOCTL mask */
99 #define GDT_ARRAY_INFO 0x12 /* array drive info */
100 #define GDT_ARRAY_DRV_LIST 0x0f /* array drive list */
101 #define GDT_LA_CTRL_PATTERN 0x10000000L /* array IOCTL mask */
102 #define GDT_CACHE_DRV_CNT 0x01 /* cache drive count */
103 #define GDT_CACHE_DRV_LIST 0x02 /* cache drive list */
104 #define GDT_CACHE_INFO 0x04 /* cache info */
105 #define GDT_CACHE_CONFIG 0x05 /* cache configuration */
106 #define GDT_CACHE_DRV_INFO 0x07 /* cache drive info */
107 #define GDT_BOARD_FEATURES 0x15 /* controller features */
108 #define GDT_BOARD_INFO 0x28 /* controller info */
109 #define GDT_HOST_GET 0x10001L /* get host drive list */
110 #define GDT_IO_CHANNEL 0x20000L /* default IO channel */
111 #define GDT_INVALID_CHANNEL 0xffffL /* invalid channel */
112
113 /* XXX not belonging here */
114 /* IOCTLs */
115 #define GDTIOCTL_MASK ('J' << 8)
116 #define GDTIOCTL_GENERAL (GDTIOCTL_MASK | 0) /* general IOCTL */
117 #define GDTIOCTL_DRVERS (GDTIOCTL_MASK | 1) /* get driver version */
118 #define GDTIOCTL_CTRTYPE (GDTIOCTL_MASK | 2) /* get controller type */
119 #define GDTIOCTL_CTRCNT (GDTIOCTL_MASK | 5) /* get controller count */
120 #define GDTIOCTL_LOCKDRV (GDTIOCTL_MASK | 6) /* lock host drive */
121 #define GDTIOCTL_LOCKCHN (GDTIOCTL_MASK | 7) /* lock channel */
122 #define GDTIOCTL_EVENT (GDTIOCTL_MASK | 8) /* read controller events */
123
124 /* Service errors */
125 #define GDT_S_OK 1 /* no error */
126 #define GDT_S_BSY 7 /* controller busy */
127 #define GDT_S_RAW_SCSI 12 /* raw service: target error */
128 #define GDT_S_RAW_ILL 0xff /* raw service: illegal */
129 #define GDT_S_NO_STATUS 0x1000 /* got no status (driver-generated) */
130
131 /* Controller services */
132 #define GDT_SCSIRAWSERVICE 3
133 #define GDT_CACHESERVICE 9
134 #define GDT_SCREENSERVICE 11
135
136 /* Scatter/gather element */
137 #define GDT_SG_PTR 0x00 /* u_int32_t, address */
138 #define GDT_SG_LEN 0x04 /* u_int32_t, length */
139 #define GDT_SG_SZ 0x08
140
141 /* Cache service command */
142 #define GDT_CACHE_DEVICENO 0x00 /* u_int16_t, number of cache drive */
143 #define GDT_CACHE_BLOCKNO 0x02 /* u_int32_t, block number */
144 #define GDT_CACHE_BLOCKCNT 0x06 /* u_int32_t, block count */
145 #define GDT_CACHE_DESTADDR 0x0a /* u_int32_t, dest. addr. (-1: s/g) */
146 #define GDT_CACHE_SG_CANZ 0x0e /* u_int32_t, s/g element count */
147 #define GDT_CACHE_SG_LST 0x12 /* [GDT_MAXSG], s/g list */
148 #define GDT_CACHE_SZ (0x12 + GDT_MAXSG * GDT_SG_SZ)
149
150 /* Ioctl command */
151 #define GDT_IOCTL_PARAM_SIZE 0x00 /* u_int16_t, size of buffer */
152 #define GDT_IOCTL_SUBFUNC 0x02 /* u_int32_t, ioctl function */
153 #define GDT_IOCTL_CHANNEL 0x06 /* u_int32_t, device */
154 #define GDT_IOCTL_P_PARAM 0x0a /* u_int32_t, buffer */
155 #define GDT_IOCTL_SZ 0x0e
156
157 /* Screen service command */
158 #define GDT_SCREEN_MSG_HANDLE 0x02 /* u_int32_t, message handle */
159 #define GDT_SCREEN_MSG_ADDR 0x06 /* u_int32_t, message buffer address */
160 #define GDT_SCREEN_SZ 0x0a
161
162 /* Raw service command */
163 #define GDT_RAW_DIRECTION 0x02 /* u_int32_t, data direction */
164 #define GDT_RAW_MDISC_TIME 0x06 /* u_int32_t, disc. time (0: none) */
165 #define GDT_RAW_MCON_TIME 0x0a /* u_int32_t, conn. time (0: none) */
166 #define GDT_RAW_SDATA 0x0e /* u_int32_t, dest. addr. (-1: s/g) */
167 #define GDT_RAW_SDLEN 0x12 /* u_int32_t, data length */
168 #define GDT_RAW_CLEN 0x16 /* u_int32_t, SCSI cmd len (6/10/12) */
169 #define GDT_RAW_CMD 0x1a /* u_int8_t [12], SCSI command */
170 #define GDT_RAW_TARGET 0x26 /* u_int8_t, target ID */
171 #define GDT_RAW_LUN 0x27 /* u_int8_t, LUN */
172 #define GDT_RAW_BUS 0x28 /* u_int8_t, SCSI bus number */
173 #define GDT_RAW_PRIORITY 0x29 /* u_int8_t, only 0 used */
174 #define GDT_RAW_SENSE_LEN 0x2a /* u_int32_t, sense data length */
175 #define GDT_RAW_SENSE_DATA 0x2e /* u_int32_t, sense data address */
176 #define GDT_RAW_SG_RANZ 0x36 /* u_int32_t, s/g element count */
177 #define GDT_RAW_SG_LST 0x3a /* [GDT_MAXSG], s/g list */
178 #define GDT_RAW_SZ (0x3e + GDT_MAXSG * GDT_SG_SZ)
179
180 /* Command structure */
181 #define GDT_CMD_BOARDNODE 0x00 /* u_int32_t, board node (always 0) */
182 #define GDT_CMD_COMMANDINDEX 0x04 /* u_int32_t, command number */
183 #define GDT_CMD_OPCODE 0x08 /* u_int16_t, opcode (READ, ...) */
184 #define GDT_CMD_UNION 0x0a /* cache/screen/raw service command */
185 #define GDT_CMD_UNION_SZ GDT_RAW_SZ
186 #define GDT_CMD_SZ (0x0a + GDT_CMD_UNION_SZ)
187
188 /* Command queue entries */
189 #define GDT_OFFSET 0x00 /* u_int16_t, command offset in the DP RAM */
190 #define GDT_SERV_ID 0x02 /* u_int16_t, service */
191 #define GDT_COMM_Q_SZ 0x04
192
193 /* Interface area */
194 #define GDT_S_CMD_INDX 0x00 /* u_int8_t, special command */
195 #define GDT_S_STATUS 0x01 /* volatile u_int8_t, status special command */
196 #define GDT_S_INFO 0x04 /* u_int32_t [4], add. info special command */
197 #define GDT_SEMA0 0x14 /* volatile u_int8_t, command semaphore */
198 #define GDT_CMD_INDEX 0x18 /* u_int8_t, command number */
199 #define GDT_STATUS 0x1c /* volatile u_int16_t, command status */
200 #define GDT_SERVICE 0x1e /* u_int16_t, service (for asynch. events) */
201 #define GDT_DPR_INFO 0x20 /* u_int32_t [2], additional info */
202 #define GDT_COMM_QUEUE 0x28 /* command queue */
203 #define GDT_DPR_CMD (0x30 + GDT_MAXOFFSETS * GDT_COMM_Q_SZ)
204 /* u_int8_t [], commands */
205 #define GDT_DPR_IF_SZ GDT_DPR_CMD
206
207 /* I/O channel header */
208 #define GDT_IOC_VERSION 0x00 /* u_int32_t, version (~0: newest) */
209 #define GDT_IOC_LIST_ENTRIES 0x04 /* u_int8_t, list entry count */
210 #define GDT_IOC_FIRST_CHAN 0x05 /* u_int8_t, first channel number */
211 #define GDT_IOC_LAST_CHAN 0x06 /* u_int8_t, last channel number */
212 #define GDT_IOC_CHAN_COUNT 0x07 /* u_int8_t, (R) channel count */
213 #define GDT_IOC_LIST_OFFSET 0x08 /* u_int32_t, offset of list[0] */
214 #define GDT_IOC_HDR_SZ 0x0c
215
216 #define GDT_IOC_NEWEST 0xffffffff /* goes into GDT_IOC_VERSION */
217
218 /* Get I/O channel description */
219 #define GDT_IOC_ADDRESS 0x00 /* u_int32_t, channel address */
220 #define GDT_IOC_TYPE 0x04 /* u_int8_t, type (SCSI/FCSL) */
221 #define GDT_IOC_LOCAL_NO 0x05 /* u_int8_t, local number */
222 #define GDT_IOC_FEATURES 0x06 /* u_int16_t, channel features */
223 #define GDT_IOC_SZ 0x08
224
225 /* Get raw I/O channel description */
226 #define GDT_RAWIOC_PROC_ID 0x00 /* u_int8_t, processor id */
227 #define GDT_RAWIOC_PROC_DEFECT 0x01 /* u_int8_t, defect? */
228 #define GDT_RAWIOC_SZ 0x04
229
230 /* Get SCSI channel count */
231 #define GDT_GETCH_CHANNEL_NO 0x00 /* u_int32_t, channel number */
232 #define GDT_GETCH_DRIVE_CNT 0x04 /* u_int32_t, drive count */
233 #define GDT_GETCH_SIOP_ID 0x08 /* u_int8_t, SCSI processor ID */
234 #define GDT_GETCH_SIOP_STATE 0x09 /* u_int8_t, SCSI processor state */
235 #define GDT_GETCH_SZ 0x0a
236
237 /* Get SCSI drive numbers */
238 #define GDT_GETSCSI_CHAN 0x00 /* u_int32_t, scsi channel number */
239 #define GDT_GETSCSI_CNT 0x04 /* u_int32_t, nr of entries */
240 #define GDT_GETSCSI_LIST 0x08 /* u_int32_t, minor device nr */
241 #define GDT_GETSCSI_LIST_SZ 0x04
242 #define GDT_GETSCSI_SZ (GDT_GETSCSI_LIST_SZ * GDT_MAXID)
243
244 /* Cache info/config IOCTL structures */
245 #define GDT_CPAR_VERSION 0x00 /* u_int32_t, firmware version */
246 #define GDT_CPAR_STATE 0x04 /* u_int16_t, cache state (on/off) */
247 #define GDT_CPAR_STRATEGY 0x06 /* u_int16_t, cache strategy */
248 #define GDT_CPAR_WRITE_BACK 0x08 /* u_int16_t, write back (on/off) */
249 #define GDT_CPAR_BLOCK_SIZE 0x0a /* u_int16_t, cache block size */
250 #define GDT_CPAR_SZ 0x0c
251
252 #define GDT_CSTAT_CSIZE 0x00 /* u_int32_t, cache size */
253 #define GDT_CSTAT_READ_CNT 0x04 /* u_int32_t, read counter */
254 #define GDT_CSTAT_WRITE_CNT 0x08 /* u_int32_t, write counter */
255 #define GDT_CSTAT_TR_HITS 0x0c /* u_int32_t, track hits */
256 #define GDT_CSTAT_SEC_HITS 0x10 /* u_int32_t, sector hits */
257 #define GDT_CSTAT_SEC_MISS 0x14 /* u_int32_t, sector misses */
258 #define GDT_CSTAT_SZ 0x18
259
260 /* Get cache info */
261 #define GDT_CINFO_CPAR 0x00
262 #define GDT_CINFO_CSTAT GDT_CPAR_SZ
263 #define GDT_CINFO_SZ (GDT_CPAR_SZ + GDT_CSTAT_SZ)
264
265 /* Get board info */
266 #define GDT_BINFO_SER_NO 0x00 /* u_int32_t, serial number */
267 #define GDT_BINFO_OEM_ID 0x04 /* u_int8_t [2], OEM ID */
268 #define GDT_BINFO_EP_FLAGS 0x06 /* u_int16_t, eprom flags */
269 #define GDT_BINFO_PROC_ID 0x08 /* u_int32_t, processor ID */
270 #define GDT_BINFO_MEMSIZE 0x0c /* u_int32_t, memory size (bytes) */
271 #define GDT_BINFO_MEM_BANKS 0x10 /* u_int8_t, memory banks */
272 #define GDT_BINFO_CHAN_TYPE 0x11 /* u_int8_t, channel type */
273 #define GDT_BINFO_CHAN_COUNT 0x12 /* u_int8_t, channel count */
274 #define GDT_BINFO_RDONGLE_PRES 0x13 /* u_int8_t, dongle present */
275 #define GDT_BINFO_EPR_FW_VER 0x14 /* u_int32_t, (eprom) firmware ver */
276 #define GDT_BINFO_UPD_FW_VER 0x18 /* u_int32_t, (update) firmware ver */
277 #define GDT_BINFO_UPD_REVISION 0x1c /* u_int32_t, update revision */
278 #define GDT_BINFO_TYPE_STRING 0x20 /* char [16], controller name */
279 #define GDT_BINFO_RAID_STRING 0x30 /* char [16], RAID firmware name */
280 #define GDT_BINFO_UPDATE_PRES 0x40 /* u_int8_t, update present? */
281 #define GDT_BINFO_XOR_PRES 0x41 /* u_int8_t, XOR engine present */
282 #define GDT_BINFO_PROM_TYPE 0x42 /* u_int8_t, ROM type (eprom/flash) */
283 #define GDT_BINFO_PROM_COUNT 0x43 /* u_int8_t, number of ROM devices */
284 #define GDT_BINFO_DUP_PRES 0x44 /* u_int32_t, duplexing module pres? */
285 #define GDT_BINFO_CHAN_PRES 0x48 /* u_int32_t, # of exp. channels */
286 #define GDT_BINFO_MEM_PRES 0x4c /* u_int32_t, memory expansion inst? */
287 #define GDT_BINFO_FT_BUS_SYSTEM 0x50 /* u_int8_t, fault bus supported? */
288 #define GDT_BINFO_SUBTYPE_VALID 0x51 /* u_int8_t, board_subtype valid */
289 #define GDT_BINFO_BOARD_SUBTYPE 0x52 /* u_int8_t, subtype/hardware level */
290 #define GDT_BINFO_RAMPAR_PRES 0x53 /* u_int8_t, RAM parity check hw? */
291 #define GDT_BINFO_SZ 0x54
292
293 /* Get board features */
294 #define GDT_BFEAT_CHAINING 0x00 /* u_int8_t, chaining supported */
295 #define GDT_BFEAT_STRIPING 0x01 /* u_int8_t, striping (RAID-0) supp. */
296 #define GDT_BFEAT_MIRRORING 0x02 /* u_int8_t, mirroring (RAID-1) supp */
297 #define GDT_BFEAT_RAID 0x03 /* u_int8_t, RAID-4/5/10 supported */
298 #define GDT_BFEAT_SZ 0x04
299
300 /* Other defines */
301 #define GDT_ASYNCINDEX 0 /* command index asynchronous event */
302 #define GDT_SPEZINDEX 1 /* command index unknown service */
Cache object: 6fd9022bc50d646e6a5252f0b38157a1
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