1 /* $NetBSD: hd44780_subr.h,v 1.1 2003/01/20 01:20:51 soren Exp $ */
2
3 /*
4 * Copyright (c) 2002 Dennis I. Chernoivanov
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30 #ifndef _DEV_IC_HD44780_SUBR_H_
31 #define _DEV_IC_HD44780_SUBR_H_
32
33 /* IOCTL definitions */
34 #define HLCD_DISPCTL _IOW('h', 1, struct hd44780_dispctl)
35 #define HLCD_RESET _IO('h', 2)
36 #define HLCD_CLEAR _IO('h', 3)
37 #define HLCD_CURSOR_LEFT _IO('h', 4)
38 #define HLCD_CURSOR_RIGHT _IO('h', 5)
39 #define HLCD_GET_CURSOR_POS _IOR('h', 6, struct hd44780_io)
40 #define HLCD_SET_CURSOR_POS _IOW('h', 7, struct hd44780_io)
41 #define HLCD_GETC _IOR('h', 8, struct hd44780_io)
42 #define HLCD_PUTC _IOW('h', 9, struct hd44780_io)
43 #define HLCD_SHIFT_LEFT _IO('h', 10)
44 #define HLCD_SHIFT_RIGHT _IO('h', 11)
45 #define HLCD_HOME _IO('h', 12)
46 #define HLCD_WRITE _IOWR('h', 13, struct hd44780_io)
47 #define HLCD_READ _IOWR('h', 14, struct hd44780_io)
48 #define HLCD_REDRAW _IOW('h', 15, struct hd44780_io)
49 #define HLCD_WRITE_INST _IOW('h', 16, struct hd44780_io)
50 #define HLCD_WRITE_DATA _IOW('h', 17, struct hd44780_io)
51 #define HLCD_GET_INFO _IOR('h', 18, struct hd44780_info)
52
53 struct hd44780_dispctl {
54 u_char display_on:1,
55 blink_on:1,
56 cursor_on:1;
57 };
58
59 struct hd44780_io {
60 u_int8_t dat;
61 u_int8_t len;
62 u_int8_t buf[HD_MAX_CHARS];
63 };
64
65 struct hd44780_info {
66 u_char lines;
67 u_char phys_rows;
68 u_char virt_rows;
69
70 u_char is_wide:1,
71 is_bigfont:1,
72 kp_present:1;
73 };
74
75 #ifdef _KERNEL
76
77 /* HLCD driver structure */
78 struct hd44780_chip {
79 #define HD_8BIT 0x01 /* 8-bit if set, 4-bit otherwise */
80 #define HD_MULTILINE 0x02 /* 2 lines if set, 1 otherwise */
81 #define HD_BIGFONT 0x04 /* 5x10 if set, 5x8 otherwise */
82 #define HD_KEYPAD 0x08 /* if set, keypad is connected */
83 u_char sc_flags;
84
85 u_char sc_rows; /* visible rows */
86 u_char sc_vrows; /* virtual rows (normally 40) */
87 u_char sc_dev_ok;
88
89 bus_space_tag_t sc_iot;
90
91 bus_space_handle_t sc_ioir; /* instruction register */
92 bus_space_handle_t sc_iodr; /* data register */
93
94 /*
95 * This one is here to make initialization generic. If 4-bit
96 * connection is used, the device still starts as if it was
97 * 8-bit connected, so a special care is needed for such case.
98 * If set to NULL, normal 'sc_rwrite()' function will be used
99 * during initialization.
100 */
101 void (* sc_irwrite)(bus_space_tag_t, bus_space_handle_t, u_int8_t);
102
103 /* Generic write/read byte entries. */
104 void (* sc_rwrite)(bus_space_tag_t, bus_space_handle_t, u_int8_t);
105 u_int8_t (* sc_rread)(bus_space_tag_t, bus_space_handle_t);
106 };
107
108 #define hd44780_busy_wait(sc) \
109 while((hd44780_ir_read(sc) & BUSY_FLAG) == BUSY_FLAG)
110
111 #define hd44780_ir_write(sc, dat) \
112 do { \
113 hd44780_busy_wait(sc); \
114 (sc)->sc_rwrite((sc)->sc_iot, (sc)->sc_ioir, (dat)); \
115 } while(0)
116
117 #define hd44780_ir_read(sc) \
118 (sc)->sc_rread((sc)->sc_iot, (sc)->sc_ioir)
119
120 #define hd44780_dr_write(sc, dat) \
121 (sc)->sc_rwrite((sc)->sc_iot, (sc)->sc_iodr, (dat))
122
123 #define hd44780_dr_read(sc) \
124 (sc)->sc_rread((sc)->sc_iot, (sc)->sc_iodr)
125
126 void hd44780_attach_subr(struct hd44780_chip *);
127 int hd44780_ioctl_subr(struct hd44780_chip *, u_long, caddr_t);
128 void hd44780_ddram_redraw(struct hd44780_chip *, struct hd44780_io *);
129
130 #define HD_DDRAM_READ 0x0
131 #define HD_DDRAM_WRITE 0x1
132 int hd44780_ddram_io(struct hd44780_chip *, struct hd44780_io *, u_char);
133
134 #if defined(HD44780_STD_SHORT)
135 void hd44780_irwrite(bus_space_tag_t, bus_space_handle_t, u_int8_t);
136 #endif
137
138 #if defined(HD44780_STD_WIDE) || defined(HD44780_STD_SHORT)
139 void hd44780_rwrite(bus_space_tag_t, bus_space_handle_t, u_int8_t);
140 u_int8_t hd44780_rread(bus_space_tag_t, bus_space_handle_t);
141 #endif
142
143 #endif /* _KERNEL */
144
145 #endif /* _DEV_IC_HD44780_SUBR_H_ */
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