The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/ibm82660reg.h

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    1 /* $NetBSD: ibm82660reg.h,v 1.3 2008/06/14 12:01:28 mjf Exp $ */
    2 
    3 /*-
    4  * Copyright (c) 2007 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Tim Rightnour
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  *
   19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   29  * POSSIBILITY OF SUCH DAMAGE.
   30  */
   31 
   32 #ifndef _DEV_IC_IBM82660REG_H_
   33 #define _DEV_IC_IBM82660REG_H_
   34 
   35 /* Register definitions for the IBM 82660 PCI Bridge Controller.
   36  * Also known as a Lanai/Kauai.
   37  */
   38 
   39 /* Memmory Bank Starting Addresses */
   40 #define IBM_82660_MEM_BANK0_START       0x80
   41 #define IBM_82660_MEM_BANK1_START       0x81
   42 #define IBM_82660_MEM_BANK2_START       0x82
   43 #define IBM_82660_MEM_BANK3_START       0x83
   44 #define IBM_82660_MEM_BANK4_START       0x84
   45 #define IBM_82660_MEM_BANK5_START       0x85
   46 #define IBM_82660_MEM_BANK6_START       0x86
   47 #define IBM_82660_MEM_BANK7_START       0x87
   48 
   49 /* Memory Bank Extended Starting Addresses */
   50 #define IBM_82660_MEM_BANK0_EXTSTART    0x88
   51 #define IBM_82660_MEM_BANK1_EXTSTART    0x89
   52 #define IBM_82660_MEM_BANK2_EXTSTART    0x8A
   53 #define IBM_82660_MEM_BANK3_EXTSTART    0x8B
   54 #define IBM_82660_MEM_BANK4_EXTSTART    0x8C
   55 #define IBM_82660_MEM_BANK5_EXTSTART    0x8D
   56 #define IBM_82660_MEM_BANK6_EXTSTART    0x8E
   57 #define IBM_82660_MEM_BANK7_EXTSTART    0x8F
   58 
   59 /* Memory Bank Ending Addresses */
   60 #define IBM_82660_MEM_BANK0_END         0x90
   61 #define IBM_82660_MEM_BANK1_END         0x91
   62 #define IBM_82660_MEM_BANK2_END         0x92
   63 #define IBM_82660_MEM_BANK3_END         0x93
   64 #define IBM_82660_MEM_BANK4_END         0x94
   65 #define IBM_82660_MEM_BANK5_END         0x95
   66 #define IBM_82660_MEM_BANK6_END         0x96
   67 #define IBM_82660_MEM_BANK7_END         0x97
   68 
   69 /* 
   70  * Helper functions for working with the Memory Bank 
   71  * Start/End Address registers.
   72  */
   73 #define IBM_82660_BANK0_ADDR(x)         ((x) & 0xFF)
   74 #define IBM_82660_BANK1_ADDR(x)         (((x) & 0xFF00) >> 8)
   75 #define IBM_82660_BANK2_ADDR(x)         (((x) & 0xFF0000) >> 16)
   76 #define IBM_82660_BANK3_ADDR(x)         (((x) & 0xFF000000) >> 24)
   77 
   78 /* Memory Bank Extended Ending Addresses */
   79 #define IBM_82660_MEM_BANK0_EXTEND      0x98
   80 #define IBM_82660_MEM_BANK1_EXTEND      0x99
   81 #define IBM_82660_MEM_BANK2_EXTEND      0x9A
   82 #define IBM_82660_MEM_BANK3_EXTEND      0x9B
   83 #define IBM_82660_MEM_BANK4_EXTEND      0x9C
   84 #define IBM_82660_MEM_BANK5_EXTEND      0x9D
   85 #define IBM_82660_MEM_BANK6_EXTEND      0x9E
   86 #define IBM_82660_MEM_BANK7_EXTEND      0x9F
   87 
   88 #define IBM_82660_MEM_BANK_ENABLE       0xA0
   89 #define IBM_82660_MEM_BANK0_ENABLED     0x01
   90 #define IBM_82660_MEM_BANK1_ENABLED     0x02
   91 #define IBM_82660_MEM_BANK2_ENABLED     0x04
   92 #define IBM_82660_MEM_BANK3_ENABLED     0x08
   93 
   94 #define IBM_82660_MEM_TIMING_1          0xA1
   95 #define IBM_82660_MEM_TIMING_2          0xA2
   96 
   97 /* Memory Bank Addressing Modes */
   98 #define IBM_82660_MEM_BANK01_ADDR_MODE  0xA4            /* Bank 0 and 1 */
   99 #define IBM_82660_MEM_BANK23_ADDR_MODE  0xA5            /* Bank 2 and 3 */
  100 #define IBM_82660_MEM_BANK45_ADDR_MODE  0xA6            /* Bank 4 and 5 */
  101 #define IBM_82660_MEM_BANK67_ADDR_MODE  0xA7            /* Bank 6 and 7 */
  102 
  103 #define IBM_82660_CACHE_STATUS          0xB1
  104 #define IBM_82660_CACHE_STATUS_L1_EN    0x01
  105 #define IBM_82660_CACHE_STATUS_L2_EN    0x02
  106 
  107 #define IBM_82660_RAS_WATCHDOG_TIMER    0xB6
  108 
  109 #define IBM_82660_SINGLEBIT_ERR_CNTR    0xB8
  110 #define IBM_82660_SINGLEBIT_ERR_LEVEL   0xB9
  111 
  112 /* Bridge Options */
  113 #define IBM_82660_OPTIONS_1             0xBA
  114 #define IBM_82660_OPTIONS_1_MCP         0x01
  115 #define IBM_82660_OPTIONS_1_TEA         0x02
  116 #define IBM_82660_OPTIONS_1_ISA         0x04
  117 
  118 #define IBM_82660_OPTIONS_2             0xBB
  119 
  120 #define IBM_82660_ERR_ENABLE_1          0xC0
  121 #define IBM_82660_ERR_STATUS_1          0xC1
  122 
  123 #define IBM_82660_CPU_ERR_STATUS        0xC3
  124 
  125 #define IBM_82660_ERR_ENABLE_2          0xC4
  126 #define IBM_82660_ERR_STATUS_2          0xC5
  127 
  128 #define IBM_82660_PCI_ERR_STATUS        0xC7
  129 
  130 #define IBM_82660_OPTIONS_3             0xD4
  131 #define IBM_82660_OPTIONS_3_ECC         0x01
  132 #define IBM_82660_OPTIONS_3_DRAM        0x04
  133 #define IBM_82660_OPTIONS_3_SRAM        0x08
  134 #define IBM_82660_OPTIONS_3_SNOOP       0x80
  135 
  136 #define IBM_82660_SYSTEM_CTRL           0x81C
  137 #define IBM_82660_SYSTEM_CTRL_L2_EN     0x40
  138 #define IBM_82660_SYSTEM_CTRL_L2_MI     0x80
  139 
  140 #endif /* _DEV_IC_IBM82660REG_H_ */

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