FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/ispmbox.h
1 /* $NetBSD: ispmbox.h,v 1.48 2005/02/27 00:27:01 perry Exp $ */
2 /*
3 * This driver, which is contained in NetBSD in the files:
4 *
5 * sys/dev/ic/isp.c
6 * sys/dev/ic/isp_inline.h
7 * sys/dev/ic/isp_netbsd.c
8 * sys/dev/ic/isp_netbsd.h
9 * sys/dev/ic/isp_target.c
10 * sys/dev/ic/isp_target.h
11 * sys/dev/ic/isp_tpublic.h
12 * sys/dev/ic/ispmbox.h
13 * sys/dev/ic/ispreg.h
14 * sys/dev/ic/ispvar.h
15 * sys/microcode/isp/asm_sbus.h
16 * sys/microcode/isp/asm_1040.h
17 * sys/microcode/isp/asm_1080.h
18 * sys/microcode/isp/asm_12160.h
19 * sys/microcode/isp/asm_2100.h
20 * sys/microcode/isp/asm_2200.h
21 * sys/pci/isp_pci.c
22 * sys/sbus/isp_sbus.c
23 *
24 * Is being actively maintained by Matthew Jacob (mjacob@NetBSD.org).
25 * This driver also is shared source with FreeBSD, OpenBSD, Linux, Solaris,
26 * Linux versions. This tends to be an interesting maintenance problem.
27 *
28 * Please coordinate with Matthew Jacob on changes you wish to make here.
29 */
30 /*
31 * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration
32 * All rights reserved.
33 *
34 * Redistribution and use in source and binary forms, with or without
35 * modification, are permitted provided that the following conditions
36 * are met:
37 * 1. Redistributions of source code must retain the above copyright
38 * notice, this list of conditions and the following disclaimer.
39 * 2. Redistributions in binary form must reproduce the above copyright
40 * notice, this list of conditions and the following disclaimer in the
41 * documentation and/or other materials provided with the distribution.
42 * 3. The name of the author may not be used to endorse or promote products
43 * derived from this software without specific prior written permission
44 *
45 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
46 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
47 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
48 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
49 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
50 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
51 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
52 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
53 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
54 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
55 */
56
57 /*
58 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters.
59 * <mjacob@nas.nasa.gov>
60 */
61 #ifndef _ISPMBOX_H
62 #define _ISPMBOX_H
63
64 /*
65 * Mailbox Command Opcodes
66 */
67 #define MBOX_NO_OP 0x0000
68 #define MBOX_LOAD_RAM 0x0001
69 #define MBOX_EXEC_FIRMWARE 0x0002
70 #define MBOX_DUMP_RAM 0x0003
71 #define MBOX_WRITE_RAM_WORD 0x0004
72 #define MBOX_READ_RAM_WORD 0x0005
73 #define MBOX_MAILBOX_REG_TEST 0x0006
74 #define MBOX_VERIFY_CHECKSUM 0x0007
75 #define MBOX_ABOUT_FIRMWARE 0x0008
76 /* 9 */
77 /* a */
78 /* b */
79 /* c */
80 /* d */
81 #define MBOX_CHECK_FIRMWARE 0x000e
82 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f
83 #define MBOX_INIT_REQ_QUEUE 0x0010
84 #define MBOX_INIT_RES_QUEUE 0x0011
85 #define MBOX_EXECUTE_IOCB 0x0012
86 #define MBOX_WAKE_UP 0x0013
87 #define MBOX_STOP_FIRMWARE 0x0014
88 #define MBOX_ABORT 0x0015
89 #define MBOX_ABORT_DEVICE 0x0016
90 #define MBOX_ABORT_TARGET 0x0017
91 #define MBOX_BUS_RESET 0x0018
92 #define MBOX_STOP_QUEUE 0x0019
93 #define MBOX_START_QUEUE 0x001a
94 #define MBOX_SINGLE_STEP_QUEUE 0x001b
95 #define MBOX_ABORT_QUEUE 0x001c
96 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d
97 /* 1e */
98 #define MBOX_GET_FIRMWARE_STATUS 0x001f
99 #define MBOX_GET_INIT_SCSI_ID 0x0020
100 #define MBOX_GET_SELECT_TIMEOUT 0x0021
101 #define MBOX_GET_RETRY_COUNT 0x0022
102 #define MBOX_GET_TAG_AGE_LIMIT 0x0023
103 #define MBOX_GET_CLOCK_RATE 0x0024
104 #define MBOX_GET_ACT_NEG_STATE 0x0025
105 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026
106 #define MBOX_GET_SBUS_PARAMS 0x0027
107 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS
108 #define MBOX_GET_TARGET_PARAMS 0x0028
109 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029
110 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a
111 /* 2b */
112 /* 2c */
113 /* 2d */
114 /* 2e */
115 /* 2f */
116 #define MBOX_SET_INIT_SCSI_ID 0x0030
117 #define MBOX_SET_SELECT_TIMEOUT 0x0031
118 #define MBOX_SET_RETRY_COUNT 0x0032
119 #define MBOX_SET_TAG_AGE_LIMIT 0x0033
120 #define MBOX_SET_CLOCK_RATE 0x0034
121 #define MBOX_SET_ACT_NEG_STATE 0x0035
122 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036
123 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037
124 #define MBOX_SET_PCI_PARAMETERS 0x0037
125 #define MBOX_SET_TARGET_PARAMS 0x0038
126 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039
127 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a
128 /* 3b */
129 /* 3c */
130 /* 3d */
131 /* 3e */
132 /* 3f */
133 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040
134 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041
135 #define MBOX_EXEC_BIOS_IOCB 0x0042
136 #define MBOX_SET_FW_FEATURES 0x004a
137 #define MBOX_GET_FW_FEATURES 0x004b
138 #define FW_FEATURE_FAST_POST 0x1
139 #define FW_FEATURE_LVD_NOTIFY 0x2
140 #define FW_FEATURE_RIO_32BIT 0x4
141 #define FW_FEATURE_RIO_16BIT 0x8
142
143 #define MBOX_INIT_REQ_QUEUE_A64 0x0052
144 #define MBOX_INIT_RES_QUEUE_A64 0x0053
145
146 #define MBOX_ENABLE_TARGET_MODE 0x0055
147 #define ENABLE_TARGET_FLAG 0x8000
148 #define ENABLE_TQING_FLAG 0x0004
149 #define ENABLE_MANDATORY_DISC 0x0002
150 #define MBOX_GET_TARGET_STATUS 0x0056
151
152 /* These are for the ISP2X00 FC cards */
153 #define MBOX_GET_LOOP_ID 0x0020
154 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028
155 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038
156 #define MBOX_GET_RESOURCE_COUNT 0x0042
157 #define MBOX_ENHANCED_GET_PDB 0x0047
158 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054
159 #define MBOX_INIT_FIRMWARE 0x0060
160 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061
161 #define MBOX_INIT_LIP 0x0062
162 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063
163 #define MBOX_GET_PORT_DB 0x0064
164 #define MBOX_CLEAR_ACA 0x0065
165 #define MBOX_TARGET_RESET 0x0066
166 #define MBOX_CLEAR_TASK_SET 0x0067
167 #define MBOX_ABORT_TASK_SET 0x0068
168 #define MBOX_GET_FW_STATE 0x0069
169 #define MBOX_GET_PORT_NAME 0x006A
170 #define MBOX_GET_LINK_STATUS 0x006B
171 #define MBOX_INIT_LIP_RESET 0x006C
172 #define MBOX_SEND_SNS 0x006E
173 #define MBOX_FABRIC_LOGIN 0x006F
174 #define MBOX_SEND_CHANGE_REQUEST 0x0070
175 #define MBOX_FABRIC_LOGOUT 0x0071
176 #define MBOX_INIT_LIP_LOGIN 0x0072
177
178 #define MBOX_DRIVER_HEARTBEAT 0x005B
179 #define MBOX_FW_HEARTBEAT 0x005C
180
181 #define MBOX_GET_SET_DATA_RATE 0x005D /* 23XX only */
182 #define MBGSD_GET_RATE 0
183 #define MBGSD_SET_RATE 1
184 #define MBGSD_ONEGB 0
185 #define MBGSD_TWOGB 1
186 #define MBGSD_AUTO 2
187
188
189 #define ISP2100_SET_PCI_PARAM 0x00ff
190
191 #define MBOX_BUSY 0x04
192
193 typedef struct {
194 u_int16_t param[8];
195 } mbreg_t;
196
197 /*
198 * Mailbox Command Complete Status Codes
199 */
200 #define MBOX_COMMAND_COMPLETE 0x4000
201 #define MBOX_INVALID_COMMAND 0x4001
202 #define MBOX_HOST_INTERFACE_ERROR 0x4002
203 #define MBOX_TEST_FAILED 0x4003
204 #define MBOX_COMMAND_ERROR 0x4005
205 #define MBOX_COMMAND_PARAM_ERROR 0x4006
206 #define MBOX_PORT_ID_USED 0x4007
207 #define MBOX_LOOP_ID_USED 0x4008
208 #define MBOX_ALL_IDS_USED 0x4009
209 #define MBOX_NOT_LOGGED_IN 0x400A
210 #define MBLOGALL 0x000f
211 #define MBLOGNONE 0x0000
212 #define MBLOGMASK(x) ((x) & 0xf)
213
214 /*
215 * Asynchronous event status codes
216 */
217 #define ASYNC_BUS_RESET 0x8001
218 #define ASYNC_SYSTEM_ERROR 0x8002
219 #define ASYNC_RQS_XFER_ERR 0x8003
220 #define ASYNC_RSP_XFER_ERR 0x8004
221 #define ASYNC_QWAKEUP 0x8005
222 #define ASYNC_TIMEOUT_RESET 0x8006
223 #define ASYNC_DEVICE_RESET 0x8007
224 #define ASYNC_EXTMSG_UNDERRUN 0x800A
225 #define ASYNC_SCAM_INT 0x800B
226 #define ASYNC_HUNG_SCSI 0x800C
227 #define ASYNC_KILLED_BUS 0x800D
228 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */
229 #define ASYNC_LIP_OCCURRED 0x8010
230 #define ASYNC_LOOP_UP 0x8011
231 #define ASYNC_LOOP_DOWN 0x8012
232 #define ASYNC_LOOP_RESET 0x8013
233 #define ASYNC_PDB_CHANGED 0x8014
234 #define ASYNC_CHANGE_NOTIFY 0x8015
235 #define ASYNC_LIP_F8 0x8016
236 #define ASYNC_CMD_CMPLT 0x8020
237 #define ASYNC_CTIO_DONE 0x8021
238 #define ASYNC_IP_XMIT_DONE 0x8022
239 #define ASYNC_IP_RECV_DONE 0x8023
240 #define ASYNC_IP_BROADCAST 0x8024
241 #define ASYNC_IP_RCVQ_LOW 0x8025
242 #define ASYNC_IP_RCVQ_EMPTY 0x8026
243 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027
244 #define ASYNC_PTPMODE 0x8030
245 #define ASYNC_RIO1 0x8031
246 #define ASYNC_RIO2 0x8032
247 #define ASYNC_RIO3 0x8033
248 #define ASYNC_RIO4 0x8034
249 #define ASYNC_RIO5 0x8035
250 #define ASYNC_CONNMODE 0x8036
251 #define ISP_CONN_LOOP 1
252 #define ISP_CONN_PTP 2
253 #define ISP_CONN_BADLIP 3
254 #define ISP_CONN_FATAL 4
255 #define ISP_CONN_LOOPBACK 5
256 #define ASYNC_RIO_RESP 0x8040
257 #define ASYNC_RIO_COMP 0x8042
258 /*
259 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options
260 * mailbox command to enable this.
261 */
262 #define ASYNC_QFULL_SENT 0x8049
263
264 /*
265 * Mailbox Usages
266 */
267
268 #define WRITE_REQUEST_QUEUE_IN_POINTER(isp, value) \
269 ISP_WRITE(isp, isp->isp_rqstinrp, value)
270
271 #define READ_REQUEST_QUEUE_OUT_POINTER(isp) \
272 ISP_READ(isp, isp->isp_rqstoutrp)
273
274 #define READ_RESPONSE_QUEUE_IN_POINTER(isp) \
275 ISP_READ(isp, isp->isp_respinrp)
276
277 #define WRITE_RESPONSE_QUEUE_OUT_POINTER(isp, value) \
278 ISP_WRITE(isp, isp->isp_respoutrp, value)
279
280 /*
281 * Command Structure Definitions
282 */
283
284 typedef struct {
285 u_int32_t ds_base;
286 u_int32_t ds_count;
287 } ispds_t;
288
289 typedef struct {
290 u_int32_t ds_base;
291 u_int32_t ds_basehi;
292 u_int32_t ds_count;
293 } ispds64_t;
294
295 #define DSTYPE_32BIT 0
296 #define DSTYPE_64BIT 1
297 typedef struct {
298 u_int16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */
299 u_int32_t ds_segment; /* unused */
300 u_int32_t ds_base; /* 32 bit address of DSD list */
301 } ispdslist_t;
302
303
304 /*
305 * These elements get swizzled around for SBus instances.
306 */
307 #define ISP_SWAP8(a, b) { \
308 u_int8_t tmp; \
309 tmp = a; \
310 a = b; \
311 b = tmp; \
312 }
313 typedef struct {
314 u_int8_t rqs_entry_type;
315 u_int8_t rqs_entry_count;
316 u_int8_t rqs_seqno;
317 u_int8_t rqs_flags;
318 } isphdr_t;
319
320 /* RQS Flag definitions */
321 #define RQSFLAG_CONTINUATION 0x01
322 #define RQSFLAG_FULL 0x02
323 #define RQSFLAG_BADHEADER 0x04
324 #define RQSFLAG_BADPACKET 0x08
325
326 /* RQS entry_type definitions */
327 #define RQSTYPE_REQUEST 0x01
328 #define RQSTYPE_DATASEG 0x02
329 #define RQSTYPE_RESPONSE 0x03
330 #define RQSTYPE_MARKER 0x04
331 #define RQSTYPE_CMDONLY 0x05
332 #define RQSTYPE_ATIO 0x06 /* Target Mode */
333 #define RQSTYPE_CTIO 0x07 /* Target Mode */
334 #define RQSTYPE_SCAM 0x08
335 #define RQSTYPE_A64 0x09
336 #define RQSTYPE_A64_CONT 0x0a
337 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */
338 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */
339 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */
340 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */
341 #define RQSTYPE_CTIO1 0x0f /* Target Mode */
342 #define RQSTYPE_STATUS_CONT 0x10
343 #define RQSTYPE_T2RQS 0x11
344 #define RQSTYPE_IP_XMIT 0x13
345 #define RQSTYPE_T4RQS 0x15
346 #define RQSTYPE_ATIO2 0x16 /* Target Mode */
347 #define RQSTYPE_CTIO2 0x17 /* Target Mode */
348 #define RQSTYPE_CSET0 0x18
349 #define RQSTYPE_T3RQS 0x19
350 #define RQSTYPE_IP_XMIT_64 0x1b
351 #define RQSTYPE_CTIO4 0x1e /* Target Mode */
352 #define RQSTYPE_CTIO3 0x1f /* Target Mode */
353 #define RQSTYPE_RIO1 0x21
354 #define RQSTYPE_RIO2 0x22
355 #define RQSTYPE_IP_RECV 0x23
356 #define RQSTYPE_IP_RECV_CONT 0x24
357
358
359 #define ISP_RQDSEG 4
360 typedef struct {
361 isphdr_t req_header;
362 u_int32_t req_handle;
363 u_int8_t req_lun_trn;
364 u_int8_t req_target;
365 u_int16_t req_cdblen;
366 #define req_modifier req_cdblen /* marker packet */
367 u_int16_t req_flags;
368 u_int16_t req_reserved;
369 u_int16_t req_time;
370 u_int16_t req_seg_count;
371 u_int8_t req_cdb[12];
372 ispds_t req_dataseg[ISP_RQDSEG];
373 } ispreq_t;
374
375 #define ispreq64_t ispreqt3_t /* same as.... */
376 #define ISP_RQDSEG_A64 2
377
378 /*
379 * A request packet can also be a marker packet.
380 */
381 #define SYNC_DEVICE 0
382 #define SYNC_TARGET 1
383 #define SYNC_ALL 2
384
385 #define ISP_RQDSEG_T2 3
386 typedef struct {
387 isphdr_t req_header;
388 u_int32_t req_handle;
389 u_int8_t req_lun_trn;
390 u_int8_t req_target;
391 u_int16_t req_scclun;
392 u_int16_t req_flags;
393 u_int16_t _res2;
394 u_int16_t req_time;
395 u_int16_t req_seg_count;
396 u_int8_t req_cdb[16];
397 u_int32_t req_totalcnt;
398 ispds_t req_dataseg[ISP_RQDSEG_T2];
399 } ispreqt2_t;
400
401 #define ISP_RQDSEG_T3 2
402 typedef struct {
403 isphdr_t req_header;
404 u_int32_t req_handle;
405 u_int8_t req_lun_trn;
406 u_int8_t req_target;
407 u_int16_t req_scclun;
408 u_int16_t req_flags;
409 u_int16_t _res2;
410 u_int16_t req_time;
411 u_int16_t req_seg_count;
412 u_int8_t req_cdb[16];
413 u_int32_t req_totalcnt;
414 ispds64_t req_dataseg[ISP_RQDSEG_T3];
415 } ispreqt3_t;
416
417 /* req_flag values */
418 #define REQFLAG_NODISCON 0x0001
419 #define REQFLAG_HTAG 0x0002
420 #define REQFLAG_OTAG 0x0004
421 #define REQFLAG_STAG 0x0008
422 #define REQFLAG_TARGET_RTN 0x0010
423
424 #define REQFLAG_NODATA 0x0000
425 #define REQFLAG_DATA_IN 0x0020
426 #define REQFLAG_DATA_OUT 0x0040
427 #define REQFLAG_DATA_UNKNOWN 0x0060
428
429 #define REQFLAG_DISARQ 0x0100
430 #define REQFLAG_FRC_ASYNC 0x0200
431 #define REQFLAG_FRC_SYNC 0x0400
432 #define REQFLAG_FRC_WIDE 0x0800
433 #define REQFLAG_NOPARITY 0x1000
434 #define REQFLAG_STOPQ 0x2000
435 #define REQFLAG_XTRASNS 0x4000
436 #define REQFLAG_PRIORITY 0x8000
437
438 typedef struct {
439 isphdr_t req_header;
440 u_int32_t req_handle;
441 u_int8_t req_lun_trn;
442 u_int8_t req_target;
443 u_int16_t req_cdblen;
444 u_int16_t req_flags;
445 u_int16_t _res1;
446 u_int16_t req_time;
447 u_int16_t req_seg_count;
448 u_int8_t req_cdb[44];
449 } ispextreq_t;
450
451 #define ISP_CDSEG 7
452 typedef struct {
453 isphdr_t req_header;
454 u_int32_t _res1;
455 ispds_t req_dataseg[ISP_CDSEG];
456 } ispcontreq_t;
457
458 #define ISP_CDSEG64 5
459 typedef struct {
460 isphdr_t req_header;
461 ispds64_t req_dataseg[ISP_CDSEG64];
462 } ispcontreq64_t;
463
464 typedef struct {
465 isphdr_t req_header;
466 u_int32_t req_handle;
467 u_int16_t req_scsi_status;
468 u_int16_t req_completion_status;
469 u_int16_t req_state_flags;
470 u_int16_t req_status_flags;
471 u_int16_t req_time;
472 #define req_response_len req_time /* FC only */
473 u_int16_t req_sense_len;
474 u_int32_t req_resid;
475 u_int8_t req_response[8]; /* FC only */
476 u_int8_t req_sense_data[32];
477 } ispstatusreq_t;
478
479 typedef struct {
480 isphdr_t req_header;
481 u_int8_t req_sense_data[60];
482 } ispstatus_cont_t;
483
484 /*
485 * For Qlogic 2X00, the high order byte of SCSI status has
486 * additional meaning.
487 */
488 #define RQCS_RU 0x800 /* Residual Under */
489 #define RQCS_RO 0x400 /* Residual Over */
490 #define RQCS_RESID (RQCS_RU|RQCS_RO)
491 #define RQCS_SV 0x200 /* Sense Length Valid */
492 #define RQCS_RV 0x100 /* FCP Response Length Valid */
493
494 /*
495 * Completion Status Codes.
496 */
497 #define RQCS_COMPLETE 0x0000
498 #define RQCS_DMA_ERROR 0x0002
499 #define RQCS_RESET_OCCURRED 0x0004
500 #define RQCS_ABORTED 0x0005
501 #define RQCS_TIMEOUT 0x0006
502 #define RQCS_DATA_OVERRUN 0x0007
503 #define RQCS_DATA_UNDERRUN 0x0015
504 #define RQCS_QUEUE_FULL 0x001C
505
506 /* 1X00 Only Completion Codes */
507 #define RQCS_INCOMPLETE 0x0001
508 #define RQCS_TRANSPORT_ERROR 0x0003
509 #define RQCS_COMMAND_OVERRUN 0x0008
510 #define RQCS_STATUS_OVERRUN 0x0009
511 #define RQCS_BAD_MESSAGE 0x000a
512 #define RQCS_NO_MESSAGE_OUT 0x000b
513 #define RQCS_EXT_ID_FAILED 0x000c
514 #define RQCS_IDE_MSG_FAILED 0x000d
515 #define RQCS_ABORT_MSG_FAILED 0x000e
516 #define RQCS_REJECT_MSG_FAILED 0x000f
517 #define RQCS_NOP_MSG_FAILED 0x0010
518 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011
519 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012
520 #define RQCS_ID_MSG_FAILED 0x0013
521 #define RQCS_UNEXP_BUS_FREE 0x0014
522 #define RQCS_XACT_ERR1 0x0018
523 #define RQCS_XACT_ERR2 0x0019
524 #define RQCS_XACT_ERR3 0x001A
525 #define RQCS_BAD_ENTRY 0x001B
526 #define RQCS_PHASE_SKIPPED 0x001D
527 #define RQCS_ARQS_FAILED 0x001E
528 #define RQCS_WIDE_FAILED 0x001F
529 #define RQCS_SYNCXFER_FAILED 0x0020
530 #define RQCS_LVD_BUSERR 0x0021
531
532 /* 2X00 Only Completion Codes */
533 #define RQCS_PORT_UNAVAILABLE 0x0028
534 #define RQCS_PORT_LOGGED_OUT 0x0029
535 #define RQCS_PORT_CHANGED 0x002A
536 #define RQCS_PORT_BUSY 0x002B
537
538 /*
539 * 1X00 specific State Flags
540 */
541 #define RQSF_GOT_BUS 0x0100
542 #define RQSF_GOT_TARGET 0x0200
543 #define RQSF_SENT_CDB 0x0400
544 #define RQSF_XFRD_DATA 0x0800
545 #define RQSF_GOT_STATUS 0x1000
546 #define RQSF_GOT_SENSE 0x2000
547 #define RQSF_XFER_COMPLETE 0x4000
548
549 /*
550 * 2X00 specific State Flags
551 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available)
552 */
553 #define RQSF_DATA_IN 0x0020
554 #define RQSF_DATA_OUT 0x0040
555 #define RQSF_STAG 0x0008
556 #define RQSF_OTAG 0x0004
557 #define RQSF_HTAG 0x0002
558 /*
559 * 1X00 Status Flags
560 */
561 #define RQSTF_DISCONNECT 0x0001
562 #define RQSTF_SYNCHRONOUS 0x0002
563 #define RQSTF_PARITY_ERROR 0x0004
564 #define RQSTF_BUS_RESET 0x0008
565 #define RQSTF_DEVICE_RESET 0x0010
566 #define RQSTF_ABORTED 0x0020
567 #define RQSTF_TIMEOUT 0x0040
568 #define RQSTF_NEGOTIATION 0x0080
569
570 /*
571 * 2X00 specific state flags
572 */
573 /* RQSF_SENT_CDB */
574 /* RQSF_XFRD_DATA */
575 /* RQSF_GOT_STATUS */
576 /* RQSF_XFER_COMPLETE */
577
578 /*
579 * 2X00 specific status flags
580 */
581 /* RQSTF_ABORTED */
582 /* RQSTF_TIMEOUT */
583 #define RQSTF_DMA_ERROR 0x0080
584 #define RQSTF_LOGOUT 0x2000
585
586 /*
587 * Miscellaneous
588 */
589 #ifndef ISP_EXEC_THROTTLE
590 #define ISP_EXEC_THROTTLE 16
591 #endif
592
593 /*
594 * About Firmware returns an 'attribute' word in mailbox 6.
595 */
596 #define ISP_FW_ATTR_TMODE 0x01
597 #define ISP_FW_ATTR_SCCLUN 0x02
598 #define ISP_FW_ATTR_FABRIC 0x04
599 #define ISP_FW_ATTR_CLASS2 0x08
600 #define ISP_FW_ATTR_FCTAPE 0x10
601 #define ISP_FW_ATTR_IP 0x20
602
603 /*
604 * Reduced Interrupt Operation Response Queue Entreis
605 */
606
607 typedef struct {
608 isphdr_t req_header;
609 u_int32_t req_handles[15];
610 } isp_rio1_t;
611
612 typedef struct {
613 isphdr_t req_header;
614 u_int16_t req_handles[30];
615 } isp_rio2_t;
616
617 /*
618 * FC (ISP2100) specific data structures
619 */
620
621 /*
622 * Initialization Control Block
623 *
624 * Version One (prime) format.
625 */
626 typedef struct isp_icb {
627 u_int8_t icb_version;
628 u_int8_t _reserved0;
629 u_int16_t icb_fwoptions;
630 u_int16_t icb_maxfrmlen;
631 u_int16_t icb_maxalloc;
632 u_int16_t icb_execthrottle;
633 u_int8_t icb_retry_count;
634 u_int8_t icb_retry_delay;
635 u_int8_t icb_portname[8];
636 u_int16_t icb_hardaddr;
637 u_int8_t icb_iqdevtype;
638 u_int8_t icb_logintime;
639 u_int8_t icb_nodename[8];
640 u_int16_t icb_rqstout;
641 u_int16_t icb_rspnsin;
642 u_int16_t icb_rqstqlen;
643 u_int16_t icb_rsltqlen;
644 u_int16_t icb_rqstaddr[4];
645 u_int16_t icb_respaddr[4];
646 u_int16_t icb_lunenables;
647 u_int8_t icb_ccnt;
648 u_int8_t icb_icnt;
649 u_int16_t icb_lunetimeout;
650 u_int16_t _reserved1;
651 u_int16_t icb_xfwoptions;
652 u_int8_t icb_racctimer;
653 u_int8_t icb_idelaytimer;
654 u_int16_t icb_zfwoptions;
655 u_int16_t _reserved2[13];
656 } isp_icb_t;
657 #define ICB_VERSION1 1
658
659 #define ICBOPT_HARD_ADDRESS 0x0001
660 #define ICBOPT_FAIRNESS 0x0002
661 #define ICBOPT_FULL_DUPLEX 0x0004
662 #define ICBOPT_FAST_POST 0x0008
663 #define ICBOPT_TGT_ENABLE 0x0010
664 #define ICBOPT_INI_DISABLE 0x0020
665 #define ICBOPT_INI_ADISC 0x0040
666 #define ICBOPT_INI_TGTTYPE 0x0080
667 #define ICBOPT_PDBCHANGE_AE 0x0100
668 #define ICBOPT_NOLIP 0x0200
669 #define ICBOPT_SRCHDOWN 0x0400
670 #define ICBOPT_PREVLOOP 0x0800
671 #define ICBOPT_STOP_ON_QFULL 0x1000
672 #define ICBOPT_FULL_LOGIN 0x2000
673 #define ICBOPT_BOTH_WWNS 0x4000
674 #define ICBOPT_EXTENDED 0x8000
675
676 #define ICBXOPT_CLASS2_ACK0 0x0200
677 #define ICBXOPT_CLASS2 0x0100
678 #define ICBXOPT_LOOP_ONLY (0 << 4)
679 #define ICBXOPT_PTP_ONLY (1 << 4)
680 #define ICBXOPT_LOOP_2_PTP (2 << 4)
681 #define ICBXOPT_PTP_2_LOOP (3 << 4)
682
683 /*
684 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits.
685 * RIO is not defined for the 23XX cards
686 */
687 #define ICBXOPT_RIO_OFF 0
688 #define ICBXOPT_RIO_16BIT 1
689 #define ICBXOPT_RIO_32BIT 2
690 #define ICBXOPT_RIO_16BIT_IOCB 3
691 #define ICBXOPT_RIO_32BIT_IOCB 4
692 #define ICBXOPT_ZIO 5
693
694 #define ICBZOPT_ENA_RDXFR_RDY 0x01
695 #define ICBZOPT_ENA_OOF (1 << 6) /* out of order frame handling */
696 /* These 3 only apply to the 2300 */
697 #define ICBZOPT_RATE_ONEGB (MBGSD_ONEGB << 14)
698 #define ICBZOPT_RATE_TWOGB (MBGSD_TWOGB << 14)
699 #define ICBZOPT_RATE_AUTO (MBGSD_AUTO << 14)
700
701
702 #define ICB_MIN_FRMLEN 256
703 #define ICB_MAX_FRMLEN 2112
704 #define ICB_DFLT_FRMLEN 1024
705 #define ICB_DFLT_ALLOC 256
706 #define ICB_DFLT_THROTTLE 16
707 #define ICB_DFLT_RDELAY 5
708 #define ICB_DFLT_RCOUNT 3
709
710
711 #define RQRSP_ADDR0015 0
712 #define RQRSP_ADDR1631 1
713 #define RQRSP_ADDR3247 2
714 #define RQRSP_ADDR4863 3
715
716
717 #define ICB_NNM0 7
718 #define ICB_NNM1 6
719 #define ICB_NNM2 5
720 #define ICB_NNM3 4
721 #define ICB_NNM4 3
722 #define ICB_NNM5 2
723 #define ICB_NNM6 1
724 #define ICB_NNM7 0
725
726 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \
727 array[ICB_NNM0] = (u_int8_t) ((wwn >> 0) & 0xff), \
728 array[ICB_NNM1] = (u_int8_t) ((wwn >> 8) & 0xff), \
729 array[ICB_NNM2] = (u_int8_t) ((wwn >> 16) & 0xff), \
730 array[ICB_NNM3] = (u_int8_t) ((wwn >> 24) & 0xff), \
731 array[ICB_NNM4] = (u_int8_t) ((wwn >> 32) & 0xff), \
732 array[ICB_NNM5] = (u_int8_t) ((wwn >> 40) & 0xff), \
733 array[ICB_NNM6] = (u_int8_t) ((wwn >> 48) & 0xff), \
734 array[ICB_NNM7] = (u_int8_t) ((wwn >> 56) & 0xff)
735
736 /*
737 * FC-AL Position Map
738 *
739 * This is an at most 128 byte map that returns either
740 * the LILP or Firmware generated list of ports.
741 *
742 * We deviate a bit from the returned qlogic format to
743 * use an extra bit to say whether this was a LILP or
744 * f/w generated map.
745 */
746 typedef struct {
747 u_int8_t fwmap : 1,
748 count : 7;
749 u_int8_t map[127];
750 } fcpos_map_t;
751
752 /*
753 * Port Data Base Element
754 */
755
756 typedef struct {
757 u_int16_t pdb_options;
758 u_int8_t pdb_mstate;
759 u_int8_t pdb_sstate;
760 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2])
761 u_int8_t pdb_hardaddr_bits[4];
762 u_int8_t pdb_portid_bits[4];
763 u_int8_t pdb_nodename[8];
764 u_int8_t pdb_portname[8];
765 u_int16_t pdb_execthrottle;
766 u_int16_t pdb_exec_count;
767 u_int8_t pdb_retry_count;
768 u_int8_t pdb_retry_delay;
769 u_int16_t pdb_resalloc;
770 u_int16_t pdb_curalloc;
771 u_int16_t pdb_qhead;
772 u_int16_t pdb_qtail;
773 u_int16_t pdb_tl_next;
774 u_int16_t pdb_tl_last;
775 u_int16_t pdb_features; /* PLOGI, Common Service */
776 u_int16_t pdb_pconcurrnt; /* PLOGI, Common Service */
777 u_int16_t pdb_roi; /* PLOGI, Common Service */
778 u_int8_t pdb_target;
779 u_int8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */
780 u_int16_t pdb_rdsiz; /* PLOGI, Class 3 */
781 u_int16_t pdb_ncseq; /* PLOGI, Class 3 */
782 u_int16_t pdb_noseq; /* PLOGI, Class 3 */
783 u_int16_t pdb_labrtflg;
784 u_int16_t pdb_lstopflg;
785 u_int16_t pdb_sqhead;
786 u_int16_t pdb_sqtail;
787 u_int16_t pdb_ptimer;
788 u_int16_t pdb_nxt_seqid;
789 u_int16_t pdb_fcount;
790 u_int16_t pdb_prli_len;
791 u_int16_t pdb_prli_svc0;
792 u_int16_t pdb_prli_svc3;
793 u_int16_t pdb_loopid;
794 u_int16_t pdb_il_ptr;
795 u_int16_t pdb_sl_ptr;
796 } isp_pdb_t;
797
798 #define PDB_OPTIONS_XMITTING (1<<11)
799 #define PDB_OPTIONS_LNKXMIT (1<<10)
800 #define PDB_OPTIONS_ABORTED (1<<9)
801 #define PDB_OPTIONS_ADISC (1<<1)
802
803 #define PDB_STATE_DISCOVERY 0
804 #define PDB_STATE_WDISC_ACK 1
805 #define PDB_STATE_PLOGI 2
806 #define PDB_STATE_PLOGI_ACK 3
807 #define PDB_STATE_PRLI 4
808 #define PDB_STATE_PRLI_ACK 5
809 #define PDB_STATE_LOGGED_IN 6
810 #define PDB_STATE_PORT_UNAVAIL 7
811 #define PDB_STATE_PRLO 8
812 #define PDB_STATE_PRLO_ACK 9
813 #define PDB_STATE_PLOGO 10
814 #define PDB_STATE_PLOG_ACK 11
815
816 #define SVC3_TGT_ROLE 0x10
817 #define SVC3_INI_ROLE 0x20
818 #define SVC3_ROLE_MASK 0x30
819 #define SVC3_ROLE_SHIFT 4
820
821 /*
822 * CT definition
823 *
824 * This is as the QLogic f/w documentations defines it- which is just opposite,
825 * bit wise, from what the specification defines it as. Additionally, the
826 * ct_response and ct_resid (really from FC-GS-2) need to be byte swapped.
827 */
828
829 typedef struct {
830 u_int8_t ct_revision;
831 u_int8_t ct_portid[3];
832 u_int8_t ct_fcs_type;
833 u_int8_t ct_fcs_subtype;
834 u_int8_t ct_options;
835 u_int8_t ct_res0;
836 u_int16_t ct_response;
837 u_int16_t ct_resid;
838 u_int8_t ct_res1;
839 u_int8_t ct_reason;
840 u_int8_t ct_explanation;
841 u_int8_t ct_vunique;
842 } ct_hdr_t;
843 #define FS_ACC 0x8002
844 #define FS_RJT 0x8001
845
846 #define FC4_IP 5 /* ISO/EEC 8802-2 LLC/SNAP "Out of Order Delivery" */
847 #define FC4_SCSI 8 /* SCSI-3 via Fivre Channel Protocol (FCP) */
848 #define FC4_FC_SVC 0x20 /* Fibre Channel Services */
849
850 #define SNS_GA_NXT 0x100
851 #define SNS_GPN_ID 0x112
852 #define SNS_GNN_ID 0x113
853 #define SNS_GFF_ID 0x11F
854 #define SNS_GID_FT 0x171
855 #define SNS_RFT_ID 0x217
856 typedef struct {
857 u_int16_t snscb_rblen; /* response buffer length (words) */
858 u_int16_t snscb_res0;
859 u_int16_t snscb_addr[4]; /* response buffer address */
860 u_int16_t snscb_sblen; /* subcommand buffer length (words) */
861 u_int16_t snscb_res1;
862 u_int16_t snscb_data[1]; /* variable data */
863 } sns_screq_t; /* Subcommand Request Structure */
864
865 typedef struct {
866 u_int16_t snscb_rblen; /* response buffer length (words) */
867 u_int16_t snscb_res0;
868 u_int16_t snscb_addr[4]; /* response buffer address */
869 u_int16_t snscb_sblen; /* subcommand buffer length (words) */
870 u_int16_t snscb_res1;
871 u_int16_t snscb_cmd;
872 u_int16_t snscb_res2;
873 u_int32_t snscb_res3;
874 u_int32_t snscb_port;
875 } sns_ga_nxt_req_t;
876 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t))
877
878 typedef struct {
879 u_int16_t snscb_rblen; /* response buffer length (words) */
880 u_int16_t snscb_res0;
881 u_int16_t snscb_addr[4]; /* response buffer address */
882 u_int16_t snscb_sblen; /* subcommand buffer length (words) */
883 u_int16_t snscb_res1;
884 u_int16_t snscb_cmd;
885 u_int16_t snscb_res2;
886 u_int32_t snscb_res3;
887 u_int32_t snscb_portid;
888 } sns_gxn_id_req_t;
889 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t))
890
891 typedef struct {
892 u_int16_t snscb_rblen; /* response buffer length (words) */
893 u_int16_t snscb_res0;
894 u_int16_t snscb_addr[4]; /* response buffer address */
895 u_int16_t snscb_sblen; /* subcommand buffer length (words) */
896 u_int16_t snscb_res1;
897 u_int16_t snscb_cmd;
898 u_int16_t snscb_mword_div_2;
899 u_int32_t snscb_res3;
900 u_int32_t snscb_fc4_type;
901 } sns_gid_ft_req_t;
902 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t))
903
904 typedef struct {
905 u_int16_t snscb_rblen; /* response buffer length (words) */
906 u_int16_t snscb_res0;
907 u_int16_t snscb_addr[4]; /* response buffer address */
908 u_int16_t snscb_sblen; /* subcommand buffer length (words) */
909 u_int16_t snscb_res1;
910 u_int16_t snscb_cmd;
911 u_int16_t snscb_res2;
912 u_int32_t snscb_res3;
913 u_int32_t snscb_port;
914 u_int32_t snscb_fc4_types[8];
915 } sns_rft_id_req_t;
916 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t))
917
918 typedef struct {
919 ct_hdr_t snscb_cthdr;
920 u_int8_t snscb_port_type;
921 u_int8_t snscb_port_id[3];
922 u_int8_t snscb_portname[8];
923 u_int16_t snscb_data[1]; /* variable data */
924 } sns_scrsp_t; /* Subcommand Response Structure */
925
926 typedef struct {
927 ct_hdr_t snscb_cthdr;
928 u_int8_t snscb_port_type;
929 u_int8_t snscb_port_id[3];
930 u_int8_t snscb_portname[8];
931 u_int8_t snscb_pnlen; /* symbolic port name length */
932 u_int8_t snscb_pname[255]; /* symbolic port name */
933 u_int8_t snscb_nodename[8];
934 u_int8_t snscb_nnlen; /* symbolic node name length */
935 u_int8_t snscb_nname[255]; /* symbolic node name */
936 u_int8_t snscb_ipassoc[8];
937 u_int8_t snscb_ipaddr[16];
938 u_int8_t snscb_svc_class[4];
939 u_int8_t snscb_fc4_types[32];
940 u_int8_t snscb_fpname[8];
941 u_int8_t snscb_reserved;
942 u_int8_t snscb_hardaddr[3];
943 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */
944 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t))
945
946 typedef struct {
947 ct_hdr_t snscb_cthdr;
948 u_int8_t snscb_wwn[8];
949 } sns_gxn_id_rsp_t;
950 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t))
951
952 typedef struct {
953 ct_hdr_t snscb_cthdr;
954 u_int32_t snscb_fc4_features[32];
955 } sns_gff_id_rsp_t;
956 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t))
957
958 typedef struct {
959 ct_hdr_t snscb_cthdr;
960 struct {
961 u_int8_t control;
962 u_int8_t portid[3];
963 } snscb_ports[1];
964 } sns_gid_ft_rsp_t;
965 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2))
966
967 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t))
968
969 #endif /* _ISPMBOX_H */
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