Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)
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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/ispmbox.h
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1 /* $NetBSD: ispmbox.h,v 1.57 2022/01/24 09:42:14 andvar Exp $ */ 2 /* 3 * Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration 4 * All rights reserved. 5 * 6 * Additional Copyright (C) 2000-2007 by Matthew Jacob 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 /* 32 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 33 */ 34 #ifndef _ISPMBOX_H 35 #define _ISPMBOX_H 36 37 /* 38 * Mailbox Command Opcodes 39 */ 40 #define MBOX_NO_OP 0x0000 41 #define MBOX_LOAD_RAM 0x0001 42 #define MBOX_EXEC_FIRMWARE 0x0002 43 #define MBOX_DUMP_RAM 0x0003 44 #define MBOX_WRITE_RAM_WORD 0x0004 45 #define MBOX_READ_RAM_WORD 0x0005 46 #define MBOX_MAILBOX_REG_TEST 0x0006 47 #define MBOX_VERIFY_CHECKSUM 0x0007 48 #define MBOX_ABOUT_FIRMWARE 0x0008 49 #define MBOX_LOAD_RISC_RAM_2100 0x0009 50 /* a */ 51 #define MBOX_LOAD_RISC_RAM 0x000b 52 /* c */ 53 #define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 54 #define MBOX_CHECK_FIRMWARE 0x000e 55 #define MBOX_READ_RAM_WORD_EXTENDED 0x000f 56 #define MBOX_INIT_REQ_QUEUE 0x0010 57 #define MBOX_INIT_RES_QUEUE 0x0011 58 #define MBOX_EXECUTE_IOCB 0x0012 59 #define MBOX_WAKE_UP 0x0013 60 #define MBOX_STOP_FIRMWARE 0x0014 61 #define MBOX_ABORT 0x0015 62 #define MBOX_ABORT_DEVICE 0x0016 63 #define MBOX_ABORT_TARGET 0x0017 64 #define MBOX_BUS_RESET 0x0018 65 #define MBOX_STOP_QUEUE 0x0019 66 #define MBOX_START_QUEUE 0x001a 67 #define MBOX_SINGLE_STEP_QUEUE 0x001b 68 #define MBOX_ABORT_QUEUE 0x001c 69 #define MBOX_GET_DEV_QUEUE_STATUS 0x001d 70 /* 1e */ 71 #define MBOX_GET_FIRMWARE_STATUS 0x001f 72 #define MBOX_GET_INIT_SCSI_ID 0x0020 73 #define MBOX_GET_SELECT_TIMEOUT 0x0021 74 #define MBOX_GET_RETRY_COUNT 0x0022 75 #define MBOX_GET_TAG_AGE_LIMIT 0x0023 76 #define MBOX_GET_CLOCK_RATE 0x0024 77 #define MBOX_GET_ACT_NEG_STATE 0x0025 78 #define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 79 #define MBOX_GET_SBUS_PARAMS 0x0027 80 #define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 81 #define MBOX_GET_TARGET_PARAMS 0x0028 82 #define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 83 #define MBOX_GET_RESET_DELAY_PARAMS 0x002a 84 /* 2b */ 85 /* 2c */ 86 /* 2d */ 87 /* 2e */ 88 /* 2f */ 89 #define MBOX_SET_INIT_SCSI_ID 0x0030 90 #define MBOX_SET_SELECT_TIMEOUT 0x0031 91 #define MBOX_SET_RETRY_COUNT 0x0032 92 #define MBOX_SET_TAG_AGE_LIMIT 0x0033 93 #define MBOX_SET_CLOCK_RATE 0x0034 94 #define MBOX_SET_ACT_NEG_STATE 0x0035 95 #define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 96 #define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 97 #define MBOX_SET_PCI_PARAMETERS 0x0037 98 #define MBOX_SET_TARGET_PARAMS 0x0038 99 #define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 100 #define MBOX_SET_RESET_DELAY_PARAMS 0x003a 101 /* 3b */ 102 /* 3c */ 103 /* 3d */ 104 /* 3e */ 105 /* 3f */ 106 #define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 107 #define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 108 #define MBOX_EXEC_BIOS_IOCB 0x0042 109 #define MBOX_SET_FW_FEATURES 0x004a 110 #define MBOX_GET_FW_FEATURES 0x004b 111 #define FW_FEATURE_FAST_POST 0x1 112 #define FW_FEATURE_LVD_NOTIFY 0x2 113 #define FW_FEATURE_RIO_32BIT 0x4 114 #define FW_FEATURE_RIO_16BIT 0x8 115 116 #define MBOX_INIT_REQ_QUEUE_A64 0x0052 117 #define MBOX_INIT_RES_QUEUE_A64 0x0053 118 119 #define MBOX_ENABLE_TARGET_MODE 0x0055 120 #define ENABLE_TARGET_FLAG 0x8000 121 #define ENABLE_TQING_FLAG 0x0004 122 #define ENABLE_MANDATORY_DISC 0x0002 123 #define MBOX_GET_TARGET_STATUS 0x0056 124 125 /* These are for the ISP2X00 FC cards */ 126 #define MBOX_GET_LOOP_ID 0x0020 127 /* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 128 #define ISP24XX_INORDER 0x0100 129 #define ISP24XX_NPIV_SAN 0x0400 130 #define ISP24XX_VSAN_SAN 0x1000 131 #define ISP24XX_FC_SP_SAN 0x2000 132 133 #define MBOX_GET_FIRMWARE_OPTIONS 0x0028 134 #define MBOX_SET_FIRMWARE_OPTIONS 0x0038 135 #define MBOX_GET_RESOURCE_COUNT 0x0042 136 #define MBOX_REQUEST_OFFLINE_MODE 0x0043 137 #define MBOX_ENHANCED_GET_PDB 0x0047 138 #define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 139 #define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 140 #define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 141 #define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 142 #define MBOX_INIT_FIRMWARE 0x0060 143 #define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 144 #define MBOX_INIT_LIP 0x0062 145 #define MBOX_GET_FC_AL_POSITION_MAP 0x0063 146 #define MBOX_GET_PORT_DB 0x0064 147 #define MBOX_CLEAR_ACA 0x0065 148 #define MBOX_TARGET_RESET 0x0066 149 #define MBOX_CLEAR_TASK_SET 0x0067 150 #define MBOX_ABORT_TASK_SET 0x0068 151 #define MBOX_GET_FW_STATE 0x0069 152 #define MBOX_GET_PORT_NAME 0x006A 153 #define MBOX_GET_LINK_STATUS 0x006B 154 #define MBOX_INIT_LIP_RESET 0x006C 155 #define MBOX_SEND_SNS 0x006E 156 #define MBOX_FABRIC_LOGIN 0x006F 157 #define MBOX_SEND_CHANGE_REQUEST 0x0070 158 #define MBOX_FABRIC_LOGOUT 0x0071 159 #define MBOX_INIT_LIP_LOGIN 0x0072 160 #define MBOX_LUN_RESET 0x007E 161 162 #define MBOX_DRIVER_HEARTBEAT 0x005B 163 #define MBOX_FW_HEARTBEAT 0x005C 164 165 #define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 166 #define MBGSD_GET_RATE 0 167 #define MBGSD_SET_RATE 1 168 #define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 169 #define MBGSD_ONEGB 0 170 #define MBGSD_TWOGB 1 171 #define MBGSD_AUTO 2 172 #define MBGSD_FOURGB 3 /* 24XX only */ 173 #define MBGSD_EIGHTGB 4 /* 25XX only */ 174 175 176 #define ISP2100_SET_PCI_PARAM 0x00ff 177 178 #define MBOX_BUSY 0x04 179 180 /* 181 * Mailbox Command Complete Status Codes 182 */ 183 #define MBOX_COMMAND_COMPLETE 0x4000 184 #define MBOX_INVALID_COMMAND 0x4001 185 #define MBOX_HOST_INTERFACE_ERROR 0x4002 186 #define MBOX_TEST_FAILED 0x4003 187 #define MBOX_COMMAND_ERROR 0x4005 188 #define MBOX_COMMAND_PARAM_ERROR 0x4006 189 #define MBOX_PORT_ID_USED 0x4007 190 #define MBOX_LOOP_ID_USED 0x4008 191 #define MBOX_ALL_IDS_USED 0x4009 192 #define MBOX_NOT_LOGGED_IN 0x400A 193 /* pseudo mailbox completion codes */ 194 #define MBOX_REGS_BUSY 0x6000 /* registers in use */ 195 #define MBOX_TIMEOUT 0x6001 /* command timed out */ 196 197 #define MBLOGALL 0x000f 198 #define MBLOGNONE 0x0000 199 #define MBLOGMASK(x) ((x) & 0xf) 200 201 /* 202 * Asynchronous event status codes 203 */ 204 #define ASYNC_BUS_RESET 0x8001 205 #define ASYNC_SYSTEM_ERROR 0x8002 206 #define ASYNC_RQS_XFER_ERR 0x8003 207 #define ASYNC_RSP_XFER_ERR 0x8004 208 #define ASYNC_QWAKEUP 0x8005 209 #define ASYNC_TIMEOUT_RESET 0x8006 210 #define ASYNC_DEVICE_RESET 0x8007 211 #define ASYNC_EXTMSG_UNDERRUN 0x800A 212 #define ASYNC_SCAM_INT 0x800B 213 #define ASYNC_HUNG_SCSI 0x800C 214 #define ASYNC_KILLED_BUS 0x800D 215 #define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 216 #define ASYNC_LIP_OCCURRED 0x8010 217 #define ASYNC_LOOP_UP 0x8011 218 #define ASYNC_LOOP_DOWN 0x8012 219 #define ASYNC_LOOP_RESET 0x8013 220 #define ASYNC_PDB_CHANGED 0x8014 221 #define ASYNC_CHANGE_NOTIFY 0x8015 222 #define ASYNC_LIP_F8 0x8016 223 #define ASYNC_LIP_ERROR 0x8017 224 #define ASYNC_SECURITY_UPDATE 0x801B 225 #define ASYNC_CMD_CMPLT 0x8020 226 #define ASYNC_CTIO_DONE 0x8021 227 #define ASYNC_RIO32_1 0x8021 228 #define ASYNC_RIO32_2 0x8022 229 #define ASYNC_IP_XMIT_DONE 0x8022 230 #define ASYNC_IP_RECV_DONE 0x8023 231 #define ASYNC_IP_BROADCAST 0x8024 232 #define ASYNC_IP_RCVQ_LOW 0x8025 233 #define ASYNC_IP_RCVQ_EMPTY 0x8026 234 #define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 235 #define ASYNC_PTPMODE 0x8030 236 #define ASYNC_RIO16_1 0x8031 237 #define ASYNC_RIO16_2 0x8032 238 #define ASYNC_RIO16_3 0x8033 239 #define ASYNC_RIO16_4 0x8034 240 #define ASYNC_RIO16_5 0x8035 241 #define ASYNC_CONNMODE 0x8036 242 #define ISP_CONN_LOOP 1 243 #define ISP_CONN_PTP 2 244 #define ISP_CONN_BADLIP 3 245 #define ISP_CONN_FATAL 4 246 #define ISP_CONN_LOOPBACK 5 247 #define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 248 #define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 249 #define ASYNC_RCV_ERR 0x8048 250 251 /* 252 * Firmware Options. There are a lot of them. 253 * 254 * IFCOPTN - ISP Fibre Channel Option Word N 255 */ 256 #define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 257 #define IFCOPT1_EAABSRCVD (1 << 12) 258 #define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 259 #define IFCOPT1_ENAPURE (1 << 10) 260 #define IFCOPT1_ENA8017 (1 << 7) 261 #define IFCOPT1_DISGPIO67 (1 << 6) 262 #define IFCOPT1_LIPLOSSIMM (1 << 5) 263 #define IFCOPT1_DISF7SWTCH (1 << 4) 264 #define IFCOPT1_CTIO_RETRY (1 << 3) 265 #define IFCOPT1_LIPASYNC (1 << 1) 266 #define IFCOPT1_LIPF8 (1 << 0) 267 268 #define IFCOPT2_LOOPBACK (1 << 1) 269 #define IFCOPT2_ATIO3_ONLY (1 << 0) 270 271 #define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 272 #define IFCOPT3_RNDASYNC (1 << 1) 273 /* 274 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 275 * mailbox command to enable this. 276 */ 277 #define ASYNC_QFULL_SENT 0x8049 278 279 /* 280 * Needs to be enabled 281 */ 282 #define ASYNC_AUTO_PLOGI_RJT 0x8018 283 /* 284 * 24XX only 285 */ 286 #define ASYNC_RJT_SENT 0x8049 287 288 /* 289 * All IOCB Queue entries are this size 290 */ 291 #define QENTRY_LEN 64 292 293 /* 294 * Command Structure Definitions 295 */ 296 297 typedef struct { 298 uint32_t ds_base; 299 uint32_t ds_count; 300 } ispds_t; 301 302 typedef struct { 303 uint32_t ds_base; 304 uint32_t ds_basehi; 305 uint32_t ds_count; 306 } ispds64_t; 307 308 #define DSTYPE_32BIT 0 309 #define DSTYPE_64BIT 1 310 typedef struct { 311 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 312 uint32_t ds_segment; /* unused */ 313 uint32_t ds_base; /* 32 bit address of DSD list */ 314 } ispdslist_t; 315 316 317 typedef struct { 318 uint8_t rqs_entry_type; 319 uint8_t rqs_entry_count; 320 uint8_t rqs_seqno; 321 uint8_t rqs_flags; 322 } isphdr_t; 323 324 /* RQS Flag definitions */ 325 #define RQSFLAG_CONTINUATION 0x01 326 #define RQSFLAG_FULL 0x02 327 #define RQSFLAG_BADHEADER 0x04 328 #define RQSFLAG_BADPACKET 0x08 329 #define RQSFLAG_BADCOUNT 0x10 330 #define RQSFLAG_BADORDER 0x20 331 #define RQSFLAG_MASK 0x3f 332 333 /* RQS entry_type definitions */ 334 #define RQSTYPE_REQUEST 0x01 335 #define RQSTYPE_DATASEG 0x02 336 #define RQSTYPE_RESPONSE 0x03 337 #define RQSTYPE_MARKER 0x04 338 #define RQSTYPE_CMDONLY 0x05 339 #define RQSTYPE_ATIO 0x06 /* Target Mode */ 340 #define RQSTYPE_CTIO 0x07 /* Target Mode */ 341 #define RQSTYPE_SCAM 0x08 342 #define RQSTYPE_A64 0x09 343 #define RQSTYPE_A64_CONT 0x0a 344 #define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 345 #define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 346 #define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 347 #define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 348 #define RQSTYPE_CTIO1 0x0f /* Target Mode */ 349 #define RQSTYPE_STATUS_CONT 0x10 350 #define RQSTYPE_T2RQS 0x11 351 #define RQSTYPE_CTIO7 0x12 352 #define RQSTYPE_IP_XMIT 0x13 353 #define RQSTYPE_TSK_MGMT 0x14 354 #define RQSTYPE_T4RQS 0x15 355 #define RQSTYPE_ATIO2 0x16 /* Target Mode */ 356 #define RQSTYPE_CTIO2 0x17 /* Target Mode */ 357 #define RQSTYPE_T7RQS 0x18 358 #define RQSTYPE_T3RQS 0x19 359 #define RQSTYPE_IP_XMIT_64 0x1b 360 #define RQSTYPE_CTIO4 0x1e /* Target Mode */ 361 #define RQSTYPE_CTIO3 0x1f /* Target Mode */ 362 #define RQSTYPE_RIO1 0x21 363 #define RQSTYPE_RIO2 0x22 364 #define RQSTYPE_IP_RECV 0x23 365 #define RQSTYPE_IP_RECV_CONT 0x24 366 #define RQSTYPE_CT_PASSTHRU 0x29 367 #define RQSTYPE_MS_PASSTHRU 0x29 368 #define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 369 #define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 370 #define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 371 #define RQSTYPE_ABORT_IO 0x33 372 #define RQSTYPE_T6RQS 0x48 373 #define RQSTYPE_LOGIN 0x52 374 #define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 375 #define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 376 377 378 #define ISP_RQDSEG 4 379 typedef struct { 380 isphdr_t req_header; 381 uint32_t req_handle; 382 uint8_t req_lun_trn; 383 uint8_t req_target; 384 uint16_t req_cdblen; 385 uint16_t req_flags; 386 uint16_t req_reserved; 387 uint16_t req_time; 388 uint16_t req_seg_count; 389 uint8_t req_cdb[12]; 390 ispds_t req_dataseg[ISP_RQDSEG]; 391 } ispreq_t; 392 #define ISP_RQDSEG_A64 2 393 394 typedef struct { 395 isphdr_t mrk_header; 396 uint32_t mrk_handle; 397 uint8_t mrk_reserved0; 398 uint8_t mrk_target; 399 uint16_t mrk_modifier; 400 uint16_t mrk_flags; 401 uint16_t mrk_lun; 402 uint8_t mrk_reserved1[48]; 403 } isp_marker_t; 404 405 typedef struct { 406 isphdr_t mrk_header; 407 uint32_t mrk_handle; 408 uint16_t mrk_nphdl; 409 uint8_t mrk_modifier; 410 uint8_t mrk_reserved0; 411 uint8_t mrk_reserved1; 412 uint8_t mrk_vphdl; 413 uint16_t mrk_reserved2; 414 uint8_t mrk_lun[8]; 415 uint8_t mrk_reserved3[40]; 416 } isp_marker_24xx_t; 417 418 419 #define SYNC_DEVICE 0 420 #define SYNC_TARGET 1 421 #define SYNC_ALL 2 422 #define SYNC_LIP 3 423 424 #define ISP_RQDSEG_T2 3 425 typedef struct { 426 isphdr_t req_header; 427 uint32_t req_handle; 428 uint8_t req_lun_trn; 429 uint8_t req_target; 430 uint16_t req_scclun; 431 uint16_t req_flags; 432 uint16_t req_reserved; 433 uint16_t req_time; 434 uint16_t req_seg_count; 435 uint8_t req_cdb[16]; 436 uint32_t req_totalcnt; 437 ispds_t req_dataseg[ISP_RQDSEG_T2]; 438 } ispreqt2_t; 439 440 typedef struct { 441 isphdr_t req_header; 442 uint32_t req_handle; 443 uint16_t req_target; 444 uint16_t req_scclun; 445 uint16_t req_flags; 446 uint16_t req_reserved; 447 uint16_t req_time; 448 uint16_t req_seg_count; 449 uint8_t req_cdb[16]; 450 uint32_t req_totalcnt; 451 ispds_t req_dataseg[ISP_RQDSEG_T2]; 452 } ispreqt2e_t; 453 454 #define ISP_RQDSEG_T3 2 455 typedef struct { 456 isphdr_t req_header; 457 uint32_t req_handle; 458 uint8_t req_lun_trn; 459 uint8_t req_target; 460 uint16_t req_scclun; 461 uint16_t req_flags; 462 uint16_t req_reserved; 463 uint16_t req_time; 464 uint16_t req_seg_count; 465 uint8_t req_cdb[16]; 466 uint32_t req_totalcnt; 467 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 468 } ispreqt3_t; 469 #define ispreq64_t ispreqt3_t /* same as.... */ 470 471 typedef struct { 472 isphdr_t req_header; 473 uint32_t req_handle; 474 uint16_t req_target; 475 uint16_t req_scclun; 476 uint16_t req_flags; 477 uint16_t req_reserved; 478 uint16_t req_time; 479 uint16_t req_seg_count; 480 uint8_t req_cdb[16]; 481 uint32_t req_totalcnt; 482 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 483 } ispreqt3e_t; 484 485 /* req_flag values */ 486 #define REQFLAG_NODISCON 0x0001 487 #define REQFLAG_HTAG 0x0002 488 #define REQFLAG_OTAG 0x0004 489 #define REQFLAG_STAG 0x0008 490 #define REQFLAG_TARGET_RTN 0x0010 491 492 #define REQFLAG_NODATA 0x0000 493 #define REQFLAG_DATA_IN 0x0020 494 #define REQFLAG_DATA_OUT 0x0040 495 #define REQFLAG_DATA_UNKNOWN 0x0060 496 497 #define REQFLAG_DISARQ 0x0100 498 #define REQFLAG_FRC_ASYNC 0x0200 499 #define REQFLAG_FRC_SYNC 0x0400 500 #define REQFLAG_FRC_WIDE 0x0800 501 #define REQFLAG_NOPARITY 0x1000 502 #define REQFLAG_STOPQ 0x2000 503 #define REQFLAG_XTRASNS 0x4000 504 #define REQFLAG_PRIORITY 0x8000 505 506 typedef struct { 507 isphdr_t req_header; 508 uint32_t req_handle; 509 uint8_t req_lun_trn; 510 uint8_t req_target; 511 uint16_t req_cdblen; 512 uint16_t req_flags; 513 uint16_t req_reserved; 514 uint16_t req_time; 515 uint16_t req_seg_count; 516 uint8_t req_cdb[44]; 517 } ispextreq_t; 518 519 /* 24XX only */ 520 typedef struct { 521 uint16_t fcd_length; 522 uint16_t fcd_a1500; 523 uint16_t fcd_a3116; 524 uint16_t fcd_a4732; 525 uint16_t fcd_a6348; 526 } fcp_cmnd_ds_t; 527 528 typedef struct { 529 isphdr_t req_header; 530 uint32_t req_handle; 531 uint16_t req_nphdl; 532 uint16_t req_time; 533 uint16_t req_seg_count; 534 uint16_t req_fc_rsp_dsd_length; 535 uint8_t req_lun[8]; 536 uint16_t req_flags; 537 uint16_t req_fc_cmnd_dsd_length; 538 uint16_t req_fc_cmnd_dsd_a1500; 539 uint16_t req_fc_cmnd_dsd_a3116; 540 uint16_t req_fc_cmnd_dsd_a4732; 541 uint16_t req_fc_cmnd_dsd_a6348; 542 uint16_t req_fc_rsp_dsd_a1500; 543 uint16_t req_fc_rsp_dsd_a3116; 544 uint16_t req_fc_rsp_dsd_a4732; 545 uint16_t req_fc_rsp_dsd_a6348; 546 uint32_t req_totalcnt; 547 uint16_t req_tidlo; 548 uint8_t req_tidhi; 549 uint8_t req_vpidx; 550 ispds64_t req_dataseg; 551 } ispreqt6_t; 552 553 typedef struct { 554 isphdr_t req_header; 555 uint32_t req_handle; 556 uint16_t req_nphdl; 557 uint16_t req_time; 558 uint16_t req_seg_count; 559 uint16_t req_reserved; 560 uint8_t req_lun[8]; 561 uint8_t req_alen_datadir; 562 uint8_t req_task_management; 563 uint8_t req_task_attribute; 564 uint8_t req_crn; 565 uint8_t req_cdb[16]; 566 uint32_t req_dl; 567 uint16_t req_tidlo; 568 uint8_t req_tidhi; 569 uint8_t req_vpidx; 570 ispds64_t req_dataseg; 571 } ispreqt7_t; 572 573 /* Task Management Request Function */ 574 typedef struct { 575 isphdr_t tmf_header; 576 uint32_t tmf_handle; 577 uint16_t tmf_nphdl; 578 uint8_t tmf_reserved0[2]; 579 uint16_t tmf_delay; 580 uint16_t tmf_timeout; 581 uint8_t tmf_lun[8]; 582 uint32_t tmf_flags; 583 uint8_t tmf_reserved1[20]; 584 uint16_t tmf_tidlo; 585 uint8_t tmf_tidhi; 586 uint8_t tmf_vpidx; 587 uint8_t tmf_reserved2[12]; 588 } isp24xx_tmf_t; 589 590 #define ISP24XX_TMF_NOSEND 0x80000000 591 592 #define ISP24XX_TMF_LUN_RESET 0x00000010 593 #define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 594 #define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 595 #define ISP24XX_TMF_TARGET_RESET 0x00000002 596 #define ISP24XX_TMF_CLEAR_ACA 0x00000001 597 598 /* I/O Abort Structure */ 599 typedef struct { 600 isphdr_t abrt_header; 601 uint32_t abrt_handle; 602 uint16_t abrt_nphdl; 603 uint16_t abrt_options; 604 uint32_t abrt_cmd_handle; 605 uint8_t abrt_reserved[32]; 606 uint16_t abrt_tidlo; 607 uint8_t abrt_tidhi; 608 uint8_t abrt_vpidx; 609 uint8_t abrt_reserved1[12]; 610 } isp24xx_abrt_t; 611 612 #define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 613 #define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 614 #define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 615 616 #define ISP_CDSEG 7 617 typedef struct { 618 isphdr_t req_header; 619 uint32_t req_reserved; 620 ispds_t req_dataseg[ISP_CDSEG]; 621 } ispcontreq_t; 622 623 #define ISP_CDSEG64 5 624 typedef struct { 625 isphdr_t req_header; 626 ispds64_t req_dataseg[ISP_CDSEG64]; 627 } ispcontreq64_t; 628 629 typedef struct { 630 isphdr_t req_header; 631 uint32_t req_handle; 632 uint16_t req_scsi_status; 633 uint16_t req_completion_status; 634 uint16_t req_state_flags; 635 uint16_t req_status_flags; 636 uint16_t req_time; 637 #define req_response_len req_time /* FC only */ 638 uint16_t req_sense_len; 639 uint32_t req_resid; 640 uint8_t req_response[8]; /* FC only */ 641 uint8_t req_sense_data[32]; 642 } ispstatusreq_t; 643 644 /* 645 * Status Continuation 646 */ 647 typedef struct { 648 isphdr_t req_header; 649 uint8_t req_sense_data[60]; 650 } ispstatus_cont_t; 651 652 /* 653 * 24XX Type 0 status 654 */ 655 typedef struct { 656 isphdr_t req_header; 657 uint32_t req_handle; 658 uint16_t req_completion_status; 659 uint16_t req_oxid; 660 uint32_t req_resid; 661 uint16_t req_reserved0; 662 uint16_t req_state_flags; 663 uint16_t req_reserved1; 664 uint16_t req_scsi_status; 665 uint32_t req_fcp_residual; 666 uint32_t req_sense_len; 667 uint32_t req_response_len; 668 uint8_t req_rsp_sense[28]; 669 } isp24xx_statusreq_t; 670 671 /* 672 * For Qlogic 2X00, the high order byte of SCSI status has 673 * additional meaning. 674 */ 675 #define RQCS_RU 0x800 /* Residual Under */ 676 #define RQCS_RO 0x400 /* Residual Over */ 677 #define RQCS_RESID (RQCS_RU|RQCS_RO) 678 #define RQCS_SV 0x200 /* Sense Length Valid */ 679 #define RQCS_RV 0x100 /* FCP Response Length Valid */ 680 681 /* 682 * CT Passthru IOCB 683 */ 684 typedef struct { 685 isphdr_t ctp_header; 686 uint32_t ctp_handle; 687 uint16_t ctp_status; 688 uint16_t ctp_nphdl; /* n-port handle */ 689 uint16_t ctp_cmd_cnt; /* Command DSD count */ 690 uint8_t ctp_vpidx; 691 uint8_t ctp_reserved0; 692 uint16_t ctp_time; 693 uint16_t ctp_reserved1; 694 uint16_t ctp_rsp_cnt; /* Response DSD count */ 695 uint16_t ctp_reserved2[5]; 696 uint32_t ctp_rsp_bcnt; /* Response byte count */ 697 uint32_t ctp_cmd_bcnt; /* Command byte count */ 698 ispds64_t ctp_dataseg[2]; 699 } isp_ct_pt_t; 700 701 /* 702 * MS Passthru IOCB 703 */ 704 typedef struct { 705 isphdr_t ms_header; 706 uint32_t ms_handle; 707 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 708 uint16_t ms_status; 709 uint16_t ms_flags; 710 uint16_t ms_reserved1; /* low 8 bits */ 711 uint16_t ms_time; 712 uint16_t ms_cmd_cnt; /* Command DSD count */ 713 uint16_t ms_tot_cnt; /* Total DSD Count */ 714 uint8_t ms_type; /* MS type */ 715 uint8_t ms_r_ctl; /* R_CTL */ 716 uint16_t ms_rxid; /* RX_ID */ 717 uint16_t ms_reserved2; 718 uint32_t ms_handle2; 719 uint32_t ms_rsp_bcnt; /* Response byte count */ 720 uint32_t ms_cmd_bcnt; /* Command byte count */ 721 ispds64_t ms_dataseg[2]; 722 } isp_ms_t; 723 724 /* 725 * Completion Status Codes. 726 */ 727 #define RQCS_COMPLETE 0x0000 728 #define RQCS_DMA_ERROR 0x0002 729 #define RQCS_RESET_OCCURRED 0x0004 730 #define RQCS_ABORTED 0x0005 731 #define RQCS_TIMEOUT 0x0006 732 #define RQCS_DATA_OVERRUN 0x0007 733 #define RQCS_DATA_UNDERRUN 0x0015 734 #define RQCS_QUEUE_FULL 0x001C 735 736 /* 1X00 Only Completion Codes */ 737 #define RQCS_INCOMPLETE 0x0001 738 #define RQCS_TRANSPORT_ERROR 0x0003 739 #define RQCS_COMMAND_OVERRUN 0x0008 740 #define RQCS_STATUS_OVERRUN 0x0009 741 #define RQCS_BAD_MESSAGE 0x000a 742 #define RQCS_NO_MESSAGE_OUT 0x000b 743 #define RQCS_EXT_ID_FAILED 0x000c 744 #define RQCS_IDE_MSG_FAILED 0x000d 745 #define RQCS_ABORT_MSG_FAILED 0x000e 746 #define RQCS_REJECT_MSG_FAILED 0x000f 747 #define RQCS_NOP_MSG_FAILED 0x0010 748 #define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 749 #define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 750 #define RQCS_ID_MSG_FAILED 0x0013 751 #define RQCS_UNEXP_BUS_FREE 0x0014 752 #define RQCS_XACT_ERR1 0x0018 753 #define RQCS_XACT_ERR2 0x0019 754 #define RQCS_XACT_ERR3 0x001A 755 #define RQCS_BAD_ENTRY 0x001B 756 #define RQCS_PHASE_SKIPPED 0x001D 757 #define RQCS_ARQS_FAILED 0x001E 758 #define RQCS_WIDE_FAILED 0x001F 759 #define RQCS_SYNCXFER_FAILED 0x0020 760 #define RQCS_LVD_BUSERR 0x0021 761 762 /* 2X00 Only Completion Codes */ 763 #define RQCS_PORT_UNAVAILABLE 0x0028 764 #define RQCS_PORT_LOGGED_OUT 0x0029 765 #define RQCS_PORT_CHANGED 0x002A 766 #define RQCS_PORT_BUSY 0x002B 767 768 /* 24XX Only Completion Codes */ 769 #define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 770 #define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 771 #define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 772 #define RQCS_24XX_TMO 0x0030 /* task management overrun */ 773 774 775 /* 776 * 1X00 specific State Flags 777 */ 778 #define RQSF_GOT_BUS 0x0100 779 #define RQSF_GOT_TARGET 0x0200 780 #define RQSF_SENT_CDB 0x0400 781 #define RQSF_XFRD_DATA 0x0800 782 #define RQSF_GOT_STATUS 0x1000 783 #define RQSF_GOT_SENSE 0x2000 784 #define RQSF_XFER_COMPLETE 0x4000 785 786 /* 787 * 2X00 specific State Flags 788 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 789 */ 790 #define RQSF_DATA_IN 0x0020 791 #define RQSF_DATA_OUT 0x0040 792 #define RQSF_STAG 0x0008 793 #define RQSF_OTAG 0x0004 794 #define RQSF_HTAG 0x0002 795 /* 796 * 1X00 Status Flags 797 */ 798 #define RQSTF_DISCONNECT 0x0001 799 #define RQSTF_SYNCHRONOUS 0x0002 800 #define RQSTF_PARITY_ERROR 0x0004 801 #define RQSTF_BUS_RESET 0x0008 802 #define RQSTF_DEVICE_RESET 0x0010 803 #define RQSTF_ABORTED 0x0020 804 #define RQSTF_TIMEOUT 0x0040 805 #define RQSTF_NEGOTIATION 0x0080 806 807 /* 808 * 2X00 specific state flags 809 */ 810 /* RQSF_SENT_CDB */ 811 /* RQSF_XFRD_DATA */ 812 /* RQSF_GOT_STATUS */ 813 /* RQSF_XFER_COMPLETE */ 814 815 /* 816 * 2X00 specific status flags 817 */ 818 /* RQSTF_ABORTED */ 819 /* RQSTF_TIMEOUT */ 820 #define RQSTF_DMA_ERROR 0x0080 821 #define RQSTF_LOGOUT 0x2000 822 823 /* 824 * Miscellaneous 825 */ 826 #ifndef ISP_EXEC_THROTTLE 827 #define ISP_EXEC_THROTTLE 16 828 #endif 829 830 /* 831 * About Firmware returns an 'attribute' word in mailbox 6. 832 * These attributes are for 2200 and 2300. 833 */ 834 #define ISP_FW_ATTR_TMODE 0x0001 835 #define ISP_FW_ATTR_SCCLUN 0x0002 836 #define ISP_FW_ATTR_FABRIC 0x0004 837 #define ISP_FW_ATTR_CLASS2 0x0008 838 #define ISP_FW_ATTR_FCTAPE 0x0010 839 #define ISP_FW_ATTR_IP 0x0020 840 #define ISP_FW_ATTR_VI 0x0040 841 #define ISP_FW_ATTR_VI_SOLARIS 0x0080 842 #define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 843 844 /* and these are for the 2400 */ 845 #define ISP2400_FW_ATTR_CLASS2 0x0001 846 #define ISP2400_FW_ATTR_IP 0x0002 847 #define ISP2400_FW_ATTR_MULTIID 0x0004 848 #define ISP2400_FW_ATTR_SB2 0x0008 849 #define ISP2400_FW_ATTR_T10CRC 0x0010 850 #define ISP2400_FW_ATTR_VI 0x0020 851 #define ISP2400_FW_ATTR_EXPFW 0x2000 852 853 #define ISP_CAP_TMODE(isp) \ 854 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 855 #define ISP_CAP_SCCFW(isp) \ 856 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 857 #define ISP_CAP_2KLOGIN(isp) \ 858 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 859 #define ISP_CAP_MULTI_ID(isp) \ 860 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 861 862 #define ISP_GET_VPIDX(isp, tag) \ 863 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 864 865 /* 866 * Reduced Interrupt Operation Response Queue Entries 867 */ 868 869 typedef struct { 870 isphdr_t req_header; 871 uint32_t req_handles[15]; 872 } isp_rio1_t; 873 874 typedef struct { 875 isphdr_t req_header; 876 uint16_t req_handles[30]; 877 } isp_rio2_t; 878 879 /* 880 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 881 */ 882 883 /* 884 * Initialization Control Block 885 * 886 * Version One (prime) format. 887 */ 888 typedef struct { 889 uint8_t icb_version; 890 uint8_t icb_reserved0; 891 uint16_t icb_fwoptions; 892 uint16_t icb_maxfrmlen; 893 uint16_t icb_maxalloc; 894 uint16_t icb_execthrottle; 895 uint8_t icb_retry_count; 896 uint8_t icb_retry_delay; 897 uint8_t icb_portname[8]; 898 uint16_t icb_hardaddr; 899 uint8_t icb_iqdevtype; 900 uint8_t icb_logintime; 901 uint8_t icb_nodename[8]; 902 uint16_t icb_rqstout; 903 uint16_t icb_rspnsin; 904 uint16_t icb_rqstqlen; 905 uint16_t icb_rsltqlen; 906 uint16_t icb_rqstaddr[4]; 907 uint16_t icb_respaddr[4]; 908 uint16_t icb_lunenables; 909 uint8_t icb_ccnt; 910 uint8_t icb_icnt; 911 uint16_t icb_lunetimeout; 912 uint16_t icb_reserved1; 913 uint16_t icb_xfwoptions; 914 uint8_t icb_racctimer; 915 uint8_t icb_idelaytimer; 916 uint16_t icb_zfwoptions; 917 uint16_t icb_reserved2[13]; 918 } isp_icb_t; 919 920 #define ICB_VERSION1 1 921 922 #define ICBOPT_EXTENDED 0x8000 923 #define ICBOPT_BOTH_WWNS 0x4000 924 #define ICBOPT_FULL_LOGIN 0x2000 925 #define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 926 #define ICBOPT_PREVLOOP 0x0800 927 #define ICBOPT_SRCHDOWN 0x0400 928 #define ICBOPT_NOLIP 0x0200 929 #define ICBOPT_PDBCHANGE_AE 0x0100 930 #define ICBOPT_INI_TGTTYPE 0x0080 931 #define ICBOPT_INI_ADISC 0x0040 932 #define ICBOPT_INI_DISABLE 0x0020 933 #define ICBOPT_TGT_ENABLE 0x0010 934 #define ICBOPT_FAST_POST 0x0008 935 #define ICBOPT_FULL_DUPLEX 0x0004 936 #define ICBOPT_FAIRNESS 0x0002 937 #define ICBOPT_HARD_ADDRESS 0x0001 938 939 #define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 940 #define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 941 #define ICBXOPT_FCTAPE_CONFIRM 0x2000 942 #define ICBXOPT_FCTAPE 0x1000 943 #define ICBXOPT_CLASS2_ACK0 0x0200 944 #define ICBXOPT_CLASS2 0x0100 945 #define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 946 #define ICBXOPT_TOPO_MASK 0x0070 947 #define ICBXOPT_LOOP_ONLY 0x0000 948 #define ICBXOPT_PTP_ONLY 0x0010 949 #define ICBXOPT_LOOP_2_PTP 0x0020 950 #define ICBXOPT_PTP_2_LOOP 0x0030 951 /* 952 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 953 * RIO is not defined for the 23XX cards (just 2200) 954 */ 955 #define ICBXOPT_RIO_OFF 0 956 #define ICBXOPT_RIO_16BIT 1 957 #define ICBXOPT_RIO_32BIT 2 958 #define ICBXOPT_RIO_16BIT_IOCB 3 959 #define ICBXOPT_RIO_32BIT_IOCB 4 960 #define ICBXOPT_ZIO 5 961 #define ICBXOPT_TIMER_MASK 0x7 962 963 #define ICBZOPT_RATE_MASK 0xC000 964 #define ICBZOPT_RATE_ONEGB 0x0000 965 #define ICBZOPT_RATE_AUTO 0x8000 966 #define ICBZOPT_RATE_TWOGB 0x4000 967 #define ICBZOPT_50_OHM 0x2000 968 #define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 969 #define ICBZOPT_RSPSZ_MASK 0x0030 970 #define ICBZOPT_RSPSZ_24 0x0000 971 #define ICBZOPT_RSPSZ_12 0x0010 972 #define ICBZOPT_RSPSZ_24A 0x0020 973 #define ICBZOPT_RSPSZ_32 0x0030 974 #define ICBZOPT_SOFTID 0x0002 975 #define ICBZOPT_ENA_RDXFR_RDY 0x0001 976 977 /* 2400 F/W options */ 978 #define ICB2400_OPT1_BOTH_WWNS 0x00004000 979 #define ICB2400_OPT1_FULL_LOGIN 0x00002000 980 #define ICB2400_OPT1_PREVLOOP 0x00000800 981 #define ICB2400_OPT1_SRCHDOWN 0x00000400 982 #define ICB2400_OPT1_NOLIP 0x00000200 983 #define ICB2400_OPT1_INI_DISABLE 0x00000020 984 #define ICB2400_OPT1_TGT_ENABLE 0x00000010 985 #define ICB2400_OPT1_FULL_DUPLEX 0x00000004 986 #define ICB2400_OPT1_FAIRNESS 0x00000002 987 #define ICB2400_OPT1_HARD_ADDRESS 0x00000001 988 989 #define ICB2400_OPT2_FCTAPE 0x00001000 990 #define ICB2400_OPT2_CLASS2_ACK0 0x00000200 991 #define ICB2400_OPT2_CLASS2 0x00000100 992 #define ICB2400_OPT2_NO_PLAY 0x00000080 993 #define ICB2400_OPT2_TOPO_MASK 0x00000070 994 #define ICB2400_OPT2_LOOP_ONLY 0x00000000 995 #define ICB2400_OPT2_PTP_ONLY 0x00000010 996 #define ICB2400_OPT2_LOOP_2_PTP 0x00000020 997 #define ICB2400_OPT2_PTP_2_LOOP 0x00000030 998 #define ICB2400_OPT2_TIMER_MASK 0x00000007 999 #define ICB2400_OPT2_ZIO 0x00000005 1000 #define ICB2400_OPT2_ZIO1 0x00000006 1001 1002 #define ICB2400_OPT3_75_OHM 0x00010000 1003 #define ICB2400_OPT3_RATE_MASK 0x0000E000 1004 #define ICB2400_OPT3_RATE_ONEGB 0x00000000 1005 #define ICB2400_OPT3_RATE_TWOGB 0x00002000 1006 #define ICB2400_OPT3_RATE_AUTO 0x00004000 1007 #define ICB2400_OPT3_RATE_FOURGB 0x00006000 1008 #define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 1009 #define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1010 #define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1011 #define ICB2400_OPT3_ENA_OOF 0x00000040 1012 /* note that a response size flag of zero is reserved! */ 1013 #define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1014 #define ICB2400_OPT3_RSPSZ_12 0x00000010 1015 #define ICB2400_OPT3_RSPSZ_24 0x00000020 1016 #define ICB2400_OPT3_RSPSZ_32 0x00000030 1017 #define ICB2400_OPT3_SOFTID 0x00000002 1018 1019 #define ICB_MIN_FRMLEN 256 1020 #define ICB_MAX_FRMLEN 2112 1021 #define ICB_DFLT_FRMLEN 1024 1022 #define ICB_DFLT_ALLOC 256 1023 #define ICB_DFLT_THROTTLE 16 1024 #define ICB_DFLT_RDELAY 5 1025 #define ICB_DFLT_RCOUNT 3 1026 1027 #define ICB_LOGIN_TOV 30 1028 #define ICB_LUN_ENABLE_TOV 180 1029 1030 1031 /* 1032 * And somebody at QLogic had a great idea that you could just change 1033 * the structure *and* keep the version number the same as the other cards. 1034 */ 1035 typedef struct { 1036 uint16_t icb_version; 1037 uint16_t icb_reserved0; 1038 uint16_t icb_maxfrmlen; 1039 uint16_t icb_execthrottle; 1040 uint16_t icb_xchgcnt; 1041 uint16_t icb_hardaddr; 1042 uint8_t icb_portname[8]; 1043 uint8_t icb_nodename[8]; 1044 uint16_t icb_rspnsin; 1045 uint16_t icb_rqstout; 1046 uint16_t icb_retry_count; 1047 uint16_t icb_priout; 1048 uint16_t icb_rsltqlen; 1049 uint16_t icb_rqstqlen; 1050 uint16_t icb_ldn_nols; 1051 uint16_t icb_prqstqlen; 1052 uint16_t icb_rqstaddr[4]; 1053 uint16_t icb_respaddr[4]; 1054 uint16_t icb_priaddr[4]; 1055 uint16_t icb_reserved1[4]; 1056 uint16_t icb_atio_in; 1057 uint16_t icb_atioqlen; 1058 uint16_t icb_atioqaddr[4]; 1059 uint16_t icb_idelaytimer; 1060 uint16_t icb_logintime; 1061 uint32_t icb_fwoptions1; 1062 uint32_t icb_fwoptions2; 1063 uint32_t icb_fwoptions3; 1064 uint16_t icb_reserved2[12]; 1065 } isp_icb_2400_t; 1066 1067 #define RQRSP_ADDR0015 0 1068 #define RQRSP_ADDR1631 1 1069 #define RQRSP_ADDR3247 2 1070 #define RQRSP_ADDR4863 3 1071 1072 1073 #define ICB_NNM0 7 1074 #define ICB_NNM1 6 1075 #define ICB_NNM2 5 1076 #define ICB_NNM3 4 1077 #define ICB_NNM4 3 1078 #define ICB_NNM5 2 1079 #define ICB_NNM6 1 1080 #define ICB_NNM7 0 1081 1082 #define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1083 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1084 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1085 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1086 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1087 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1088 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1089 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1090 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1091 1092 #define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1093 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1094 ((uint64_t) array[ICB_NNM1] << 8) | \ 1095 ((uint64_t) array[ICB_NNM2] << 16) | \ 1096 ((uint64_t) array[ICB_NNM3] << 24) | \ 1097 ((uint64_t) array[ICB_NNM4] << 32) | \ 1098 ((uint64_t) array[ICB_NNM5] << 40) | \ 1099 ((uint64_t) array[ICB_NNM6] << 48) | \ 1100 ((uint64_t) array[ICB_NNM7] << 56) 1101 1102 1103 /* 1104 * For MULTI_ID firmware, this describes a 1105 * virtual port entity for getting status. 1106 */ 1107 typedef struct { 1108 uint16_t vp_port_status; 1109 uint8_t vp_port_options; 1110 uint8_t vp_port_loopid; 1111 uint8_t vp_port_portname[8]; 1112 uint8_t vp_port_nodename[8]; 1113 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1114 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1115 } vp_port_info_t; 1116 1117 #define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* disable target mode */ 1118 #define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* enable initiator mode */ 1119 #define ICB2400_VPOPT_ENABLED 0x00000008 1120 #define ICB2400_VPOPT_NOPLAY 0x00000004 1121 #define ICB2400_VPOPT_PREVLOOP 0x00000002 1122 #define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 1123 1124 #define ICB2400_VPOPT_WRITE_SIZE 20 1125 1126 /* 1127 * For MULTI_ID firmware, we append this structure 1128 * to the isp_icb_2400_t above, followed by a list 1129 * structures that are *most* of the vp_port_info_t. 1130 */ 1131 typedef struct { 1132 uint16_t vp_count; 1133 uint16_t vp_global_options; 1134 } isp_icb_2400_vpinfo_t; 1135 1136 #define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1137 #define ICB2400_VPINFO_PORT_OFF(chan) \ 1138 ICB2400_VPINFO_OFF + \ 1139 sizeof (isp_icb_2400_vpinfo_t) + ((chan - 1) * ICB2400_VPOPT_WRITE_SIZE) 1140 1141 #define ICB2400_VPGOPT_MID_DISABLE 0x02 1142 1143 typedef struct { 1144 isphdr_t vp_ctrl_hdr; 1145 uint32_t vp_ctrl_handle; 1146 uint16_t vp_ctrl_index_fail; 1147 uint16_t vp_ctrl_status; 1148 uint16_t vp_ctrl_command; 1149 uint16_t vp_ctrl_vp_count; 1150 uint16_t vp_ctrl_idmap[8]; 1151 uint8_t vp_ctrl_reserved[32]; 1152 } vp_ctrl_info_t; 1153 1154 #define VP_CTRL_CMD_ENABLE_VP 0 1155 #define VP_CTRL_CMD_DISABLE_VP 8 1156 #define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 9 1157 #define VP_CTRL_CMD_DISABLE_VP_LOGO 0xA 1158 1159 /* 1160 * We can use this structure for modifying either one or two VP ports after initialization 1161 */ 1162 typedef struct { 1163 isphdr_t vp_mod_hdr; 1164 uint32_t vp_mod_hdl; 1165 uint16_t vp_mod_reserved0; 1166 uint16_t vp_mod_status; 1167 uint8_t vp_mod_cmd; 1168 uint8_t vp_mod_cnt; 1169 uint8_t vp_mod_idx0; 1170 uint8_t vp_mod_idx1; 1171 struct { 1172 uint8_t options; 1173 uint8_t loopid; 1174 uint16_t reserved1; 1175 uint8_t wwpn[8]; 1176 uint8_t wwnn[8]; 1177 } vp_mod_ports[2]; 1178 uint8_t vp_mod_reserved2[8]; 1179 } vp_modify_t; 1180 1181 #define VP_STS_OK 0x00 1182 #define VP_STS_ERR 0x01 1183 #define VP_CNT_ERR 0x02 1184 #define VP_GEN_ERR 0x03 1185 #define VP_IDX_ERR 0x04 1186 #define VP_STS_BSY 0x05 1187 1188 #define VP_MODIFY_VP 0x00 1189 #define VP_MODIFY_ENA 0x01 1190 1191 /* 1192 * Port Data Base Element 1193 */ 1194 1195 typedef struct { 1196 uint16_t pdb_options; 1197 uint8_t pdb_mstate; 1198 uint8_t pdb_sstate; 1199 uint8_t pdb_hardaddr_bits[4]; 1200 uint8_t pdb_portid_bits[4]; 1201 uint8_t pdb_nodename[8]; 1202 uint8_t pdb_portname[8]; 1203 uint16_t pdb_execthrottle; 1204 uint16_t pdb_exec_count; 1205 uint8_t pdb_retry_count; 1206 uint8_t pdb_retry_delay; 1207 uint16_t pdb_resalloc; 1208 uint16_t pdb_curalloc; 1209 uint16_t pdb_qhead; 1210 uint16_t pdb_qtail; 1211 uint16_t pdb_tl_next; 1212 uint16_t pdb_tl_last; 1213 uint16_t pdb_features; /* PLOGI, Common Service */ 1214 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1215 uint16_t pdb_roi; /* PLOGI, Common Service */ 1216 uint8_t pdb_target; 1217 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1218 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1219 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1220 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1221 uint16_t pdb_labrtflg; 1222 uint16_t pdb_lstopflg; 1223 uint16_t pdb_sqhead; 1224 uint16_t pdb_sqtail; 1225 uint16_t pdb_ptimer; 1226 uint16_t pdb_nxt_seqid; 1227 uint16_t pdb_fcount; 1228 uint16_t pdb_prli_len; 1229 uint16_t pdb_prli_svc0; 1230 uint16_t pdb_prli_svc3; 1231 uint16_t pdb_loopid; 1232 uint16_t pdb_il_ptr; 1233 uint16_t pdb_sl_ptr; 1234 } isp_pdb_21xx_t; 1235 1236 #define PDB_OPTIONS_XMITTING (1<<11) 1237 #define PDB_OPTIONS_LNKXMIT (1<<10) 1238 #define PDB_OPTIONS_ABORTED (1<<9) 1239 #define PDB_OPTIONS_ADISC (1<<1) 1240 1241 #define PDB_STATE_DISCOVERY 0 1242 #define PDB_STATE_WDISC_ACK 1 1243 #define PDB_STATE_PLOGI 2 1244 #define PDB_STATE_PLOGI_ACK 3 1245 #define PDB_STATE_PRLI 4 1246 #define PDB_STATE_PRLI_ACK 5 1247 #define PDB_STATE_LOGGED_IN 6 1248 #define PDB_STATE_PORT_UNAVAIL 7 1249 #define PDB_STATE_PRLO 8 1250 #define PDB_STATE_PRLO_ACK 9 1251 #define PDB_STATE_PLOGO 10 1252 #define PDB_STATE_PLOG_ACK 11 1253 1254 #define SVC3_TGT_ROLE 0x10 1255 #define SVC3_INI_ROLE 0x20 1256 #define SVC3_ROLE_MASK 0x30 1257 #define SVC3_ROLE_SHIFT 4 1258 1259 #define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1260 #define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1261 1262 /* 1263 * Port Data Base Element- 24XX cards 1264 */ 1265 typedef struct { 1266 uint16_t pdb_flags; 1267 uint8_t pdb_curstate; 1268 uint8_t pdb_laststate; 1269 uint8_t pdb_hardaddr_bits[4]; 1270 uint8_t pdb_portid_bits[4]; 1271 #define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1272 uint16_t pdb_retry_timer; 1273 uint16_t pdb_handle; 1274 uint16_t pdb_rcv_dsize; 1275 uint16_t pdb_reserved0; 1276 uint16_t pdb_prli_svc0; 1277 uint16_t pdb_prli_svc3; 1278 uint8_t pdb_portname[8]; 1279 uint8_t pdb_nodename[8]; 1280 uint8_t pdb_reserved1[24]; 1281 } isp_pdb_24xx_t; 1282 1283 #define PDB2400_TID_SUPPORTED 0x4000 1284 #define PDB2400_FC_TAPE 0x0080 1285 #define PDB2400_CLASS2_ACK0 0x0040 1286 #define PDB2400_FCP_CONF 0x0020 1287 #define PDB2400_CLASS2 0x0010 1288 #define PDB2400_ADDR_VALID 0x0002 1289 1290 #define PDB2400_STATE_PLOGI_PEND 0x03 1291 #define PDB2400_STATE_PLOGI_DONE 0x04 1292 #define PDB2400_STATE_PRLI_PEND 0x05 1293 #define PDB2400_STATE_LOGGED_IN 0x06 1294 #define PDB2400_STATE_PORT_UNAVAIL 0x07 1295 #define PDB2400_STATE_PRLO_PEND 0x09 1296 #define PDB2400_STATE_LOGO_PEND 0x0B 1297 1298 /* 1299 * Common elements from the above two structures that are actually useful to us. 1300 */ 1301 typedef struct { 1302 uint16_t handle; 1303 uint16_t reserved; 1304 uint32_t s3_role : 8, 1305 portid : 24; 1306 uint8_t portname[8]; 1307 uint8_t nodename[8]; 1308 } isp_pdb_t; 1309 1310 /* 1311 * Port Database Changed Async Event information for 24XX cards 1312 */ 1313 #define PDB24XX_AE_OK 0x00 1314 #define PDB24XX_AE_IMPL_LOGO_1 0x01 1315 #define PDB24XX_AE_IMPL_LOGO_2 0x02 1316 #define PDB24XX_AE_IMPL_LOGO_3 0x03 1317 #define PDB24XX_AE_PLOGI_RCVD 0x04 1318 #define PDB24XX_AE_PLOGI_RJT 0x05 1319 #define PDB24XX_AE_PRLI_RCVD 0x06 1320 #define PDB24XX_AE_PRLI_RJT 0x07 1321 #define PDB24XX_AE_TPRLO 0x08 1322 #define PDB24XX_AE_TPRLO_RJT 0x09 1323 #define PDB24XX_AE_PRLO_RCVD 0x0a 1324 #define PDB24XX_AE_LOGO_RCVD 0x0b 1325 #define PDB24XX_AE_TOPO_CHG 0x0c 1326 #define PDB24XX_AE_NPORT_CHG 0x0d 1327 #define PDB24XX_AE_FLOGI_RJT 0x0e 1328 #define PDB24XX_AE_BAD_FANN 0x0f 1329 #define PDB24XX_AE_FLOGI_TIMO 0x10 1330 #define PDB24XX_AE_ABX_LOGO 0x11 1331 #define PDB24XX_AE_PLOGI_DONE 0x12 1332 #define PDB24XX_AE_PRLI_DONJE 0x13 1333 #define PDB24XX_AE_OPN_1 0x14 1334 #define PDB24XX_AE_OPN_2 0x15 1335 #define PDB24XX_AE_TXERR 0x16 1336 #define PDB24XX_AE_FORCED_LOGO 0x17 1337 #define PDB24XX_AE_DISC_TIMO 0x18 1338 1339 /* 1340 * Genericized Port Login/Logout software structure 1341 */ 1342 typedef struct { 1343 uint16_t handle; 1344 uint16_t channel; 1345 uint32_t 1346 flags : 8, 1347 portid : 24; 1348 } isp_plcmd_t; 1349 /* the flags to use are those for PLOGX_FLG_* below */ 1350 1351 /* 1352 * ISP24XX- Login/Logout Port IOCB 1353 */ 1354 typedef struct { 1355 isphdr_t plogx_header; 1356 uint32_t plogx_handle; 1357 uint16_t plogx_status; 1358 uint16_t plogx_nphdl; 1359 uint16_t plogx_flags; 1360 uint16_t plogx_vphdl; /* low 8 bits */ 1361 uint16_t plogx_portlo; /* low 16 bits */ 1362 uint16_t plogx_rspsz_porthi; 1363 struct { 1364 uint16_t lo16; 1365 uint16_t hi16; 1366 } plogx_ioparm[11]; 1367 } isp_plogx_t; 1368 1369 #define PLOGX_STATUS_OK 0x00 1370 #define PLOGX_STATUS_UNAVAIL 0x28 1371 #define PLOGX_STATUS_LOGOUT 0x29 1372 #define PLOGX_STATUS_IOCBERR 0x31 1373 1374 #define PLOGX_IOCBERR_NOLINK 0x01 1375 #define PLOGX_IOCBERR_NOIOCB 0x02 1376 #define PLOGX_IOCBERR_NOXGHG 0x03 1377 #define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1378 #define PLOGX_IOCBERR_NOFABRIC 0x05 1379 #define PLOGX_IOCBERR_NOTREADY 0x07 1380 #define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */ 1381 #define PLOGX_IOCBERR_NOPCB 0x0a 1382 #define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1383 #define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1384 #define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1385 #define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1386 #define PLOGX_IOCBERR_NOHANDLE 0x1c 1387 #define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1388 1389 #define PLOGX_FLG_CMD_MASK 0xf 1390 #define PLOGX_FLG_CMD_PLOGI 0 1391 #define PLOGX_FLG_CMD_PRLI 1 1392 #define PLOGX_FLG_CMD_PDISC 2 1393 #define PLOGX_FLG_CMD_LOGO 8 1394 #define PLOGX_FLG_CMD_PRLO 9 1395 #define PLOGX_FLG_CMD_TPRLO 10 1396 1397 #define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1398 #define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1399 #define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1400 #define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1401 #define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1402 #define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1403 #define PLOGX_FLG_FREE_NPHDL 0x80 /* if with LOGO */ 1404 1405 #define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1406 #define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1407 1408 /* 1409 * Report ID Acquisistion (24XX multi-id firmware) 1410 */ 1411 typedef struct { 1412 isphdr_t ridacq_hdr; 1413 uint32_t ridacq_handle; 1414 union { 1415 struct { 1416 uint8_t ridacq_vp_acquired; 1417 uint8_t ridacq_vp_setup; 1418 uint16_t ridacq_reserved0; 1419 } type0; /* type 0 */ 1420 struct { 1421 uint16_t ridacq_vp_count; 1422 uint8_t ridacq_vp_index; 1423 uint8_t ridacq_vp_status; 1424 } type1; /* type 1 */ 1425 } un; 1426 uint16_t ridacq_vp_port_lo; 1427 uint8_t ridacq_vp_port_hi; 1428 uint8_t ridacq_format; /* 0 or 1 */ 1429 uint16_t ridacq_map[8]; 1430 uint8_t ridacq_reserved1[32]; 1431 } isp_ridacq_t; 1432 1433 #define RIDACQ_STS_COMPLETE 0 1434 #define RIDACQ_STS_UNACQUIRED 1 1435 #define RIDACQ_STS_CHANGED 20 1436 1437 1438 /* 1439 * Simple Name Server Data Structures 1440 */ 1441 #define SNS_GA_NXT 0x100 1442 #define SNS_GPN_ID 0x112 1443 #define SNS_GNN_ID 0x113 1444 #define SNS_GFF_ID 0x11F 1445 #define SNS_GID_FT 0x171 1446 #define SNS_RFT_ID 0x217 1447 typedef struct { 1448 uint16_t snscb_rblen; /* response buffer length (words) */ 1449 uint16_t snscb_reserved0; 1450 uint16_t snscb_addr[4]; /* response buffer address */ 1451 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1452 uint16_t snscb_reserved1; 1453 uint16_t snscb_data[]; /* variable data */ 1454 } sns_screq_t; /* Subcommand Request Structure */ 1455 1456 typedef struct { 1457 uint16_t snscb_rblen; /* response buffer length (words) */ 1458 uint16_t snscb_reserved0; 1459 uint16_t snscb_addr[4]; /* response buffer address */ 1460 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1461 uint16_t snscb_reserved1; 1462 uint16_t snscb_cmd; 1463 uint16_t snscb_reserved2; 1464 uint32_t snscb_reserved3; 1465 uint32_t snscb_port; 1466 } sns_ga_nxt_req_t; 1467 #define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1468 1469 typedef struct { 1470 uint16_t snscb_rblen; /* response buffer length (words) */ 1471 uint16_t snscb_reserved0; 1472 uint16_t snscb_addr[4]; /* response buffer address */ 1473 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1474 uint16_t snscb_reserved1; 1475 uint16_t snscb_cmd; 1476 uint16_t snscb_reserved2; 1477 uint32_t snscb_reserved3; 1478 uint32_t snscb_portid; 1479 } sns_gxn_id_req_t; 1480 #define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1481 1482 typedef struct { 1483 uint16_t snscb_rblen; /* response buffer length (words) */ 1484 uint16_t snscb_reserved0; 1485 uint16_t snscb_addr[4]; /* response buffer address */ 1486 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1487 uint16_t snscb_reserved1; 1488 uint16_t snscb_cmd; 1489 uint16_t snscb_mword_div_2; 1490 uint32_t snscb_reserved3; 1491 uint32_t snscb_fc4_type; 1492 } sns_gid_ft_req_t; 1493 #define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1494 1495 typedef struct { 1496 uint16_t snscb_rblen; /* response buffer length (words) */ 1497 uint16_t snscb_reserved0; 1498 uint16_t snscb_addr[4]; /* response buffer address */ 1499 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1500 uint16_t snscb_reserved1; 1501 uint16_t snscb_cmd; 1502 uint16_t snscb_reserved2; 1503 uint32_t snscb_reserved3; 1504 uint32_t snscb_port; 1505 uint32_t snscb_fc4_types[8]; 1506 } sns_rft_id_req_t; 1507 #define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1508 1509 typedef struct { 1510 ct_hdr_t snscb_cthdr; 1511 uint8_t snscb_port_type; 1512 uint8_t snscb_port_id[3]; 1513 uint8_t snscb_portname[8]; 1514 uint16_t snscb_data[]; /* variable data */ 1515 } sns_scrsp_t; /* Subcommand Response Structure */ 1516 1517 typedef struct { 1518 ct_hdr_t snscb_cthdr; 1519 uint8_t snscb_port_type; 1520 uint8_t snscb_port_id[3]; 1521 uint8_t snscb_portname[8]; 1522 uint8_t snscb_pnlen; /* symbolic port name length */ 1523 uint8_t snscb_pname[255]; /* symbolic port name */ 1524 uint8_t snscb_nodename[8]; 1525 uint8_t snscb_nnlen; /* symbolic node name length */ 1526 uint8_t snscb_nname[255]; /* symbolic node name */ 1527 uint8_t snscb_ipassoc[8]; 1528 uint8_t snscb_ipaddr[16]; 1529 uint8_t snscb_svc_class[4]; 1530 uint8_t snscb_fc4_types[32]; 1531 uint8_t snscb_fpname[8]; 1532 uint8_t snscb_reserved; 1533 uint8_t snscb_hardaddr[3]; 1534 } sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1535 #define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1536 1537 typedef struct { 1538 ct_hdr_t snscb_cthdr; 1539 uint8_t snscb_wwn[8]; 1540 } sns_gxn_id_rsp_t; 1541 #define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1542 1543 typedef struct { 1544 ct_hdr_t snscb_cthdr; 1545 uint32_t snscb_fc4_features[32]; 1546 } sns_gff_id_rsp_t; 1547 #define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1548 1549 typedef struct { 1550 ct_hdr_t snscb_cthdr; 1551 struct { 1552 uint8_t control; 1553 uint8_t portid[3]; 1554 } snscb_ports[1]; 1555 } sns_gid_ft_rsp_t; 1556 #define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1557 #define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1558 1559 /* 1560 * Other Misc Structures 1561 */ 1562 1563 /* ELS Pass Through */ 1564 typedef struct { 1565 isphdr_t els_hdr; 1566 uint32_t els_handle; 1567 uint16_t els_status; 1568 uint16_t els_nphdl; 1569 uint16_t els_xmit_dsd_count; /* outgoing only */ 1570 uint8_t els_vphdl; 1571 uint8_t els_sof; 1572 uint32_t els_rxid; 1573 uint16_t els_recv_dsd_count; /* outgoing only */ 1574 uint8_t els_opcode; 1575 uint8_t els_reserved1; 1576 uint8_t els_did_lo; 1577 uint8_t els_did_mid; 1578 uint8_t els_did_hi; 1579 uint8_t els_reserved2; 1580 uint16_t els_reserved3; 1581 uint16_t els_ctl_flags; 1582 union { 1583 struct { 1584 uint32_t _els_bytecnt; 1585 uint32_t _els_subcode1; 1586 uint32_t _els_subcode2; 1587 uint8_t _els_reserved4[20]; 1588 } in; 1589 struct { 1590 uint32_t _els_recv_bytecnt; 1591 uint32_t _els_xmit_bytecnt; 1592 uint32_t _els_xmit_dsd_length; 1593 uint16_t _els_xmit_dsd_a1500; 1594 uint16_t _els_xmit_dsd_a3116; 1595 uint16_t _els_xmit_dsd_a4732; 1596 uint16_t _els_xmit_dsd_a6348; 1597 uint32_t _els_recv_dsd_length; 1598 uint16_t _els_recv_dsd_a1500; 1599 uint16_t _els_recv_dsd_a3116; 1600 uint16_t _els_recv_dsd_a4732; 1601 uint16_t _els_recv_dsd_a6348; 1602 } out; 1603 } inout; 1604 #define els_bytecnt inout.in._els_bytecnt 1605 #define els_subcode1 inout.in._els_subcode1 1606 #define els_subcode2 inout.in._els_subcode2 1607 #define els_reserved4 inout.in._els_reserved4 1608 #define els_recv_bytecnt inout.out._els_recv_bytecnt 1609 #define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1610 #define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1611 #define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1612 #define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1613 #define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1614 #define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1615 #define els_recv_dsd_length inout.out._els_recv_dsd_length 1616 #define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1617 #define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1618 #define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1619 #define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1620 } els_t; 1621 1622 /* 1623 * A handy package structure for running FC-SCSI commands internally 1624 */ 1625 typedef struct { 1626 uint16_t handle; 1627 uint16_t lun; 1628 uint32_t 1629 channel : 8, 1630 portid : 24; 1631 uint32_t timeout; 1632 union { 1633 struct { 1634 uint32_t data_length; 1635 uint32_t 1636 no_wait : 1, 1637 do_read : 1; 1638 uint8_t cdb[16]; 1639 void *data_ptr; 1640 } beg; 1641 struct { 1642 uint32_t data_residual; 1643 uint8_t status; 1644 uint8_t pad; 1645 uint16_t sense_length; 1646 uint8_t sense_data[32]; 1647 } end; 1648 } fcd; 1649 } isp_xcmd_t; 1650 1651 /* 1652 * Target Mode related definitions 1653 */ 1654 #define QLTM_SENSELEN 18 /* non-FC cards only */ 1655 #define QLTM_SVALID 0x80 1656 1657 /* 1658 * Structure for Enable Lun and Modify Lun queue entries 1659 */ 1660 typedef struct { 1661 isphdr_t le_header; 1662 uint32_t le_reserved; 1663 uint8_t le_lun; 1664 uint8_t le_rsvd; 1665 uint8_t le_ops; /* Modify LUN only */ 1666 uint8_t le_tgt; /* Not for FC */ 1667 uint32_t le_flags; /* Not for FC */ 1668 uint8_t le_status; 1669 uint8_t le_reserved2; 1670 uint8_t le_cmd_count; 1671 uint8_t le_in_count; 1672 uint8_t le_cdb6len; /* Not for FC */ 1673 uint8_t le_cdb7len; /* Not for FC */ 1674 uint16_t le_timeout; 1675 uint16_t le_reserved3[20]; 1676 } lun_entry_t; 1677 1678 /* 1679 * le_flags values 1680 */ 1681 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1682 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1683 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1684 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1685 1686 /* 1687 * le_ops values 1688 */ 1689 #define LUN_CCINCR 0x01 /* increment command count */ 1690 #define LUN_CCDECR 0x02 /* decrement command count */ 1691 #define LUN_ININCR 0x40 /* increment immed. notify count */ 1692 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 1693 1694 /* 1695 * le_status values 1696 */ 1697 #define LUN_OK 0x01 /* we be rockin' */ 1698 #define LUN_ERR 0x04 /* request completed with error */ 1699 #define LUN_INVAL 0x06 /* invalid request */ 1700 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 1701 #define LUN_ENABLED 0x3E /* LUN already enabled */ 1702 1703 /* 1704 * Immediate Notify Entry structure 1705 */ 1706 #define IN_MSGLEN 8 /* 8 bytes */ 1707 #define IN_RSVDLEN 8 /* 8 words */ 1708 typedef struct { 1709 isphdr_t in_header; 1710 uint32_t in_reserved; 1711 uint8_t in_lun; /* lun */ 1712 uint8_t in_iid; /* initiator */ 1713 uint8_t in_reserved2; 1714 uint8_t in_tgt; /* target */ 1715 uint32_t in_flags; 1716 uint8_t in_status; 1717 uint8_t in_rsvd2; 1718 uint8_t in_tag_val; /* tag value */ 1719 uint8_t in_tag_type; /* tag type */ 1720 uint16_t in_seqid; /* sequence id */ 1721 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1722 uint16_t in_reserved3[IN_RSVDLEN]; 1723 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1724 } in_entry_t; 1725 1726 typedef struct { 1727 isphdr_t in_header; 1728 uint32_t in_reserved; 1729 uint8_t in_lun; /* lun */ 1730 uint8_t in_iid; /* initiator */ 1731 uint16_t in_scclun; 1732 uint32_t in_reserved2; 1733 uint16_t in_status; 1734 uint16_t in_task_flags; 1735 uint16_t in_seqid; /* sequence id */ 1736 } in_fcentry_t; 1737 1738 typedef struct { 1739 isphdr_t in_header; 1740 uint32_t in_reserved; 1741 uint16_t in_iid; /* initiator */ 1742 uint16_t in_scclun; 1743 uint32_t in_reserved2; 1744 uint16_t in_status; 1745 uint16_t in_task_flags; 1746 uint16_t in_seqid; /* sequence id */ 1747 } in_fcentry_e_t; 1748 1749 /* 1750 * Values for the in_status field 1751 */ 1752 #define IN_REJECT 0x0D /* Message Reject message received */ 1753 #define IN_RESET 0x0E /* Bus Reset occurred */ 1754 #define IN_NO_RCAP 0x16 /* requested capability not available */ 1755 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1756 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1757 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1758 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1759 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1760 #define IN_PORT_CHANGED 0x2A /* port changed */ 1761 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1762 #define IN_NO_NEXUS 0x3B /* Nexus not established */ 1763 1764 /* 1765 * Values for the in_task_flags field- should only get one at a time! 1766 */ 1767 #define TASK_FLAGS_RESERVED_MASK (0xe700) 1768 #define TASK_FLAGS_CLEAR_ACA (1<<14) 1769 #define TASK_FLAGS_TARGET_RESET (1<<13) 1770 #define TASK_FLAGS_LUN_RESET (1<<12) 1771 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1772 #define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1773 1774 /* 1775 * ISP24XX Immediate Notify 1776 */ 1777 typedef struct { 1778 isphdr_t in_header; 1779 uint32_t in_reserved; 1780 uint16_t in_nphdl; 1781 uint16_t in_reserved1; 1782 uint16_t in_flags; 1783 uint16_t in_srr_rxid; 1784 uint16_t in_status; 1785 uint8_t in_status_subcode; 1786 uint8_t in_reserved2; 1787 uint32_t in_rxid; 1788 uint16_t in_srr_reloff_lo; 1789 uint16_t in_srr_reloff_hi; 1790 uint16_t in_srr_iu; 1791 uint16_t in_srr_oxid; 1792 /* 1793 * If bit 2 is set in in_flags, the following 1794 * two tags are valid. If the received ELS is 1795 * a LOGO, then these tags contain the N Port ID 1796 * from the LOGO payload. If the received ELS 1797 * request is TPRLO, these tags contain the 1798 * Third Party Originator N Port ID. 1799 */ 1800 uint16_t in_nport_id_hi; 1801 uint8_t in_nport_id_lo; 1802 uint8_t in_reserved3; 1803 /* 1804 * If bit 2 is set in in_flags, the following 1805 * tag is valid. If the received ELS is a LOGO, 1806 * then this tag contains the n-port handle 1807 * from the LOGO payload. If the received ELS 1808 * request is TPRLO, this tag contain the 1809 * n-port handle for the Third Party Originator. 1810 */ 1811 uint16_t in_np_handle; 1812 uint8_t in_reserved4[12]; 1813 uint8_t in_reserved5; 1814 uint8_t in_vpidx; 1815 uint32_t in_reserved6; 1816 uint16_t in_portid_lo; 1817 uint8_t in_portid_hi; 1818 uint8_t in_reserved7; 1819 uint16_t in_reserved8; 1820 uint16_t in_oxid; 1821 } in_fcentry_24xx_t; 1822 1823 #define IN24XX_FLAG_PUREX_IOCB 0x1 1824 #define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1825 #define IN24XX_FLAG_NPHDL_VALID 0x4 1826 1827 #define IN24XX_LIP_RESET 0x0E 1828 #define IN24XX_LINK_RESET 0x0F 1829 #define IN24XX_PORT_LOGOUT 0x29 1830 #define IN24XX_PORT_CHANGED 0x2A 1831 #define IN24XX_LINK_FAILED 0x2E 1832 #define IN24XX_SRR_RCVD 0x45 1833 #define IN24XX_ELS_RCVD 0x46 /* 1834 * login-affectin ELS received- check 1835 * subcode for specific opcode 1836 */ 1837 1838 /* 1839 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1840 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1841 * Big Endian format. 1842 */ 1843 #define IN24XX_PLOGI_WWNN_OFF 0x20 1844 #define IN24XX_PLOGI_WWPN_OFF 0x28 1845 1846 /* 1847 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1848 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1849 */ 1850 #define IN24XX_LOGO_WWPN_OFF 0x28 1851 1852 /* 1853 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1854 */ 1855 #define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1856 #define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1857 #define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1858 #define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1859 #define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1860 #define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1861 #define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1862 #define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1863 #define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1864 #define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1865 1866 /* 1867 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1868 */ 1869 #define IN24XX_PORT_CHANGED_BADFAN 0x00 1870 #define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1871 #define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1872 #define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1873 #define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1874 #define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1875 1876 /* 1877 * Notify Acknowledge Entry structure 1878 */ 1879 #define NA_RSVDLEN 22 1880 typedef struct { 1881 isphdr_t na_header; 1882 uint32_t na_reserved; 1883 uint8_t na_lun; /* lun */ 1884 uint8_t na_iid; /* initiator */ 1885 uint8_t na_reserved2; 1886 uint8_t na_tgt; /* target */ 1887 uint32_t na_flags; 1888 uint8_t na_status; 1889 uint8_t na_event; 1890 uint16_t na_seqid; /* sequence id */ 1891 uint16_t na_reserved3[NA_RSVDLEN]; 1892 } na_entry_t; 1893 1894 /* 1895 * Value for the na_event field 1896 */ 1897 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 1898 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 1899 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 1900 1901 #define NA2_RSVDLEN 21 1902 typedef struct { 1903 isphdr_t na_header; 1904 uint32_t na_reserved; 1905 uint8_t na_reserved1; 1906 uint8_t na_iid; /* initiator loop id */ 1907 uint16_t na_response; 1908 uint16_t na_flags; 1909 uint16_t na_reserved2; 1910 uint16_t na_status; 1911 uint16_t na_task_flags; 1912 uint16_t na_seqid; /* sequence id */ 1913 uint16_t na_reserved3[NA2_RSVDLEN]; 1914 } na_fcentry_t; 1915 1916 typedef struct { 1917 isphdr_t na_header; 1918 uint32_t na_reserved; 1919 uint16_t na_iid; /* initiator loop id */ 1920 uint16_t na_response; /* response code */ 1921 uint16_t na_flags; 1922 uint16_t na_reserved2; 1923 uint16_t na_status; 1924 uint16_t na_task_flags; 1925 uint16_t na_seqid; /* sequence id */ 1926 uint16_t na_reserved3[NA2_RSVDLEN]; 1927 } na_fcentry_e_t; 1928 1929 #define NAFC_RCOUNT 0x80 /* increment resource count */ 1930 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 1931 #define NAFC_TVALID 0x10 /* task mangement response code is valid */ 1932 1933 /* 1934 * ISP24XX Notify Acknowledge 1935 */ 1936 1937 typedef struct { 1938 isphdr_t na_header; 1939 uint32_t na_handle; 1940 uint16_t na_nphdl; 1941 uint16_t na_reserved1; 1942 uint16_t na_flags; 1943 uint16_t na_srr_rxid; 1944 uint16_t na_status; 1945 uint8_t na_status_subcode; 1946 uint8_t na_reserved2; 1947 uint32_t na_rxid; 1948 uint16_t na_srr_reloff_lo; 1949 uint16_t na_srr_reloff_hi; 1950 uint16_t na_srr_iu; 1951 uint16_t na_srr_flags; 1952 uint8_t na_reserved3[18]; 1953 uint8_t na_reserved4; 1954 uint8_t na_vpidx; 1955 uint8_t na_srr_reject_vunique; 1956 uint8_t na_srr_reject_explanation; 1957 uint8_t na_srr_reject_code; 1958 uint8_t na_reserved5; 1959 uint8_t na_reserved6[6]; 1960 uint16_t na_oxid; 1961 } na_fcentry_24xx_t; 1962 1963 /* 1964 * Accept Target I/O Entry structure 1965 */ 1966 #define ATIO_CDBLEN 26 1967 1968 typedef struct { 1969 isphdr_t at_header; 1970 uint16_t at_reserved; 1971 uint16_t at_handle; 1972 uint8_t at_lun; /* lun */ 1973 uint8_t at_iid; /* initiator */ 1974 uint8_t at_cdblen; /* cdb length */ 1975 uint8_t at_tgt; /* target */ 1976 uint32_t at_flags; 1977 uint8_t at_status; /* firmware status */ 1978 uint8_t at_scsi_status; /* scsi status */ 1979 uint8_t at_tag_val; /* tag value */ 1980 uint8_t at_tag_type; /* tag type */ 1981 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 1982 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 1983 } at_entry_t; 1984 1985 /* 1986 * at_flags values 1987 */ 1988 #define AT_NODISC 0x00008000 /* disconnect disabled */ 1989 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 1990 1991 /* 1992 * at_status values 1993 */ 1994 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 1995 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 1996 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 1997 #define AT_NOCAP 0x16 /* Requested capability not available */ 1998 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 1999 #define AT_CDB 0x3D /* CDB received */ 2000 /* 2001 * Macros to create and fetch and test concatenated handle and tag value macros 2002 * (SPI only) 2003 */ 2004 #define AT_MAKE_TAGID(tid, aep) \ 2005 tid = aep->at_handle; \ 2006 if (aep->at_flags & AT_TQAE) { \ 2007 tid |= (aep->at_tag_val << 16); \ 2008 tid |= (1 << 24); \ 2009 } 2010 2011 #define CT_MAKE_TAGID(tid, ct) \ 2012 tid = ct->ct_fwhandle; \ 2013 if (ct->ct_flags & CT_TQAE) { \ 2014 tid |= (ct->ct_tag_val << 16); \ 2015 tid |= (1 << 24); \ 2016 } 2017 2018 #define AT_HAS_TAG(val) ((val) & (1 << 24)) 2019 #define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2020 #define AT_GET_HANDLE(val) ((val) & 0xffff) 2021 2022 #define IN_MAKE_TAGID(tid, inp) \ 2023 tid = inp->in_seqid; \ 2024 tid |= (inp->in_tag_val << 16); \ 2025 tid |= (1 << 24) 2026 2027 /* 2028 * Accept Target I/O Entry structure, Type 2 2029 */ 2030 #define ATIO2_CDBLEN 16 2031 2032 typedef struct { 2033 isphdr_t at_header; 2034 uint32_t at_reserved; 2035 uint8_t at_lun; /* lun or reserved */ 2036 uint8_t at_iid; /* initiator */ 2037 uint16_t at_rxid; /* response ID */ 2038 uint16_t at_flags; 2039 uint16_t at_status; /* firmware status */ 2040 uint8_t at_crn; /* command reference number */ 2041 uint8_t at_taskcodes; 2042 uint8_t at_taskflags; 2043 uint8_t at_execodes; 2044 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2045 uint32_t at_datalen; /* allocated data len */ 2046 uint16_t at_scclun; /* SCC Lun or reserved */ 2047 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2048 uint16_t at_reserved2[6]; 2049 uint16_t at_oxid; 2050 } at2_entry_t; 2051 2052 typedef struct { 2053 isphdr_t at_header; 2054 uint32_t at_reserved; 2055 uint16_t at_iid; /* initiator */ 2056 uint16_t at_rxid; /* response ID */ 2057 uint16_t at_flags; 2058 uint16_t at_status; /* firmware status */ 2059 uint8_t at_crn; /* command reference number */ 2060 uint8_t at_taskcodes; 2061 uint8_t at_taskflags; 2062 uint8_t at_execodes; 2063 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2064 uint32_t at_datalen; /* allocated data len */ 2065 uint16_t at_scclun; /* SCC Lun or reserved */ 2066 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2067 uint16_t at_reserved2[6]; 2068 uint16_t at_oxid; 2069 } at2e_entry_t; 2070 2071 #define ATIO2_WWPN_OFFSET 0x2A 2072 #define ATIO2_OXID_OFFSET 0x3E 2073 2074 #define ATIO2_TC_ATTR_MASK 0x7 2075 #define ATIO2_TC_ATTR_SIMPLEQ 0 2076 #define ATIO2_TC_ATTR_HEADOFQ 1 2077 #define ATIO2_TC_ATTR_ORDERED 2 2078 #define ATIO2_TC_ATTR_ACAQ 4 2079 #define ATIO2_TC_ATTR_UNTAGGED 5 2080 2081 #define ATIO2_EX_WRITE 0x1 2082 #define ATIO2_EX_READ 0x2 2083 /* 2084 * Macros to create and fetch and test concatenated handle and tag value macros 2085 */ 2086 #define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2087 tid = aep->at_rxid; \ 2088 tid |= (((uint64_t)inst) << 32); \ 2089 tid |= (((uint64_t)bus) << 48) 2090 2091 #define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2092 tid = ct->ct_rxid; \ 2093 tid |= (((uint64_t)inst) << 32); \ 2094 tid |= (((uint64_t)(bus & 0xff)) << 48) 2095 2096 #define AT2_HAS_TAG(val) 1 2097 #define AT2_GET_TAG(val) ((val) & 0xffffffff) 2098 #define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2099 #define AT2_GET_HANDLE AT2_GET_TAG 2100 #define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2101 2102 #define FC_HAS_TAG AT2_HAS_TAG 2103 #define FC_GET_TAG AT2_GET_TAG 2104 #define FC_GET_INST AT2_GET_INST 2105 #define FC_GET_HANDLE AT2_GET_HANDLE 2106 2107 #define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2108 tid = seqid; \ 2109 tid |= (((uint64_t)inst) << 32); \ 2110 tid |= (((uint64_t)(bus & 0xff)) << 48) 2111 2112 #define FC_TAG_INSERT_INST(tid, inst) \ 2113 tid &= ~0x0000ffff00000000ull; \ 2114 tid |= (((uint64_t)inst) << 32) 2115 2116 /* 2117 * 24XX ATIO Definition 2118 * 2119 * This is *quite* different from other entry types. 2120 * First of all, it has its own queue it comes in on. 2121 * 2122 * Secondly, it doesn't have a normal header. 2123 * 2124 * Thirdly, it's just a passthru of the FCP CMND IU 2125 * which is recorded in big endian mode. 2126 */ 2127 typedef struct { 2128 uint8_t at_type; 2129 uint8_t at_count; 2130 /* 2131 * Task attribute in high four bits, 2132 * the rest is the FCP CMND IU Length. 2133 * NB: the command can extend past the 2134 * length for a single queue entry. 2135 */ 2136 uint16_t at_ta_len; 2137 uint32_t at_rxid; 2138 fc_hdr_t at_hdr; 2139 fcp_cmnd_iu_t at_cmnd; 2140 } at7_entry_t; 2141 #define AT7_NORESRC_RXID 0xffffffff 2142 2143 2144 /* 2145 * Continue Target I/O Entry structure 2146 * Request from driver. The response from the 2147 * ISP firmware is the same except that the last 18 2148 * bytes are overwritten by suggested sense data if 2149 * the 'autosense valid' bit is set in the status byte. 2150 */ 2151 typedef struct { 2152 isphdr_t ct_header; 2153 uint16_t ct_syshandle; 2154 uint16_t ct_fwhandle; /* required by f/w */ 2155 uint8_t ct_lun; /* lun */ 2156 uint8_t ct_iid; /* initiator id */ 2157 uint8_t ct_reserved2; 2158 uint8_t ct_tgt; /* our target id */ 2159 uint32_t ct_flags; 2160 uint8_t ct_status; /* isp status */ 2161 uint8_t ct_scsi_status; /* scsi status */ 2162 uint8_t ct_tag_val; /* tag value */ 2163 uint8_t ct_tag_type; /* tag type */ 2164 uint32_t ct_xfrlen; /* transfer length */ 2165 int32_t ct_resid; /* residual length */ 2166 uint16_t ct_timeout; 2167 uint16_t ct_seg_count; 2168 ispds_t ct_dataseg[ISP_RQDSEG]; 2169 } ct_entry_t; 2170 2171 /* 2172 * For some of the dual port SCSI adapters, port (bus #) is reported 2173 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2174 * 2175 * Note that this does not apply to FC adapters at all which can and 2176 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2177 * that have logged in across a SCSI fabric. 2178 */ 2179 #define GET_IID_VAL(x) (x & 0x3f) 2180 #define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2181 #define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2182 #define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2183 2184 /* 2185 * ct_flags values 2186 */ 2187 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2188 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction */ 2189 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction */ 2190 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2191 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2192 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2193 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2194 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2195 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2196 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2197 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2198 2199 /* 2200 * ct_status values 2201 * - set by the firmware when it returns the CTIO 2202 */ 2203 #define CT_OK 0x01 /* completed without error */ 2204 #define CT_ABORTED 0x02 /* aborted by host */ 2205 #define CT_ERR 0x04 /* see sense data for error */ 2206 #define CT_INVAL 0x06 /* request for disabled lun */ 2207 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 2208 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2209 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2210 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2211 #define CT_TIMEOUT 0x0B /* timed out */ 2212 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2213 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2214 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2215 #define CT_PANIC 0x13 /* Unrecoverable Error */ 2216 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2217 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2218 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2219 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2220 #define CT_PORTUNAVAIL 0x28 /* port not available */ 2221 #define CT_LOGOUT 0x29 /* port logout */ 2222 #define CT_PORTCHANGED 0x2A /* port changed */ 2223 #define CT_IDE 0x33 /* Initiator Detected Error */ 2224 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2225 #define CT_SRR 0x45 /* SRR Received */ 2226 #define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2227 2228 #define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2229 2230 /* 2231 * When the firmware returns a CTIO entry, it may overwrite the last 2232 * part of the structure with sense data. This starts at offset 0x2E 2233 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2234 * than define a new struct for this, I'm just using the sense data 2235 * offset. 2236 */ 2237 #define CTIO_SENSE_OFFSET 0x2E 2238 2239 /* 2240 * Entry length in u_longs. All entries are the same size so 2241 * any one will do as the numerator. 2242 */ 2243 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2244 2245 /* 2246 * QLA2100 CTIO (type 2) entry 2247 */ 2248 #define MAXRESPLEN 26 2249 typedef struct { 2250 isphdr_t ct_header; 2251 uint32_t ct_syshandle; 2252 uint8_t ct_lun; /* lun */ 2253 uint8_t ct_iid; /* initiator id */ 2254 uint16_t ct_rxid; /* response ID */ 2255 uint16_t ct_flags; 2256 uint16_t ct_status; /* isp status */ 2257 uint16_t ct_timeout; 2258 uint16_t ct_seg_count; 2259 uint32_t ct_reloff; /* relative offset */ 2260 int32_t ct_resid; /* residual length */ 2261 union { 2262 /* 2263 * The three different modes that the target driver 2264 * can set the CTIO{2,3,4} up as. 2265 * 2266 * The first is for sending FCP_DATA_IUs as well as 2267 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2268 * 2269 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2270 * Note that no FCP_DATA_IUs will be sent. 2271 * 2272 * The third is for sending FCP_RSP_IUs as built specifically 2273 * in system memory as located by the isp_dataseg. 2274 */ 2275 struct { 2276 uint32_t _reserved; 2277 uint16_t _reserved2; 2278 uint16_t ct_scsi_status; 2279 uint32_t ct_xfrlen; 2280 union { 2281 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2282 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2283 ispdslist_t ct_dslist; 2284 } u; 2285 } m0; 2286 struct { 2287 uint16_t _reserved; 2288 uint16_t _reserved2; 2289 uint16_t ct_senselen; 2290 uint16_t ct_scsi_status; 2291 uint16_t ct_resplen; 2292 uint8_t ct_resp[MAXRESPLEN]; 2293 } m1; 2294 struct { 2295 uint32_t _reserved; 2296 uint16_t _reserved2; 2297 uint16_t _reserved3; 2298 uint32_t ct_datalen; 2299 ispds_t ct_fcp_rsp_iudata; 2300 } m2; 2301 } rsp; 2302 } ct2_entry_t; 2303 2304 typedef struct { 2305 isphdr_t ct_header; 2306 uint32_t ct_syshandle; 2307 uint16_t ct_iid; /* initiator id */ 2308 uint16_t ct_rxid; /* response ID */ 2309 uint16_t ct_flags; 2310 uint16_t ct_status; /* isp status */ 2311 uint16_t ct_timeout; 2312 uint16_t ct_seg_count; 2313 uint32_t ct_reloff; /* relative offset */ 2314 int32_t ct_resid; /* residual length */ 2315 union { 2316 struct { 2317 uint32_t _reserved; 2318 uint16_t _reserved2; 2319 uint16_t ct_scsi_status; 2320 uint32_t ct_xfrlen; 2321 union { 2322 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2323 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2324 ispdslist_t ct_dslist; 2325 } u; 2326 } m0; 2327 struct { 2328 uint16_t _reserved; 2329 uint16_t _reserved2; 2330 uint16_t ct_senselen; 2331 uint16_t ct_scsi_status; 2332 uint16_t ct_resplen; 2333 uint8_t ct_resp[MAXRESPLEN]; 2334 } m1; 2335 struct { 2336 uint32_t _reserved; 2337 uint16_t _reserved2; 2338 uint16_t _reserved3; 2339 uint32_t ct_datalen; 2340 ispds_t ct_fcp_rsp_iudata; 2341 } m2; 2342 } rsp; 2343 } ct2e_entry_t; 2344 2345 /* 2346 * ct_flags values for CTIO2 2347 */ 2348 #define CT2_FLAG_MODE0 0x0000 2349 #define CT2_FLAG_MODE1 0x0001 2350 #define CT2_FLAG_MODE2 0x0002 2351 #define CT2_FLAG_MMASK 0x0003 2352 #define CT2_DATA_IN 0x0040 2353 #define CT2_DATA_OUT 0x0080 2354 #define CT2_NO_DATA 0x00C0 2355 #define CT2_DATAMASK 0x00C0 2356 #define CT2_CCINCR 0x0100 2357 #define CT2_FASTPOST 0x0200 2358 #define CT2_CONFIRM 0x2000 2359 #define CT2_TERMINATE 0x4000 2360 #define CT2_SENDSTATUS 0x8000 2361 2362 /* 2363 * ct_status values are (mostly) the same as that for ct_entry. 2364 */ 2365 2366 /* 2367 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2368 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2369 * fields. 2370 */ 2371 #define CT2_RSPLEN_VALID 0x0100 2372 #define CT2_SNSLEN_VALID 0x0200 2373 #define CT2_DATA_OVER 0x0400 2374 #define CT2_DATA_UNDER 0x0800 2375 2376 /* 2377 * ISP24XX CTIO 2378 */ 2379 #define MAXRESPLEN_24XX 24 2380 typedef struct { 2381 isphdr_t ct_header; 2382 uint32_t ct_syshandle; 2383 uint16_t ct_nphdl; /* status on returned CTIOs */ 2384 uint16_t ct_timeout; 2385 uint16_t ct_seg_count; 2386 uint8_t ct_vpidx; 2387 uint8_t ct_xflags; 2388 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2389 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2390 uint8_t ct_reserved; 2391 uint32_t ct_rxid; 2392 uint16_t ct_senselen; /* mode 1 only */ 2393 uint16_t ct_flags; 2394 int32_t ct_resid; /* residual length */ 2395 uint16_t ct_oxid; 2396 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2397 union { 2398 struct { 2399 uint32_t reloff; 2400 uint32_t reserved0; 2401 uint32_t ct_xfrlen; 2402 uint32_t reserved1; 2403 ispds64_t ds; 2404 } m0; 2405 struct { 2406 uint16_t ct_resplen; 2407 uint16_t reserved; 2408 uint8_t ct_resp[MAXRESPLEN_24XX]; 2409 } m1; 2410 struct { 2411 uint32_t reserved0; 2412 uint32_t ct_datalen; 2413 uint32_t reserved1; 2414 ispds64_t ct_fcp_rsp_iudata; 2415 } m2; 2416 } rsp; 2417 } ct7_entry_t; 2418 2419 /* 2420 * ct_flags values for CTIO7 2421 */ 2422 #define CT7_DATA_IN 0x0002 2423 #define CT7_DATA_OUT 0x0001 2424 #define CT7_NO_DATA 0x0000 2425 #define CT7_DATAMASK 0x003 2426 #define CT7_DSD_ENABLE 0x0004 2427 #define CT7_CONF_STSFD 0x0010 2428 #define CT7_EXPLCT_CONF 0x0020 2429 #define CT7_FLAG_MODE0 0x0000 2430 #define CT7_FLAG_MODE1 0x0040 2431 #define CT7_FLAG_MODE2 0x0080 2432 #define CT7_FLAG_MMASK 0x00C0 2433 #define CT7_NOACK 0x0100 2434 #define CT7_TASK_ATTR_SHIFT 9 2435 #define CT7_CONFIRM 0x2000 2436 #define CT7_TERMINATE 0x4000 2437 #define CT7_SENDSTATUS 0x8000 2438 2439 /* 2440 * Type 7 CTIO status codes 2441 */ 2442 #define CT7_OK 0x01 /* completed without error */ 2443 #define CT7_ABORTED 0x02 /* aborted by host */ 2444 #define CT7_ERR 0x04 /* see sense data for error */ 2445 #define CT7_INVAL 0x06 /* request for disabled lun */ 2446 #define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2447 #define CT7_DATA_OVER 0x09 /* Data Overrun */ 2448 #define CT7_TIMEOUT 0x0B /* timed out */ 2449 #define CT7_RESET 0x0E /* LIP Rset Received */ 2450 #define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2451 #define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2452 #define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2453 #define CT7_PORTUNAVAIL 0x28 /* port not available */ 2454 #define CT7_LOGOUT 0x29 /* port logout */ 2455 #define CT7_PORTCHANGED 0x2A /* port changed */ 2456 #define CT7_SRR 0x45 /* SRR Received */ 2457 2458 /* 2459 * Other 24XX related target IOCBs 2460 */ 2461 2462 /* 2463 * ABTS Received 2464 */ 2465 typedef struct { 2466 isphdr_t abts_header; 2467 uint8_t abts_reserved0[6]; 2468 uint16_t abts_nphdl; 2469 uint16_t abts_reserved1; 2470 uint16_t abts_sof; 2471 uint32_t abts_rxid_abts; 2472 uint16_t abts_did_lo; 2473 uint8_t abts_did_hi; 2474 uint8_t abts_r_ctl; 2475 uint16_t abts_sid_lo; 2476 uint8_t abts_sid_hi; 2477 uint8_t abts_cs_ctl; 2478 uint16_t abts_fs_ctl; 2479 uint8_t abts_f_ctl; 2480 uint8_t abts_type; 2481 uint16_t abts_seq_cnt; 2482 uint8_t abts_df_ctl; 2483 uint8_t abts_seq_id; 2484 uint16_t abts_rx_id; 2485 uint16_t abts_ox_id; 2486 uint32_t abts_param; 2487 uint8_t abts_reserved2[16]; 2488 uint32_t abts_rxid_task; 2489 } abts_t; 2490 2491 typedef struct { 2492 isphdr_t abts_rsp_header; 2493 uint32_t abts_rsp_handle; 2494 uint16_t abts_rsp_status; 2495 uint16_t abts_rsp_nphdl; 2496 uint16_t abts_rsp_ctl_flags; 2497 uint16_t abts_rsp_sof; 2498 uint32_t abts_rsp_rxid_abts; 2499 uint16_t abts_rsp_did_lo; 2500 uint8_t abts_rsp_did_hi; 2501 uint8_t abts_rsp_r_ctl; 2502 uint16_t abts_rsp_sid_lo; 2503 uint8_t abts_rsp_sid_hi; 2504 uint8_t abts_rsp_cs_ctl; 2505 uint16_t abts_rsp_f_ctl_lo; 2506 uint8_t abts_rsp_f_ctl_hi; 2507 uint8_t abts_rsp_type; 2508 uint16_t abts_rsp_seq_cnt; 2509 uint8_t abts_rsp_df_ctl; 2510 uint8_t abts_rsp_seq_id; 2511 uint16_t abts_rsp_rx_id; 2512 uint16_t abts_rsp_ox_id; 2513 uint32_t abts_rsp_param; 2514 union { 2515 struct { 2516 uint16_t reserved; 2517 uint8_t last_seq_id; 2518 uint8_t seq_id_valid; 2519 uint16_t aborted_rx_id; 2520 uint16_t aborted_ox_id; 2521 uint16_t high_seq_cnt; 2522 uint16_t low_seq_cnt; 2523 uint8_t reserved2[4]; 2524 } ba_acc; 2525 struct { 2526 uint8_t vendor_unique; 2527 uint8_t explanation; 2528 uint8_t reason; 2529 uint8_t reserved; 2530 uint8_t reserved2[12]; 2531 } ba_rjt; 2532 struct { 2533 uint8_t reserved[8]; 2534 uint32_t subcode1; 2535 uint32_t subcode2; 2536 } rsp; 2537 uint8_t reserved[16]; 2538 } abts_rsp_payload; 2539 uint32_t abts_rsp_rxid_task; 2540 } abts_rsp_t; 2541 2542 /* terminate this ABTS exchange */ 2543 #define ISP24XX_ABTS_RSP_TERMINATE 0x01 2544 2545 #define ISP24XX_ABTS_RSP_COMPLETE 0x00 2546 #define ISP24XX_ABTS_RSP_RESET 0x04 2547 #define ISP24XX_ABTS_RSP_ABORTED 0x05 2548 #define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2549 #define ISP24XX_ABTS_RSP_INVXID 0x08 2550 #define ISP24XX_ABTS_RSP_LOGOUT 0x29 2551 #define ISP24XX_ABTS_RSP_SUBCODE 0x31 2552 2553 #define ISP24XX_NO_TASK 0xffffffff 2554 2555 /* 2556 * Miscellaneous 2557 * 2558 * These are the limits of the number of dma segments we 2559 * can deal with based not on the size of the segment counter 2560 * (which is 16 bits), but on the size of the number of 2561 * queue entries field (which is 8 bits). We assume no 2562 * segments in the first queue entry, so we can either 2563 * have 7 dma segments per continuation entry or 5 2564 * (for 64 bit dma).. multiplying out by 254.... 2565 */ 2566 #define ISP_NSEG_MAX 1778 2567 #define ISP_NSEG64_MAX 1270 2568 2569 #endif /* _ISPMBOX_H */
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