The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/lemacvar.h

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    1 /*      $OpenBSD: lemacvar.h,v 1.4 2009/08/10 22:08:04 deraadt Exp $ */
    2 /*      $NetBSD: lemacvar.h,v 1.6 2001/06/13 10:46:03 wiz Exp $ */
    3 
    4 /*
    5  * Copyright (c) 1997 Matt Thomas <matt@3am-software.com>
    6  * All rights reserved.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. The name of the author may not be used to endorse or promote products
   14  *    derived from this software without specific prior written permission
   15  *
   16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   26  */
   27 
   28 #ifndef _LEMAC_VAR_H
   29 #define _LEMAC_VAR_H
   30 
   31 /*
   32  * Ethernet status, per interface.
   33  */
   34 struct lemac_softc {
   35         struct device sc_dv;
   36         void *sc_ih;
   37         void *sc_ats;
   38         struct arpcom sc_arpcom;        /* Ethernet common part         */
   39         struct ifmedia sc_ifmedia;
   40         bus_space_tag_t sc_iot;
   41         bus_space_tag_t sc_memt;
   42         bus_space_handle_t sc_ioh;
   43         bus_space_handle_t sc_memh;
   44         unsigned sc_flags;
   45 #define LEMAC_PIO_MODE          0x0000U
   46 #define LEMAC_2K_MODE           0x0001U
   47 #define LEMAC_WAS_32K_MODE      0x0002U
   48 #define LEMAC_WAS_64K_MODE      0x0003U
   49 #define LEMAC_MODE_MASK         0x0003U
   50 #define LEMAC_ALLMULTI          0x0010U
   51 #define LEMAC_ALIVE             0x0020U
   52 #define LEMAC_LINKUP            0x0040U
   53         unsigned sc_lastpage;           /* last 2K page */
   54         unsigned sc_txctl;              /* Transmit Control Byte */
   55         unsigned sc_ctlmode;            /* media ctl bits */
   56         struct {
   57                 u_int8_t csr_cs;
   58                 u_int8_t csr_tqc;
   59                 u_int8_t csr_fmq;
   60         } sc_csr;
   61         unsigned sc_laststatus;         /* last read of LEMAC_REG_CS */
   62         u_int16_t sc_mctbl[LEMAC_MCTBL_SIZE/sizeof(u_int16_t)];
   63                                         /* local copy of multicast table */
   64         struct {
   65                 unsigned cntr_txnospc;  /* total # of no transmit memory */
   66                 unsigned cntr_txfull;   /* total # of transmitter full */
   67                 unsigned cntr_tne_intrs;/* total # of transmit done intrs */
   68                 unsigned cntr_rne_intrs;/* total # of receive done intrs */
   69                 unsigned cntr_txd_intrs;/* total # of transmit error intrs */
   70                 unsigned cntr_rxd_intrs;/* total # of receive error intrs */
   71         } sc_cntrs;
   72 
   73         char sc_prodname[LEMAC_EEP_PRDNMSZ+1];  /* product name DE20x-xx */
   74         u_int8_t sc_eeprom[LEMAC_EEP_SIZE];     /* local copy eeprom */
   75 };
   76 
   77 #define sc_if   sc_arpcom.ac_if
   78 
   79 #define LEMAC_IFP_TO_SOFTC(ifp) ((struct lemac_softc *)((ifp)->if_softc))
   80 #define LEMAC_USE_PIO_MODE(sc) \
   81         (((sc->sc_flags & LEMAC_MODE_MASK) == LEMAC_PIO_MODE) || \
   82             (sc->sc_if.if_flags & IFF_LINK0))
   83 
   84 #define LEMAC_OUTB(sc, o, v) \
   85         bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (o), (v))
   86 #define LEMAC_OUTSB(sc, o, l, p) \
   87         bus_space_write_multi_1((sc)->sc_iot, (sc)->sc_ioh, (o), (p), (l))
   88 #define LEMAC_INB(sc, o) \
   89         bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (o))
   90 #define LEMAC_INSB(sc, o, l, p) \
   91         bus_space_read_multi_1((sc)->sc_iot, (sc)->sc_ioh, (o), (p), (l))
   92 
   93 #define LEMAC_PUTBUF8(sc, o, l, p) \
   94         bus_space_write_region_1((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
   95 #define LEMAC_PUTBUF16(sc, o, l, p) \
   96         bus_space_write_raw_region_2((sc)->sc_memt, (sc)->sc_memh, (o), (p), \
   97             (l) << 1)
   98 #define LEMAC_PUTBUF32(sc, o, l, p) \
   99         bus_space_write_raw_region_4((sc)->sc_memt, (sc)->sc_memh, (o), (p), \
  100             (l) << 2)
  101 
  102 #define LEMAC_PUT8(sc, o, v) \
  103         bus_space_write_1((sc)->sc_memt, (sc)->sc_memh, (o), (v))
  104 #define LEMAC_PUT16(sc, o, v) \
  105         bus_space_write_2((sc)->sc_memt, (sc)->sc_memh, (o), htole16(v))
  106 #define LEMAC_PUT32(sc, o, v) \
  107         bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, (o), htole32(v))
  108 
  109 #define LEMAC_GETBUF8(sc, o, l, p) \
  110         bus_space_read_region_1((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
  111 #define LEMAC_GETBUF16(sc, o, l, p) \
  112         bus_space_read_raw_region_2((sc)->sc_memt, (sc)->sc_memh, (o), (p), \
  113             (l) << 1)
  114 #define LEMAC_GETBUF32(sc, o, l, p) \
  115         bus_space_read_raw_region_4((sc)->sc_memt, (sc)->sc_memh, (o), (p), \
  116             (l) << 2)
  117 
  118 #define LEMAC_GET8(sc, o) \
  119         bus_space_read_1((sc)->sc_memt, (sc)->sc_memh, (o))
  120 #define LEMAC_GET16(sc, o) \
  121         letoh16(bus_space_read_2((sc)->sc_memt, (sc)->sc_memh, (o)))
  122 #define LEMAC_GET32(sc, o) \
  123         letoh32(bus_space_read_4((sc)->sc_memt, (sc)->sc_memh, (o)))
  124 
  125 #define LEMAC_INTR_ENABLE(sc) \
  126         LEMAC_OUTB(sc, LEMAC_REG_IC, \
  127             LEMAC_INB(sc, LEMAC_REG_IC) | LEMAC_IC_ALL)
  128 
  129 #define LEMAC_INTR_DISABLE(sc) \
  130         LEMAC_OUTB(sc, LEMAC_REG_IC, \
  131             LEMAC_INB(sc, LEMAC_REG_IC) & ~LEMAC_IC_ALL)
  132 
  133 #define LEMAC_IS_64K_MODE(mbase) (((mbase) >= 0x0A) && ((mbase) <= 0x0F))
  134 #define LEMAC_IS_32K_MODE(mbase) (((mbase) >= 0x14) && ((mbase) <= 0x1F))
  135 #define LEMAC_IS_2K_MODE(mbase) ((mbase) >= 0x40)
  136 
  137 #define LEMAC_DECODEIRQ(i)      ((0xFBA5 >> ((i) >> 3)) & 0x0F)
  138 
  139 #define LEMAC_ADDREQUAL(a1, a2) \
  140         (((u_int16_t *)a1)[0] == ((u_int16_t *)a2)[0] && \
  141             ((u_int16_t *)a1)[1] == ((u_int16_t *)a2)[1] && \
  142             ((u_int16_t *)a1)[2] == ((u_int16_t *)a2)[2])
  143 
  144 #define LEMAC_ADDRBRDCST(a1) \
  145         (((u_int16_t *)a1)[0] == 0xFFFFU &&  \
  146             ((u_int16_t *)a1)[1] == 0xFFFFU && \
  147             ((u_int16_t *)a1)[2] == 0xFFFFU)
  148 
  149 void    lemac_ifattach(struct lemac_softc *);
  150 void    lemac_info_get(const bus_space_tag_t, const bus_space_handle_t,
  151     bus_addr_t *, bus_size_t *, int *);
  152 int     lemac_port_check(const bus_space_tag_t, const bus_space_handle_t);
  153 int     lemac_intr(void *);
  154 
  155 #endif /* _LEMACVAR_H */

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