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sys/dev/ic/mb89352.c
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1 /* $NetBSD: mb89352.c,v 1.38 2005/01/02 12:22:18 tsutsui Exp $ */ 2 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */ 3 4 /*- 5 * Copyright (c) 1996,97,98,99,2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Charles M. Hannum. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * Copyright (c) 1994 Jarle Greipsland 26 * All rights reserved. 27 * 28 * Redistribution and use in source and binary forms, with or without 29 * modification, are permitted provided that the following conditions 30 * are met: 31 * 1. Redistributions of source code must retain the above copyright 32 * notice, this list of conditions and the following disclaimer. 33 * 2. Redistributions in binary form must reproduce the above copyright 34 * notice, this list of conditions and the following disclaimer in the 35 * documentation and/or other materials provided with the distribution. 36 * 3. The name of the author may not be used to endorse or promote products 37 * derived from this software without specific prior written permission. 38 * 39 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 40 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 41 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 42 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 43 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 44 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 47 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 48 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 49 * POSSIBILITY OF SUCH DAMAGE. 50 */ 51 /* 52 * [NetBSD for NEC PC-98 series] 53 * Copyright (c) 1996, 1997, 1998 54 * NetBSD/pc98 porting staff. All rights reserved. 55 * Copyright (c) 1996, 1997, 1998 56 * Kouichi Matsuda. All rights reserved. 57 */ 58 59 /* 60 * Acknowledgements: Many of the algorithms used in this driver are 61 * inspired by the work of Julian Elischer (julian@tfs.com) and 62 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 63 */ 64 65 /* TODO list: 66 * 1) Get the DMA stuff working. 67 * 2) Get the iov/uio stuff working. Is this a good thing ??? 68 * 3) Get the synch stuff working. 69 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.38 2005/01/02 12:22:18 tsutsui Exp $"); 74 75 #ifdef DDB 76 #define integrate 77 #else 78 #define integrate __inline static 79 #endif 80 81 /* 82 * A few customizable items: 83 */ 84 85 /* Synchronous data transfers? */ 86 #define SPC_USE_SYNCHRONOUS 0 87 #define SPC_SYNC_REQ_ACK_OFS 8 88 89 /* Wide data transfers? */ 90 #define SPC_USE_WIDE 0 91 #define SPC_MAX_WIDTH 0 92 93 /* Max attempts made to transmit a message */ 94 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 95 96 /* 97 * Some spin loop parameters (essentially how long to wait some places) 98 * The problem(?) is that sometimes we expect either to be able to transmit a 99 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 100 * returning from the interrupt just to get yanked back for the next byte we 101 * may spin in the interrupt routine waiting for this byte to come. How long? 102 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 103 */ 104 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 105 #define SPC_MSGOUT_SPIN 1 106 107 /* 108 * Include debug functions? At the end of this file there are a bunch of 109 * functions that will print out various information regarding queued SCSI 110 * commands, driver state and chip contents. You can call them from the 111 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the 112 * kernel uses less memory) but you lose the debugging facilities. 113 */ 114 #if 0 115 #define SPC_DEBUG 1 116 #endif 117 118 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */ 119 120 /* threshold length for DMA transfer */ 121 #define SPC_MIN_DMA_LEN 32 122 123 #ifdef x68k /* XXX it seems x68k SPC SCSI hardware has some quirks */ 124 #define NEED_DREQ_ON_HARDWARE_XFER 125 #define NO_MANUAL_XFER 126 #endif 127 128 /* End of customizable parameters */ 129 130 /* 131 * MB89352 SCSI Protocol Controller (SPC) routines. 132 */ 133 134 #include "opt_ddb.h" 135 136 #include <sys/param.h> 137 #include <sys/systm.h> 138 #include <sys/kernel.h> 139 #include <sys/errno.h> 140 #include <sys/ioctl.h> 141 #include <sys/device.h> 142 #include <sys/buf.h> 143 #include <sys/proc.h> 144 #include <sys/user.h> 145 #include <sys/queue.h> 146 147 #include <machine/intr.h> 148 #include <machine/bus.h> 149 150 #include <dev/scsipi/scsi_all.h> 151 #include <dev/scsipi/scsipi_all.h> 152 #include <dev/scsipi/scsi_message.h> 153 #include <dev/scsipi/scsiconf.h> 154 155 #include <dev/ic/mb89352reg.h> 156 #include <dev/ic/mb89352var.h> 157 158 #ifndef DDB 159 #define Debugger() panic("should call debugger here (mb89352.c)") 160 #endif /* ! DDB */ 161 162 #if SPC_DEBUG 163 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */ 164 #endif 165 166 void spc_done(struct spc_softc *, struct spc_acb *); 167 void spc_dequeue(struct spc_softc *, struct spc_acb *); 168 void spc_scsipi_request(struct scsipi_channel *, scsipi_adapter_req_t, 169 void *); 170 int spc_poll(struct spc_softc *, struct scsipi_xfer *, int); 171 integrate void spc_sched_msgout(struct spc_softc *, u_char); 172 integrate void spc_setsync(struct spc_softc *, struct spc_tinfo *); 173 void spc_select(struct spc_softc *, struct spc_acb *); 174 void spc_timeout(void *); 175 void spc_scsi_reset(struct spc_softc *); 176 void spc_reset(struct spc_softc *); 177 void spc_free_acb(struct spc_softc *, struct spc_acb *, int); 178 struct spc_acb* spc_get_acb(struct spc_softc *); 179 int spc_reselect(struct spc_softc *, int); 180 void spc_msgin(struct spc_softc *); 181 void spc_abort(struct spc_softc *, struct spc_acb *); 182 void spc_msgout(struct spc_softc *); 183 int spc_dataout_pio(struct spc_softc *, u_char *, int); 184 int spc_datain_pio(struct spc_softc *, u_char *, int); 185 #if SPC_DEBUG 186 void spc_print_acb(struct spc_acb *); 187 void spc_dump_driver(struct spc_softc *); 188 void spc_dump89352(struct spc_softc *); 189 void spc_show_scsi_cmd(struct spc_acb *); 190 void spc_print_active_acb(void); 191 #endif 192 193 extern struct cfdriver spc_cd; 194 195 /* 196 * INITIALIZATION ROUTINES (probe, attach ++) 197 */ 198 199 /* 200 * Do the real search-for-device. 201 * Prerequisite: sc->sc_iobase should be set to the proper value 202 */ 203 int 204 spc_find(bus_space_tag_t iot, bus_space_handle_t ioh, int bdid) 205 { 206 long timeout = SPC_ABORT_TIMEOUT; 207 208 SPC_TRACE(("spc: probing for spc-chip\n")); 209 /* 210 * Disable interrupts then reset the FUJITSU chip. 211 */ 212 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 213 bus_space_write_1(iot, ioh, SCMD, 0); 214 bus_space_write_1(iot, ioh, PCTL, 0); 215 bus_space_write_1(iot, ioh, TEMP, 0); 216 bus_space_write_1(iot, ioh, TCH, 0); 217 bus_space_write_1(iot, ioh, TCM, 0); 218 bus_space_write_1(iot, ioh, TCL, 0); 219 bus_space_write_1(iot, ioh, INTS, 0); 220 bus_space_write_1(iot, ioh, SCTL, 221 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 222 bus_space_write_1(iot, ioh, BDID, bdid); 223 delay(400); 224 bus_space_write_1(iot, ioh, SCTL, 225 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 226 227 /* The following detection is derived from spc.c 228 * (by Takahide Matsutsuka) in FreeBSD/pccard-test. 229 */ 230 while (bus_space_read_1(iot, ioh, PSNS) && timeout) { 231 timeout--; 232 DELAY(1); 233 } 234 if (timeout == 0) { 235 printf("spc: find failed\n"); 236 return 0; 237 } 238 239 SPC_START(("SPC found")); 240 return 1; 241 } 242 243 void 244 spc_attach(struct spc_softc *sc) 245 { 246 struct scsipi_adapter *adapt = &sc->sc_adapter; 247 struct scsipi_channel *chan = &sc->sc_channel; 248 249 SPC_TRACE(("spc_attach ")); 250 sc->sc_state = SPC_INIT; 251 252 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */ 253 254 #if SPC_USE_SYNCHRONOUS 255 /* 256 * These are the bounds of the sync period, based on the frequency of 257 * the chip's clock input and the size and offset of the sync period 258 * register. 259 * 260 * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a 261 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a 262 * minimum transfer rate. 263 */ 264 sc->sc_minsync = (2 * 250) / sc->sc_freq; 265 sc->sc_maxsync = (9 * 250) / sc->sc_freq; 266 #endif 267 268 /* 269 * Fill in the adapter. 270 */ 271 adapt->adapt_dev = &sc->sc_dev; 272 adapt->adapt_nchannels = 1; 273 adapt->adapt_openings = 7; 274 adapt->adapt_max_periph = 1; 275 adapt->adapt_request = spc_scsipi_request; 276 adapt->adapt_minphys = minphys; 277 278 chan->chan_adapter = &sc->sc_adapter; 279 chan->chan_bustype = &scsi_bustype; 280 chan->chan_channel = 0; 281 chan->chan_ntargets = 8; 282 chan->chan_nluns = 8; 283 chan->chan_id = sc->sc_initiator; 284 285 /* 286 * Add reference to adapter so that we drop the reference after 287 * config_found() to make sure the adatper is disabled. 288 */ 289 if (scsipi_adapter_addref(adapt) != 0) { 290 printf("%s: unable to enable controller\n", 291 sc->sc_dev.dv_xname); 292 return; 293 } 294 295 spc_init(sc, 1); /* Init chip and driver */ 296 297 /* 298 * ask the adapter what subunits are present 299 */ 300 sc->sc_child = config_found(&sc->sc_dev, chan, scsiprint); 301 scsipi_adapter_delref(adapt); 302 } 303 304 int 305 spc_activate(struct device *self, enum devact act) 306 { 307 struct spc_softc *sc = (void *)self; 308 int s, rv = 0; 309 310 s = splhigh(); 311 switch (act) { 312 case DVACT_ACTIVATE: 313 rv = EOPNOTSUPP; 314 break; 315 316 case DVACT_DEACTIVATE: 317 if (sc->sc_child != NULL) 318 rv = config_deactivate(sc->sc_child); 319 break; 320 } 321 splx(s); 322 323 return (rv); 324 } 325 326 int 327 spc_detach(struct device *self, int flags) 328 { 329 struct spc_softc *sc = (void *)self; 330 int rv = 0; 331 332 if (sc->sc_child != NULL) 333 rv = config_detach(sc->sc_child, flags); 334 335 return (rv); 336 } 337 338 /* 339 * Initialize MB89352 chip itself 340 * The following conditions should hold: 341 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc 342 * must be valid. 343 */ 344 void 345 spc_reset(struct spc_softc *sc) 346 { 347 bus_space_tag_t iot = sc->sc_iot; 348 bus_space_handle_t ioh = sc->sc_ioh; 349 350 SPC_TRACE(("spc_reset ")); 351 /* 352 * Disable interrupts then reset the FUJITSU chip. 353 */ 354 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 355 bus_space_write_1(iot, ioh, SCMD, 0); 356 bus_space_write_1(iot, ioh, TMOD, 0); 357 bus_space_write_1(iot, ioh, PCTL, 0); 358 bus_space_write_1(iot, ioh, TEMP, 0); 359 bus_space_write_1(iot, ioh, TCH, 0); 360 bus_space_write_1(iot, ioh, TCM, 0); 361 bus_space_write_1(iot, ioh, TCL, 0); 362 bus_space_write_1(iot, ioh, INTS, 0); 363 bus_space_write_1(iot, ioh, SCTL, 364 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 365 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator); 366 delay(400); 367 bus_space_write_1(iot, ioh, SCTL, 368 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 369 } 370 371 372 /* 373 * Pull the SCSI RST line for 500us. 374 */ 375 void 376 spc_scsi_reset(struct spc_softc *sc) 377 { 378 bus_space_tag_t iot = sc->sc_iot; 379 bus_space_handle_t ioh = sc->sc_ioh; 380 381 SPC_TRACE(("spc_scsi_reset ")); 382 bus_space_write_1(iot, ioh, SCMD, 383 bus_space_read_1(iot, ioh, SCMD) | SCMD_RST); 384 delay(500); 385 bus_space_write_1(iot, ioh, SCMD, 386 bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST); 387 delay(50); 388 } 389 390 /* 391 * Initialize spc SCSI driver. 392 */ 393 void 394 spc_init(struct spc_softc *sc, int bus_reset) 395 { 396 struct spc_acb *acb; 397 int r; 398 399 SPC_TRACE(("spc_init ")); 400 if (bus_reset) { 401 spc_reset(sc); 402 spc_scsi_reset(sc); 403 } 404 spc_reset(sc); 405 406 if (sc->sc_state == SPC_INIT) { 407 /* First time through; initialize. */ 408 TAILQ_INIT(&sc->ready_list); 409 TAILQ_INIT(&sc->nexus_list); 410 TAILQ_INIT(&sc->free_list); 411 sc->sc_nexus = NULL; 412 acb = sc->sc_acb; 413 memset(acb, 0, sizeof(sc->sc_acb)); 414 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) { 415 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain); 416 acb++; 417 } 418 memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 419 } else { 420 /* Cancel any active commands. */ 421 sc->sc_state = SPC_CLEANING; 422 if ((acb = sc->sc_nexus) != NULL) { 423 acb->xs->error = XS_DRIVER_STUFFUP; 424 callout_stop(&acb->xs->xs_callout); 425 spc_done(sc, acb); 426 } 427 while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) { 428 acb->xs->error = XS_DRIVER_STUFFUP; 429 callout_stop(&acb->xs->xs_callout); 430 spc_done(sc, acb); 431 } 432 } 433 434 sc->sc_prevphase = PH_INVALID; 435 for (r = 0; r < 8; r++) { 436 struct spc_tinfo *ti = &sc->sc_tinfo[r]; 437 438 ti->flags = 0; 439 #if SPC_USE_SYNCHRONOUS 440 ti->flags |= DO_SYNC; 441 ti->period = sc->sc_minsync; 442 ti->offset = SPC_SYNC_REQ_ACK_OFS; 443 #else 444 ti->period = ti->offset = 0; 445 #endif 446 #if SPC_USE_WIDE 447 ti->flags |= DO_WIDE; 448 ti->width = SPC_MAX_WIDTH; 449 #else 450 ti->width = 0; 451 #endif 452 } 453 454 sc->sc_state = SPC_IDLE; 455 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL, 456 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB); 457 } 458 459 void 460 spc_free_acb(struct spc_softc *sc, struct spc_acb *acb, int flags) 461 { 462 int s; 463 464 SPC_TRACE(("spc_free_acb ")); 465 s = splbio(); 466 467 acb->flags = 0; 468 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain); 469 splx(s); 470 } 471 472 struct spc_acb * 473 spc_get_acb(struct spc_softc *sc) 474 { 475 struct spc_acb *acb; 476 int s; 477 478 SPC_TRACE(("spc_get_acb ")); 479 s = splbio(); 480 acb = TAILQ_FIRST(&sc->free_list); 481 if (acb != NULL) { 482 TAILQ_REMOVE(&sc->free_list, acb, chain); 483 acb->flags |= ACB_ALLOC; 484 } 485 splx(s); 486 return acb; 487 } 488 489 /* 490 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 491 */ 492 493 /* 494 * Expected sequence: 495 * 1) Command inserted into ready list 496 * 2) Command selected for execution 497 * 3) Command won arbitration and has selected target device 498 * 4) Send message out (identify message, eventually also sync.negotiations) 499 * 5) Send command 500 * 5a) Receive disconnect message, disconnect. 501 * 5b) Reselected by target 502 * 5c) Receive identify message from target. 503 * 6) Send or receive data 504 * 7) Receive status 505 * 8) Receive message (command complete etc.) 506 */ 507 508 /* 509 * Start a SCSI-command 510 * This function is called by the higher level SCSI-driver to queue/run 511 * SCSI-commands. 512 */ 513 void 514 spc_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 515 void *arg) 516 { 517 struct scsipi_xfer *xs; 518 struct scsipi_periph *periph; 519 struct spc_softc *sc = (void *)chan->chan_adapter->adapt_dev; 520 struct spc_acb *acb; 521 int s, flags; 522 523 switch (req) { 524 case ADAPTER_REQ_RUN_XFER: 525 xs = arg; 526 periph = xs->xs_periph; 527 SPC_TRACE(("spc_scsipi_request ")); 528 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 529 periph->periph_target)); 530 531 flags = xs->xs_control; 532 acb = spc_get_acb(sc); 533 #ifdef DIAGNOSTIC 534 /* 535 * This should nerver happen as we track the resources 536 * in the mid-layer. 537 */ 538 if (acb == NULL) { 539 scsipi_printaddr(periph); 540 printf("unable to allocate acb\n"); 541 panic("spc_scsipi_request"); 542 } 543 #endif 544 545 /* Initialize acb */ 546 acb->xs = xs; 547 acb->timeout = xs->timeout; 548 549 if (xs->xs_control & XS_CTL_RESET) { 550 acb->flags |= ACB_RESET; 551 acb->scsipi_cmd_length = 0; 552 acb->data_length = 0; 553 } else { 554 memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen); 555 acb->scsipi_cmd_length = xs->cmdlen; 556 acb->data_addr = xs->data; 557 acb->data_length = xs->datalen; 558 } 559 acb->target_stat = 0; 560 561 s = splbio(); 562 563 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain); 564 /* 565 * Start scheduling unless a queue process is in progress. 566 */ 567 if (sc->sc_state == SPC_IDLE) 568 spc_sched(sc); 569 /* 570 * After successful sending, check if we should return just now. 571 * If so, return SUCCESSFULLY_QUEUED. 572 */ 573 574 splx(s); 575 576 if ((flags & XS_CTL_POLL) == 0) 577 return; 578 579 /* Not allowed to use interrupts, use polling instead */ 580 s = splbio(); 581 if (spc_poll(sc, xs, acb->timeout)) { 582 spc_timeout(acb); 583 if (spc_poll(sc, xs, acb->timeout)) 584 spc_timeout(acb); 585 } 586 splx(s); 587 return; 588 case ADAPTER_REQ_GROW_RESOURCES: 589 /* XXX Not supported. */ 590 return; 591 case ADAPTER_REQ_SET_XFER_MODE: 592 { 593 /* 594 * We don't support Sync, Wide, or Tagged Command Queuing. 595 * Just callback now, to report this. 596 */ 597 struct scsipi_xfer_mode *xm = arg; 598 599 xm->xm_mode = 0; 600 xm->xm_period = 0; 601 xm->xm_offset = 0; 602 scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm); 603 return; 604 } 605 } 606 } 607 608 /* 609 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 610 */ 611 int 612 spc_poll(struct spc_softc *sc, struct scsipi_xfer *xs, int count) 613 { 614 bus_space_tag_t iot = sc->sc_iot; 615 bus_space_handle_t ioh = sc->sc_ioh; 616 617 SPC_TRACE(("spc_poll ")); 618 while (count) { 619 /* 620 * If we had interrupts enabled, would we 621 * have got an interrupt? 622 */ 623 if (bus_space_read_1(iot, ioh, INTS) != 0) 624 spc_intr(sc); 625 if ((xs->xs_status & XS_STS_DONE) != 0) 626 return 0; 627 delay(1000); 628 count--; 629 } 630 return 1; 631 } 632 633 /* 634 * LOW LEVEL SCSI UTILITIES 635 */ 636 637 integrate void 638 spc_sched_msgout(struct spc_softc *sc, u_char m) 639 { 640 bus_space_tag_t iot = sc->sc_iot; 641 bus_space_handle_t ioh = sc->sc_ioh; 642 643 SPC_TRACE(("spc_sched_msgout ")); 644 if (sc->sc_msgpriq == 0) 645 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 646 sc->sc_msgpriq |= m; 647 } 648 649 /* 650 * Set synchronous transfer offset and period. 651 */ 652 integrate void 653 spc_setsync(struct spc_softc *sc, struct spc_tinfo *ti) 654 { 655 #if SPC_USE_SYNCHRONOUS 656 bus_space_tag_t iot = sc->sc_iot; 657 bus_space_handle_t ioh = sc->sc_ioh; 658 659 SPC_TRACE(("spc_setsync ")); 660 if (ti->offset != 0) 661 bus_space_write_1(iot, ioh, TMOD, 662 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset); 663 else 664 bus_space_write_1(iot, ioh, TMOD, 0); 665 #endif 666 } 667 668 /* 669 * Start a selection. This is used by spc_sched() to select an idle target. 670 */ 671 void 672 spc_select(struct spc_softc *sc, struct spc_acb *acb) 673 { 674 struct scsipi_periph *periph = acb->xs->xs_periph; 675 int target = periph->periph_target; 676 struct spc_tinfo *ti = &sc->sc_tinfo[target]; 677 bus_space_tag_t iot = sc->sc_iot; 678 bus_space_handle_t ioh = sc->sc_ioh; 679 680 SPC_TRACE(("spc_select ")); 681 spc_setsync(sc, ti); 682 683 #if 0 684 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 685 #endif 686 687 bus_space_write_1(iot, ioh, PCTL, 0); 688 bus_space_write_1(iot, ioh, TEMP, 689 (1 << sc->sc_initiator) | (1 << target)); 690 /* 691 * Setup BSY timeout (selection timeout). 692 * 250ms according to the SCSI specification. 693 * T = (X * 256 + 15) * Tclf * 2 (Tclf = 200ns on x68k) 694 * To setup 256ms timeout, 695 * 128000ns/200ns = X * 256 + 15 696 * 640 - 15 = X * 256 697 * X = 625 / 256 698 * X = 2 + 113 / 256 699 * ==> tch = 2, tcm = 113 (correct?) 700 */ 701 /* Time to the information transfer phase start. */ 702 /* XXX These values should be calculated from sc_freq */ 703 bus_space_write_1(iot, ioh, TCH, 2); 704 bus_space_write_1(iot, ioh, TCM, 113); 705 bus_space_write_1(iot, ioh, TCL, 3); 706 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT); 707 708 sc->sc_state = SPC_SELECTING; 709 } 710 711 int 712 spc_reselect(struct spc_softc *sc, int message) 713 { 714 u_char selid, target, lun; 715 struct spc_acb *acb; 716 struct scsipi_periph *periph; 717 struct spc_tinfo *ti; 718 719 SPC_TRACE(("spc_reselect ")); 720 /* 721 * The SCSI chip made a snapshot of the data bus while the reselection 722 * was being negotiated. This enables us to determine which target did 723 * the reselect. 724 */ 725 selid = sc->sc_selid & ~(1 << sc->sc_initiator); 726 if (selid & (selid - 1)) { 727 printf("%s: reselect with invalid selid %02x; " 728 "sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid); 729 SPC_BREAK(); 730 goto reset; 731 } 732 733 /* 734 * Search wait queue for disconnected cmd 735 * The list should be short, so I haven't bothered with 736 * any more sophisticated structures than a simple 737 * singly linked list. 738 */ 739 target = ffs(selid) - 1; 740 lun = message & 0x07; 741 TAILQ_FOREACH(acb, &sc->nexus_list, chain) { 742 periph = acb->xs->xs_periph; 743 if (periph->periph_target == target && 744 periph->periph_lun == lun) 745 break; 746 } 747 if (acb == NULL) { 748 printf("%s: reselect from target %d lun %d with no nexus; " 749 "sending ABORT\n", sc->sc_dev.dv_xname, target, lun); 750 SPC_BREAK(); 751 goto abort; 752 } 753 754 /* Make this nexus active again. */ 755 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 756 sc->sc_state = SPC_CONNECTED; 757 sc->sc_nexus = acb; 758 ti = &sc->sc_tinfo[target]; 759 ti->lubusy |= (1 << lun); 760 spc_setsync(sc, ti); 761 762 if (acb->flags & ACB_RESET) 763 spc_sched_msgout(sc, SEND_DEV_RESET); 764 else if (acb->flags & ACB_ABORT) 765 spc_sched_msgout(sc, SEND_ABORT); 766 767 /* Do an implicit RESTORE POINTERS. */ 768 sc->sc_dp = acb->data_addr; 769 sc->sc_dleft = acb->data_length; 770 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 771 sc->sc_cleft = acb->scsipi_cmd_length; 772 773 return (0); 774 775 reset: 776 spc_sched_msgout(sc, SEND_DEV_RESET); 777 return (1); 778 779 abort: 780 spc_sched_msgout(sc, SEND_ABORT); 781 return (1); 782 } 783 784 /* 785 * Schedule a SCSI operation. This has now been pulled out of the interrupt 786 * handler so that we may call it from spc_scsi_cmd and spc_done. This may 787 * save us an unnecessary interrupt just to get things going. Should only be 788 * called when state == SPC_IDLE and at bio pl. 789 */ 790 void 791 spc_sched(struct spc_softc *sc) 792 { 793 struct spc_acb *acb; 794 struct scsipi_periph *periph; 795 struct spc_tinfo *ti; 796 797 /* missing the hw, just return and wait for our hw */ 798 if (sc->sc_flags & SPC_INACTIVE) 799 return; 800 SPC_TRACE(("spc_sched ")); 801 /* 802 * Find first acb in ready queue that is for a target/lunit pair that 803 * is not busy. 804 */ 805 TAILQ_FOREACH(acb, &sc->ready_list, chain) { 806 periph = acb->xs->xs_periph; 807 ti = &sc->sc_tinfo[periph->periph_target]; 808 if ((ti->lubusy & (1 << periph->periph_lun)) == 0) { 809 SPC_MISC(("selecting %d:%d ", 810 periph->periph_target, periph->periph_lun)); 811 TAILQ_REMOVE(&sc->ready_list, acb, chain); 812 sc->sc_nexus = acb; 813 spc_select(sc, acb); 814 return; 815 } else 816 SPC_MISC(("%d:%d busy\n", 817 periph->periph_target, periph->periph_lun)); 818 } 819 SPC_MISC(("idle ")); 820 /* Nothing to start; just enable reselections and wait. */ 821 } 822 823 /* 824 * POST PROCESSING OF SCSI_CMD (usually current) 825 */ 826 void 827 spc_done(struct spc_softc *sc, struct spc_acb *acb) 828 { 829 struct scsipi_xfer *xs = acb->xs; 830 struct scsipi_periph *periph = xs->xs_periph; 831 struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 832 833 SPC_TRACE(("spc_done ")); 834 835 if (xs->error == XS_NOERROR) { 836 if (acb->flags & ACB_ABORT) { 837 xs->error = XS_DRIVER_STUFFUP; 838 } else { 839 switch (acb->target_stat) { 840 case SCSI_CHECK: 841 /* First, save the return values */ 842 xs->resid = acb->data_length; 843 /* FALLTHROUGH */ 844 case SCSI_BUSY: 845 xs->status = acb->target_stat; 846 xs->error = XS_BUSY; 847 break; 848 case SCSI_OK: 849 xs->resid = acb->data_length; 850 break; 851 default: 852 xs->error = XS_DRIVER_STUFFUP; 853 #if SPC_DEBUG 854 printf("%s: spc_done: bad stat 0x%x\n", 855 sc->sc_dev.dv_xname, acb->target_stat); 856 #endif 857 break; 858 } 859 } 860 } 861 862 #if SPC_DEBUG 863 if ((spc_debug & SPC_SHOWMISC) != 0) { 864 if (xs->resid != 0) 865 printf("resid=%d ", xs->resid); 866 else 867 printf("error=%d\n", xs->error); 868 } 869 #endif 870 871 /* 872 * Remove the ACB from whatever queue it happens to be on. 873 */ 874 if (acb->flags & ACB_NEXUS) 875 ti->lubusy &= ~(1 << periph->periph_lun); 876 if (acb == sc->sc_nexus) { 877 sc->sc_nexus = NULL; 878 sc->sc_state = SPC_IDLE; 879 spc_sched(sc); 880 } else 881 spc_dequeue(sc, acb); 882 883 spc_free_acb(sc, acb, xs->xs_control); 884 ti->cmds++; 885 scsipi_done(xs); 886 } 887 888 void 889 spc_dequeue(struct spc_softc *sc, struct spc_acb *acb) 890 { 891 892 SPC_TRACE(("spc_dequeue ")); 893 if (acb->flags & ACB_NEXUS) 894 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 895 else 896 TAILQ_REMOVE(&sc->ready_list, acb, chain); 897 } 898 899 /* 900 * INTERRUPT/PROTOCOL ENGINE 901 */ 902 903 /* 904 * Precondition: 905 * The SCSI bus is already in the MSGI phase and there is a message byte 906 * on the bus, along with an asserted REQ signal. 907 */ 908 void 909 spc_msgin(struct spc_softc *sc) 910 { 911 bus_space_tag_t iot = sc->sc_iot; 912 bus_space_handle_t ioh = sc->sc_ioh; 913 int n; 914 uint8_t msg; 915 916 SPC_TRACE(("spc_msgin ")); 917 918 if (sc->sc_prevphase == PH_MSGIN) { 919 /* This is a continuation of the previous message. */ 920 n = sc->sc_imp - sc->sc_imess; 921 goto nextbyte; 922 } 923 924 /* This is a new MESSAGE IN phase. Clean up our state. */ 925 sc->sc_flags &= ~SPC_DROP_MSGIN; 926 927 nextmsg: 928 n = 0; 929 sc->sc_imp = &sc->sc_imess[n]; 930 931 nextbyte: 932 /* 933 * Read a whole message, but don't ack the last byte. If we reject the 934 * message, we have to assert ATN during the message transfer phase 935 * itself. 936 */ 937 for (;;) { 938 #ifdef NO_MANUAL_XFER /* XXX */ 939 if (bus_space_read_1(iot, ioh, INTS) != 0) { 940 /* 941 * Target left MESSAGE IN, probably because it 942 * a) noticed our ATN signal, or 943 * b) ran out of messages. 944 */ 945 goto out; 946 } 947 #endif 948 /* If parity error, just dump everything on the floor. */ 949 if ((bus_space_read_1(iot, ioh, SERR) & 950 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) { 951 sc->sc_flags |= SPC_DROP_MSGIN; 952 spc_sched_msgout(sc, SEND_PARITY_ERROR); 953 } 954 955 #ifdef NO_MANUAL_XFER /* XXX */ 956 /* send TRANSFER command. */ 957 bus_space_write_1(iot, ioh, TCH, 0); 958 bus_space_write_1(iot, ioh, TCM, 0); 959 bus_space_write_1(iot, ioh, TCL, 1); 960 bus_space_write_1(iot, ioh, PCTL, 961 sc->sc_phase | PCTL_BFINT_ENAB); 962 #ifdef NEED_DREQ_ON_HARDWARE_XFER 963 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); 964 #else 965 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); 966 #endif 967 for (;;) { 968 if ((bus_space_read_1(iot, ioh, SSTS) & 969 SSTS_DREG_EMPTY) == 0) 970 break; 971 if (bus_space_read_1(iot, ioh, INTS) != 0) 972 goto out; 973 } 974 msg = bus_space_read_1(iot, ioh, DREG); 975 #else 976 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0) 977 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 978 bus_space_write_1(iot, ioh, PCTL, PCTL_BFINT_ENAB | PH_MSGIN); 979 980 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) { 981 if ((bus_space_read_1(iot, ioh, PSNS) & PH_MASK) 982 != PH_MSGIN || 983 bus_space_read_1(iot, ioh, INTS) != 0) 984 /* 985 * Target left MESSAGE IN, probably because it 986 * a) noticed our ATN signal, or 987 * b) ran out of messages. 988 */ 989 goto out; 990 DELAY(1); /* XXX needs timeout */ 991 } 992 993 msg = bus_space_read_1(iot, ioh, TEMP); 994 #endif 995 996 /* Gather incoming message bytes if needed. */ 997 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) { 998 if (n >= SPC_MAX_MSG_LEN) { 999 sc->sc_flags |= SPC_DROP_MSGIN; 1000 spc_sched_msgout(sc, SEND_REJECT); 1001 } else { 1002 *sc->sc_imp++ = msg; 1003 n++; 1004 /* 1005 * This testing is suboptimal, but most 1006 * messages will be of the one byte variety, so 1007 * it should not affect performance 1008 * significantly. 1009 */ 1010 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0])) 1011 break; 1012 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0])) 1013 break; 1014 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) && 1015 n == sc->sc_imess[1] + 2) 1016 break; 1017 } 1018 } 1019 /* 1020 * If we reach this spot we're either: 1021 * a) in the middle of a multi-byte message, or 1022 * b) dropping bytes. 1023 */ 1024 1025 #ifndef NO_MANUAL_XFER /* XXX */ 1026 /* Ack the last byte read. */ 1027 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK); 1028 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1029 DELAY(1); /* XXX needs timeout */ 1030 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1031 #endif 1032 } 1033 1034 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1035 1036 /* We now have a complete message. Parse it. */ 1037 switch (sc->sc_state) { 1038 struct spc_acb *acb; 1039 struct scsipi_periph *periph; 1040 struct spc_tinfo *ti; 1041 1042 case SPC_CONNECTED: 1043 SPC_ASSERT(sc->sc_nexus != NULL); 1044 acb = sc->sc_nexus; 1045 ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target]; 1046 1047 switch (sc->sc_imess[0]) { 1048 case MSG_CMDCOMPLETE: 1049 if (sc->sc_dleft < 0) { 1050 periph = acb->xs->xs_periph; 1051 printf("%s: %ld extra bytes from %d:%d\n", 1052 sc->sc_dev.dv_xname, (long)-sc->sc_dleft, 1053 periph->periph_target, periph->periph_lun); 1054 sc->sc_dleft = 0; 1055 } 1056 acb->xs->resid = acb->data_length = sc->sc_dleft; 1057 sc->sc_state = SPC_CMDCOMPLETE; 1058 break; 1059 1060 case MSG_PARITY_ERROR: 1061 /* Resend the last message. */ 1062 spc_sched_msgout(sc, sc->sc_lastmsg); 1063 break; 1064 1065 case MSG_MESSAGE_REJECT: 1066 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg)); 1067 switch (sc->sc_lastmsg) { 1068 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1069 case SEND_IDENTIFY: 1070 ti->flags &= ~(DO_SYNC | DO_WIDE); 1071 ti->period = ti->offset = 0; 1072 spc_setsync(sc, ti); 1073 ti->width = 0; 1074 break; 1075 #endif 1076 #if SPC_USE_SYNCHRONOUS 1077 case SEND_SDTR: 1078 ti->flags &= ~DO_SYNC; 1079 ti->period = ti->offset = 0; 1080 spc_setsync(sc, ti); 1081 break; 1082 #endif 1083 #if SPC_USE_WIDE 1084 case SEND_WDTR: 1085 ti->flags &= ~DO_WIDE; 1086 ti->width = 0; 1087 break; 1088 #endif 1089 case SEND_INIT_DET_ERR: 1090 spc_sched_msgout(sc, SEND_ABORT); 1091 break; 1092 } 1093 break; 1094 1095 case MSG_NOOP: 1096 break; 1097 1098 case MSG_DISCONNECT: 1099 ti->dconns++; 1100 sc->sc_state = SPC_DISCONNECT; 1101 break; 1102 1103 case MSG_SAVEDATAPOINTER: 1104 acb->data_addr = sc->sc_dp; 1105 acb->data_length = sc->sc_dleft; 1106 break; 1107 1108 case MSG_RESTOREPOINTERS: 1109 sc->sc_dp = acb->data_addr; 1110 sc->sc_dleft = acb->data_length; 1111 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 1112 sc->sc_cleft = acb->scsipi_cmd_length; 1113 break; 1114 1115 case MSG_EXTENDED: 1116 switch (sc->sc_imess[2]) { 1117 #if SPC_USE_SYNCHRONOUS 1118 case MSG_EXT_SDTR: 1119 if (sc->sc_imess[1] != 3) 1120 goto reject; 1121 ti->period = sc->sc_imess[3]; 1122 ti->offset = sc->sc_imess[4]; 1123 ti->flags &= ~DO_SYNC; 1124 if (ti->offset == 0) { 1125 } else if (ti->period < sc->sc_minsync || 1126 ti->period > sc->sc_maxsync || 1127 ti->offset > 8) { 1128 ti->period = ti->offset = 0; 1129 spc_sched_msgout(sc, SEND_SDTR); 1130 } else { 1131 scsipi_printaddr(acb->xs->xs_periph); 1132 printf("sync, offset %d, " 1133 "period %dnsec\n", 1134 ti->offset, ti->period * 4); 1135 } 1136 spc_setsync(sc, ti); 1137 break; 1138 #endif 1139 1140 #if SPC_USE_WIDE 1141 case MSG_EXT_WDTR: 1142 if (sc->sc_imess[1] != 2) 1143 goto reject; 1144 ti->width = sc->sc_imess[3]; 1145 ti->flags &= ~DO_WIDE; 1146 if (ti->width == 0) { 1147 } else if (ti->width > SPC_MAX_WIDTH) { 1148 ti->width = 0; 1149 spc_sched_msgout(sc, SEND_WDTR); 1150 } else { 1151 scsipi_printaddr(acb->xs->xs_periph); 1152 printf("wide, width %d\n", 1153 1 << (3 + ti->width)); 1154 } 1155 break; 1156 #endif 1157 1158 default: 1159 printf("%s: unrecognized MESSAGE EXTENDED; " 1160 "sending REJECT\n", sc->sc_dev.dv_xname); 1161 SPC_BREAK(); 1162 goto reject; 1163 } 1164 break; 1165 1166 default: 1167 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1168 sc->sc_dev.dv_xname); 1169 SPC_BREAK(); 1170 reject: 1171 spc_sched_msgout(sc, SEND_REJECT); 1172 break; 1173 } 1174 break; 1175 1176 case SPC_RESELECTED: 1177 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { 1178 printf("%s: reselect without IDENTIFY; " 1179 "sending DEVICE RESET\n", sc->sc_dev.dv_xname); 1180 SPC_BREAK(); 1181 goto reset; 1182 } 1183 1184 (void) spc_reselect(sc, sc->sc_imess[0]); 1185 break; 1186 1187 default: 1188 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1189 sc->sc_dev.dv_xname); 1190 SPC_BREAK(); 1191 reset: 1192 spc_sched_msgout(sc, SEND_DEV_RESET); 1193 break; 1194 1195 #ifdef notdef 1196 abort: 1197 spc_sched_msgout(sc, SEND_ABORT); 1198 break; 1199 #endif 1200 } 1201 1202 #ifndef NO_MANUAL_XFER /* XXX */ 1203 /* Ack the last message byte. */ 1204 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK); 1205 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1206 DELAY(1); /* XXX needs timeout */ 1207 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1208 #endif 1209 1210 /* Go get the next message, if any. */ 1211 goto nextmsg; 1212 1213 out: 1214 #ifdef NO_MANUAL_XFER /* XXX */ 1215 /* Ack the last message byte. */ 1216 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1217 #endif 1218 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1219 } 1220 1221 /* 1222 * Send the highest priority, scheduled message. 1223 */ 1224 void 1225 spc_msgout(struct spc_softc *sc) 1226 { 1227 bus_space_tag_t iot = sc->sc_iot; 1228 bus_space_handle_t ioh = sc->sc_ioh; 1229 #if SPC_USE_SYNCHRONOUS 1230 struct spc_tinfo *ti; 1231 #endif 1232 int n; 1233 1234 SPC_TRACE(("spc_msgout ")); 1235 1236 if (sc->sc_prevphase == PH_MSGOUT) { 1237 if (sc->sc_omp == sc->sc_omess) { 1238 /* 1239 * This is a retransmission. 1240 * 1241 * We get here if the target stayed in MESSAGE OUT 1242 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates 1243 * that all of the previously transmitted messages must 1244 * be sent again, in the same order. Therefore, we 1245 * requeue all the previously transmitted messages, and 1246 * start again from the top. Our simple priority 1247 * scheme keeps the messages in the right order. 1248 */ 1249 SPC_MISC(("retransmitting ")); 1250 sc->sc_msgpriq |= sc->sc_msgoutq; 1251 /* 1252 * Set ATN. If we're just sending a trivial 1-byte 1253 * message, we'll clear ATN later on anyway. 1254 */ 1255 bus_space_write_1(iot, ioh, SCMD, 1256 SCMD_SET_ATN); /* XXX? */ 1257 } else { 1258 /* This is a continuation of the previous message. */ 1259 n = sc->sc_omp - sc->sc_omess; 1260 goto nextbyte; 1261 } 1262 } 1263 1264 /* No messages transmitted so far. */ 1265 sc->sc_msgoutq = 0; 1266 sc->sc_lastmsg = 0; 1267 1268 nextmsg: 1269 /* Pick up highest priority message. */ 1270 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq; 1271 sc->sc_msgpriq &= ~sc->sc_currmsg; 1272 sc->sc_msgoutq |= sc->sc_currmsg; 1273 1274 /* Build the outgoing message data. */ 1275 switch (sc->sc_currmsg) { 1276 case SEND_IDENTIFY: 1277 SPC_ASSERT(sc->sc_nexus != NULL); 1278 sc->sc_omess[0] = 1279 MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1); 1280 n = 1; 1281 break; 1282 1283 #if SPC_USE_SYNCHRONOUS 1284 case SEND_SDTR: 1285 SPC_ASSERT(sc->sc_nexus != NULL); 1286 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1287 sc->sc_omess[4] = MSG_EXTENDED; 1288 sc->sc_omess[3] = MSG_EXT_SDTR_LEN; 1289 sc->sc_omess[2] = MSG_EXT_SDTR; 1290 sc->sc_omess[1] = ti->period >> 2; 1291 sc->sc_omess[0] = ti->offset; 1292 n = 5; 1293 break; 1294 #endif 1295 1296 #if SPC_USE_WIDE 1297 case SEND_WDTR: 1298 SPC_ASSERT(sc->sc_nexus != NULL); 1299 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1300 sc->sc_omess[3] = MSG_EXTENDED; 1301 sc->sc_omess[2] = MSG_EXT_WDTR_LEN; 1302 sc->sc_omess[1] = MSG_EXT_WDTR; 1303 sc->sc_omess[0] = ti->width; 1304 n = 4; 1305 break; 1306 #endif 1307 1308 case SEND_DEV_RESET: 1309 sc->sc_flags |= SPC_ABORTING; 1310 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1311 n = 1; 1312 break; 1313 1314 case SEND_REJECT: 1315 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1316 n = 1; 1317 break; 1318 1319 case SEND_PARITY_ERROR: 1320 sc->sc_omess[0] = MSG_PARITY_ERROR; 1321 n = 1; 1322 break; 1323 1324 case SEND_INIT_DET_ERR: 1325 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1326 n = 1; 1327 break; 1328 1329 case SEND_ABORT: 1330 sc->sc_flags |= SPC_ABORTING; 1331 sc->sc_omess[0] = MSG_ABORT; 1332 n = 1; 1333 break; 1334 1335 default: 1336 printf("%s: unexpected MESSAGE OUT; sending NOOP\n", 1337 sc->sc_dev.dv_xname); 1338 SPC_BREAK(); 1339 sc->sc_omess[0] = MSG_NOOP; 1340 n = 1; 1341 break; 1342 } 1343 sc->sc_omp = &sc->sc_omess[n]; 1344 1345 nextbyte: 1346 /* Send message bytes. */ 1347 /* send TRANSFER command. */ 1348 bus_space_write_1(iot, ioh, TCH, n >> 16); 1349 bus_space_write_1(iot, ioh, TCM, n >> 8); 1350 bus_space_write_1(iot, ioh, TCL, n); 1351 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1352 #ifdef NEED_DREQ_ON_HARDWARE_XFER 1353 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1354 #else 1355 bus_space_write_1(iot, ioh, SCMD, 1356 SCMD_XFR | SCMD_PROG_XFR); 1357 #endif 1358 for (;;) { 1359 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1360 break; 1361 if (bus_space_read_1(iot, ioh, INTS) != 0) 1362 goto out; 1363 } 1364 for (;;) { 1365 #if 0 1366 for (;;) { 1367 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1368 break; 1369 /* Wait for REQINIT. XXX Need timeout. */ 1370 } 1371 #endif 1372 if (bus_space_read_1(iot, ioh, INTS) != 0) { 1373 /* 1374 * Target left MESSAGE OUT, possibly to reject 1375 * our message. 1376 * 1377 * If this is the last message being sent, then we 1378 * deassert ATN, since either the target is going to 1379 * ignore this message, or it's going to ask for a 1380 * retransmission via MESSAGE PARITY ERROR (in which 1381 * case we reassert ATN anyway). 1382 */ 1383 #if 0 1384 if (sc->sc_msgpriq == 0) 1385 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1386 #endif 1387 goto out; 1388 } 1389 1390 #if 0 1391 /* Clear ATN before last byte if this is the last message. */ 1392 if (n == 1 && sc->sc_msgpriq == 0) 1393 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1394 #endif 1395 1396 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0) 1397 DELAY(1); 1398 /* Send message byte. */ 1399 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp); 1400 --n; 1401 /* Keep track of the last message we've sent any bytes of. */ 1402 sc->sc_lastmsg = sc->sc_currmsg; 1403 #if 0 1404 /* Wait for ACK to be negated. XXX Need timeout. */ 1405 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 1406 ; 1407 #endif 1408 1409 if (n == 0) 1410 break; 1411 } 1412 1413 /* We get here only if the entire message has been transmitted. */ 1414 if (sc->sc_msgpriq != 0) { 1415 /* There are more outgoing messages. */ 1416 goto nextmsg; 1417 } 1418 1419 /* 1420 * The last message has been transmitted. We need to remember the last 1421 * message transmitted (in case the target switches to MESSAGE IN phase 1422 * and sends a MESSAGE REJECT), and the list of messages transmitted 1423 * this time around (in case the target stays in MESSAGE OUT phase to 1424 * request a retransmit). 1425 */ 1426 1427 out: 1428 /* Disable REQ/ACK protocol. */ 1429 return; 1430 } 1431 1432 /* 1433 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc 1434 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1435 * and ACK deasserted (i.e. waiting for a data byte) 1436 * 1437 * This new revision has been optimized (I tried) to make the common case fast, 1438 * and the rarer cases (as a result) somewhat more comlex 1439 */ 1440 int 1441 spc_dataout_pio(struct spc_softc *sc, u_char *p, int n) 1442 { 1443 bus_space_tag_t iot = sc->sc_iot; 1444 bus_space_handle_t ioh = sc->sc_ioh; 1445 u_char intstat = 0; 1446 int out = 0; 1447 #define DOUTAMOUNT 8 /* Full FIFO */ 1448 1449 SPC_TRACE(("spc_dataout_pio ")); 1450 /* send TRANSFER command. */ 1451 bus_space_write_1(iot, ioh, TCH, n >> 16); 1452 bus_space_write_1(iot, ioh, TCM, n >> 8); 1453 bus_space_write_1(iot, ioh, TCL, n); 1454 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1455 #ifdef NEED_DREQ_ON_HARDWARE_XFER 1456 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1457 #else 1458 bus_space_write_1(iot, ioh, SCMD, 1459 SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 1460 #endif 1461 for (;;) { 1462 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1463 break; 1464 if (bus_space_read_1(iot, ioh, INTS) != 0) 1465 break; 1466 } 1467 1468 /* 1469 * I have tried to make the main loop as tight as possible. This 1470 * means that some of the code following the loop is a bit more 1471 * complex than otherwise. 1472 */ 1473 while (n > 0) { 1474 int xfer; 1475 1476 for (;;) { 1477 intstat = bus_space_read_1(iot, ioh, INTS); 1478 /* Wait till buffer is empty. */ 1479 if ((bus_space_read_1(iot, ioh, SSTS) & 1480 SSTS_DREG_EMPTY) != 0) 1481 break; 1482 /* Break on interrupt. */ 1483 if (intstat != 0) 1484 goto phasechange; 1485 DELAY(1); 1486 } 1487 1488 xfer = min(DOUTAMOUNT, n); 1489 1490 SPC_MISC(("%d> ", xfer)); 1491 1492 n -= xfer; 1493 out += xfer; 1494 1495 bus_space_write_multi_1(iot, ioh, DREG, p, xfer); 1496 p += xfer; 1497 } 1498 1499 if (out == 0) { 1500 for (;;) { 1501 if (bus_space_read_1(iot, ioh, INTS) != 0) 1502 break; 1503 DELAY(1); 1504 } 1505 SPC_MISC(("extra data ")); 1506 } else { 1507 /* See the bytes off chip */ 1508 for (;;) { 1509 /* Wait till buffer is empty. */ 1510 if ((bus_space_read_1(iot, ioh, SSTS) & 1511 SSTS_DREG_EMPTY) != 0) 1512 break; 1513 intstat = bus_space_read_1(iot, ioh, INTS); 1514 /* Break on interrupt. */ 1515 if (intstat != 0) 1516 goto phasechange; 1517 DELAY(1); 1518 } 1519 } 1520 1521 phasechange: 1522 /* Stop the FIFO data path. */ 1523 1524 if (intstat != 0) { 1525 /* Some sort of phase change. */ 1526 int amount; 1527 1528 amount = (bus_space_read_1(iot, ioh, TCH) << 16) | 1529 (bus_space_read_1(iot, ioh, TCM) << 8) | 1530 bus_space_read_1(iot, ioh, TCL); 1531 if (amount > 0) { 1532 out -= amount; 1533 SPC_MISC(("+%d ", amount)); 1534 } 1535 } 1536 1537 return out; 1538 } 1539 1540 /* 1541 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc 1542 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1543 * and ACK deasserted (i.e. at least one byte is ready). 1544 * 1545 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1546 * transferred. This, is OK for fast targets, but not so smart for slow 1547 * targets which don't disconnect or for huge transfers. 1548 */ 1549 int 1550 spc_datain_pio(struct spc_softc *sc, u_char *p, int n) 1551 { 1552 bus_space_tag_t iot = sc->sc_iot; 1553 bus_space_handle_t ioh = sc->sc_ioh; 1554 int in = 0; 1555 uint8_t intstat, sstat; 1556 #define DINAMOUNT 8 /* Full FIFO */ 1557 1558 SPC_TRACE(("spc_datain_pio ")); 1559 /* send TRANSFER command. */ 1560 bus_space_write_1(iot, ioh, TCH, n >> 16); 1561 bus_space_write_1(iot, ioh, TCM, n >> 8); 1562 bus_space_write_1(iot, ioh, TCL, n); 1563 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1564 #ifdef NEED_DREQ_ON_HARDWARE_XFER 1565 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1566 #else 1567 bus_space_write_1(iot, ioh, SCMD, 1568 SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 1569 #endif 1570 1571 /* 1572 * We leave this loop if one or more of the following is true: 1573 * a) phase != PH_DATAIN && FIFOs are empty 1574 * b) reset has occurred or busfree is detected. 1575 */ 1576 intstat = 0; 1577 while (n > 0) { 1578 sstat = bus_space_read_1(iot, ioh, SSTS); 1579 if ((sstat & SSTS_DREG_FULL) != 0) { 1580 n -= DINAMOUNT; 1581 in += DINAMOUNT; 1582 bus_space_read_multi_1(iot, ioh, DREG, p, DINAMOUNT); 1583 p += DINAMOUNT; 1584 } else if ((sstat & SSTS_DREG_EMPTY) == 0) { 1585 n--; 1586 in++; 1587 *p++ = bus_space_read_1(iot, ioh, DREG); 1588 } else { 1589 if (intstat != 0) 1590 goto phasechange; 1591 intstat = bus_space_read_1(iot, ioh, INTS); 1592 } 1593 } 1594 1595 /* 1596 * Some SCSI-devices are rude enough to transfer more data than what 1597 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 1598 * requested 512. Test for progress, i.e. real transfers. If no real 1599 * transfers have been performed (n is probably already zero) and the 1600 * FIFO is not empty, waste some bytes.... 1601 */ 1602 if (in == 0) { 1603 for (;;) { 1604 sstat = bus_space_read_1(iot, ioh, SSTS); 1605 if ((sstat & SSTS_DREG_EMPTY) == 0) { 1606 (void) bus_space_read_1(iot, ioh, DREG); 1607 } else { 1608 if (intstat != 0) 1609 goto phasechange; 1610 intstat = bus_space_read_1(iot, ioh, INTS); 1611 } 1612 DELAY(1); 1613 } 1614 SPC_MISC(("extra data ")); 1615 } 1616 1617 phasechange: 1618 /* Stop the FIFO data path. */ 1619 1620 return in; 1621 } 1622 1623 /* 1624 * Catch an interrupt from the adaptor 1625 */ 1626 /* 1627 * This is the workhorse routine of the driver. 1628 * Deficiencies (for now): 1629 * 1) always uses programmed I/O 1630 */ 1631 int 1632 spc_intr(void *arg) 1633 { 1634 struct spc_softc *sc = arg; 1635 bus_space_tag_t iot = sc->sc_iot; 1636 bus_space_handle_t ioh = sc->sc_ioh; 1637 u_char ints; 1638 struct spc_acb *acb; 1639 struct scsipi_periph *periph; 1640 struct spc_tinfo *ti; 1641 int n; 1642 1643 SPC_TRACE(("spc_intr ")); 1644 1645 ints = bus_space_read_1(iot, ioh, INTS); 1646 if (ints == 0) 1647 return 0; 1648 1649 /* 1650 * Disable interrupt. 1651 */ 1652 bus_space_write_1(iot, ioh, SCTL, 1653 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB); 1654 1655 if (sc->sc_dma_done != NULL && 1656 sc->sc_state == SPC_CONNECTED && 1657 (sc->sc_flags & SPC_DOINGDMA) != 0 && 1658 (sc->sc_phase == PH_DATAOUT || sc->sc_phase == PH_DATAIN)) { 1659 (*sc->sc_dma_done)(sc); 1660 } 1661 1662 loop: 1663 /* 1664 * Loop until transfer completion. 1665 */ 1666 /* 1667 * First check for abnormal conditions, such as reset. 1668 */ 1669 ints = bus_space_read_1(iot, ioh, INTS); 1670 SPC_MISC(("ints = 0x%x ", ints)); 1671 1672 if ((ints & INTS_RST) != 0) { 1673 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 1674 goto reset; 1675 } 1676 1677 /* 1678 * Check for less serious errors. 1679 */ 1680 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) 1681 != 0) { 1682 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 1683 if (sc->sc_prevphase == PH_MSGIN) { 1684 sc->sc_flags |= SPC_DROP_MSGIN; 1685 spc_sched_msgout(sc, SEND_PARITY_ERROR); 1686 } else 1687 spc_sched_msgout(sc, SEND_INIT_DET_ERR); 1688 } 1689 1690 /* 1691 * If we're not already busy doing something test for the following 1692 * conditions: 1693 * 1) We have been reselected by something 1694 * 2) We have selected something successfully 1695 * 3) Our selection process has timed out 1696 * 4) This is really a bus free interrupt just to get a new command 1697 * going? 1698 * 5) Spurious interrupt? 1699 */ 1700 switch (sc->sc_state) { 1701 case SPC_IDLE: 1702 case SPC_SELECTING: 1703 SPC_MISC(("ints:0x%02x ", ints)); 1704 1705 if ((ints & INTS_SEL) != 0) { 1706 /* 1707 * We don't currently support target mode. 1708 */ 1709 printf("%s: target mode selected; going to BUS FREE\n", 1710 sc->sc_dev.dv_xname); 1711 1712 goto sched; 1713 } else if ((ints & INTS_RESEL) != 0) { 1714 SPC_MISC(("reselected ")); 1715 1716 /* 1717 * If we're trying to select a target ourselves, 1718 * push our command back into the ready list. 1719 */ 1720 if (sc->sc_state == SPC_SELECTING) { 1721 SPC_MISC(("backoff selector ")); 1722 SPC_ASSERT(sc->sc_nexus != NULL); 1723 acb = sc->sc_nexus; 1724 sc->sc_nexus = NULL; 1725 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1726 } 1727 1728 /* Save reselection ID. */ 1729 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP); 1730 1731 sc->sc_state = SPC_RESELECTED; 1732 } else if ((ints & INTS_CMD_DONE) != 0) { 1733 SPC_MISC(("selected ")); 1734 1735 /* 1736 * We have selected a target. Things to do: 1737 * a) Determine what message(s) to send. 1738 * b) Verify that we're still selecting the target. 1739 * c) Mark device as busy. 1740 */ 1741 if (sc->sc_state != SPC_SELECTING) { 1742 printf("%s: selection out while idle; " 1743 "resetting\n", sc->sc_dev.dv_xname); 1744 SPC_BREAK(); 1745 goto reset; 1746 } 1747 SPC_ASSERT(sc->sc_nexus != NULL); 1748 acb = sc->sc_nexus; 1749 periph = acb->xs->xs_periph; 1750 ti = &sc->sc_tinfo[periph->periph_target]; 1751 1752 sc->sc_msgpriq = SEND_IDENTIFY; 1753 if (acb->flags & ACB_RESET) 1754 sc->sc_msgpriq |= SEND_DEV_RESET; 1755 else if (acb->flags & ACB_ABORT) 1756 sc->sc_msgpriq |= SEND_ABORT; 1757 else { 1758 #if SPC_USE_SYNCHRONOUS 1759 if ((ti->flags & DO_SYNC) != 0) 1760 sc->sc_msgpriq |= SEND_SDTR; 1761 #endif 1762 #if SPC_USE_WIDE 1763 if ((ti->flags & DO_WIDE) != 0) 1764 sc->sc_msgpriq |= SEND_WDTR; 1765 #endif 1766 } 1767 1768 acb->flags |= ACB_NEXUS; 1769 ti->lubusy |= (1 << periph->periph_lun); 1770 1771 /* Do an implicit RESTORE POINTERS. */ 1772 sc->sc_dp = acb->data_addr; 1773 sc->sc_dleft = acb->data_length; 1774 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 1775 sc->sc_cleft = acb->scsipi_cmd_length; 1776 1777 /* On our first connection, schedule a timeout. */ 1778 if ((acb->xs->xs_control & XS_CTL_POLL) == 0) 1779 callout_reset(&acb->xs->xs_callout, 1780 mstohz(acb->timeout), spc_timeout, acb); 1781 1782 sc->sc_state = SPC_CONNECTED; 1783 } else if ((ints & INTS_TIMEOUT) != 0) { 1784 SPC_MISC(("selection timeout ")); 1785 1786 if (sc->sc_state != SPC_SELECTING) { 1787 printf("%s: selection timeout while idle; " 1788 "resetting\n", sc->sc_dev.dv_xname); 1789 SPC_BREAK(); 1790 goto reset; 1791 } 1792 SPC_ASSERT(sc->sc_nexus != NULL); 1793 acb = sc->sc_nexus; 1794 1795 delay(250); 1796 1797 acb->xs->error = XS_SELTIMEOUT; 1798 goto finish; 1799 } else { 1800 if (sc->sc_state != SPC_IDLE) { 1801 printf("%s: BUS FREE while not idle; " 1802 "state=%d\n", 1803 sc->sc_dev.dv_xname, sc->sc_state); 1804 SPC_BREAK(); 1805 goto out; 1806 } 1807 1808 goto sched; 1809 } 1810 1811 /* 1812 * Turn off selection stuff, and prepare to catch bus free 1813 * interrupts, parity errors, and phase changes. 1814 */ 1815 1816 sc->sc_flags = 0; 1817 sc->sc_prevphase = PH_INVALID; 1818 goto dophase; 1819 } 1820 1821 if ((ints & INTS_DISCON) != 0) { 1822 /* We've gone to BUS FREE phase. */ 1823 /* disable disconnect interrupt */ 1824 bus_space_write_1(iot, ioh, PCTL, 1825 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB); 1826 /* XXX reset interrput */ 1827 bus_space_write_1(iot, ioh, INTS, ints); 1828 1829 switch (sc->sc_state) { 1830 case SPC_RESELECTED: 1831 goto sched; 1832 1833 case SPC_CONNECTED: 1834 SPC_ASSERT(sc->sc_nexus != NULL); 1835 acb = sc->sc_nexus; 1836 1837 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1838 if (sc->sc_prevphase == PH_MSGOUT) { 1839 /* 1840 * If the target went to BUS FREE phase during 1841 * or immediately after sending a SDTR or WDTR 1842 * message, disable negotiation. 1843 */ 1844 periph = acb->xs->xs_periph; 1845 ti = &sc->sc_tinfo[periph->periph_target]; 1846 switch (sc->sc_lastmsg) { 1847 #if SPC_USE_SYNCHRONOUS 1848 case SEND_SDTR: 1849 ti->flags &= ~DO_SYNC; 1850 ti->period = ti->offset = 0; 1851 break; 1852 #endif 1853 #if SPC_USE_WIDE 1854 case SEND_WDTR: 1855 ti->flags &= ~DO_WIDE; 1856 ti->width = 0; 1857 break; 1858 #endif 1859 } 1860 } 1861 #endif 1862 1863 if ((sc->sc_flags & SPC_ABORTING) == 0) { 1864 /* 1865 * Section 5.1.1 of the SCSI 2 spec suggests 1866 * issuing a REQUEST SENSE following an 1867 * unexpected disconnect. Some devices go into 1868 * a contingent allegiance condition when 1869 * disconnecting, and this is necessary to 1870 * clean up their state. 1871 */ 1872 printf("%s: unexpected disconnect; " 1873 "sending REQUEST SENSE\n", 1874 sc->sc_dev.dv_xname); 1875 SPC_BREAK(); 1876 acb->target_stat = SCSI_CHECK; 1877 acb->xs->error = XS_NOERROR; 1878 goto finish; 1879 } 1880 1881 acb->xs->error = XS_DRIVER_STUFFUP; 1882 goto finish; 1883 1884 case SPC_DISCONNECT: 1885 SPC_ASSERT(sc->sc_nexus != NULL); 1886 acb = sc->sc_nexus; 1887 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain); 1888 sc->sc_nexus = NULL; 1889 goto sched; 1890 1891 case SPC_CMDCOMPLETE: 1892 SPC_ASSERT(sc->sc_nexus != NULL); 1893 acb = sc->sc_nexus; 1894 goto finish; 1895 } 1896 } 1897 else if ((ints & INTS_CMD_DONE) != 0 && 1898 sc->sc_prevphase == PH_MSGIN && 1899 sc->sc_state != SPC_CONNECTED) 1900 goto out; 1901 1902 dophase: 1903 #if 0 1904 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) { 1905 /* Wait for REQINIT. */ 1906 goto out; 1907 } 1908 #else 1909 bus_space_write_1(iot, ioh, INTS, ints); 1910 ints = 0; 1911 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) 1912 delay(1); /* need timeout XXX */ 1913 #endif 1914 1915 /* 1916 * State transition. 1917 */ 1918 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK; 1919 #if 0 1920 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase); 1921 #endif 1922 1923 SPC_MISC(("phase=%d\n", sc->sc_phase)); 1924 switch (sc->sc_phase) { 1925 case PH_MSGOUT: 1926 if (sc->sc_state != SPC_CONNECTED && 1927 sc->sc_state != SPC_RESELECTED) 1928 break; 1929 spc_msgout(sc); 1930 sc->sc_prevphase = PH_MSGOUT; 1931 goto loop; 1932 1933 case PH_MSGIN: 1934 if (sc->sc_state != SPC_CONNECTED && 1935 sc->sc_state != SPC_RESELECTED) 1936 break; 1937 spc_msgin(sc); 1938 sc->sc_prevphase = PH_MSGIN; 1939 goto loop; 1940 1941 case PH_CMD: 1942 if (sc->sc_state != SPC_CONNECTED) 1943 break; 1944 #if SPC_DEBUG 1945 if ((spc_debug & SPC_SHOWMISC) != 0) { 1946 SPC_ASSERT(sc->sc_nexus != NULL); 1947 acb = sc->sc_nexus; 1948 printf("cmd=0x%02x+%d ", 1949 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length - 1); 1950 } 1951 #endif 1952 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft); 1953 sc->sc_cp += n; 1954 sc->sc_cleft -= n; 1955 sc->sc_prevphase = PH_CMD; 1956 goto loop; 1957 1958 case PH_DATAOUT: 1959 if (sc->sc_state != SPC_CONNECTED) 1960 break; 1961 SPC_MISC(("dataout dleft=%d ", sc->sc_dleft)); 1962 if (sc->sc_dma_start != NULL && 1963 sc->sc_dleft > SPC_MIN_DMA_LEN) { 1964 (*sc->sc_dma_start)(sc, sc->sc_dp, sc->sc_dleft, 0); 1965 sc->sc_prevphase = PH_DATAOUT; 1966 goto out; 1967 } 1968 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft); 1969 sc->sc_dp += n; 1970 sc->sc_dleft -= n; 1971 sc->sc_prevphase = PH_DATAOUT; 1972 goto loop; 1973 1974 case PH_DATAIN: 1975 if (sc->sc_state != SPC_CONNECTED) 1976 break; 1977 SPC_MISC(("datain ")); 1978 if (sc->sc_dma_start != NULL && 1979 sc->sc_dleft > SPC_MIN_DMA_LEN) { 1980 (*sc->sc_dma_start)(sc, sc->sc_dp, sc->sc_dleft, 1); 1981 sc->sc_prevphase = PH_DATAIN; 1982 goto out; 1983 } 1984 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft); 1985 sc->sc_dp += n; 1986 sc->sc_dleft -= n; 1987 sc->sc_prevphase = PH_DATAIN; 1988 goto loop; 1989 1990 case PH_STAT: 1991 if (sc->sc_state != SPC_CONNECTED) 1992 break; 1993 SPC_ASSERT(sc->sc_nexus != NULL); 1994 acb = sc->sc_nexus; 1995 1996 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0) 1997 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1998 bus_space_write_1(iot, ioh, PCTL, PCTL_BFINT_ENAB | PH_STAT); 1999 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) 2000 DELAY(1); /* XXX needs timeout */ 2001 acb->target_stat = bus_space_read_1(iot, ioh, TEMP); 2002 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK); 2003 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 2004 DELAY(1); /* XXX needs timeout */ 2005 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 2006 2007 SPC_MISC(("target_stat=0x%02x ", acb->target_stat)); 2008 sc->sc_prevphase = PH_STAT; 2009 goto loop; 2010 } 2011 2012 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname); 2013 SPC_BREAK(); 2014 reset: 2015 spc_init(sc, 1); 2016 return 1; 2017 2018 finish: 2019 callout_stop(&acb->xs->xs_callout); 2020 bus_space_write_1(iot, ioh, INTS, ints); 2021 ints = 0; 2022 spc_done(sc, acb); 2023 goto out; 2024 2025 sched: 2026 sc->sc_state = SPC_IDLE; 2027 spc_sched(sc); 2028 goto out; 2029 2030 out: 2031 if (ints) 2032 bus_space_write_1(iot, ioh, INTS, ints); 2033 bus_space_write_1(iot, ioh, SCTL, 2034 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB); 2035 return 1; 2036 } 2037 2038 void 2039 spc_abort(struct spc_softc *sc, struct spc_acb *acb) 2040 { 2041 2042 /* 2 secs for the abort */ 2043 acb->timeout = SPC_ABORT_TIMEOUT; 2044 acb->flags |= ACB_ABORT; 2045 2046 if (acb == sc->sc_nexus) { 2047 /* 2048 * If we're still selecting, the message will be scheduled 2049 * after selection is complete. 2050 */ 2051 if (sc->sc_state == SPC_CONNECTED) 2052 spc_sched_msgout(sc, SEND_ABORT); 2053 } else { 2054 spc_dequeue(sc, acb); 2055 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 2056 if (sc->sc_state == SPC_IDLE) 2057 spc_sched(sc); 2058 } 2059 } 2060 2061 void 2062 spc_timeout(void *arg) 2063 { 2064 struct spc_acb *acb = arg; 2065 struct scsipi_xfer *xs = acb->xs; 2066 struct scsipi_periph *periph = xs->xs_periph; 2067 struct spc_softc *sc; 2068 int s; 2069 2070 sc = (void *)periph->periph_channel->chan_adapter->adapt_dev; 2071 scsipi_printaddr(periph); 2072 printf("timed out"); 2073 2074 s = splbio(); 2075 2076 if (acb->flags & ACB_ABORT) { 2077 /* abort timed out */ 2078 printf(" AGAIN\n"); 2079 /* XXX Must reset! */ 2080 } else { 2081 /* abort the operation that has timed out */ 2082 printf("\n"); 2083 acb->xs->error = XS_TIMEOUT; 2084 spc_abort(sc, acb); 2085 } 2086 2087 splx(s); 2088 } 2089 2090 #ifdef SPC_DEBUG 2091 /* 2092 * The following functions are mostly used for debugging purposes, either 2093 * directly called from the driver or from the kernel debugger. 2094 */ 2095 2096 void 2097 spc_show_scsi_cmd(struct spc_acb *acb) 2098 { 2099 u_char *b = (u_char *)&acb->scsipi_cmd; 2100 int i; 2101 2102 scsipi_printaddr(acb->xs->xs_periph); 2103 if ((acb->xs->xs_control & XS_CTL_RESET) == 0) { 2104 for (i = 0; i < acb->scsipi_cmd_length; i++) { 2105 if (i) 2106 printf(","); 2107 printf("%x", b[i]); 2108 } 2109 printf("\n"); 2110 } else 2111 printf("RESET\n"); 2112 } 2113 2114 void 2115 spc_print_acb(struct spc_acb *acb) 2116 { 2117 2118 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags); 2119 printf(" dp=%p dleft=%d target_stat=%x\n", 2120 acb->data_addr, acb->data_length, acb->target_stat); 2121 spc_show_scsi_cmd(acb); 2122 } 2123 2124 void 2125 spc_print_active_acb(void) 2126 { 2127 struct spc_acb *acb; 2128 struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */ 2129 2130 printf("ready list:\n"); 2131 TAILQ_FOREACH(acb, &sc->ready_list, chain) 2132 spc_print_acb(acb); 2133 printf("nexus:\n"); 2134 if (sc->sc_nexus != NULL) 2135 spc_print_acb(sc->sc_nexus); 2136 printf("nexus list:\n"); 2137 TAILQ_FOREACH(acb, &sc->nexus_list, chain) 2138 spc_print_acb(acb); 2139 } 2140 2141 void 2142 spc_dump89352(struct spc_softc *sc) 2143 { 2144 bus_space_tag_t iot = sc->sc_iot; 2145 bus_space_handle_t ioh = sc->sc_ioh; 2146 2147 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n", 2148 bus_space_read_1(iot, ioh, BDID), 2149 bus_space_read_1(iot, ioh, SCTL), 2150 bus_space_read_1(iot, ioh, SCMD), 2151 bus_space_read_1(iot, ioh, TMOD)); 2152 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n", 2153 bus_space_read_1(iot, ioh, INTS), 2154 bus_space_read_1(iot, ioh, PSNS), 2155 bus_space_read_1(iot, ioh, SSTS), 2156 bus_space_read_1(iot, ioh, SERR), 2157 bus_space_read_1(iot, ioh, PCTL)); 2158 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n", 2159 bus_space_read_1(iot, ioh, MBC), 2160 #if 0 2161 bus_space_read_1(iot, ioh, DREG), 2162 #else 2163 0, 2164 #endif 2165 bus_space_read_1(iot, ioh, TEMP), 2166 bus_space_read_1(iot, ioh, TCH), 2167 bus_space_read_1(iot, ioh, TCM)); 2168 printf(" TCL=%x EXBF=%x\n", 2169 bus_space_read_1(iot, ioh, TCL), 2170 bus_space_read_1(iot, ioh, EXBF)); 2171 } 2172 2173 void 2174 spc_dump_driver(struct spc_softc *sc) 2175 { 2176 struct spc_tinfo *ti; 2177 int i; 2178 2179 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase); 2180 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x " 2181 "currmsg=%x\n", sc->sc_state, sc->sc_imess[0], 2182 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg); 2183 for (i = 0; i < 7; i++) { 2184 ti = &sc->sc_tinfo[i]; 2185 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2186 i, ti->cmds, ti->dconns, ti->touts); 2187 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2188 } 2189 } 2190 #endif
Cache object: ae090a41ae5f7f69417ebbef5ee168e7
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