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sys/dev/ic/mb89352.c
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1 /* $NetBSD: mb89352.c,v 1.61 2022/01/01 21:07:14 andvar Exp $ */ 2 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */ 3 4 /*- 5 * Copyright (c) 1996-1999,2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 * 32 * Copyright (c) 1994 Jarle Greipsland 33 * All rights reserved. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 3. The name of the author may not be used to endorse or promote products 44 * derived from this software without specific prior written permission. 45 * 46 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 47 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 48 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 49 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 50 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 51 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 52 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 53 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 54 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 55 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 56 * POSSIBILITY OF SUCH DAMAGE. 57 */ 58 /* 59 * [NetBSD for NEC PC-98 series] 60 * Copyright (c) 1996, 1997, 1998 61 * NetBSD/pc98 porting staff. All rights reserved. 62 * Copyright (c) 1996, 1997, 1998 63 * Kouichi Matsuda. All rights reserved. 64 */ 65 66 /* 67 * Acknowledgements: Many of the algorithms used in this driver are 68 * inspired by the work of Julian Elischer (julian@tfs.com) and 69 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 70 */ 71 72 /* TODO list: 73 * 1) Get the DMA stuff working. 74 * 2) Get the iov/uio stuff working. Is this a good thing ??? 75 * 3) Get the synch stuff working. 76 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.61 2022/01/01 21:07:14 andvar Exp $"); 81 82 #ifdef DDB 83 #define integrate 84 #else 85 #define integrate inline static 86 #endif 87 88 /* 89 * A few customizable items: 90 */ 91 92 /* Synchronous data transfers? */ 93 #define SPC_USE_SYNCHRONOUS 0 94 #define SPC_SYNC_REQ_ACK_OFS 8 95 96 /* Wide data transfers? */ 97 #define SPC_USE_WIDE 0 98 #define SPC_MAX_WIDTH 0 99 100 /* Max attempts made to transmit a message */ 101 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 102 103 /* 104 * Some spin loop parameters (essentially how long to wait some places) 105 * The problem(?) is that sometimes we expect either to be able to transmit a 106 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 107 * returning from the interrupt just to get yanked back for the next byte we 108 * may spin in the interrupt routine waiting for this byte to come. How long? 109 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 110 */ 111 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 112 #define SPC_MSGOUT_SPIN 1 113 114 /* 115 * Include debug functions? At the end of this file there are a bunch of 116 * functions that will print out various information regarding queued SCSI 117 * commands, driver state and chip contents. You can call them from the 118 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the 119 * kernel uses less memory) but you lose the debugging facilities. 120 */ 121 #if 0 122 #define SPC_DEBUG 1 123 #endif 124 125 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */ 126 127 /* threshold length for DMA transfer */ 128 #define SPC_MIN_DMA_LEN 32 129 130 #ifdef luna68k /* XXX old drives like DK312C in LUNAs require this */ 131 #define NO_MANUAL_XFER 132 #endif 133 #ifdef x68k /* XXX it seems x68k SPC SCSI hardware has some quirks */ 134 #define NEED_DREQ_ON_HARDWARE_XFER 135 #define NO_MANUAL_XFER 136 #endif 137 138 /* End of customizable parameters */ 139 140 /* 141 * MB89352 SCSI Protocol Controller (SPC) routines. 142 */ 143 144 #include "opt_ddb.h" 145 146 #include <sys/param.h> 147 #include <sys/systm.h> 148 #include <sys/kernel.h> 149 #include <sys/errno.h> 150 #include <sys/ioctl.h> 151 #include <sys/device.h> 152 #include <sys/buf.h> 153 #include <sys/proc.h> 154 #include <sys/queue.h> 155 156 #include <sys/intr.h> 157 #include <sys/bus.h> 158 159 #include <dev/scsipi/scsi_all.h> 160 #include <dev/scsipi/scsipi_all.h> 161 #include <dev/scsipi/scsi_message.h> 162 #include <dev/scsipi/scsiconf.h> 163 164 #include <dev/ic/mb89352reg.h> 165 #include <dev/ic/mb89352var.h> 166 167 #include "ioconf.h" 168 169 #ifndef DDB 170 #define Debugger() panic("should call debugger here (mb89352.c)") 171 #endif /* ! DDB */ 172 173 #if SPC_DEBUG 174 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */ 175 #endif 176 177 void spc_done(struct spc_softc *, struct spc_acb *); 178 void spc_dequeue(struct spc_softc *, struct spc_acb *); 179 void spc_scsipi_request(struct scsipi_channel *, scsipi_adapter_req_t, 180 void *); 181 int spc_poll(struct spc_softc *, struct scsipi_xfer *, int); 182 integrate void spc_sched_msgout(struct spc_softc *, uint8_t); 183 integrate void spc_setsync(struct spc_softc *, struct spc_tinfo *); 184 void spc_select(struct spc_softc *, struct spc_acb *); 185 void spc_timeout(void *); 186 void spc_scsi_reset(struct spc_softc *); 187 void spc_reset(struct spc_softc *); 188 void spc_free_acb(struct spc_softc *, struct spc_acb *, int); 189 struct spc_acb* spc_get_acb(struct spc_softc *); 190 int spc_reselect(struct spc_softc *, int); 191 void spc_msgin(struct spc_softc *); 192 void spc_abort(struct spc_softc *, struct spc_acb *); 193 void spc_msgout(struct spc_softc *); 194 int spc_dataout_pio(struct spc_softc *, uint8_t *, int); 195 int spc_datain_pio(struct spc_softc *, uint8_t *, int); 196 #if SPC_DEBUG 197 void spc_print_acb(struct spc_acb *); 198 void spc_dump_driver(struct spc_softc *); 199 void spc_dump89352(struct spc_softc *); 200 void spc_show_scsi_cmd(struct spc_acb *); 201 void spc_print_active_acb(void); 202 #endif 203 204 /* 205 * INITIALIZATION ROUTINES (probe, attach ++) 206 */ 207 208 /* 209 * Do the real search-for-device. 210 * Prerequisite: sc->sc_iobase should be set to the proper value 211 */ 212 int 213 spc_find(bus_space_tag_t iot, bus_space_handle_t ioh, int bdid) 214 { 215 long timeout = SPC_ABORT_TIMEOUT; 216 217 SPC_TRACE(("spc: probing for spc-chip\n")); 218 /* 219 * Disable interrupts then reset the FUJITSU chip. 220 */ 221 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 222 bus_space_write_1(iot, ioh, SCMD, 0); 223 bus_space_write_1(iot, ioh, PCTL, 0); 224 bus_space_write_1(iot, ioh, TEMP, 0); 225 bus_space_write_1(iot, ioh, TCH, 0); 226 bus_space_write_1(iot, ioh, TCM, 0); 227 bus_space_write_1(iot, ioh, TCL, 0); 228 bus_space_write_1(iot, ioh, INTS, 0); 229 bus_space_write_1(iot, ioh, SCTL, 230 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 231 bus_space_write_1(iot, ioh, BDID, bdid); 232 delay(400); 233 bus_space_write_1(iot, ioh, SCTL, 234 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 235 236 /* The following detection is derived from spc.c 237 * (by Takahide Matsutsuka) in FreeBSD/pccard-test. 238 */ 239 while (bus_space_read_1(iot, ioh, PSNS) && timeout) { 240 timeout--; 241 DELAY(1); 242 } 243 if (timeout == 0) { 244 printf("spc: find failed\n"); 245 return 0; 246 } 247 248 SPC_START(("SPC found")); 249 return 1; 250 } 251 252 void 253 spc_attach(struct spc_softc *sc) 254 { 255 struct scsipi_adapter *adapt = &sc->sc_adapter; 256 struct scsipi_channel *chan = &sc->sc_channel; 257 258 SPC_TRACE(("spc_attach ")); 259 sc->sc_state = SPC_INIT; 260 261 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */ 262 263 #if SPC_USE_SYNCHRONOUS 264 /* 265 * These are the bounds of the sync period, based on the frequency of 266 * the chip's clock input and the size and offset of the sync period 267 * register. 268 * 269 * For a 20MHz clock, this gives us 25, or 100ns, or 10MB/s, as a 270 * maximum transfer rate, and 112.5, or 450ns, or 2.22MB/s, as a 271 * minimum transfer rate. 272 */ 273 sc->sc_minsync = (2 * 250) / sc->sc_freq; 274 sc->sc_maxsync = (9 * 250) / sc->sc_freq; 275 #endif 276 277 /* 278 * Fill in the adapter. 279 */ 280 adapt->adapt_dev = sc->sc_dev; 281 adapt->adapt_nchannels = 1; 282 adapt->adapt_openings = 7; 283 adapt->adapt_max_periph = 1; 284 adapt->adapt_request = spc_scsipi_request; 285 adapt->adapt_minphys = minphys; 286 287 chan->chan_adapter = &sc->sc_adapter; 288 chan->chan_bustype = &scsi_bustype; 289 chan->chan_channel = 0; 290 chan->chan_ntargets = 8; 291 chan->chan_nluns = 8; 292 chan->chan_id = sc->sc_initiator; 293 294 /* 295 * Add reference to adapter so that we drop the reference after 296 * config_found() to make sure the adapter is disabled. 297 */ 298 if (scsipi_adapter_addref(adapt) != 0) { 299 aprint_error_dev(sc->sc_dev, "unable to enable controller\n"); 300 return; 301 } 302 303 spc_init(sc, 1); /* Init chip and driver */ 304 305 /* 306 * ask the adapter what subunits are present 307 */ 308 sc->sc_child = config_found(sc->sc_dev, chan, scsiprint, CFARGS_NONE); 309 scsipi_adapter_delref(adapt); 310 } 311 312 void 313 spc_childdet(device_t self, device_t child) 314 { 315 struct spc_softc *sc = device_private(self); 316 317 if (sc->sc_child == child) 318 sc->sc_child = NULL; 319 } 320 321 int 322 spc_detach(device_t self, int flags) 323 { 324 struct spc_softc *sc = device_private(self); 325 int rv = 0; 326 327 if (sc->sc_child != NULL) 328 rv = config_detach(sc->sc_child, flags); 329 330 return (rv); 331 } 332 333 /* 334 * Initialize MB89352 chip itself 335 * The following conditions should hold: 336 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc 337 * must be valid. 338 */ 339 void 340 spc_reset(struct spc_softc *sc) 341 { 342 bus_space_tag_t iot = sc->sc_iot; 343 bus_space_handle_t ioh = sc->sc_ioh; 344 345 SPC_TRACE(("spc_reset ")); 346 /* 347 * Disable interrupts then reset the FUJITSU chip. 348 */ 349 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 350 bus_space_write_1(iot, ioh, SCMD, 0); 351 bus_space_write_1(iot, ioh, TMOD, 0); 352 bus_space_write_1(iot, ioh, PCTL, 0); 353 bus_space_write_1(iot, ioh, TEMP, 0); 354 bus_space_write_1(iot, ioh, TCH, 0); 355 bus_space_write_1(iot, ioh, TCM, 0); 356 bus_space_write_1(iot, ioh, TCL, 0); 357 bus_space_write_1(iot, ioh, INTS, 0); 358 bus_space_write_1(iot, ioh, SCTL, 359 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 360 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator); 361 delay(400); 362 bus_space_write_1(iot, ioh, SCTL, 363 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 364 } 365 366 367 /* 368 * Pull the SCSI RST line for 500us. 369 */ 370 void 371 spc_scsi_reset(struct spc_softc *sc) 372 { 373 bus_space_tag_t iot = sc->sc_iot; 374 bus_space_handle_t ioh = sc->sc_ioh; 375 376 SPC_TRACE(("spc_scsi_reset ")); 377 bus_space_write_1(iot, ioh, SCMD, 378 bus_space_read_1(iot, ioh, SCMD) | SCMD_RST); 379 delay(500); 380 bus_space_write_1(iot, ioh, SCMD, 381 bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST); 382 delay(50); 383 } 384 385 /* 386 * Initialize spc SCSI driver. 387 */ 388 void 389 spc_init(struct spc_softc *sc, int bus_reset) 390 { 391 struct spc_acb *acb; 392 int r; 393 394 SPC_TRACE(("spc_init ")); 395 if (bus_reset) { 396 spc_reset(sc); 397 spc_scsi_reset(sc); 398 } 399 spc_reset(sc); 400 401 if (sc->sc_state == SPC_INIT) { 402 /* First time through; initialize. */ 403 TAILQ_INIT(&sc->ready_list); 404 TAILQ_INIT(&sc->nexus_list); 405 TAILQ_INIT(&sc->free_list); 406 sc->sc_nexus = NULL; 407 acb = sc->sc_acb; 408 memset(acb, 0, sizeof(sc->sc_acb)); 409 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) { 410 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain); 411 acb++; 412 } 413 memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 414 } else { 415 /* Cancel any active commands. */ 416 sc->sc_state = SPC_CLEANING; 417 if ((acb = sc->sc_nexus) != NULL) { 418 acb->xs->error = XS_DRIVER_STUFFUP; 419 callout_stop(&acb->xs->xs_callout); 420 spc_done(sc, acb); 421 } 422 while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) { 423 acb->xs->error = XS_DRIVER_STUFFUP; 424 callout_stop(&acb->xs->xs_callout); 425 spc_done(sc, acb); 426 } 427 } 428 429 sc->sc_prevphase = PH_INVALID; 430 for (r = 0; r < 8; r++) { 431 struct spc_tinfo *ti = &sc->sc_tinfo[r]; 432 433 ti->flags = 0; 434 #if SPC_USE_SYNCHRONOUS 435 ti->flags |= DO_SYNC; 436 ti->period = sc->sc_minsync; 437 ti->offset = SPC_SYNC_REQ_ACK_OFS; 438 #else 439 ti->period = ti->offset = 0; 440 #endif 441 #if SPC_USE_WIDE 442 ti->flags |= DO_WIDE; 443 ti->width = SPC_MAX_WIDTH; 444 #else 445 ti->width = 0; 446 #endif 447 } 448 449 sc->sc_state = SPC_IDLE; 450 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL, 451 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB); 452 } 453 454 void 455 spc_free_acb(struct spc_softc *sc, struct spc_acb *acb, int flags) 456 { 457 int s; 458 459 SPC_TRACE(("spc_free_acb ")); 460 s = splbio(); 461 462 acb->flags = 0; 463 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain); 464 splx(s); 465 } 466 467 struct spc_acb * 468 spc_get_acb(struct spc_softc *sc) 469 { 470 struct spc_acb *acb; 471 int s; 472 473 SPC_TRACE(("spc_get_acb ")); 474 s = splbio(); 475 acb = TAILQ_FIRST(&sc->free_list); 476 if (acb != NULL) { 477 TAILQ_REMOVE(&sc->free_list, acb, chain); 478 acb->flags |= ACB_ALLOC; 479 } 480 splx(s); 481 return acb; 482 } 483 484 /* 485 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 486 */ 487 488 /* 489 * Expected sequence: 490 * 1) Command inserted into ready list 491 * 2) Command selected for execution 492 * 3) Command won arbitration and has selected target device 493 * 4) Send message out (identify message, eventually also sync.negotiations) 494 * 5) Send command 495 * 5a) Receive disconnect message, disconnect. 496 * 5b) Reselected by target 497 * 5c) Receive identify message from target. 498 * 6) Send or receive data 499 * 7) Receive status 500 * 8) Receive message (command complete etc.) 501 */ 502 503 /* 504 * Start a SCSI-command 505 * This function is called by the higher level SCSI-driver to queue/run 506 * SCSI-commands. 507 */ 508 void 509 spc_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 510 void *arg) 511 { 512 struct scsipi_xfer *xs; 513 struct scsipi_periph *periph __diagused; 514 struct spc_softc *sc = device_private(chan->chan_adapter->adapt_dev); 515 struct spc_acb *acb; 516 int s, flags; 517 518 switch (req) { 519 case ADAPTER_REQ_RUN_XFER: 520 xs = arg; 521 periph = xs->xs_periph; 522 SPC_TRACE(("spc_scsipi_request ")); 523 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 524 periph->periph_target)); 525 526 flags = xs->xs_control; 527 acb = spc_get_acb(sc); 528 #ifdef DIAGNOSTIC 529 /* 530 * This should nerver happen as we track the resources 531 * in the mid-layer. 532 */ 533 if (acb == NULL) { 534 scsipi_printaddr(periph); 535 printf("unable to allocate acb\n"); 536 panic("spc_scsipi_request"); 537 } 538 #endif 539 540 /* Initialize acb */ 541 acb->xs = xs; 542 acb->timeout = xs->timeout; 543 544 if (xs->xs_control & XS_CTL_RESET) { 545 acb->flags |= ACB_RESET; 546 acb->scsipi_cmd_length = 0; 547 acb->data_length = 0; 548 } else { 549 memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen); 550 acb->scsipi_cmd_length = xs->cmdlen; 551 acb->data_addr = xs->data; 552 acb->data_length = xs->datalen; 553 } 554 acb->target_stat = 0; 555 556 s = splbio(); 557 558 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain); 559 /* 560 * Start scheduling unless a queue process is in progress. 561 */ 562 if (sc->sc_state == SPC_IDLE) 563 spc_sched(sc); 564 /* 565 * After successful sending, check if we should return just now. 566 * If so, return SUCCESSFULLY_QUEUED. 567 */ 568 569 splx(s); 570 571 if ((flags & XS_CTL_POLL) == 0) 572 return; 573 574 /* Not allowed to use interrupts, use polling instead */ 575 s = splbio(); 576 if (spc_poll(sc, xs, acb->timeout)) { 577 spc_timeout(acb); 578 if (spc_poll(sc, xs, acb->timeout)) 579 spc_timeout(acb); 580 } 581 splx(s); 582 return; 583 case ADAPTER_REQ_GROW_RESOURCES: 584 /* XXX Not supported. */ 585 return; 586 case ADAPTER_REQ_SET_XFER_MODE: 587 { 588 /* 589 * We don't support Sync, Wide, or Tagged Command Queuing. 590 * Just callback now, to report this. 591 */ 592 struct scsipi_xfer_mode *xm = arg; 593 594 xm->xm_mode = 0; 595 xm->xm_period = 0; 596 xm->xm_offset = 0; 597 scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm); 598 return; 599 } 600 } 601 } 602 603 /* 604 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 605 */ 606 int 607 spc_poll(struct spc_softc *sc, struct scsipi_xfer *xs, int count) 608 { 609 bus_space_tag_t iot = sc->sc_iot; 610 bus_space_handle_t ioh = sc->sc_ioh; 611 612 SPC_TRACE(("spc_poll ")); 613 while (count) { 614 /* 615 * If we had interrupts enabled, would we 616 * have got an interrupt? 617 */ 618 if (bus_space_read_1(iot, ioh, INTS) != 0) 619 spc_intr(sc); 620 if ((xs->xs_status & XS_STS_DONE) != 0) 621 return 0; 622 delay(1000); 623 count--; 624 } 625 return 1; 626 } 627 628 /* 629 * LOW LEVEL SCSI UTILITIES 630 */ 631 632 integrate void 633 spc_sched_msgout(struct spc_softc *sc, uint8_t m) 634 { 635 bus_space_tag_t iot = sc->sc_iot; 636 bus_space_handle_t ioh = sc->sc_ioh; 637 638 SPC_TRACE(("spc_sched_msgout ")); 639 if (sc->sc_msgpriq == 0) 640 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 641 sc->sc_msgpriq |= m; 642 } 643 644 /* 645 * Set synchronous transfer offset and period. 646 */ 647 integrate void 648 spc_setsync(struct spc_softc *sc, struct spc_tinfo *ti) 649 { 650 #if SPC_USE_SYNCHRONOUS 651 bus_space_tag_t iot = sc->sc_iot; 652 bus_space_handle_t ioh = sc->sc_ioh; 653 654 SPC_TRACE(("spc_setsync ")); 655 if (ti->offset != 0) 656 bus_space_write_1(iot, ioh, TMOD, 657 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset); 658 else 659 bus_space_write_1(iot, ioh, TMOD, 0); 660 #endif 661 } 662 663 /* 664 * Start a selection. This is used by spc_sched() to select an idle target. 665 */ 666 void 667 spc_select(struct spc_softc *sc, struct spc_acb *acb) 668 { 669 struct scsipi_periph *periph = acb->xs->xs_periph; 670 int target = periph->periph_target; 671 struct spc_tinfo *ti = &sc->sc_tinfo[target]; 672 bus_space_tag_t iot = sc->sc_iot; 673 bus_space_handle_t ioh = sc->sc_ioh; 674 675 SPC_TRACE(("spc_select ")); 676 spc_setsync(sc, ti); 677 678 #if 0 679 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 680 #endif 681 682 bus_space_write_1(iot, ioh, PCTL, 0); 683 bus_space_write_1(iot, ioh, TEMP, 684 (1 << sc->sc_initiator) | (1 << target)); 685 /* 686 * Setup BSY timeout (selection timeout). 687 * 250ms according to the SCSI specification. 688 * T = (X * 256 + 15) * Tclf * 2 (Tclf = 200ns on x68k) 689 * To setup 256ms timeout, 690 * 128000ns/200ns = X * 256 + 15 691 * 640 - 15 = X * 256 692 * X = 625 / 256 693 * X = 2 + 113 / 256 694 * ==> tch = 2, tcm = 113 (correct?) 695 */ 696 /* Time to the information transfer phase start. */ 697 /* XXX These values should be calculated from sc_freq */ 698 bus_space_write_1(iot, ioh, TCH, 2); 699 bus_space_write_1(iot, ioh, TCM, 113); 700 bus_space_write_1(iot, ioh, TCL, 3); 701 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT); 702 703 sc->sc_state = SPC_SELECTING; 704 } 705 706 int 707 spc_reselect(struct spc_softc *sc, int message) 708 { 709 uint8_t selid, target, lun; 710 struct spc_acb *acb; 711 struct scsipi_periph *periph; 712 struct spc_tinfo *ti; 713 714 SPC_TRACE(("spc_reselect ")); 715 /* 716 * The SCSI chip made a snapshot of the data bus while the reselection 717 * was being negotiated. This enables us to determine which target did 718 * the reselect. 719 */ 720 selid = sc->sc_selid & ~(1 << sc->sc_initiator); 721 if (selid & (selid - 1)) { 722 printf("%s: reselect with invalid selid %02x; " 723 "sending DEVICE RESET\n", device_xname(sc->sc_dev), selid); 724 SPC_BREAK(); 725 goto reset; 726 } 727 728 /* 729 * Search wait queue for disconnected cmd 730 * The list should be short, so I haven't bothered with 731 * any more sophisticated structures than a simple 732 * singly linked list. 733 */ 734 target = ffs(selid) - 1; 735 lun = message & 0x07; 736 TAILQ_FOREACH(acb, &sc->nexus_list, chain) { 737 periph = acb->xs->xs_periph; 738 if (periph->periph_target == target && 739 periph->periph_lun == lun) 740 break; 741 } 742 if (acb == NULL) { 743 printf("%s: reselect from target %d lun %d with no nexus; " 744 "sending ABORT\n", device_xname(sc->sc_dev), target, lun); 745 SPC_BREAK(); 746 goto abort; 747 } 748 749 /* Make this nexus active again. */ 750 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 751 sc->sc_state = SPC_CONNECTED; 752 sc->sc_nexus = acb; 753 ti = &sc->sc_tinfo[target]; 754 ti->lubusy |= (1 << lun); 755 spc_setsync(sc, ti); 756 757 if (acb->flags & ACB_RESET) 758 spc_sched_msgout(sc, SEND_DEV_RESET); 759 else if (acb->flags & ACB_ABORT) 760 spc_sched_msgout(sc, SEND_ABORT); 761 762 /* Do an implicit RESTORE POINTERS. */ 763 sc->sc_dp = acb->data_addr; 764 sc->sc_dleft = acb->data_length; 765 sc->sc_cp = (uint8_t *)&acb->scsipi_cmd; 766 sc->sc_cleft = acb->scsipi_cmd_length; 767 768 return (0); 769 770 reset: 771 spc_sched_msgout(sc, SEND_DEV_RESET); 772 return (1); 773 774 abort: 775 spc_sched_msgout(sc, SEND_ABORT); 776 return (1); 777 } 778 779 /* 780 * Schedule a SCSI operation. This has now been pulled out of the interrupt 781 * handler so that we may call it from spc_scsi_cmd and spc_done. This may 782 * save us an unnecessary interrupt just to get things going. Should only be 783 * called when state == SPC_IDLE and at bio pl. 784 */ 785 void 786 spc_sched(struct spc_softc *sc) 787 { 788 struct spc_acb *acb; 789 struct scsipi_periph *periph; 790 struct spc_tinfo *ti; 791 792 /* missing the hw, just return and wait for our hw */ 793 if (sc->sc_flags & SPC_INACTIVE) 794 return; 795 SPC_TRACE(("spc_sched ")); 796 /* 797 * Find first acb in ready queue that is for a target/lunit pair that 798 * is not busy. 799 */ 800 TAILQ_FOREACH(acb, &sc->ready_list, chain) { 801 periph = acb->xs->xs_periph; 802 ti = &sc->sc_tinfo[periph->periph_target]; 803 if ((ti->lubusy & (1 << periph->periph_lun)) == 0) { 804 SPC_MISC(("selecting %d:%d ", 805 periph->periph_target, periph->periph_lun)); 806 TAILQ_REMOVE(&sc->ready_list, acb, chain); 807 sc->sc_nexus = acb; 808 spc_select(sc, acb); 809 return; 810 } else { 811 SPC_MISC(("%d:%d busy\n", 812 periph->periph_target, periph->periph_lun)); 813 } 814 } 815 SPC_MISC(("idle ")); 816 /* Nothing to start; just enable reselections and wait. */ 817 } 818 819 /* 820 * POST PROCESSING OF SCSI_CMD (usually current) 821 */ 822 void 823 spc_done(struct spc_softc *sc, struct spc_acb *acb) 824 { 825 struct scsipi_xfer *xs = acb->xs; 826 struct scsipi_periph *periph = xs->xs_periph; 827 struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 828 829 SPC_TRACE(("spc_done ")); 830 831 if (xs->error == XS_NOERROR) { 832 if (acb->flags & ACB_ABORT) { 833 xs->error = XS_DRIVER_STUFFUP; 834 } else { 835 switch (acb->target_stat) { 836 case SCSI_CHECK: 837 /* First, save the return values */ 838 xs->resid = acb->data_length; 839 /* FALLTHROUGH */ 840 case SCSI_BUSY: 841 xs->status = acb->target_stat; 842 xs->error = XS_BUSY; 843 break; 844 case SCSI_OK: 845 xs->resid = acb->data_length; 846 break; 847 default: 848 xs->error = XS_DRIVER_STUFFUP; 849 #if SPC_DEBUG 850 printf("%s: spc_done: bad stat 0x%x\n", 851 device_xname(sc->sc_dev), acb->target_stat); 852 #endif 853 break; 854 } 855 } 856 } 857 858 #if SPC_DEBUG 859 if ((spc_debug & SPC_SHOWMISC) != 0) { 860 if (xs->resid != 0) 861 printf("resid=%d ", xs->resid); 862 else 863 printf("error=%d\n", xs->error); 864 } 865 #endif 866 867 /* 868 * Remove the ACB from whatever queue it happens to be on. 869 */ 870 if (acb->flags & ACB_NEXUS) 871 ti->lubusy &= ~(1 << periph->periph_lun); 872 if (acb == sc->sc_nexus) { 873 sc->sc_nexus = NULL; 874 sc->sc_state = SPC_IDLE; 875 spc_sched(sc); 876 } else 877 spc_dequeue(sc, acb); 878 879 spc_free_acb(sc, acb, xs->xs_control); 880 ti->cmds++; 881 scsipi_done(xs); 882 } 883 884 void 885 spc_dequeue(struct spc_softc *sc, struct spc_acb *acb) 886 { 887 888 SPC_TRACE(("spc_dequeue ")); 889 if (acb->flags & ACB_NEXUS) 890 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 891 else 892 TAILQ_REMOVE(&sc->ready_list, acb, chain); 893 } 894 895 /* 896 * INTERRUPT/PROTOCOL ENGINE 897 */ 898 899 /* 900 * Precondition: 901 * The SCSI bus is already in the MSGI phase and there is a message byte 902 * on the bus, along with an asserted REQ signal. 903 */ 904 void 905 spc_msgin(struct spc_softc *sc) 906 { 907 bus_space_tag_t iot = sc->sc_iot; 908 bus_space_handle_t ioh = sc->sc_ioh; 909 int n; 910 uint8_t msg; 911 912 SPC_TRACE(("spc_msgin ")); 913 914 if (sc->sc_prevphase == PH_MSGIN) { 915 /* This is a continuation of the previous message. */ 916 n = sc->sc_imp - sc->sc_imess; 917 goto nextbyte; 918 } 919 920 /* This is a new MESSAGE IN phase. Clean up our state. */ 921 sc->sc_flags &= ~SPC_DROP_MSGIN; 922 923 nextmsg: 924 n = 0; 925 sc->sc_imp = &sc->sc_imess[n]; 926 927 nextbyte: 928 /* 929 * Read a whole message, but don't ack the last byte. If we reject the 930 * message, we have to assert ATN during the message transfer phase 931 * itself. 932 */ 933 for (;;) { 934 #ifdef NO_MANUAL_XFER /* XXX */ 935 uint8_t intstat; 936 if (bus_space_read_1(iot, ioh, INTS) != 0) { 937 /* 938 * Target left MESSAGE IN, probably because it 939 * a) noticed our ATN signal, or 940 * b) ran out of messages. 941 */ 942 goto out; 943 } 944 #endif 945 /* If parity error, just dump everything on the floor. */ 946 if ((bus_space_read_1(iot, ioh, SERR) & 947 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) { 948 sc->sc_flags |= SPC_DROP_MSGIN; 949 spc_sched_msgout(sc, SEND_PARITY_ERROR); 950 } 951 952 #ifdef NO_MANUAL_XFER /* XXX */ 953 /* send TRANSFER command. */ 954 bus_space_write_1(iot, ioh, TCH, 0); 955 bus_space_write_1(iot, ioh, TCM, 0); 956 bus_space_write_1(iot, ioh, TCL, 1); 957 bus_space_write_1(iot, ioh, PCTL, 958 sc->sc_phase | PCTL_BFINT_ENAB); 959 #ifdef NEED_DREQ_ON_HARDWARE_XFER 960 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); 961 #else 962 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); 963 #endif 964 intstat = 0; 965 for (;;) { 966 if ((bus_space_read_1(iot, ioh, SSTS) & 967 SSTS_DREG_EMPTY) == 0) 968 break; 969 /* 970 * We have to read INTS before checking SSTS to avoid 971 * race between SSTS_DREG_EMPTY and INTS_CMD_DONE. 972 */ 973 if (intstat != 0) 974 goto out; 975 intstat = bus_space_read_1(iot, ioh, INTS); 976 } 977 msg = bus_space_read_1(iot, ioh, DREG); 978 #else 979 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0) 980 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 981 bus_space_write_1(iot, ioh, PCTL, PCTL_BFINT_ENAB | PH_MSGIN); 982 983 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) { 984 if ((bus_space_read_1(iot, ioh, PSNS) & PH_MASK) 985 != PH_MSGIN || 986 bus_space_read_1(iot, ioh, INTS) != 0) 987 /* 988 * Target left MESSAGE IN, probably because it 989 * a) noticed our ATN signal, or 990 * b) ran out of messages. 991 */ 992 goto out; 993 DELAY(1); /* XXX needs timeout */ 994 } 995 996 msg = bus_space_read_1(iot, ioh, TEMP); 997 #endif 998 999 /* Gather incoming message bytes if needed. */ 1000 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) { 1001 if (n >= SPC_MAX_MSG_LEN) { 1002 sc->sc_flags |= SPC_DROP_MSGIN; 1003 spc_sched_msgout(sc, SEND_REJECT); 1004 } else { 1005 *sc->sc_imp++ = msg; 1006 n++; 1007 /* 1008 * This testing is suboptimal, but most 1009 * messages will be of the one byte variety, so 1010 * it should not affect performance 1011 * significantly. 1012 */ 1013 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0])) 1014 break; 1015 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0])) 1016 break; 1017 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) && 1018 n == sc->sc_imess[1] + 2) 1019 break; 1020 } 1021 } 1022 /* 1023 * If we reach this spot we're either: 1024 * a) in the middle of a multi-byte message, or 1025 * b) dropping bytes. 1026 */ 1027 1028 #ifndef NO_MANUAL_XFER /* XXX */ 1029 /* Ack the last byte read. */ 1030 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK); 1031 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1032 DELAY(1); /* XXX needs timeout */ 1033 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1034 #endif 1035 } 1036 1037 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1038 1039 /* We now have a complete message. Parse it. */ 1040 switch (sc->sc_state) { 1041 struct spc_acb *acb; 1042 struct spc_tinfo *ti; 1043 1044 case SPC_CONNECTED: 1045 SPC_ASSERT(sc->sc_nexus != NULL); 1046 acb = sc->sc_nexus; 1047 ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target]; 1048 1049 switch (sc->sc_imess[0]) { 1050 case MSG_CMDCOMPLETE: 1051 #if 0 1052 if (sc->sc_dleft < 0) { 1053 periph = acb->xs->xs_periph; 1054 printf("%s: %ld extra bytes from %d:%d\n", 1055 device_xname(sc->sc_dev), 1056 (long)-sc->sc_dleft, 1057 periph->periph_target, periph->periph_lun); 1058 sc->sc_dleft = 0; 1059 } 1060 #endif 1061 acb->xs->resid = acb->data_length = sc->sc_dleft; 1062 sc->sc_state = SPC_CMDCOMPLETE; 1063 break; 1064 1065 case MSG_PARITY_ERROR: 1066 /* Resend the last message. */ 1067 spc_sched_msgout(sc, sc->sc_lastmsg); 1068 break; 1069 1070 case MSG_MESSAGE_REJECT: 1071 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg)); 1072 switch (sc->sc_lastmsg) { 1073 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1074 case SEND_IDENTIFY: 1075 ti->flags &= ~(DO_SYNC | DO_WIDE); 1076 ti->period = ti->offset = 0; 1077 spc_setsync(sc, ti); 1078 ti->width = 0; 1079 break; 1080 #endif 1081 #if SPC_USE_SYNCHRONOUS 1082 case SEND_SDTR: 1083 ti->flags &= ~DO_SYNC; 1084 ti->period = ti->offset = 0; 1085 spc_setsync(sc, ti); 1086 break; 1087 #endif 1088 #if SPC_USE_WIDE 1089 case SEND_WDTR: 1090 ti->flags &= ~DO_WIDE; 1091 ti->width = 0; 1092 break; 1093 #endif 1094 case SEND_INIT_DET_ERR: 1095 spc_sched_msgout(sc, SEND_ABORT); 1096 break; 1097 } 1098 break; 1099 1100 case MSG_NOOP: 1101 break; 1102 1103 case MSG_DISCONNECT: 1104 ti->dconns++; 1105 sc->sc_state = SPC_DISCONNECT; 1106 break; 1107 1108 case MSG_SAVEDATAPOINTER: 1109 acb->data_addr = sc->sc_dp; 1110 acb->data_length = sc->sc_dleft; 1111 break; 1112 1113 case MSG_RESTOREPOINTERS: 1114 sc->sc_dp = acb->data_addr; 1115 sc->sc_dleft = acb->data_length; 1116 sc->sc_cp = (uint8_t *)&acb->scsipi_cmd; 1117 sc->sc_cleft = acb->scsipi_cmd_length; 1118 break; 1119 1120 case MSG_EXTENDED: 1121 switch (sc->sc_imess[2]) { 1122 #if SPC_USE_SYNCHRONOUS 1123 case MSG_EXT_SDTR: 1124 if (sc->sc_imess[1] != 3) 1125 goto reject; 1126 ti->period = sc->sc_imess[3]; 1127 ti->offset = sc->sc_imess[4]; 1128 ti->flags &= ~DO_SYNC; 1129 if (ti->offset == 0) { 1130 } else if (ti->period < sc->sc_minsync || 1131 ti->period > sc->sc_maxsync || 1132 ti->offset > 8) { 1133 ti->period = ti->offset = 0; 1134 spc_sched_msgout(sc, SEND_SDTR); 1135 } else { 1136 scsipi_printaddr(acb->xs->xs_periph); 1137 printf("sync, offset %d, " 1138 "period %dnsec\n", 1139 ti->offset, ti->period * 4); 1140 } 1141 spc_setsync(sc, ti); 1142 break; 1143 #endif 1144 1145 #if SPC_USE_WIDE 1146 case MSG_EXT_WDTR: 1147 if (sc->sc_imess[1] != 2) 1148 goto reject; 1149 ti->width = sc->sc_imess[3]; 1150 ti->flags &= ~DO_WIDE; 1151 if (ti->width == 0) { 1152 } else if (ti->width > SPC_MAX_WIDTH) { 1153 ti->width = 0; 1154 spc_sched_msgout(sc, SEND_WDTR); 1155 } else { 1156 scsipi_printaddr(acb->xs->xs_periph); 1157 printf("wide, width %d\n", 1158 1 << (3 + ti->width)); 1159 } 1160 break; 1161 #endif 1162 1163 default: 1164 printf("%s: unrecognized MESSAGE EXTENDED; " 1165 "sending REJECT\n", 1166 device_xname(sc->sc_dev)); 1167 SPC_BREAK(); 1168 goto reject; 1169 } 1170 break; 1171 1172 default: 1173 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1174 device_xname(sc->sc_dev)); 1175 SPC_BREAK(); 1176 reject: 1177 spc_sched_msgout(sc, SEND_REJECT); 1178 break; 1179 } 1180 break; 1181 1182 case SPC_RESELECTED: 1183 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { 1184 printf("%s: reselect without IDENTIFY; " 1185 "sending DEVICE RESET\n", device_xname(sc->sc_dev)); 1186 SPC_BREAK(); 1187 goto reset; 1188 } 1189 1190 (void) spc_reselect(sc, sc->sc_imess[0]); 1191 break; 1192 1193 default: 1194 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1195 device_xname(sc->sc_dev)); 1196 SPC_BREAK(); 1197 reset: 1198 spc_sched_msgout(sc, SEND_DEV_RESET); 1199 break; 1200 1201 #ifdef notdef 1202 abort: 1203 spc_sched_msgout(sc, SEND_ABORT); 1204 break; 1205 #endif 1206 } 1207 1208 #ifndef NO_MANUAL_XFER /* XXX */ 1209 /* Ack the last message byte. */ 1210 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK); 1211 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1212 DELAY(1); /* XXX needs timeout */ 1213 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1214 #endif 1215 1216 /* Go get the next message, if any. */ 1217 goto nextmsg; 1218 1219 out: 1220 #ifdef NO_MANUAL_XFER /* XXX */ 1221 /* Ack the last message byte. */ 1222 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1223 #endif 1224 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1225 } 1226 1227 /* 1228 * Send the highest priority, scheduled message. 1229 */ 1230 void 1231 spc_msgout(struct spc_softc *sc) 1232 { 1233 bus_space_tag_t iot = sc->sc_iot; 1234 bus_space_handle_t ioh = sc->sc_ioh; 1235 #if SPC_USE_SYNCHRONOUS 1236 struct spc_tinfo *ti; 1237 #endif 1238 int n; 1239 1240 SPC_TRACE(("spc_msgout ")); 1241 1242 if (sc->sc_prevphase == PH_MSGOUT) { 1243 if (sc->sc_omp == sc->sc_omess) { 1244 /* 1245 * This is a retransmission. 1246 * 1247 * We get here if the target stayed in MESSAGE OUT 1248 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates 1249 * that all of the previously transmitted messages must 1250 * be sent again, in the same order. Therefore, we 1251 * requeue all the previously transmitted messages, and 1252 * start again from the top. Our simple priority 1253 * scheme keeps the messages in the right order. 1254 */ 1255 SPC_MISC(("retransmitting ")); 1256 sc->sc_msgpriq |= sc->sc_msgoutq; 1257 /* 1258 * Set ATN. If we're just sending a trivial 1-byte 1259 * message, we'll clear ATN later on anyway. 1260 */ 1261 bus_space_write_1(iot, ioh, SCMD, 1262 SCMD_SET_ATN); /* XXX? */ 1263 } else { 1264 /* This is a continuation of the previous message. */ 1265 n = sc->sc_omp - sc->sc_omess; 1266 goto nextbyte; 1267 } 1268 } 1269 1270 /* No messages transmitted so far. */ 1271 sc->sc_msgoutq = 0; 1272 sc->sc_lastmsg = 0; 1273 1274 nextmsg: 1275 /* Pick up highest priority message. */ 1276 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq; 1277 sc->sc_msgpriq &= ~sc->sc_currmsg; 1278 sc->sc_msgoutq |= sc->sc_currmsg; 1279 1280 /* Build the outgoing message data. */ 1281 switch (sc->sc_currmsg) { 1282 case SEND_IDENTIFY: 1283 SPC_ASSERT(sc->sc_nexus != NULL); 1284 sc->sc_omess[0] = 1285 MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1); 1286 n = 1; 1287 break; 1288 1289 #if SPC_USE_SYNCHRONOUS 1290 case SEND_SDTR: 1291 SPC_ASSERT(sc->sc_nexus != NULL); 1292 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1293 sc->sc_omess[4] = MSG_EXTENDED; 1294 sc->sc_omess[3] = MSG_EXT_SDTR_LEN; 1295 sc->sc_omess[2] = MSG_EXT_SDTR; 1296 sc->sc_omess[1] = ti->period >> 2; 1297 sc->sc_omess[0] = ti->offset; 1298 n = 5; 1299 break; 1300 #endif 1301 1302 #if SPC_USE_WIDE 1303 case SEND_WDTR: 1304 SPC_ASSERT(sc->sc_nexus != NULL); 1305 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1306 sc->sc_omess[3] = MSG_EXTENDED; 1307 sc->sc_omess[2] = MSG_EXT_WDTR_LEN; 1308 sc->sc_omess[1] = MSG_EXT_WDTR; 1309 sc->sc_omess[0] = ti->width; 1310 n = 4; 1311 break; 1312 #endif 1313 1314 case SEND_DEV_RESET: 1315 sc->sc_flags |= SPC_ABORTING; 1316 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1317 n = 1; 1318 break; 1319 1320 case SEND_REJECT: 1321 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1322 n = 1; 1323 break; 1324 1325 case SEND_PARITY_ERROR: 1326 sc->sc_omess[0] = MSG_PARITY_ERROR; 1327 n = 1; 1328 break; 1329 1330 case SEND_INIT_DET_ERR: 1331 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1332 n = 1; 1333 break; 1334 1335 case SEND_ABORT: 1336 sc->sc_flags |= SPC_ABORTING; 1337 sc->sc_omess[0] = MSG_ABORT; 1338 n = 1; 1339 break; 1340 1341 default: 1342 printf("%s: unexpected MESSAGE OUT; sending NOOP\n", 1343 device_xname(sc->sc_dev)); 1344 SPC_BREAK(); 1345 sc->sc_omess[0] = MSG_NOOP; 1346 n = 1; 1347 break; 1348 } 1349 sc->sc_omp = &sc->sc_omess[n]; 1350 1351 nextbyte: 1352 /* Send message bytes. */ 1353 /* send TRANSFER command. */ 1354 bus_space_write_1(iot, ioh, TCH, n >> 16); 1355 bus_space_write_1(iot, ioh, TCM, n >> 8); 1356 bus_space_write_1(iot, ioh, TCL, n); 1357 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1358 #ifdef NEED_DREQ_ON_HARDWARE_XFER 1359 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1360 #else 1361 bus_space_write_1(iot, ioh, SCMD, 1362 SCMD_XFR | SCMD_PROG_XFR); 1363 #endif 1364 for (;;) { 1365 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1366 break; 1367 if (bus_space_read_1(iot, ioh, INTS) != 0) 1368 goto out; 1369 } 1370 for (;;) { 1371 #if 0 1372 for (;;) { 1373 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1374 break; 1375 /* Wait for REQINIT. XXX Need timeout. */ 1376 } 1377 #endif 1378 if (bus_space_read_1(iot, ioh, INTS) != 0) { 1379 /* 1380 * Target left MESSAGE OUT, possibly to reject 1381 * our message. 1382 * 1383 * If this is the last message being sent, then we 1384 * deassert ATN, since either the target is going to 1385 * ignore this message, or it's going to ask for a 1386 * retransmission via MESSAGE PARITY ERROR (in which 1387 * case we reassert ATN anyway). 1388 */ 1389 #if 0 1390 if (sc->sc_msgpriq == 0) 1391 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1392 #endif 1393 goto out; 1394 } 1395 1396 #if 0 1397 /* Clear ATN before last byte if this is the last message. */ 1398 if (n == 1 && sc->sc_msgpriq == 0) 1399 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1400 #endif 1401 1402 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0) 1403 DELAY(1); 1404 /* Send message byte. */ 1405 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp); 1406 --n; 1407 /* Keep track of the last message we've sent any bytes of. */ 1408 sc->sc_lastmsg = sc->sc_currmsg; 1409 #if 0 1410 /* Wait for ACK to be negated. XXX Need timeout. */ 1411 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 1412 ; 1413 #endif 1414 1415 if (n == 0) 1416 break; 1417 } 1418 1419 /* We get here only if the entire message has been transmitted. */ 1420 if (sc->sc_msgpriq != 0) { 1421 /* There are more outgoing messages. */ 1422 goto nextmsg; 1423 } 1424 1425 /* 1426 * The last message has been transmitted. We need to remember the last 1427 * message transmitted (in case the target switches to MESSAGE IN phase 1428 * and sends a MESSAGE REJECT), and the list of messages transmitted 1429 * this time around (in case the target stays in MESSAGE OUT phase to 1430 * request a retransmit). 1431 */ 1432 1433 out: 1434 /* Disable REQ/ACK protocol. */ 1435 return; 1436 } 1437 1438 /* 1439 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc 1440 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1441 * and ACK deasserted (i.e. waiting for a data byte) 1442 * 1443 * This new revision has been optimized (I tried) to make the common case fast, 1444 * and the rarer cases (as a result) somewhat more complex 1445 */ 1446 int 1447 spc_dataout_pio(struct spc_softc *sc, uint8_t *p, int n) 1448 { 1449 bus_space_tag_t iot = sc->sc_iot; 1450 bus_space_handle_t ioh = sc->sc_ioh; 1451 uint8_t intstat = 0; 1452 int out = 0; 1453 #define DOUTAMOUNT 8 /* Full FIFO */ 1454 1455 SPC_TRACE(("spc_dataout_pio ")); 1456 /* send TRANSFER command. */ 1457 bus_space_write_1(iot, ioh, TCH, n >> 16); 1458 bus_space_write_1(iot, ioh, TCM, n >> 8); 1459 bus_space_write_1(iot, ioh, TCL, n); 1460 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1461 #ifdef NEED_DREQ_ON_HARDWARE_XFER 1462 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1463 #else 1464 bus_space_write_1(iot, ioh, SCMD, 1465 SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 1466 #endif 1467 for (;;) { 1468 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1469 break; 1470 if (bus_space_read_1(iot, ioh, INTS) != 0) 1471 break; 1472 } 1473 1474 /* 1475 * I have tried to make the main loop as tight as possible. This 1476 * means that some of the code following the loop is a bit more 1477 * complex than otherwise. 1478 */ 1479 while (n > 0) { 1480 int xfer; 1481 1482 for (;;) { 1483 intstat = bus_space_read_1(iot, ioh, INTS); 1484 /* Wait till buffer is empty. */ 1485 if ((bus_space_read_1(iot, ioh, SSTS) & 1486 SSTS_DREG_EMPTY) != 0) 1487 break; 1488 /* Break on interrupt. */ 1489 if (intstat != 0) 1490 goto phasechange; 1491 DELAY(1); 1492 } 1493 1494 xfer = uimin(DOUTAMOUNT, n); 1495 1496 SPC_MISC(("%d> ", xfer)); 1497 1498 n -= xfer; 1499 out += xfer; 1500 1501 bus_space_write_multi_1(iot, ioh, DREG, p, xfer); 1502 p += xfer; 1503 } 1504 1505 if (out == 0) { 1506 for (;;) { 1507 if (bus_space_read_1(iot, ioh, INTS) != 0) 1508 break; 1509 DELAY(1); 1510 } 1511 SPC_MISC(("extra data ")); 1512 } else { 1513 /* See the bytes off chip */ 1514 for (;;) { 1515 /* Wait till buffer is empty. */ 1516 if ((bus_space_read_1(iot, ioh, SSTS) & 1517 SSTS_DREG_EMPTY) != 0) 1518 break; 1519 intstat = bus_space_read_1(iot, ioh, INTS); 1520 /* Break on interrupt. */ 1521 if (intstat != 0) 1522 goto phasechange; 1523 DELAY(1); 1524 } 1525 } 1526 1527 phasechange: 1528 /* Stop the FIFO data path. */ 1529 1530 if (intstat != 0) { 1531 /* Some sort of phase change. */ 1532 int amount; 1533 1534 amount = (bus_space_read_1(iot, ioh, TCH) << 16) | 1535 (bus_space_read_1(iot, ioh, TCM) << 8) | 1536 bus_space_read_1(iot, ioh, TCL); 1537 if (amount > 0) { 1538 out -= amount; 1539 SPC_MISC(("+%d ", amount)); 1540 } 1541 } 1542 1543 return out; 1544 } 1545 1546 /* 1547 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc 1548 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1549 * and ACK deasserted (i.e. at least one byte is ready). 1550 * 1551 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1552 * transferred. This, is OK for fast targets, but not so smart for slow 1553 * targets which don't disconnect or for huge transfers. 1554 */ 1555 int 1556 spc_datain_pio(struct spc_softc *sc, uint8_t *p, int n) 1557 { 1558 bus_space_tag_t iot = sc->sc_iot; 1559 bus_space_handle_t ioh = sc->sc_ioh; 1560 int in = 0; 1561 uint8_t intstat, sstat; 1562 #define DINAMOUNT 8 /* Full FIFO */ 1563 1564 SPC_TRACE(("spc_datain_pio ")); 1565 /* send TRANSFER command. */ 1566 bus_space_write_1(iot, ioh, TCH, n >> 16); 1567 bus_space_write_1(iot, ioh, TCM, n >> 8); 1568 bus_space_write_1(iot, ioh, TCL, n); 1569 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1570 #ifdef NEED_DREQ_ON_HARDWARE_XFER 1571 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1572 #else 1573 bus_space_write_1(iot, ioh, SCMD, 1574 SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 1575 #endif 1576 1577 /* 1578 * We leave this loop if one or more of the following is true: 1579 * a) phase != PH_DATAIN && FIFOs are empty 1580 * b) reset has occurred or busfree is detected. 1581 */ 1582 intstat = 0; 1583 while (n > 0) { 1584 sstat = bus_space_read_1(iot, ioh, SSTS); 1585 if ((sstat & SSTS_DREG_FULL) != 0) { 1586 n -= DINAMOUNT; 1587 in += DINAMOUNT; 1588 bus_space_read_multi_1(iot, ioh, DREG, p, DINAMOUNT); 1589 p += DINAMOUNT; 1590 } else if ((sstat & SSTS_DREG_EMPTY) == 0) { 1591 n--; 1592 in++; 1593 *p++ = bus_space_read_1(iot, ioh, DREG); 1594 } else { 1595 if (intstat != 0) 1596 goto phasechange; 1597 intstat = bus_space_read_1(iot, ioh, INTS); 1598 } 1599 } 1600 1601 /* 1602 * Some SCSI-devices are rude enough to transfer more data than what 1603 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 1604 * requested 512. Test for progress, i.e. real transfers. If no real 1605 * transfers have been performed (n is probably already zero) and the 1606 * FIFO is not empty, waste some bytes.... 1607 */ 1608 if (in == 0) { 1609 for (;;) { 1610 sstat = bus_space_read_1(iot, ioh, SSTS); 1611 if ((sstat & SSTS_DREG_EMPTY) == 0) { 1612 (void) bus_space_read_1(iot, ioh, DREG); 1613 } else { 1614 if (intstat != 0) 1615 goto phasechange; 1616 intstat = bus_space_read_1(iot, ioh, INTS); 1617 } 1618 DELAY(1); 1619 } 1620 SPC_MISC(("extra data ")); 1621 } 1622 1623 phasechange: 1624 /* Stop the FIFO data path. */ 1625 1626 return in; 1627 } 1628 1629 /* 1630 * Catch an interrupt from the adaptor 1631 */ 1632 /* 1633 * This is the workhorse routine of the driver. 1634 * Deficiencies (for now): 1635 * 1) always uses programmed I/O 1636 */ 1637 int 1638 spc_intr(void *arg) 1639 { 1640 struct spc_softc *sc = arg; 1641 bus_space_tag_t iot = sc->sc_iot; 1642 bus_space_handle_t ioh = sc->sc_ioh; 1643 uint8_t ints; 1644 struct spc_acb *acb; 1645 struct scsipi_periph *periph; 1646 struct spc_tinfo *ti; 1647 int n; 1648 1649 SPC_TRACE(("spc_intr ")); 1650 1651 ints = bus_space_read_1(iot, ioh, INTS); 1652 if (ints == 0) 1653 return 0; 1654 1655 /* 1656 * Disable interrupt. 1657 */ 1658 bus_space_write_1(iot, ioh, SCTL, 1659 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB); 1660 1661 if (sc->sc_dma_done != NULL && 1662 sc->sc_state == SPC_CONNECTED && 1663 (sc->sc_flags & SPC_DOINGDMA) != 0 && 1664 (sc->sc_phase == PH_DATAOUT || sc->sc_phase == PH_DATAIN)) { 1665 (*sc->sc_dma_done)(sc); 1666 } 1667 1668 loop: 1669 /* 1670 * Loop until transfer completion. 1671 */ 1672 /* 1673 * First check for abnormal conditions, such as reset. 1674 */ 1675 ints = bus_space_read_1(iot, ioh, INTS); 1676 SPC_MISC(("ints = 0x%x ", ints)); 1677 1678 if ((ints & INTS_RST) != 0) { 1679 printf("%s: SCSI bus reset\n", device_xname(sc->sc_dev)); 1680 goto reset; 1681 } 1682 1683 /* 1684 * Check for less serious errors. 1685 */ 1686 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) 1687 != 0) { 1688 printf("%s: SCSI bus parity error\n", device_xname(sc->sc_dev)); 1689 if (sc->sc_prevphase == PH_MSGIN) { 1690 sc->sc_flags |= SPC_DROP_MSGIN; 1691 spc_sched_msgout(sc, SEND_PARITY_ERROR); 1692 } else 1693 spc_sched_msgout(sc, SEND_INIT_DET_ERR); 1694 } 1695 1696 /* 1697 * If we're not already busy doing something test for the following 1698 * conditions: 1699 * 1) We have been reselected by something 1700 * 2) We have selected something successfully 1701 * 3) Our selection process has timed out 1702 * 4) This is really a bus free interrupt just to get a new command 1703 * going? 1704 * 5) Spurious interrupt? 1705 */ 1706 switch (sc->sc_state) { 1707 case SPC_IDLE: 1708 case SPC_SELECTING: 1709 SPC_MISC(("ints:0x%02x ", ints)); 1710 1711 if ((ints & INTS_SEL) != 0) { 1712 /* 1713 * We don't currently support target mode. 1714 */ 1715 printf("%s: target mode selected; going to BUS FREE\n", 1716 device_xname(sc->sc_dev)); 1717 1718 goto sched; 1719 } else if ((ints & INTS_RESEL) != 0) { 1720 SPC_MISC(("reselected ")); 1721 1722 /* 1723 * If we're trying to select a target ourselves, 1724 * push our command back into the ready list. 1725 */ 1726 if (sc->sc_state == SPC_SELECTING) { 1727 SPC_MISC(("backoff selector ")); 1728 SPC_ASSERT(sc->sc_nexus != NULL); 1729 acb = sc->sc_nexus; 1730 sc->sc_nexus = NULL; 1731 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1732 } 1733 1734 /* Save reselection ID. */ 1735 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP); 1736 1737 sc->sc_state = SPC_RESELECTED; 1738 } else if ((ints & INTS_CMD_DONE) != 0) { 1739 SPC_MISC(("selected ")); 1740 1741 /* 1742 * We have selected a target. Things to do: 1743 * a) Determine what message(s) to send. 1744 * b) Verify that we're still selecting the target. 1745 * c) Mark device as busy. 1746 */ 1747 if (sc->sc_state != SPC_SELECTING) { 1748 printf("%s: selection out while idle; " 1749 "resetting\n", device_xname(sc->sc_dev)); 1750 SPC_BREAK(); 1751 goto reset; 1752 } 1753 SPC_ASSERT(sc->sc_nexus != NULL); 1754 acb = sc->sc_nexus; 1755 periph = acb->xs->xs_periph; 1756 ti = &sc->sc_tinfo[periph->periph_target]; 1757 1758 sc->sc_msgpriq = SEND_IDENTIFY; 1759 if (acb->flags & ACB_RESET) 1760 sc->sc_msgpriq |= SEND_DEV_RESET; 1761 else if (acb->flags & ACB_ABORT) 1762 sc->sc_msgpriq |= SEND_ABORT; 1763 else { 1764 #if SPC_USE_SYNCHRONOUS 1765 if ((ti->flags & DO_SYNC) != 0) 1766 sc->sc_msgpriq |= SEND_SDTR; 1767 #endif 1768 #if SPC_USE_WIDE 1769 if ((ti->flags & DO_WIDE) != 0) 1770 sc->sc_msgpriq |= SEND_WDTR; 1771 #endif 1772 } 1773 1774 acb->flags |= ACB_NEXUS; 1775 ti->lubusy |= (1 << periph->periph_lun); 1776 1777 /* Do an implicit RESTORE POINTERS. */ 1778 sc->sc_dp = acb->data_addr; 1779 sc->sc_dleft = acb->data_length; 1780 sc->sc_cp = (uint8_t *)&acb->scsipi_cmd; 1781 sc->sc_cleft = acb->scsipi_cmd_length; 1782 1783 /* On our first connection, schedule a timeout. */ 1784 if ((acb->xs->xs_control & XS_CTL_POLL) == 0) 1785 callout_reset(&acb->xs->xs_callout, 1786 mstohz(acb->timeout), spc_timeout, acb); 1787 1788 sc->sc_state = SPC_CONNECTED; 1789 } else if ((ints & INTS_TIMEOUT) != 0) { 1790 SPC_MISC(("selection timeout ")); 1791 1792 if (sc->sc_state != SPC_SELECTING) { 1793 printf("%s: selection timeout while idle; " 1794 "resetting\n", device_xname(sc->sc_dev)); 1795 SPC_BREAK(); 1796 goto reset; 1797 } 1798 SPC_ASSERT(sc->sc_nexus != NULL); 1799 acb = sc->sc_nexus; 1800 1801 delay(250); 1802 1803 acb->xs->error = XS_SELTIMEOUT; 1804 goto finish; 1805 } else { 1806 if (sc->sc_state != SPC_IDLE) { 1807 printf("%s: BUS FREE while not idle; " 1808 "state=%d\n", 1809 device_xname(sc->sc_dev), sc->sc_state); 1810 SPC_BREAK(); 1811 goto out; 1812 } 1813 1814 goto sched; 1815 } 1816 1817 /* 1818 * Turn off selection stuff, and prepare to catch bus free 1819 * interrupts, parity errors, and phase changes. 1820 */ 1821 1822 sc->sc_flags = 0; 1823 sc->sc_prevphase = PH_INVALID; 1824 goto dophase; 1825 } 1826 1827 if ((ints & INTS_DISCON) != 0) { 1828 /* We've gone to BUS FREE phase. */ 1829 /* disable disconnect interrupt */ 1830 bus_space_write_1(iot, ioh, PCTL, 1831 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB); 1832 /* XXX reset interrput */ 1833 bus_space_write_1(iot, ioh, INTS, ints); 1834 1835 switch (sc->sc_state) { 1836 case SPC_RESELECTED: 1837 goto sched; 1838 1839 case SPC_CONNECTED: 1840 SPC_ASSERT(sc->sc_nexus != NULL); 1841 acb = sc->sc_nexus; 1842 1843 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1844 if (sc->sc_prevphase == PH_MSGOUT) { 1845 /* 1846 * If the target went to BUS FREE phase during 1847 * or immediately after sending a SDTR or WDTR 1848 * message, disable negotiation. 1849 */ 1850 periph = acb->xs->xs_periph; 1851 ti = &sc->sc_tinfo[periph->periph_target]; 1852 switch (sc->sc_lastmsg) { 1853 #if SPC_USE_SYNCHRONOUS 1854 case SEND_SDTR: 1855 ti->flags &= ~DO_SYNC; 1856 ti->period = ti->offset = 0; 1857 break; 1858 #endif 1859 #if SPC_USE_WIDE 1860 case SEND_WDTR: 1861 ti->flags &= ~DO_WIDE; 1862 ti->width = 0; 1863 break; 1864 #endif 1865 } 1866 } 1867 #endif 1868 1869 if ((sc->sc_flags & SPC_ABORTING) == 0) { 1870 /* 1871 * Section 5.1.1 of the SCSI 2 spec suggests 1872 * issuing a REQUEST SENSE following an 1873 * unexpected disconnect. Some devices go into 1874 * a contingent allegiance condition when 1875 * disconnecting, and this is necessary to 1876 * clean up their state. 1877 */ 1878 printf("%s: unexpected disconnect; " 1879 "sending REQUEST SENSE\n", 1880 device_xname(sc->sc_dev)); 1881 SPC_BREAK(); 1882 acb->target_stat = SCSI_CHECK; 1883 acb->xs->error = XS_NOERROR; 1884 goto finish; 1885 } 1886 1887 acb->xs->error = XS_DRIVER_STUFFUP; 1888 goto finish; 1889 1890 case SPC_DISCONNECT: 1891 SPC_ASSERT(sc->sc_nexus != NULL); 1892 acb = sc->sc_nexus; 1893 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain); 1894 sc->sc_nexus = NULL; 1895 goto sched; 1896 1897 case SPC_CMDCOMPLETE: 1898 SPC_ASSERT(sc->sc_nexus != NULL); 1899 acb = sc->sc_nexus; 1900 goto finish; 1901 } 1902 } 1903 else if ((ints & INTS_CMD_DONE) != 0 && 1904 sc->sc_prevphase == PH_MSGIN && 1905 sc->sc_state != SPC_CONNECTED) 1906 goto out; 1907 1908 dophase: 1909 #if 0 1910 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) { 1911 /* Wait for REQINIT. */ 1912 goto out; 1913 } 1914 #else 1915 bus_space_write_1(iot, ioh, INTS, ints); 1916 ints = 0; 1917 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) 1918 delay(1); /* need timeout XXX */ 1919 #endif 1920 1921 /* 1922 * State transition. 1923 */ 1924 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK; 1925 #if 0 1926 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase); 1927 #endif 1928 1929 SPC_MISC(("phase=%d\n", sc->sc_phase)); 1930 switch (sc->sc_phase) { 1931 case PH_MSGOUT: 1932 if (sc->sc_state != SPC_CONNECTED && 1933 sc->sc_state != SPC_RESELECTED) 1934 break; 1935 spc_msgout(sc); 1936 sc->sc_prevphase = PH_MSGOUT; 1937 goto loop; 1938 1939 case PH_MSGIN: 1940 if (sc->sc_state != SPC_CONNECTED && 1941 sc->sc_state != SPC_RESELECTED) 1942 break; 1943 spc_msgin(sc); 1944 sc->sc_prevphase = PH_MSGIN; 1945 goto loop; 1946 1947 case PH_CMD: 1948 if (sc->sc_state != SPC_CONNECTED) 1949 break; 1950 #if SPC_DEBUG 1951 if ((spc_debug & SPC_SHOWMISC) != 0) { 1952 SPC_ASSERT(sc->sc_nexus != NULL); 1953 acb = sc->sc_nexus; 1954 printf("cmd=0x%02x+%d ", 1955 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length - 1); 1956 } 1957 #endif 1958 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft); 1959 sc->sc_cp += n; 1960 sc->sc_cleft -= n; 1961 sc->sc_prevphase = PH_CMD; 1962 goto loop; 1963 1964 case PH_DATAOUT: 1965 if (sc->sc_state != SPC_CONNECTED) 1966 break; 1967 SPC_MISC(("dataout dleft=%zu ", sc->sc_dleft)); 1968 if (sc->sc_dma_start != NULL && 1969 sc->sc_dleft > SPC_MIN_DMA_LEN) { 1970 (*sc->sc_dma_start)(sc, sc->sc_dp, sc->sc_dleft, 0); 1971 sc->sc_prevphase = PH_DATAOUT; 1972 goto out; 1973 } 1974 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft); 1975 sc->sc_dp += n; 1976 sc->sc_dleft -= n; 1977 sc->sc_prevphase = PH_DATAOUT; 1978 goto loop; 1979 1980 case PH_DATAIN: 1981 if (sc->sc_state != SPC_CONNECTED) 1982 break; 1983 SPC_MISC(("datain ")); 1984 if (sc->sc_dma_start != NULL && 1985 sc->sc_dleft > SPC_MIN_DMA_LEN) { 1986 (*sc->sc_dma_start)(sc, sc->sc_dp, sc->sc_dleft, 1); 1987 sc->sc_prevphase = PH_DATAIN; 1988 goto out; 1989 } 1990 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft); 1991 sc->sc_dp += n; 1992 sc->sc_dleft -= n; 1993 sc->sc_prevphase = PH_DATAIN; 1994 goto loop; 1995 1996 case PH_STAT: 1997 if (sc->sc_state != SPC_CONNECTED) 1998 break; 1999 SPC_ASSERT(sc->sc_nexus != NULL); 2000 acb = sc->sc_nexus; 2001 2002 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0) 2003 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 2004 bus_space_write_1(iot, ioh, PCTL, PCTL_BFINT_ENAB | PH_STAT); 2005 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) 2006 DELAY(1); /* XXX needs timeout */ 2007 acb->target_stat = bus_space_read_1(iot, ioh, TEMP); 2008 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK); 2009 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 2010 DELAY(1); /* XXX needs timeout */ 2011 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 2012 2013 SPC_MISC(("target_stat=0x%02x ", acb->target_stat)); 2014 sc->sc_prevphase = PH_STAT; 2015 goto loop; 2016 } 2017 2018 printf("%s: unexpected bus phase; resetting\n", 2019 device_xname(sc->sc_dev)); 2020 SPC_BREAK(); 2021 reset: 2022 spc_init(sc, 1); 2023 return 1; 2024 2025 finish: 2026 callout_stop(&acb->xs->xs_callout); 2027 bus_space_write_1(iot, ioh, INTS, ints); 2028 ints = 0; 2029 spc_done(sc, acb); 2030 goto out; 2031 2032 sched: 2033 sc->sc_state = SPC_IDLE; 2034 spc_sched(sc); 2035 goto out; 2036 2037 out: 2038 if (ints) 2039 bus_space_write_1(iot, ioh, INTS, ints); 2040 bus_space_write_1(iot, ioh, SCTL, 2041 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB); 2042 return 1; 2043 } 2044 2045 void 2046 spc_abort(struct spc_softc *sc, struct spc_acb *acb) 2047 { 2048 2049 /* 2 secs for the abort */ 2050 acb->timeout = SPC_ABORT_TIMEOUT; 2051 acb->flags |= ACB_ABORT; 2052 2053 if (acb == sc->sc_nexus) { 2054 /* 2055 * If we're still selecting, the message will be scheduled 2056 * after selection is complete. 2057 */ 2058 if (sc->sc_state == SPC_CONNECTED) 2059 spc_sched_msgout(sc, SEND_ABORT); 2060 } else { 2061 spc_dequeue(sc, acb); 2062 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 2063 if (sc->sc_state == SPC_IDLE) 2064 spc_sched(sc); 2065 } 2066 } 2067 2068 void 2069 spc_timeout(void *arg) 2070 { 2071 struct spc_acb *acb = arg; 2072 struct scsipi_xfer *xs = acb->xs; 2073 struct scsipi_periph *periph = xs->xs_periph; 2074 struct spc_softc *sc; 2075 int s; 2076 2077 sc = device_private(periph->periph_channel->chan_adapter->adapt_dev); 2078 scsipi_printaddr(periph); 2079 printf("timed out"); 2080 2081 s = splbio(); 2082 2083 if (acb->flags & ACB_ABORT) { 2084 /* abort timed out */ 2085 printf(" AGAIN\n"); 2086 /* XXX Must reset! */ 2087 } else { 2088 /* abort the operation that has timed out */ 2089 printf("\n"); 2090 acb->xs->error = XS_TIMEOUT; 2091 spc_abort(sc, acb); 2092 } 2093 2094 splx(s); 2095 } 2096 2097 #ifdef SPC_DEBUG 2098 /* 2099 * The following functions are mostly used for debugging purposes, either 2100 * directly called from the driver or from the kernel debugger. 2101 */ 2102 2103 void 2104 spc_show_scsi_cmd(struct spc_acb *acb) 2105 { 2106 uint8_t *b = (uint8_t *)&acb->scsipi_cmd; 2107 int i; 2108 2109 scsipi_printaddr(acb->xs->xs_periph); 2110 if ((acb->xs->xs_control & XS_CTL_RESET) == 0) { 2111 for (i = 0; i < acb->scsipi_cmd_length; i++) { 2112 if (i) 2113 printf(","); 2114 printf("%x", b[i]); 2115 } 2116 printf("\n"); 2117 } else 2118 printf("RESET\n"); 2119 } 2120 2121 void 2122 spc_print_acb(struct spc_acb *acb) 2123 { 2124 2125 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags); 2126 printf(" dp=%p dleft=%d target_stat=%x\n", 2127 acb->data_addr, acb->data_length, acb->target_stat); 2128 spc_show_scsi_cmd(acb); 2129 } 2130 2131 void 2132 spc_print_active_acb(void) 2133 { 2134 struct spc_acb *acb; 2135 struct spc_softc *sc = device_lookup_private(&spc_cd, 0); /* XXX */ 2136 2137 printf("ready list:\n"); 2138 TAILQ_FOREACH(acb, &sc->ready_list, chain) 2139 spc_print_acb(acb); 2140 printf("nexus:\n"); 2141 if (sc->sc_nexus != NULL) 2142 spc_print_acb(sc->sc_nexus); 2143 printf("nexus list:\n"); 2144 TAILQ_FOREACH(acb, &sc->nexus_list, chain) 2145 spc_print_acb(acb); 2146 } 2147 2148 void 2149 spc_dump89352(struct spc_softc *sc) 2150 { 2151 bus_space_tag_t iot = sc->sc_iot; 2152 bus_space_handle_t ioh = sc->sc_ioh; 2153 2154 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n", 2155 bus_space_read_1(iot, ioh, BDID), 2156 bus_space_read_1(iot, ioh, SCTL), 2157 bus_space_read_1(iot, ioh, SCMD), 2158 bus_space_read_1(iot, ioh, TMOD)); 2159 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n", 2160 bus_space_read_1(iot, ioh, INTS), 2161 bus_space_read_1(iot, ioh, PSNS), 2162 bus_space_read_1(iot, ioh, SSTS), 2163 bus_space_read_1(iot, ioh, SERR), 2164 bus_space_read_1(iot, ioh, PCTL)); 2165 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n", 2166 bus_space_read_1(iot, ioh, MBC), 2167 #if 0 2168 bus_space_read_1(iot, ioh, DREG), 2169 #else 2170 0, 2171 #endif 2172 bus_space_read_1(iot, ioh, TEMP), 2173 bus_space_read_1(iot, ioh, TCH), 2174 bus_space_read_1(iot, ioh, TCM)); 2175 printf(" TCL=%x EXBF=%x\n", 2176 bus_space_read_1(iot, ioh, TCL), 2177 bus_space_read_1(iot, ioh, EXBF)); 2178 } 2179 2180 void 2181 spc_dump_driver(struct spc_softc *sc) 2182 { 2183 struct spc_tinfo *ti; 2184 int i; 2185 2186 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase); 2187 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x " 2188 "currmsg=%x\n", sc->sc_state, sc->sc_imess[0], 2189 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg); 2190 for (i = 0; i < 7; i++) { 2191 ti = &sc->sc_tinfo[i]; 2192 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2193 i, ti->cmds, ti->dconns, ti->touts); 2194 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2195 } 2196 } 2197 #endif
Cache object: 78f32f6688e62e97465ab8cb31fb3b48
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