The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/midway.c

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    1 /*      $NetBSD: midway.c,v 1.66 2005/02/27 00:27:02 perry Exp $        */
    2 /*      (sync'd to midway.c 1.68)       */
    3 
    4 /*
    5  *
    6  * Copyright (c) 1996 Charles D. Cranor and Washington University.
    7  * All rights reserved.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed by Charles D. Cranor and
   20  *      Washington University.
   21  * 4. The name of the author may not be used to endorse or promote products
   22  *    derived from this software without specific prior written permission.
   23  *
   24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   25  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   26  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   27  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   29  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   33  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   34  */
   35 
   36 /*
   37  *
   38  * m i d w a y . c   e n i 1 5 5   d r i v e r
   39  *
   40  * author: Chuck Cranor <chuck@ccrc.wustl.edu>
   41  * started: spring, 1996 (written from scratch).
   42  *
   43  * notes from the author:
   44  *   Extra special thanks go to Werner Almesberger, EPFL LRC.   Werner's
   45  *   ENI driver was especially useful in figuring out how this card works.
   46  *   I would also like to thank Werner for promptly answering email and being
   47  *   generally helpful.
   48  */
   49 /*
   50  *  1997/12/02, major update on 1999/04/06 kjc
   51  *    new features added:
   52  *      - BPF support (link type is DLT_ATM_RFC1483)
   53  *        BPF understands only LLC/SNAP!! (because bpf can't
   54  *        handle variable link header length.)
   55  *        (bpfwrite should work if atm_pseudohdr and LLC/SNAP are prepended.)
   56  *      - support vc shaping
   57  *      - integrate IPv6 support.
   58  *      - support pvc sub interface
   59  *
   60  *        initial work on per-pvc-interface for ipv6 was done
   61  *        by Katsushi Kobayashi <ikob@cc.uec.ac.jp> of the WIDE Project.
   62  *        some of the extensions for pvc subinterfaces are merged from
   63  *        the CAIRN project written by Suresh Bhogavilli (suresh@isi.edu).
   64  *
   65  *    code cleanup:
   66  *      - remove WMAYBE related code.  ENI WMAYBE DMA doesn't work.
   67  *      - remove updating if_lastchange for every packet.
   68  */
   69 
   70 #include <sys/cdefs.h>
   71 __KERNEL_RCSID(0, "$NetBSD: midway.c,v 1.66 2005/02/27 00:27:02 perry Exp $");
   72 
   73 #include "opt_natm.h"
   74 
   75 #undef  EN_DEBUG
   76 #undef  EN_DEBUG_RANGE          /* check ranges on en_read/en_write's? */
   77 #define EN_MBUF_OPT             /* try and put more stuff in mbuf? */
   78 #define EN_DIAG
   79 #define EN_STAT
   80 #ifndef EN_DMA
   81 #define EN_DMA          1       /* use DMA? */
   82 #endif
   83 #define EN_NOTXDMA      0       /* hook to disable tx DMA only */
   84 #define EN_NORXDMA      0       /* hook to disable rx DMA only */
   85 #define EN_NOWMAYBE     1       /* hook to disable word maybe DMA */
   86                                 /* XXX: WMAYBE doesn't work, needs debugging */
   87 #define EN_DDBHOOK      1       /* compile in ddb functions */
   88 #if defined(MIDWAY_ADPONLY)
   89 #define EN_ENIDMAFIX    0       /* no ENI cards to worry about */
   90 #else
   91 #define EN_ENIDMAFIX    1       /* avoid byte DMA on the ENI card (see below) */
   92 #endif
   93 
   94 /*
   95  * note on EN_ENIDMAFIX: the byte aligner on the ENI version of the card
   96  * appears to be broken.   it works just fine if there is no load... however
   97  * when the card is loaded the data get corrupted.   to see this, one only
   98  * has to use "telnet" over ATM.   do the following command in "telnet":
   99  *      cat /usr/share/misc/termcap
  100  * "telnet" seems to generate lots of 1023 byte mbufs (which make great
  101  * use of the byte aligner).   watch "netstat -s" for checksum errors.
  102  *
  103  * I further tested this by adding a function that compared the transmit
  104  * data on the card's SRAM with the data in the mbuf chain _after_ the
  105  * "transmit DMA complete" interrupt.   using the "telnet" test I got data
  106  * mismatches where the byte-aligned data should have been.   using ddb
  107  * and en_dumpmem() I verified that the DTQs fed into the card were
  108  * absolutely correct.   thus, we are forced to concluded that the ENI
  109  * hardware is buggy.   note that the Adaptec version of the card works
  110  * just fine with byte DMA.
  111  *
  112  * bottom line: we set EN_ENIDMAFIX to 1 to avoid byte DMAs on the ENI
  113  * card.
  114  */
  115 
  116 #if defined(DIAGNOSTIC) && !defined(EN_DIAG)
  117 #define EN_DIAG                 /* link in with master DIAG option */
  118 #endif
  119 #ifdef EN_STAT
  120 #define EN_COUNT(X) (X)++
  121 #else
  122 #define EN_COUNT(X) /* nothing */
  123 #endif
  124 
  125 #ifdef EN_DEBUG
  126 #undef  EN_DDBHOOK
  127 #define EN_DDBHOOK      1
  128 #define STATIC /* nothing */
  129 #define INLINE /* nothing */
  130 #else /* EN_DEBUG */
  131 #define STATIC static
  132 #define INLINE inline
  133 #endif /* EN_DEBUG */
  134 
  135 #ifdef __FreeBSD__
  136 #include "en.h"
  137 #endif
  138 
  139 #ifdef __NetBSD__
  140 #include "opt_ddb.h"
  141 #include "opt_inet.h"
  142 #else
  143 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
  144 #endif
  145 
  146 #if NEN > 0 || !defined(__FreeBSD__)
  147 
  148 #include <sys/param.h>
  149 #include <sys/systm.h>
  150 #if defined(__NetBSD__) || defined(__OpenBSD__) || defined(__bsdi__)
  151 #include <sys/device.h>
  152 #endif
  153 #if defined(__FreeBSD__)
  154 #include <sys/sockio.h>
  155 #else
  156 #include <sys/ioctl.h>
  157 #endif
  158 #include <sys/mbuf.h>
  159 #include <sys/socket.h>
  160 #include <sys/socketvar.h>
  161 #include <sys/queue.h>
  162 #include <sys/proc.h>
  163 
  164 #include <net/if.h>
  165 #include <net/if_atm.h>
  166 
  167 #ifdef __NetBSD__
  168 #include <uvm/uvm_extern.h>
  169 #else
  170 #include <vm/vm.h>
  171 #endif
  172 
  173 #if defined(INET) || defined(INET6)
  174 #include <netinet/in.h>
  175 #include <netinet/if_atm.h>
  176 #ifdef INET6
  177 #include <netinet6/in6_var.h>
  178 #endif
  179 #endif
  180 
  181 #ifdef NATM
  182 #if !(defined(INET) || defined(INET6))
  183 #include <netinet/in.h>
  184 #endif
  185 #include <netnatm/natm.h>
  186 #endif
  187 
  188 
  189 #if !defined(__FreeBSD__)
  190 #include <machine/bus.h>
  191 
  192 #endif
  193 
  194 #if defined(__NetBSD__) || defined(__OpenBSD__)
  195 #include <dev/ic/midwayreg.h>
  196 #include <dev/ic/midwayvar.h>
  197 #if defined(__alpha__)
  198 /* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
  199 #undef vtophys
  200 #define vtophys(va)     alpha_XXX_dmamap((vaddr_t)(va))
  201 #endif
  202 #elif defined(__FreeBSD__)
  203 #include <machine/cpufunc.h>            /* for rdtsc proto for clock.h below */
  204 #include <machine/clock.h>              /* for DELAY */
  205 #include <dev/en/midwayreg.h>
  206 #include <dev/en/midwayvar.h>
  207 #include <vm/pmap.h>                    /* for vtophys proto */
  208 
  209 /*
  210  * 2.1.x does not have if_softc.   detect this by seeing if IFF_NOTRAILERS
  211  * is defined, as per kjc.
  212  */
  213 #ifdef IFF_NOTRAILERS
  214 #define MISSING_IF_SOFTC
  215 #else
  216 #define IFF_NOTRAILERS 0
  217 #endif
  218 
  219 #endif  /* __FreeBSD__ */
  220 
  221 #ifdef ATM_PVCEXT
  222 # ifndef NATM
  223    /* this is for for __KAME__ */
  224 #  include <netinet/in.h>
  225 # endif
  226 # if defined (__KAME__) && defined(INET6)
  227 #  include <netinet6/in6_ifattach.h>
  228 # endif
  229 #endif /*ATM_PVCEXT*/
  230 
  231 #include "bpfilter.h"
  232 #if NBPFILTER > 0
  233 #include <net/bpf.h>
  234 #ifdef __FreeBSD__
  235 #define BPFATTACH(ifp, dlt, hlen)       bpfattach((ifp), (dlt), (hlen))
  236 #define BPF_MTAP(ifp, m)                bpf_mtap((ifp), (m))
  237 #else
  238 #define BPFATTACH(ifp, dlt, hlen)       bpfattach(&(ifp)->if_bpf, (ifp), (dlt), (hlen))
  239 #define BPF_MTAP(ifp, m)                bpf_mtap((ifp)->if_bpf, (m))
  240 #endif
  241 #endif /* NBPFILTER > 0 */
  242 
  243 /*
  244  * params
  245  */
  246 
  247 #ifndef EN_TXHIWAT
  248 #define EN_TXHIWAT      (64*1024)       /* max 64 KB waiting to be DMAd out */
  249 #endif
  250 
  251 #ifndef EN_MINDMA
  252 #define EN_MINDMA       32      /* don't DMA anything less than this (bytes) */
  253 #endif
  254 
  255 #define RX_NONE         0xffff  /* recv VC not in use */
  256 
  257 #define EN_OBHDR        ATM_PH_DRIVER7  /* TBD in first mbuf ! */
  258 #define EN_OBTRL        ATM_PH_DRIVER8  /* PDU trailer in last mbuf ! */
  259 
  260 #define ENOTHER_FREE    0x01            /* free rxslot */
  261 #define ENOTHER_DRAIN   0x02            /* almost free (drain DRQ DMA) */
  262 #define ENOTHER_RAW     0x04            /* 'raw' access  (aka boodi mode) */
  263 #define ENOTHER_SWSL    0x08            /* in software service list */
  264 
  265 int en_dma = EN_DMA;                    /* use DMA (switch off for dbg) */
  266 
  267 /*
  268  * autoconfig attachments
  269  */
  270 
  271 extern struct cfdriver en_cd;
  272 
  273 /*
  274  * local structures
  275  */
  276 
  277 /*
  278  * params to en_txlaunch() function
  279  */
  280 
  281 struct en_launch {
  282   u_int32_t tbd1;               /* TBD 1 */
  283   u_int32_t tbd2;               /* TBD 2 */
  284   u_int32_t pdu1;               /* PDU 1 (aal5) */
  285   int nodma;                    /* don't use DMA */
  286   int need;                     /* total space we need (pad out if less data) */
  287   int mlen;                     /* length of mbuf (for dtq) */
  288   struct mbuf *t;               /* data */
  289   u_int32_t aal;                /* aal code */
  290   u_int32_t atm_vci;            /* vci */
  291   u_int8_t atm_flags;           /* flags */
  292 };
  293 
  294 
  295 /*
  296  * DMA table (index by # of words)
  297  *
  298  * plan A: use WMAYBE
  299  * plan B: avoid WMAYBE
  300  */
  301 
  302 struct en_dmatab {
  303   u_int8_t bcode;               /* code */
  304   u_int8_t divshift;            /* byte divisor */
  305 };
  306 
  307 static struct en_dmatab en_dma_planA[] = {
  308   { 0, 0 },             /* 0 */         { MIDDMA_WORD, 2 },     /* 1 */
  309   { MIDDMA_2WORD, 3},   /* 2 */         { MIDDMA_4WMAYBE, 2},   /* 3 */
  310   { MIDDMA_4WORD, 4},   /* 4 */         { MIDDMA_8WMAYBE, 2},   /* 5 */
  311   { MIDDMA_8WMAYBE, 2}, /* 6 */         { MIDDMA_8WMAYBE, 2},   /* 7 */
  312   { MIDDMA_8WORD, 5},   /* 8 */         { MIDDMA_16WMAYBE, 2},  /* 9 */
  313   { MIDDMA_16WMAYBE,2}, /* 10 */        { MIDDMA_16WMAYBE, 2},  /* 11 */
  314   { MIDDMA_16WMAYBE,2}, /* 12 */        { MIDDMA_16WMAYBE, 2},  /* 13 */
  315   { MIDDMA_16WMAYBE,2}, /* 14 */        { MIDDMA_16WMAYBE, 2},  /* 15 */
  316   { MIDDMA_16WORD, 6},  /* 16 */
  317 };
  318 
  319 static struct en_dmatab en_dma_planB[] = {
  320   { 0, 0 },             /* 0 */         { MIDDMA_WORD, 2},      /* 1 */
  321   { MIDDMA_2WORD, 3},   /* 2 */         { MIDDMA_WORD, 2},      /* 3 */
  322   { MIDDMA_4WORD, 4},   /* 4 */         { MIDDMA_WORD, 2},      /* 5 */
  323   { MIDDMA_2WORD, 3},   /* 6 */         { MIDDMA_WORD, 2},      /* 7 */
  324   { MIDDMA_8WORD, 5},   /* 8 */         { MIDDMA_WORD, 2},      /* 9 */
  325   { MIDDMA_2WORD, 3},   /* 10 */        { MIDDMA_WORD, 2},      /* 11 */
  326   { MIDDMA_4WORD, 4},   /* 12 */        { MIDDMA_WORD, 2},      /* 13 */
  327   { MIDDMA_2WORD, 3},   /* 14 */        { MIDDMA_WORD, 2},      /* 15 */
  328   { MIDDMA_16WORD, 6},  /* 16 */
  329 };
  330 
  331 static struct en_dmatab *en_dmaplan = en_dma_planA;
  332 
  333 /*
  334  * prototypes
  335  */
  336 
  337 STATIC INLINE   int en_b2sz(int) __attribute__ ((unused));
  338 #ifdef EN_DDBHOOK
  339                 int en_dump(int,int);
  340                 int en_dumpmem(int,int,int);
  341 #endif
  342 STATIC          void en_dmaprobe(struct en_softc *);
  343 STATIC          int en_dmaprobe_doit(struct en_softc *, u_int8_t *,
  344                     u_int8_t *, int);
  345 STATIC INLINE   int en_dqneed(struct en_softc *, caddr_t, u_int,
  346                     u_int) __attribute__ ((unused));
  347 STATIC          void en_init(struct en_softc *);
  348 STATIC          int en_ioctl(struct ifnet *, EN_IOCTL_CMDT, caddr_t);
  349 STATIC INLINE   int en_k2sz(int) __attribute__ ((unused));
  350 STATIC          void en_loadvc(struct en_softc *, int);
  351 STATIC          int en_mfix(struct en_softc *, struct mbuf **,
  352                     struct mbuf *);
  353 STATIC INLINE   struct mbuf *en_mget(struct en_softc *, u_int,
  354                     u_int *) __attribute__ ((unused));
  355 STATIC INLINE   u_int32_t en_read(struct en_softc *,
  356                     u_int32_t) __attribute__ ((unused));
  357 STATIC          int en_rxctl(struct en_softc *, struct atm_pseudoioctl *, int);
  358 STATIC          void en_txdma(struct en_softc *, int);
  359 STATIC          void en_txlaunch(struct en_softc *, int, struct en_launch *);
  360 STATIC          void en_service(struct en_softc *);
  361 STATIC          void en_start(struct ifnet *);
  362 STATIC INLINE   int en_sz2b(int) __attribute__ ((unused));
  363 STATIC INLINE   void en_write(struct en_softc *, u_int32_t,
  364                     u_int32_t) __attribute__ ((unused));
  365 
  366 #ifdef ATM_PVCEXT
  367 static void rrp_add(struct en_softc *, struct ifnet *);
  368 static struct ifnet *en_pvcattach(struct ifnet *);
  369 static int en_txctl(struct en_softc *, int, int, int);
  370 static int en_pvctx(struct en_softc *, struct pvctxreq *);
  371 static int en_pvctxget(struct en_softc *, struct pvctxreq *);
  372 static int en_pcr2txspeed(int);
  373 static int en_txspeed2pcr(int);
  374 static struct ifnet *en_vci2ifp(struct en_softc *, int);
  375 #endif
  376 
  377 /*
  378  * macros/inline
  379  */
  380 
  381 /*
  382  * raw read/write macros
  383  */
  384 
  385 #define EN_READDAT(SC,R) en_read(SC,R)
  386 #define EN_WRITEDAT(SC,R,V) en_write(SC,R,V)
  387 
  388 /*
  389  * cooked read/write macros
  390  */
  391 
  392 #define EN_READ(SC,R) ntohl(en_read(SC,R))
  393 #define EN_WRITE(SC,R,V) en_write(SC,R, htonl(V))
  394 
  395 #define EN_WRAPADD(START,STOP,CUR,VAL) { \
  396         (CUR) = (CUR) + (VAL); \
  397         if ((CUR) >= (STOP)) \
  398                 (CUR) = (START) + ((CUR) - (STOP)); \
  399         }
  400 
  401 #define WORD_IDX(START, X) (((X) - (START)) / sizeof(u_int32_t))
  402 
  403 /* we store sc->dtq and sc->drq data in the following format... */
  404 #define EN_DQ_MK(SLOT,LEN) (((SLOT) << 20)|(LEN)|(0x80000))
  405                                         /* the 0x80000 ensures we != 0 */
  406 #define EN_DQ_SLOT(X) ((X) >> 20)
  407 #define EN_DQ_LEN(X) ((X) & 0x3ffff)
  408 
  409 /* format of DTQ/DRQ word 1 differs between ENI and ADP */
  410 #if defined(MIDWAY_ENIONLY)
  411 
  412 #define MID_MK_TXQ(SC,CNT,CHAN,END,BCODE) \
  413         EN_WRITE((SC), (SC)->dtq_us, \
  414                 MID_MK_TXQ_ENI((CNT), (CHAN), (END), (BCODE)));
  415 
  416 #define MID_MK_RXQ(SC,CNT,VCI,END,BCODE) \
  417         EN_WRITE((SC), (SC)->drq_us, \
  418                 MID_MK_RXQ_ENI((CNT), (VCI), (END), (BCODE)));
  419 
  420 #elif defined(MIDWAY_ADPONLY)
  421 
  422 #define MID_MK_TXQ(SC,CNT,CHAN,END,JK) \
  423         EN_WRITE((SC), (SC)->dtq_us, \
  424                 MID_MK_TXQ_ADP((CNT), (CHAN), (END), (JK)));
  425 
  426 #define MID_MK_RXQ(SC,CNT,VCI,END,JK) \
  427         EN_WRITE((SC), (SC)->drq_us, \
  428                 MID_MK_RXQ_ADP((CNT), (VCI), (END), (JK)));
  429 
  430 #else
  431 
  432 #define MID_MK_TXQ(SC,CNT,CHAN,END,JK_OR_BCODE) { \
  433         if ((SC)->is_adaptec) \
  434           EN_WRITE((SC), (SC)->dtq_us, \
  435                   MID_MK_TXQ_ADP((CNT), (CHAN), (END), (JK_OR_BCODE))); \
  436         else \
  437           EN_WRITE((SC), (SC)->dtq_us, \
  438                   MID_MK_TXQ_ENI((CNT), (CHAN), (END), (JK_OR_BCODE))); \
  439         }
  440 
  441 #define MID_MK_RXQ(SC,CNT,VCI,END,JK_OR_BCODE) { \
  442         if ((SC)->is_adaptec) \
  443           EN_WRITE((SC), (SC)->drq_us, \
  444                   MID_MK_RXQ_ADP((CNT), (VCI), (END), (JK_OR_BCODE))); \
  445         else \
  446           EN_WRITE((SC), (SC)->drq_us, \
  447                    MID_MK_RXQ_ENI((CNT), (VCI), (END), (JK_OR_BCODE))); \
  448         }
  449 
  450 #endif
  451 
  452 /* add an item to the DTQ */
  453 #define EN_DTQADD(SC,CNT,CHAN,JK_OR_BCODE,ADDR,LEN,END) { \
  454         if (END) \
  455           (SC)->dtq[MID_DTQ_A2REG((SC)->dtq_us)] = EN_DQ_MK(CHAN,LEN); \
  456         MID_MK_TXQ(SC,CNT,CHAN,END,JK_OR_BCODE); \
  457         (SC)->dtq_us += 4; \
  458         EN_WRITE((SC), (SC)->dtq_us, (ADDR)); \
  459         EN_WRAPADD(MID_DTQOFF, MID_DTQEND, (SC)->dtq_us, 4); \
  460         (SC)->dtq_free--; \
  461         if (END) \
  462           EN_WRITE((SC), MID_DMA_WRTX, MID_DTQ_A2REG((SC)->dtq_us)); \
  463 }
  464 
  465 /* DRQ add macro */
  466 #define EN_DRQADD(SC,CNT,VCI,JK_OR_BCODE,ADDR,LEN,SLOT,END) { \
  467         if (END) \
  468           (SC)->drq[MID_DRQ_A2REG((SC)->drq_us)] = EN_DQ_MK(SLOT,LEN); \
  469         MID_MK_RXQ(SC,CNT,VCI,END,JK_OR_BCODE); \
  470         (SC)->drq_us += 4; \
  471         EN_WRITE((SC), (SC)->drq_us, (ADDR)); \
  472         EN_WRAPADD(MID_DRQOFF, MID_DRQEND, (SC)->drq_us, 4); \
  473         (SC)->drq_free--; \
  474         if (END) \
  475           EN_WRITE((SC), MID_DMA_WRRX, MID_DRQ_A2REG((SC)->drq_us)); \
  476 }
  477 
  478 /*
  479  * the driver code
  480  *
  481  * the code is arranged in a specific way:
  482  * [1] short/inline functions
  483  * [2] autoconfig stuff
  484  * [3] ioctl stuff
  485  * [4] reset -> init -> transmit -> intr -> receive functions
  486  *
  487  */
  488 
  489 /***********************************************************************/
  490 
  491 /*
  492  * en_read: read a word from the card.   this is the only function
  493  * that reads from the card.
  494  */
  495 
  496 STATIC INLINE u_int32_t en_read(sc, r)
  497 
  498 struct en_softc *sc;
  499 u_int32_t r;
  500 
  501 {
  502 
  503 #ifdef EN_DEBUG_RANGE
  504   if (r > MID_MAXOFF || (r % 4))
  505     panic("en_read out of range, r=0x%x", r);
  506 #endif
  507 
  508   return(bus_space_read_4(sc->en_memt, sc->en_base, r));
  509 }
  510 
  511 /*
  512  * en_write: write a word to the card.   this is the only function that
  513  * writes to the card.
  514  */
  515 
  516 STATIC INLINE void en_write(sc, r, v)
  517 
  518 struct en_softc *sc;
  519 u_int32_t r, v;
  520 
  521 {
  522 #ifdef EN_DEBUG_RANGE
  523   if (r > MID_MAXOFF || (r % 4))
  524     panic("en_write out of range, r=0x%x", r);
  525 #endif
  526 
  527   bus_space_write_4(sc->en_memt, sc->en_base, r, v);
  528 }
  529 
  530 /*
  531  * en_k2sz: convert KBytes to a size parameter (a log2)
  532  */
  533 
  534 STATIC INLINE int en_k2sz(k)
  535 
  536 int k;
  537 
  538 {
  539   switch(k) {
  540     case 1:   return(0);
  541     case 2:   return(1);
  542     case 4:   return(2);
  543     case 8:   return(3);
  544     case 16:  return(4);
  545     case 32:  return(5);
  546     case 64:  return(6);
  547     case 128: return(7);
  548     default: panic("en_k2sz");
  549   }
  550   return(0);
  551 }
  552 #define en_log2(X) en_k2sz(X)
  553 
  554 
  555 /*
  556  * en_b2sz: convert a DMA burst code to its byte size
  557  */
  558 
  559 STATIC INLINE int en_b2sz(b)
  560 
  561 int b;
  562 
  563 {
  564   switch (b) {
  565     case MIDDMA_WORD:   return(1*4);
  566     case MIDDMA_2WMAYBE:
  567     case MIDDMA_2WORD:  return(2*4);
  568     case MIDDMA_4WMAYBE:
  569     case MIDDMA_4WORD:  return(4*4);
  570     case MIDDMA_8WMAYBE:
  571     case MIDDMA_8WORD:  return(8*4);
  572     case MIDDMA_16WMAYBE:
  573     case MIDDMA_16WORD: return(16*4);
  574     default: panic("en_b2sz");
  575   }
  576   return(0);
  577 }
  578 
  579 
  580 /*
  581  * en_sz2b: convert a burst size (bytes) to DMA burst code
  582  */
  583 
  584 STATIC INLINE int en_sz2b(sz)
  585 
  586 int sz;
  587 
  588 {
  589   switch (sz) {
  590     case 1*4:  return(MIDDMA_WORD);
  591     case 2*4:  return(MIDDMA_2WORD);
  592     case 4*4:  return(MIDDMA_4WORD);
  593     case 8*4:  return(MIDDMA_8WORD);
  594     case 16*4: return(MIDDMA_16WORD);
  595     default: panic("en_sz2b");
  596   }
  597   return(0);
  598 }
  599 
  600 
  601 /*
  602  * en_dqneed: calculate number of DTQ/DRQ's needed for a buffer
  603  */
  604 
  605 STATIC INLINE int en_dqneed(sc, data, len, tx)
  606 
  607 struct en_softc *sc;
  608 caddr_t data;
  609 u_int len, tx;
  610 
  611 {
  612   int result, needalign, sz;
  613 
  614 #if !defined(MIDWAY_ENIONLY)
  615 #if !defined(MIDWAY_ADPONLY)
  616     if (sc->is_adaptec)
  617 #endif /* !MIDWAY_ADPONLY */
  618       return(1);        /* adaptec can DMA anything in one go */
  619 #endif
  620 
  621 #if !defined(MIDWAY_ADPONLY)
  622     result = 0;
  623     if (len < EN_MINDMA) {
  624       if (!tx)                  /* XXX: conservative */
  625         return(1);              /* will copy/DMA_JK */
  626     }
  627 
  628     if (tx) {                   /* byte burst? */
  629       needalign = (((unsigned long) data) % sizeof(u_int32_t));
  630       if (needalign) {
  631         result++;
  632         sz = min(len, sizeof(u_int32_t) - needalign);
  633         len -= sz;
  634         data += sz;
  635       }
  636     }
  637 
  638     if (sc->alburst && len) {
  639       needalign = (((unsigned long) data) & sc->bestburstmask);
  640       if (needalign) {
  641         result++;               /* alburst */
  642         sz = min(len, sc->bestburstlen - needalign);
  643         len -= sz;
  644       }
  645     }
  646 
  647     if (len >= sc->bestburstlen) {
  648       sz = len / sc->bestburstlen;
  649       sz = sz * sc->bestburstlen;
  650       len -= sz;
  651       result++;                 /* best shot */
  652     }
  653 
  654     if (len) {
  655       result++;                 /* clean up */
  656       if (tx && (len % sizeof(u_int32_t)) != 0)
  657         result++;               /* byte cleanup */
  658     }
  659 
  660     return(result);
  661 #endif  /* !MIDWAY_ADPONLY */
  662 }
  663 
  664 
  665 /*
  666  * en_mget: get an mbuf chain that can hold totlen bytes and return it
  667  * (for recv)   [based on am7990_get from if_le and ieget from if_ie]
  668  * after this call the sum of all the m_len's in the chain will be totlen.
  669  */
  670 
  671 STATIC INLINE struct mbuf *en_mget(sc, totlen, drqneed)
  672 
  673 struct en_softc *sc;
  674 u_int totlen, *drqneed;
  675 
  676 {
  677   struct mbuf *m;
  678   struct mbuf *top, **mp;
  679   *drqneed = 0;
  680 
  681   MGETHDR(m, M_DONTWAIT, MT_DATA);
  682   if (m == NULL)
  683     return(NULL);
  684   m->m_pkthdr.rcvif = &sc->enif;
  685   m->m_pkthdr.len = totlen;
  686   m->m_len = MHLEN;
  687   top = NULL;
  688   mp = &top;
  689 
  690   /* if (top != NULL) then we've already got 1 mbuf on the chain */
  691   while (totlen > 0) {
  692     if (top) {
  693       MGET(m, M_DONTWAIT, MT_DATA);
  694       if (!m) {
  695         m_freem(top);
  696         return(NULL);   /* out of mbufs */
  697       }
  698       m->m_len = MLEN;
  699     }
  700     if (totlen >= MINCLSIZE) {
  701       MCLGET(m, M_DONTWAIT);
  702       if ((m->m_flags & M_EXT) == 0) {
  703         m_free(m);
  704         m_freem(top);
  705         return(NULL);   /* out of mbuf clusters */
  706       }
  707       m->m_len = MCLBYTES;
  708     }
  709     m->m_len = min(totlen, m->m_len);
  710     totlen -= m->m_len;
  711     *mp = m;
  712     mp = &m->m_next;
  713 
  714     *drqneed += en_dqneed(sc, m->m_data, m->m_len, 0);
  715 
  716   }
  717   return(top);
  718 }
  719 
  720 /***********************************************************************/
  721 
  722 /*
  723  * autoconfig stuff
  724  */
  725 
  726 void en_attach(sc)
  727 
  728 struct en_softc *sc;
  729 
  730 {
  731   struct ifnet *ifp = &sc->enif;
  732   int sz;
  733   u_int32_t reg, lcv, check, ptr, sav, midvloc;
  734 
  735   /*
  736    * probe card to determine memory size.   the stupid ENI card always
  737    * reports to PCI that it needs 4MB of space (2MB regs and 2MB RAM).
  738    * if it has less than 2MB RAM the addresses wrap in the RAM address space.
  739    * (i.e. on a 512KB card addresses 0x3ffffc, 0x37fffc, and 0x2ffffc
  740    * are aliases for 0x27fffc  [note that RAM starts at offset 0x200000]).
  741    */
  742 
  743   if (sc->en_busreset)
  744     sc->en_busreset(sc);
  745   EN_WRITE(sc, MID_RESID, 0x0); /* reset card before touching RAM */
  746   for (lcv = MID_PROBEOFF; lcv <= MID_MAXOFF ; lcv += MID_PROBSIZE) {
  747     EN_WRITE(sc, lcv, lcv);     /* data[address] = address */
  748     for (check = MID_PROBEOFF ; check < lcv ; check += MID_PROBSIZE) {
  749       reg = EN_READ(sc, check);
  750       if (reg != check) {               /* found an alias! */
  751         goto done_probe;                /* and quit */
  752       }
  753     }
  754   }
  755 done_probe:
  756   lcv -= MID_PROBSIZE;                  /* take one step back */
  757   sc->en_obmemsz = (lcv + 4) - MID_RAMOFF;
  758 
  759   /*
  760    * determine the largest DMA burst supported
  761    */
  762 
  763   en_dmaprobe(sc);
  764 
  765   /*
  766    * "hello world"
  767    */
  768 
  769   if (sc->en_busreset)
  770     sc->en_busreset(sc);
  771   EN_WRITE(sc, MID_RESID, 0x0);         /* reset */
  772   for (lcv = MID_RAMOFF ; lcv < MID_RAMOFF + sc->en_obmemsz ; lcv += 4)
  773     EN_WRITE(sc, lcv, 0);       /* zero memory */
  774 
  775   reg = EN_READ(sc, MID_RESID);
  776 
  777   aprint_normal(
  778       "%s: ATM midway v%d, board IDs %d.%d, %s%s%s, %ldKB on-board RAM\n",
  779         sc->sc_dev.dv_xname, MID_VER(reg), MID_MID(reg), MID_DID(reg),
  780         (MID_IS_SABRE(reg)) ? "sabre controller, " : "",
  781         (MID_IS_SUNI(reg)) ? "SUNI" : "Utopia",
  782         (!MID_IS_SUNI(reg) && MID_IS_UPIPE(reg)) ? " (pipelined)" : "",
  783         (u_long)sc->en_obmemsz / 1024);
  784 
  785   if (sc->is_adaptec) {
  786     if (sc->bestburstlen == 64 && sc->alburst == 0)
  787       aprint_normal("%s: passed 64 byte DMA test\n", sc->sc_dev.dv_xname);
  788     else
  789       aprint_error("%s: FAILED DMA TEST: burst=%d, alburst=%d\n",
  790             sc->sc_dev.dv_xname, sc->bestburstlen, sc->alburst);
  791   } else {
  792     aprint_normal("%s: maximum DMA burst length = %d bytes%s\n",
  793           sc->sc_dev.dv_xname,
  794           sc->bestburstlen, (sc->alburst) ? " (must align)" : "");
  795   }
  796 
  797 #if 0           /* WMAYBE doesn't work, don't complain about it */
  798   /* check if en_dmaprobe disabled wmaybe */
  799   if (en_dmaplan == en_dma_planB)
  800     aprint_normal("%s: note: WMAYBE DMA has been disabled\n",
  801         sc->sc_dev.dv_xname);
  802 #endif
  803 
  804   /*
  805    * link into network subsystem and prepare card
  806    */
  807 
  808 #if defined(__NetBSD__) || defined(__OpenBSD__)
  809   strcpy(sc->enif.if_xname, sc->sc_dev.dv_xname);
  810 #endif
  811 #if !defined(MISSING_IF_SOFTC)
  812   sc->enif.if_softc = sc;
  813 #endif
  814   ifp->if_flags = IFF_SIMPLEX|IFF_NOTRAILERS;
  815   ifp->if_ioctl = en_ioctl;
  816   ifp->if_output = atm_output;
  817   ifp->if_start = en_start;
  818   IFQ_SET_READY(&ifp->if_snd);
  819 
  820   /*
  821    * init softc
  822    */
  823 
  824   for (lcv = 0 ; lcv < MID_N_VC ; lcv++) {
  825     sc->rxvc2slot[lcv] = RX_NONE;
  826     sc->txspeed[lcv] = 0;       /* full */
  827     sc->txvc2slot[lcv] = 0;     /* full speed == slot 0 */
  828   }
  829 
  830   sz = sc->en_obmemsz - (MID_BUFOFF - MID_RAMOFF);
  831   ptr = sav = MID_BUFOFF;
  832   ptr = roundup(ptr, EN_TXSZ * 1024);   /* align */
  833   sz = sz - (ptr - sav);
  834   if (EN_TXSZ*1024 * EN_NTX > sz) {
  835     aprint_error("%s: EN_NTX/EN_TXSZ too big\n", sc->sc_dev.dv_xname);
  836     return;
  837   }
  838   for (lcv = 0 ; lcv < EN_NTX ; lcv++) {
  839     sc->txslot[lcv].mbsize = 0;
  840     sc->txslot[lcv].start = ptr;
  841     ptr += (EN_TXSZ * 1024);
  842     sz -= (EN_TXSZ * 1024);
  843     sc->txslot[lcv].stop = ptr;
  844     sc->txslot[lcv].nref = 0;
  845 #ifdef ATM_PVCEXT
  846     sc->txrrp = NULL;
  847 #endif
  848     memset(&sc->txslot[lcv].indma, 0, sizeof(sc->txslot[lcv].indma));
  849     memset(&sc->txslot[lcv].q, 0, sizeof(sc->txslot[lcv].q));
  850 #ifdef EN_DEBUG
  851     aprint_debug("%s: tx%d: start 0x%x, stop 0x%x\n", sc->sc_dev.dv_xname, lcv,
  852                 sc->txslot[lcv].start, sc->txslot[lcv].stop);
  853 #endif
  854   }
  855 
  856   sav = ptr;
  857   ptr = roundup(ptr, EN_RXSZ * 1024);   /* align */
  858   sz = sz - (ptr - sav);
  859   sc->en_nrx = sz / (EN_RXSZ * 1024);
  860   if (sc->en_nrx <= 0) {
  861     aprint_error("%s: EN_NTX/EN_TXSZ/EN_RXSZ too big\n", sc->sc_dev.dv_xname);
  862     return;
  863   }
  864 
  865   /*
  866    * ensure that there is always one VC slot on the service list free
  867    * so that we can tell the difference between a full and empty list.
  868    */
  869   if (sc->en_nrx >= MID_N_VC)
  870     sc->en_nrx = MID_N_VC - 1;
  871 
  872   for (lcv = 0 ; lcv < sc->en_nrx ; lcv++) {
  873     sc->rxslot[lcv].rxhand = NULL;
  874     sc->rxslot[lcv].oth_flags = ENOTHER_FREE;
  875     memset(&sc->rxslot[lcv].indma, 0, sizeof(sc->rxslot[lcv].indma));
  876     memset(&sc->rxslot[lcv].q, 0, sizeof(sc->rxslot[lcv].q));
  877     midvloc = sc->rxslot[lcv].start = ptr;
  878     ptr += (EN_RXSZ * 1024);
  879     sz -= (EN_RXSZ * 1024);
  880     sc->rxslot[lcv].stop = ptr;
  881     midvloc = midvloc - MID_RAMOFF;
  882     midvloc = (midvloc & ~((EN_RXSZ*1024) - 1)) >> 2; /* mask, cvt to words */
  883     midvloc = midvloc >> MIDV_LOCTOPSHFT;  /* we only want the top 11 bits */
  884     midvloc = (midvloc & MIDV_LOCMASK) << MIDV_LOCSHIFT;
  885     sc->rxslot[lcv].mode = midvloc |
  886         (en_k2sz(EN_RXSZ) << MIDV_SZSHIFT) | MIDV_TRASH;
  887 
  888 #ifdef EN_DEBUG
  889     aprint_debug("%s: rx%d: start 0x%x, stop 0x%x, mode 0x%x\n",
  890         sc->sc_dev.dv_xname,
  891         lcv, sc->rxslot[lcv].start, sc->rxslot[lcv].stop, sc->rxslot[lcv].mode);
  892 #endif
  893   }
  894 
  895 #ifdef EN_STAT
  896   sc->vtrash = sc->otrash = sc->mfix = sc->txmbovr = sc->dmaovr = 0;
  897   sc->txoutspace = sc->txdtqout = sc->launch = sc->lheader = sc->ltail = 0;
  898   sc->hwpull = sc->swadd = sc->rxqnotus = sc->rxqus = sc->rxoutboth = 0;
  899   sc->rxdrqout = sc->ttrash = sc->rxmbufout = sc->mfixfail = 0;
  900   sc->headbyte = sc->tailbyte = sc->tailflush = 0;
  901 #endif
  902   sc->need_drqs = sc->need_dtqs = 0;
  903 
  904   aprint_normal(
  905         "%s: %d %dKB receive buffers, %d %dKB transmit buffers allocated\n",
  906         sc->sc_dev.dv_xname, sc->en_nrx, EN_RXSZ, EN_NTX, EN_TXSZ);
  907 
  908   aprint_normal("%s: End Station Identifier (mac address) %s\n",
  909         sc->sc_dev.dv_xname, ether_sprintf(sc->macaddr));
  910 
  911   /*
  912    * final commit
  913    */
  914 
  915   if_attach(ifp);
  916   atm_ifattach(ifp);
  917 
  918 #ifdef ATM_PVCEXT
  919   rrp_add(sc, ifp);
  920 #endif
  921 }
  922 
  923 
  924 /*
  925  * en_dmaprobe: helper function for en_attach.
  926  *
  927  * see how the card handles DMA by running a few DMA tests.   we need
  928  * to figure out the largest number of bytes we can DMA in one burst
  929  * ("bestburstlen"), and if the starting address for a burst needs to
  930  * be aligned on any sort of boundary or not ("alburst").
  931  *
  932  * typical findings:
  933  * sparc1: bestburstlen=4, alburst=0 (ick, broken DMA!)
  934  * sparc2: bestburstlen=64, alburst=1
  935  * p166:   bestburstlen=64, alburst=0
  936  */
  937 
  938 STATIC void en_dmaprobe(sc)
  939 
  940 struct en_softc *sc;
  941 
  942 {
  943   u_int32_t srcbuf[64], dstbuf[64];
  944   u_int8_t *sp, *dp;
  945   int bestalgn, bestnotalgn, lcv, try, fail;
  946 
  947   sc->alburst = 0;
  948 
  949   sp = (u_int8_t *) srcbuf;
  950   while ((((unsigned long) sp) % MIDDMA_MAXBURST) != 0)
  951     sp += 4;
  952   dp = (u_int8_t *) dstbuf;
  953   while ((((unsigned long) dp) % MIDDMA_MAXBURST) != 0)
  954     dp += 4;
  955 
  956   bestalgn = bestnotalgn = en_dmaprobe_doit(sc, sp, dp, 0);
  957 
  958   for (lcv = 4 ; lcv < MIDDMA_MAXBURST ; lcv += 4) {
  959     try = en_dmaprobe_doit(sc, sp+lcv, dp+lcv, 0);
  960     if (try < bestnotalgn)
  961       bestnotalgn = try;
  962   }
  963 
  964   if (bestalgn != bestnotalgn)          /* need bursts aligned */
  965     sc->alburst = 1;
  966 
  967   sc->bestburstlen = bestalgn;
  968   sc->bestburstshift = en_log2(bestalgn);
  969   sc->bestburstmask = sc->bestburstlen - 1; /* must be power of 2 */
  970   sc->bestburstcode = en_sz2b(bestalgn);
  971 
  972   if (sc->bestburstlen <= 2*sizeof(u_int32_t))
  973     return;                             /* won't be using WMAYBE */
  974 
  975   /*
  976    * adaptec does not have (or need) wmaybe.   do not bother testing
  977    * for it.
  978    */
  979   if (sc->is_adaptec) {
  980     /* XXX, actually don't need a DMA plan: adaptec is smarter than that */
  981     en_dmaplan = en_dma_planB;
  982     return;
  983   }
  984 
  985   /*
  986    * test that WMAYBE DMA works like we think it should
  987    * (i.e. no alignment restrictions on host address other than alburst)
  988    */
  989 
  990   try = sc->bestburstlen - 4;
  991   fail = 0;
  992   fail += en_dmaprobe_doit(sc, sp, dp, try);
  993   for (lcv = 4 ; lcv < sc->bestburstlen ; lcv += 4) {
  994     fail += en_dmaprobe_doit(sc, sp+lcv, dp+lcv, try);
  995     if (sc->alburst)
  996       try -= 4;
  997   }
  998   if (EN_NOWMAYBE || fail) {
  999     if (fail)
 1000       printf("%s: WARNING: WMAYBE DMA test failed %d time(s)\n",
 1001         sc->sc_dev.dv_xname, fail);
 1002     en_dmaplan = en_dma_planB;          /* fall back to plan B */
 1003   }
 1004 
 1005 }
 1006 
 1007 
 1008 /*
 1009  * en_dmaprobe_doit: do actual testing
 1010  */
 1011 
 1012 int
 1013 en_dmaprobe_doit(sc, sp, dp, wmtry)
 1014 
 1015 struct en_softc *sc;
 1016 u_int8_t *sp, *dp;
 1017 int wmtry;
 1018 
 1019 {
 1020   int lcv, retval = 4, cnt, count;
 1021   u_int32_t reg, bcode, midvloc;
 1022 
 1023   /*
 1024    * set up a 1k buffer at MID_BUFOFF
 1025    */
 1026 
 1027   if (sc->en_busreset)
 1028     sc->en_busreset(sc);
 1029   EN_WRITE(sc, MID_RESID, 0x0); /* reset card before touching RAM */
 1030 
 1031   midvloc = ((MID_BUFOFF - MID_RAMOFF) / sizeof(u_int32_t)) >> MIDV_LOCTOPSHFT;
 1032   EN_WRITE(sc, MIDX_PLACE(0), MIDX_MKPLACE(en_k2sz(1), midvloc));
 1033   EN_WRITE(sc, MID_VC(0), (midvloc << MIDV_LOCSHIFT)
 1034                 | (en_k2sz(1) << MIDV_SZSHIFT) | MIDV_TRASH);
 1035   EN_WRITE(sc, MID_DST_RP(0), 0);
 1036   EN_WRITE(sc, MID_WP_ST_CNT(0), 0);
 1037 
 1038   for (lcv = 0 ; lcv < 68 ; lcv++)              /* set up sample data */
 1039     sp[lcv] = lcv+1;
 1040   EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA);   /* enable DMA (only) */
 1041 
 1042   sc->drq_chip = MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX));
 1043   sc->dtq_chip = MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX));
 1044 
 1045   /*
 1046    * try it now . . .  DMA it out, then DMA it back in and compare
 1047    *
 1048    * note: in order to get the DMA stuff to reverse directions it wants
 1049    * the "end" flag set!   since we are not DMA'ing valid data we may
 1050    * get an ident mismatch interrupt (which we will ignore).
 1051    *
 1052    * note: we've got two different tests rolled up in the same loop
 1053    * if (wmtry)
 1054    *   then we are doing a wmaybe test and wmtry is a byte count
 1055    *   else we are doing a burst test
 1056    */
 1057 
 1058   for (lcv = 8 ; lcv <= MIDDMA_MAXBURST ; lcv = lcv * 2) {
 1059 
 1060     /* zero SRAM and dest buffer */
 1061     for (cnt = 0 ; cnt < 1024; cnt += 4)
 1062       EN_WRITE(sc, MID_BUFOFF+cnt, 0);  /* zero memory */
 1063     for (cnt = 0 ; cnt < 68  ; cnt++)
 1064       dp[cnt] = 0;
 1065 
 1066     if (wmtry) {
 1067       count = (sc->bestburstlen - sizeof(u_int32_t)) / sizeof(u_int32_t);
 1068       bcode = en_dmaplan[count].bcode;
 1069       count = wmtry >> en_dmaplan[count].divshift;
 1070     } else {
 1071       bcode = en_sz2b(lcv);
 1072       count = 1;
 1073     }
 1074     if (sc->is_adaptec)
 1075       EN_WRITE(sc, sc->dtq_chip, MID_MK_TXQ_ADP(lcv, 0, MID_DMA_END, 0));
 1076     else
 1077       EN_WRITE(sc, sc->dtq_chip, MID_MK_TXQ_ENI(count, 0, MID_DMA_END, bcode));
 1078     EN_WRITE(sc, sc->dtq_chip+4, vtophys((vaddr_t)sp));
 1079     EN_WRITE(sc, MID_DMA_WRTX, MID_DTQ_A2REG(sc->dtq_chip+8));
 1080     cnt = 1000;
 1081     while (EN_READ(sc, MID_DMA_RDTX) == MID_DTQ_A2REG(sc->dtq_chip)) {
 1082       DELAY(1);
 1083       cnt--;
 1084       if (cnt == 0) {
 1085         printf("%s: unexpected timeout in tx DMA test\n", sc->sc_dev.dv_xname);
 1086         return(retval);         /* timeout, give up */
 1087       }
 1088     }
 1089     EN_WRAPADD(MID_DTQOFF, MID_DTQEND, sc->dtq_chip, 8);
 1090     reg = EN_READ(sc, MID_INTACK);
 1091     if ((reg & MID_INT_DMA_TX) != MID_INT_DMA_TX) {
 1092       printf("%s: unexpected status in tx DMA test: 0x%x\n",
 1093                 sc->sc_dev.dv_xname, reg);
 1094       return(retval);
 1095     }
 1096     EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA);   /* re-enable DMA (only) */
 1097 
 1098     /* "return to sender..."  address is known ... */
 1099 
 1100     if (sc->is_adaptec)
 1101       EN_WRITE(sc, sc->drq_chip, MID_MK_RXQ_ADP(lcv, 0, MID_DMA_END, 0));
 1102     else
 1103       EN_WRITE(sc, sc->drq_chip, MID_MK_RXQ_ENI(count, 0, MID_DMA_END, bcode));
 1104     EN_WRITE(sc, sc->drq_chip+4, vtophys((vaddr_t)dp));
 1105     EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip+8));
 1106     cnt = 1000;
 1107     while (EN_READ(sc, MID_DMA_RDRX) == MID_DRQ_A2REG(sc->drq_chip)) {
 1108       DELAY(1);
 1109       cnt--;
 1110       if (cnt == 0) {
 1111         printf("%s: unexpected timeout in rx DMA test\n", sc->sc_dev.dv_xname);
 1112         return(retval);         /* timeout, give up */
 1113       }
 1114     }
 1115     EN_WRAPADD(MID_DRQOFF, MID_DRQEND, sc->drq_chip, 8);
 1116     reg = EN_READ(sc, MID_INTACK);
 1117     if ((reg & MID_INT_DMA_RX) != MID_INT_DMA_RX) {
 1118       printf("%s: unexpected status in rx DMA test: 0x%x\n",
 1119                 sc->sc_dev.dv_xname, reg);
 1120       return(retval);
 1121     }
 1122     EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA);   /* re-enable DMA (only) */
 1123 
 1124     if (wmtry) {
 1125       return(memcmp(sp, dp, wmtry));  /* wmtry always exits here, no looping */
 1126     }
 1127 
 1128     if (memcmp(sp, dp, lcv))
 1129       return(retval);           /* failed, use last value */
 1130 
 1131     retval = lcv;
 1132 
 1133   }
 1134   return(retval);               /* studly 64 byte DMA present!  oh baby!! */
 1135 }
 1136 
 1137 /***********************************************************************/
 1138 
 1139 /*
 1140  * en_ioctl: handle ioctl requests
 1141  *
 1142  * NOTE: if you add an ioctl to set txspeed, you should choose a new
 1143  * TX channel/slot.   Choose the one with the lowest sc->txslot[slot].nref
 1144  * value, subtract one from sc->txslot[0].nref, add one to the
 1145  * sc->txslot[slot].nref, set sc->txvc2slot[vci] = slot, and then set
 1146  * txspeed[vci].
 1147  */
 1148 
 1149 STATIC int en_ioctl(ifp, cmd, data)
 1150 
 1151 struct ifnet *ifp;
 1152 EN_IOCTL_CMDT cmd;
 1153 caddr_t data;
 1154 
 1155 {
 1156 #ifdef MISSING_IF_SOFTC
 1157     struct en_softc *sc = (struct en_softc *) en_cd.cd_devs[ifp->if_unit];
 1158 #else
 1159     struct en_softc *sc = (struct en_softc *) ifp->if_softc;
 1160 #endif
 1161     struct ifaddr *ifa = (struct ifaddr *) data;
 1162     struct ifreq *ifr = (struct ifreq *) data;
 1163     struct atm_pseudoioctl *api = (struct atm_pseudoioctl *)data;
 1164 #ifdef NATM
 1165     struct atm_rawioctl *ario = (struct atm_rawioctl *)data;
 1166     int slot;
 1167 #endif
 1168     int s, error = 0;
 1169 
 1170     s = splnet();
 1171 
 1172     switch (cmd) {
 1173         case SIOCATMENA:                /* enable circuit for recv */
 1174                 error = en_rxctl(sc, api, 1);
 1175                 break;
 1176 
 1177         case SIOCATMDIS:                /* disable circuit for recv */
 1178                 error = en_rxctl(sc, api, 0);
 1179                 break;
 1180 
 1181 #ifdef NATM
 1182         case SIOCXRAWATM:
 1183                 if ((slot = sc->rxvc2slot[ario->npcb->npcb_vci]) == RX_NONE) {
 1184                         error = EINVAL;
 1185                         break;
 1186                 }
 1187                 if (ario->rawvalue > EN_RXSZ*1024)
 1188                         ario->rawvalue = EN_RXSZ*1024;
 1189                 if (ario->rawvalue) {
 1190                         sc->rxslot[slot].oth_flags |= ENOTHER_RAW;
 1191                         sc->rxslot[slot].raw_threshold = ario->rawvalue;
 1192                 } else {
 1193                         sc->rxslot[slot].oth_flags &= (~ENOTHER_RAW);
 1194                         sc->rxslot[slot].raw_threshold = 0;
 1195                 }
 1196 #ifdef EN_DEBUG
 1197                 printf("%s: rxvci%d: turn %s raw (boodi) mode\n",
 1198                         sc->sc_dev.dv_xname, ario->npcb->npcb_vci,
 1199                         (ario->rawvalue) ? "on" : "off");
 1200 #endif
 1201                 break;
 1202 #endif
 1203         case SIOCSIFADDR:
 1204 #ifdef INET6
 1205         case SIOCSIFADDR_IN6:
 1206 #endif
 1207                 ifp->if_flags |= IFF_UP;
 1208                 switch (ifa->ifa_addr->sa_family) {
 1209 #ifdef INET
 1210                 case AF_INET:
 1211                         en_reset(sc);
 1212                         en_init(sc);
 1213                         ifa->ifa_rtrequest = atm_rtrequest; /* ??? */
 1214                         break;
 1215 #endif
 1216 #ifdef INET6
 1217                 case AF_INET6:
 1218                         en_reset(sc);
 1219                         en_init(sc);
 1220                         ifa->ifa_rtrequest = atm_rtrequest; /* ??? */
 1221                         break;
 1222 #endif
 1223                 default:
 1224                         /* what to do if not INET? */
 1225                         en_reset(sc);
 1226                         en_init(sc);
 1227                         break;
 1228                 }
 1229                 break;
 1230 
 1231         case SIOCGIFADDR:
 1232                 error = EINVAL;
 1233                 break;
 1234 
 1235         case SIOCSIFFLAGS:
 1236 #ifdef ATM_PVCEXT
 1237                 /* point-2-point pvc is allowed to change if_flags */
 1238                 if (((ifp->if_flags & IFF_UP) && !(ifp->if_flags & IFF_RUNNING))
 1239                 ||  (!(ifp->if_flags & IFF_UP) && (ifp->if_flags & IFF_RUNNING))) {
 1240                         en_reset(sc);
 1241                         en_init(sc);
 1242                 }
 1243 #else
 1244                 error = EINVAL;
 1245 #endif
 1246                 break;
 1247 
 1248 #if defined(SIOCSIFMTU)         /* ??? copied from if_de */
 1249 #if !defined(ifr_mtu)
 1250 #define ifr_mtu ifr_metric
 1251 #endif
 1252         case SIOCSIFMTU:
 1253             /*
 1254              * Set the interface MTU.
 1255              */
 1256 #ifdef notsure
 1257             if (ifr->ifr_mtu > ATMMTU) {
 1258                 error = EINVAL;
 1259                 break;
 1260             }
 1261 #endif
 1262             ifp->if_mtu = ifr->ifr_mtu;
 1263                 /* XXXCDC: do we really need to reset on MTU size change? */
 1264             en_reset(sc);
 1265             en_init(sc);
 1266             break;
 1267 #endif /* SIOCSIFMTU */
 1268 
 1269 #ifdef ATM_PVCEXT
 1270         case SIOCADDMULTI:
 1271         case SIOCDELMULTI:
 1272                 if (ifp == &sc->enif || ifr == 0) {
 1273                         error = EAFNOSUPPORT;   /* XXX */
 1274                         break;
 1275                 }
 1276                 switch (ifr->ifr_addr.sa_family) {
 1277 #ifdef INET
 1278                 case AF_INET:
 1279                         break;
 1280 #endif
 1281 #ifdef INET6
 1282                 case AF_INET6:
 1283                         break;
 1284 #endif
 1285                 default:
 1286                         error = EAFNOSUPPORT;
 1287                         break;
 1288                 }
 1289                 break;
 1290 
 1291         case SIOCGPVCSIF:
 1292                 if (ifp != &sc->enif) {
 1293 #ifdef __NetBSD__
 1294                   strlcpy(ifr->ifr_name, sc->enif.if_xname,
 1295                       sizeof(ifr->ifr_name));
 1296 #else
 1297                   snprintf(ifr->ifr_name, sizeof(ifr->ifr_name), "%s%d",
 1298                           sc->enif.if_name, sc->enif.if_unit);
 1299 #endif
 1300                 }
 1301                 else
 1302                   error = EINVAL;
 1303                 break;
 1304 
 1305         case SIOCSPVCSIF:
 1306                 if (ifp == &sc->enif) {
 1307                   struct ifnet *sifp;
 1308 
 1309                   if ((error = suser(curproc->p_ucred, &curproc->p_acflag)) != 0)
 1310                     break;
 1311 
 1312                   if ((sifp = en_pvcattach(ifp)) != NULL) {
 1313 #ifdef __NetBSD__
 1314                     strlcpy(ifr->ifr_name, sifp->if_xname,
 1315                         sizeof(ifr->ifr_name));
 1316 #else
 1317                     snprintf(ifr->ifr_name, sizeof(ifr->ifr_name), "%s%d",
 1318                         sifp->if_name, sifp->if_unit);
 1319 #endif
 1320 #if defined(__KAME__) && defined(INET6)
 1321                     /* get EUI64 for PVC, from ATM hardware interface */
 1322                     in6_ifattach(sifp, ifp);
 1323 #endif
 1324                   }
 1325                   else
 1326                     error = ENOMEM;
 1327                 }
 1328                 else
 1329                   error = EINVAL;
 1330                 break;
 1331 
 1332         case SIOCGPVCTX:
 1333                 error = en_pvctxget(sc, (struct pvctxreq *)data);
 1334                 break;
 1335 
 1336         case SIOCSPVCTX:
 1337                 if ((error = suser(curproc->p_ucred, &curproc->p_acflag)) == 0)
 1338                         error = en_pvctx(sc, (struct pvctxreq *)data);
 1339                 break;
 1340 
 1341 #endif /* ATM_PVCEXT */
 1342 
 1343         default:
 1344             error = EINVAL;
 1345             break;
 1346     }
 1347     splx(s);
 1348     return error;
 1349 }
 1350 
 1351 
 1352 /*
 1353  * en_rxctl: turn on and off VCs for recv.
 1354  */
 1355 
 1356 STATIC int en_rxctl(sc, pi, on)
 1357 
 1358 struct en_softc *sc;
 1359 struct atm_pseudoioctl *pi;
 1360 int on;
 1361 
 1362 {
 1363   u_int s, vci, flags, slot;
 1364   u_int32_t oldmode, newmode;
 1365 
 1366   vci = ATM_PH_VCI(&pi->aph);
 1367   flags = ATM_PH_FLAGS(&pi->aph);
 1368 
 1369 #ifdef EN_DEBUG
 1370   printf("%s: %s vpi=%d, vci=%d, flags=%d\n", sc->sc_dev.dv_xname,
 1371         (on) ? "enable" : "disable", ATM_PH_VPI(&pi->aph), vci, flags);
 1372 #endif
 1373 
 1374   if (ATM_PH_VPI(&pi->aph) || vci >= MID_N_VC)
 1375     return(EINVAL);
 1376 
 1377   /*
 1378    * turn on VCI!
 1379    */
 1380 
 1381   if (on) {
 1382     if (sc->rxvc2slot[vci] != RX_NONE)
 1383       return(EINVAL);
 1384     for (slot = 0 ; slot < sc->en_nrx ; slot++)
 1385       if (sc->rxslot[slot].oth_flags & ENOTHER_FREE)
 1386         break;
 1387     if (slot == sc->en_nrx)
 1388       return(ENOSPC);
 1389     sc->rxvc2slot[vci] = slot;
 1390     sc->rxslot[slot].rxhand = NULL;
 1391     oldmode = sc->rxslot[slot].mode;
 1392     newmode = (flags & ATM_PH_AAL5) ? MIDV_AAL5 : MIDV_NOAAL;
 1393     sc->rxslot[slot].mode = MIDV_SETMODE(oldmode, newmode);
 1394     sc->rxslot[slot].atm_vci = vci;
 1395     sc->rxslot[slot].atm_flags = flags;
 1396     sc->rxslot[slot].oth_flags = 0;
 1397     sc->rxslot[slot].rxhand = pi->rxhand;
 1398     if (sc->rxslot[slot].indma.ifq_head || sc->rxslot[slot].q.ifq_head)
 1399       panic("en_rxctl: left over mbufs on enable");
 1400     sc->txspeed[vci] = 0;       /* full speed to start */
 1401     sc->txvc2slot[vci] = 0;     /* init value */
 1402     sc->txslot[0].nref++;       /* bump reference count */
 1403     en_loadvc(sc, vci);         /* does debug printf for us */
 1404     return(0);
 1405   }
 1406 
 1407   /*
 1408    * turn off VCI
 1409    */
 1410 
 1411   if (sc->rxvc2slot[vci] == RX_NONE)
 1412     return(EINVAL);
 1413   slot = sc->rxvc2slot[vci];
 1414   if ((sc->rxslot[slot].oth_flags & (ENOTHER_FREE|ENOTHER_DRAIN)) != 0)
 1415     return(EINVAL);
 1416   s = splnet();         /* block out enintr() */
 1417   oldmode = EN_READ(sc, MID_VC(vci));
 1418   newmode = MIDV_SETMODE(oldmode, MIDV_TRASH) & ~MIDV_INSERVICE;
 1419   EN_WRITE(sc, MID_VC(vci), (newmode | (oldmode & MIDV_INSERVICE)));
 1420                 /* halt in tracks, be careful to preserve inserivce bit */
 1421   DELAY(27);
 1422   sc->rxslot[slot].rxhand = NULL;
 1423   sc->rxslot[slot].mode = newmode;
 1424 
 1425   sc->txslot[sc->txvc2slot[vci]].nref--;
 1426   sc->txspeed[vci] = 0;
 1427   sc->txvc2slot[vci] = 0;
 1428 
 1429   /* if stuff is still going on we are going to have to drain it out */
 1430   if (sc->rxslot[slot].indma.ifq_head ||
 1431                 sc->rxslot[slot].q.ifq_head ||
 1432                 (sc->rxslot[slot].oth_flags & ENOTHER_SWSL) != 0) {
 1433     sc->rxslot[slot].oth_flags |= ENOTHER_DRAIN;
 1434   } else {
 1435     sc->rxslot[slot].oth_flags = ENOTHER_FREE;
 1436     sc->rxslot[slot].atm_vci = RX_NONE;
 1437     sc->rxvc2slot[vci] = RX_NONE;
 1438   }
 1439   splx(s);              /* enable enintr() */
 1440 #ifdef EN_DEBUG
 1441   printf("%s: rx%d: VCI %d is now %s\n", sc->sc_dev.dv_xname, slot, vci,
 1442         (sc->rxslot[slot].oth_flags & ENOTHER_DRAIN) ? "draining" : "free");
 1443 #endif
 1444   return(0);
 1445 }
 1446 
 1447 /***********************************************************************/
 1448 
 1449 /*
 1450  * en_reset: reset the board, throw away work in progress.
 1451  * must en_init to recover.
 1452  */
 1453 
 1454 void en_reset(sc)
 1455 
 1456 struct en_softc *sc;
 1457 
 1458 {
 1459   struct mbuf *m;
 1460   int lcv, slot;
 1461 
 1462 #ifdef EN_DEBUG
 1463   printf("%s: reset\n", sc->sc_dev.dv_xname);
 1464 #endif
 1465 
 1466   if (sc->en_busreset)
 1467     sc->en_busreset(sc);
 1468   EN_WRITE(sc, MID_RESID, 0x0); /* reset hardware */
 1469 
 1470   /*
 1471    * recv: dump any mbufs we are DMA'ing into, if DRAINing, then a reset
 1472    * will free us!
 1473    */
 1474 
 1475   for (lcv = 0 ; lcv < MID_N_VC ; lcv++) {
 1476     if (sc->rxvc2slot[lcv] == RX_NONE)
 1477       continue;
 1478     slot = sc->rxvc2slot[lcv];
 1479     while (1) {
 1480       IF_DEQUEUE(&sc->rxslot[slot].indma, m);
 1481       if (m == NULL)
 1482         break;          /* >>> exit 'while(1)' here <<< */
 1483       m_freem(m);
 1484     }
 1485     while (1) {
 1486       IF_DEQUEUE(&sc->rxslot[slot].q, m);
 1487       if (m == NULL)
 1488         break;          /* >>> exit 'while(1)' here <<< */
 1489       m_freem(m);
 1490     }
 1491     sc->rxslot[slot].oth_flags &= ~ENOTHER_SWSL;
 1492     if (sc->rxslot[slot].oth_flags & ENOTHER_DRAIN) {
 1493       sc->rxslot[slot].oth_flags = ENOTHER_FREE;
 1494       sc->rxvc2slot[lcv] = RX_NONE;
 1495 #ifdef EN_DEBUG
 1496   printf("%s: rx%d: VCI %d is now free\n", sc->sc_dev.dv_xname, slot, lcv);
 1497 #endif
 1498     }
 1499   }
 1500 
 1501   /*
 1502    * xmit: dump everything
 1503    */
 1504 
 1505   for (lcv = 0 ; lcv < EN_NTX ; lcv++) {
 1506     while (1) {
 1507       IF_DEQUEUE(&sc->txslot[lcv].indma, m);
 1508       if (m == NULL)
 1509         break;          /* >>> exit 'while(1)' here <<< */
 1510       m_freem(m);
 1511     }
 1512     while (1) {
 1513       IF_DEQUEUE(&sc->txslot[lcv].q, m);
 1514       if (m == NULL)
 1515         break;          /* >>> exit 'while(1)' here <<< */
 1516       m_freem(m);
 1517     }
 1518     sc->txslot[lcv].mbsize = 0;
 1519   }
 1520 
 1521   return;
 1522 }
 1523 
 1524 
 1525 /*
 1526  * en_init: init board and sync the card with the data in the softc.
 1527  */
 1528 
 1529 STATIC void en_init(sc)
 1530 
 1531 struct en_softc *sc;
 1532 
 1533 {
 1534   int vc, slot;
 1535   u_int32_t loc;
 1536 #ifdef ATM_PVCEXT
 1537     struct pvcsif *pvcsif;
 1538 #endif
 1539 
 1540   if ((sc->enif.if_flags & IFF_UP) == 0) {
 1541 #ifdef ATM_PVCEXT
 1542     LIST_FOREACH(pvcsif, &sc->sif_list, sif_links) {
 1543       if (pvcsif->sif_if.if_flags & IFF_UP) {
 1544         /*
 1545          * down the device only when there is no active pvc subinterface.
 1546          * if there is, we have to go through the init sequence to reflect
 1547          * the software states to the device.
 1548          */
 1549         goto up;
 1550       }
 1551     }
 1552 #endif
 1553 #ifdef EN_DEBUG
 1554     printf("%s: going down\n", sc->sc_dev.dv_xname);
 1555 #endif
 1556     en_reset(sc);                       /* to be safe */
 1557     sc->enif.if_flags &= ~IFF_RUNNING;  /* disable */
 1558     return;
 1559   }
 1560 
 1561 #ifdef ATM_PVCEXT
 1562  up:
 1563 #endif
 1564 #ifdef EN_DEBUG
 1565   printf("%s: going up\n", sc->sc_dev.dv_xname);
 1566 #endif
 1567   sc->enif.if_flags |= IFF_RUNNING;     /* enable */
 1568 #ifdef ATM_PVCEXT
 1569   LIST_FOREACH(pvcsif, &sc->sif_list, sif_links) {
 1570     pvcsif->sif_if.if_flags |= IFF_RUNNING;
 1571   }
 1572 #endif
 1573 
 1574   if (sc->en_busreset)
 1575     sc->en_busreset(sc);
 1576   EN_WRITE(sc, MID_RESID, 0x0);         /* reset */
 1577 
 1578   /*
 1579    * init obmem data structures: vc tab, DMA q's, slist.
 1580    *
 1581    * note that we set drq_free/dtq_free to one less than the total number
 1582    * of DTQ/DRQs present.   we do this because the card uses the condition
 1583    * (drq_chip == drq_us) to mean "list is empty"... but if you allow the
 1584    * circular list to be completely full then (drq_chip == drq_us) [i.e.
 1585    * the drq_us pointer will wrap all the way around].   by restricting
 1586    * the number of active requests to (N - 1) we prevent the list from
 1587    * becoming completely full.    note that the card will sometimes give
 1588    * us an interrupt for a DTQ/DRQ we have already processes... this helps
 1589    * keep that interrupt from messing us up.
 1590    */
 1591 
 1592   for (vc = 0 ; vc < MID_N_VC ; vc++)
 1593     en_loadvc(sc, vc);
 1594 
 1595   memset(&sc->drq, 0, sizeof(sc->drq));
 1596   sc->drq_free = MID_DRQ_N - 1;         /* N - 1 */
 1597   sc->drq_chip = MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX));
 1598   EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip));
 1599                                                 /* ensure zero queue */
 1600   sc->drq_us = sc->drq_chip;
 1601 
 1602   memset(&sc->dtq, 0, sizeof(sc->dtq));
 1603   sc->dtq_free = MID_DTQ_N - 1;         /* N - 1 */
 1604   sc->dtq_chip = MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX));
 1605   EN_WRITE(sc, MID_DMA_WRTX, MID_DRQ_A2REG(sc->dtq_chip));
 1606                                                 /* ensure zero queue */
 1607   sc->dtq_us = sc->dtq_chip;
 1608 
 1609   sc->hwslistp = MID_SL_REG2A(EN_READ(sc, MID_SERV_WRITE));
 1610   sc->swsl_size = sc->swsl_head = sc->swsl_tail = 0;
 1611 
 1612 #ifdef EN_DEBUG
 1613   printf("%s: drq free/chip: %d/0x%x, dtq free/chip: %d/0x%x, hwslist: 0x%x\n",
 1614     sc->sc_dev.dv_xname, sc->drq_free, sc->drq_chip,
 1615     sc->dtq_free, sc->dtq_chip, sc->hwslistp);
 1616 #endif
 1617 
 1618   for (slot = 0 ; slot < EN_NTX ; slot++) {
 1619     sc->txslot[slot].bfree = EN_TXSZ * 1024;
 1620     EN_WRITE(sc, MIDX_READPTR(slot), 0);
 1621     EN_WRITE(sc, MIDX_DESCSTART(slot), 0);
 1622     loc = sc->txslot[slot].cur = sc->txslot[slot].start;
 1623     loc = loc - MID_RAMOFF;
 1624     loc = (loc & ~((EN_TXSZ*1024) - 1)) >> 2; /* mask, cvt to words */
 1625     loc = loc >> MIDV_LOCTOPSHFT;       /* top 11 bits */
 1626     EN_WRITE(sc, MIDX_PLACE(slot), MIDX_MKPLACE(en_k2sz(EN_TXSZ), loc));
 1627 #ifdef EN_DEBUG
 1628     printf("%s: tx%d: place 0x%x\n", sc->sc_dev.dv_xname,  slot,
 1629         EN_READ(sc, MIDX_PLACE(slot)));
 1630 #endif
 1631   }
 1632 
 1633   /*
 1634    * enable!
 1635    */
 1636 
 1637   EN_WRITE(sc, MID_INTENA, MID_INT_TX|MID_INT_DMA_OVR|MID_INT_IDENT|
 1638         MID_INT_LERR|MID_INT_DMA_ERR|MID_INT_DMA_RX|MID_INT_DMA_TX|
 1639         MID_INT_SERVICE| /* >>> MID_INT_SUNI| XXXCDC<<< */ MID_INT_STATS);
 1640   EN_WRITE(sc, MID_MAST_CSR, MID_SETIPL(sc->ipl)|MID_MCSR_ENDMA|
 1641         MID_MCSR_ENTX|MID_MCSR_ENRX);
 1642 
 1643 }
 1644 
 1645 
 1646 /*
 1647  * en_loadvc: load a vc tab entry from a slot
 1648  */
 1649 
 1650 STATIC void en_loadvc(sc, vc)
 1651 
 1652 struct en_softc *sc;
 1653 int vc;
 1654 
 1655 {
 1656   int slot;
 1657   u_int32_t reg = EN_READ(sc, MID_VC(vc));
 1658 
 1659   reg = MIDV_SETMODE(reg, MIDV_TRASH);
 1660   EN_WRITE(sc, MID_VC(vc), reg);
 1661   DELAY(27);
 1662 
 1663   if ((slot = sc->rxvc2slot[vc]) == RX_NONE)
 1664     return;
 1665 
 1666   /* no need to set CRC */
 1667   EN_WRITE(sc, MID_DST_RP(vc), 0);      /* read pointer = 0, desc. start = 0 */
 1668   EN_WRITE(sc, MID_WP_ST_CNT(vc), 0);   /* write pointer = 0 */
 1669   EN_WRITE(sc, MID_VC(vc), sc->rxslot[slot].mode);  /* set mode, size, loc */
 1670   sc->rxslot[slot].cur = sc->rxslot[slot].start;
 1671 
 1672 #ifdef EN_DEBUG
 1673     printf("%s: rx%d: assigned to VCI %d\n", sc->sc_dev.dv_xname, slot, vc);
 1674 #endif
 1675 }
 1676 
 1677 
 1678 /*
 1679  * en_start: start transmitting the next packet that needs to go out
 1680  * if there is one.    note that atm_output() has already splnet()'d us.
 1681  */
 1682 
 1683 STATIC void en_start(ifp)
 1684 
 1685 struct ifnet *ifp;
 1686 
 1687 {
 1688 #ifdef MISSING_IF_SOFTC
 1689     struct en_softc *sc = (struct en_softc *) en_cd.cd_devs[ifp->if_unit];
 1690 #else
 1691     struct en_softc *sc = (struct en_softc *) ifp->if_softc;
 1692 #endif
 1693     struct mbuf *m, *lastm, *prev;
 1694     struct atm_pseudohdr *ap, *new_ap;
 1695     int txchan, mlen, got, need, toadd, cellcnt, first;
 1696     u_int32_t atm_vpi, atm_vci, atm_flags, *dat, aal;
 1697     u_int8_t *cp;
 1698 
 1699     if ((ifp->if_flags & IFF_RUNNING) == 0)
 1700         return;
 1701 
 1702     /*
 1703      * remove everything from interface queue since we handle all queueing
 1704      * locally ...
 1705      */
 1706 
 1707     while (1) {
 1708 
 1709       IFQ_DEQUEUE(&ifp->if_snd, m);
 1710       if (m == NULL)
 1711         return;         /* EMPTY: >>> exit here <<< */
 1712 
 1713       /*
 1714        * calculate size of packet (in bytes)
 1715        * also, if we are not doing transmit DMA we eliminate all stupid
 1716        * (non-word) alignments here using en_mfix().   calls to en_mfix()
 1717        * seem to be due to tcp retransmits for the most part.
 1718        *
 1719        * after this loop mlen total length of mbuf chain (including atm_ph),
 1720        * and lastm is a pointer to the last mbuf on the chain.
 1721        */
 1722 
 1723       lastm = m;
 1724       mlen = 0;
 1725       prev = NULL;
 1726       while (1) {
 1727         /* no DMA? */
 1728         if ((!sc->is_adaptec && EN_ENIDMAFIX) || EN_NOTXDMA || !en_dma) {
 1729           if ( (mtod(lastm, unsigned long) % sizeof(u_int32_t)) != 0 ||
 1730             ((lastm->m_len % sizeof(u_int32_t)) != 0 && lastm->m_next)) {
 1731             first = (lastm == m);
 1732             if (en_mfix(sc, &lastm, prev) == 0) {       /* failed? */
 1733               m_freem(m);
 1734               m = NULL;
 1735               break;
 1736             }
 1737             if (first)
 1738               m = lastm;                /* update */
 1739           }
 1740           prev = lastm;
 1741         }
 1742         mlen += lastm->m_len;
 1743         if (lastm->m_next == NULL)
 1744           break;
 1745         lastm = lastm->m_next;
 1746       }
 1747 
 1748       if (m == NULL)            /* happens only if mfix fails */
 1749         continue;
 1750 
 1751       ap = mtod(m, struct atm_pseudohdr *);
 1752 
 1753       atm_vpi = ATM_PH_VPI(ap);
 1754       atm_vci = ATM_PH_VCI(ap);
 1755       atm_flags = ATM_PH_FLAGS(ap) & ~(EN_OBHDR|EN_OBTRL);
 1756       aal = ((atm_flags & ATM_PH_AAL5) != 0)
 1757                         ? MID_TBD_AAL5 : MID_TBD_NOAAL5;
 1758 
 1759       /*
 1760        * check that vpi/vci is one we can use
 1761        */
 1762 
 1763       if (atm_vpi || atm_vci > MID_N_VC) {
 1764         printf("%s: output vpi=%d, vci=%d out of card range, dropping...\n",
 1765                 sc->sc_dev.dv_xname, atm_vpi, atm_vci);
 1766         m_freem(m);
 1767         continue;
 1768       }
 1769 
 1770       /*
 1771        * computing how much padding we need on the end of the mbuf, then
 1772        * see if we can put the TBD at the front of the mbuf where the
 1773        * link header goes (well behaved protocols will reserve room for us).
 1774        * last, check if room for PDU tail.
 1775        *
 1776        * got = number of bytes of data we have
 1777        * cellcnt = number of cells in this mbuf
 1778        * need = number of bytes of data + padding we need (excludes TBD)
 1779        * toadd = number of bytes of data we need to add to end of mbuf,
 1780        *        [including AAL5 PDU, if AAL5]
 1781        */
 1782 
 1783       got = mlen - sizeof(struct atm_pseudohdr);
 1784       toadd = (aal == MID_TBD_AAL5) ? MID_PDU_SIZE : 0; /* PDU */
 1785       cellcnt = (got + toadd + (MID_ATMDATASZ - 1)) / MID_ATMDATASZ;
 1786       need = cellcnt * MID_ATMDATASZ;
 1787       toadd = need - got;               /* recompute, including zero padding */
 1788 
 1789 #ifdef EN_DEBUG
 1790       printf("%s: txvci%d: mlen=%d, got=%d, need=%d, toadd=%d, cell#=%d\n",
 1791         sc->sc_dev.dv_xname, atm_vci, mlen, got, need, toadd, cellcnt);
 1792       printf("     leading_space=%d, trailing_space=%d\n",
 1793         M_LEADINGSPACE(m), M_TRAILINGSPACE(lastm));
 1794 #endif
 1795 
 1796 #ifdef EN_MBUF_OPT
 1797 
 1798       /*
 1799        * note: external storage (M_EXT) can be shared between mbufs
 1800        * to avoid copying (see m_copym()).    this means that the same
 1801        * data buffer could be shared by several mbufs, and thus it isn't
 1802        * a good idea to try and write TBDs or PDUs to M_EXT data areas.
 1803        */
 1804 
 1805       if (M_LEADINGSPACE(m) >= MID_TBD_SIZE && (m->m_flags & M_EXT) == 0) {
 1806         m->m_data -= MID_TBD_SIZE;
 1807         m->m_len += MID_TBD_SIZE;
 1808         mlen += MID_TBD_SIZE;
 1809         new_ap = mtod(m, struct atm_pseudohdr *);
 1810         *new_ap = *ap;                  /* move it back */
 1811         ap = new_ap;
 1812         dat = ((u_int32_t *) ap) + 1;
 1813         /* make sure the TBD is in proper byte order */
 1814         *dat++ = htonl(MID_TBD_MK1(aal, sc->txspeed[atm_vci], cellcnt));
 1815         *dat = htonl(MID_TBD_MK2(atm_vci, 0, 0));
 1816         atm_flags |= EN_OBHDR;
 1817       }
 1818 
 1819       if (toadd && (lastm->m_flags & M_EXT) == 0 &&
 1820                                         M_TRAILINGSPACE(lastm) >= toadd) {
 1821         cp = mtod(lastm, u_int8_t *) + lastm->m_len;
 1822         lastm->m_len += toadd;
 1823         mlen += toadd;
 1824         if (aal == MID_TBD_AAL5) {
 1825           memset(cp, 0, toadd - MID_PDU_SIZE);
 1826           dat = (u_int32_t *)(cp + toadd - MID_PDU_SIZE);
 1827           /* make sure the PDU is in proper byte order */
 1828           *dat = htonl(MID_PDU_MK1(0, 0, got));
 1829         } else {
 1830           memset(cp, 0, toadd);
 1831         }
 1832         atm_flags |= EN_OBTRL;
 1833       }
 1834       ATM_PH_FLAGS(ap) = atm_flags;     /* update EN_OBHDR/EN_OBTRL bits */
 1835 #endif  /* EN_MBUF_OPT */
 1836 
 1837       /*
 1838        * get assigned channel (will be zero unless txspeed[atm_vci] is set)
 1839        */
 1840 
 1841       txchan = sc->txvc2slot[atm_vci];
 1842 
 1843       if (sc->txslot[txchan].mbsize > EN_TXHIWAT) {
 1844         EN_COUNT(sc->txmbovr);
 1845         m_freem(m);
 1846 #ifdef EN_DEBUG
 1847         printf("%s: tx%d: buffer space shortage\n", sc->sc_dev.dv_xname,
 1848                 txchan);
 1849 #endif
 1850         continue;
 1851       }
 1852 
 1853       sc->txslot[txchan].mbsize += mlen;
 1854 
 1855 #ifdef EN_DEBUG
 1856       printf("%s: tx%d: VPI=%d, VCI=%d, FLAGS=0x%x, speed=0x%x\n",
 1857         sc->sc_dev.dv_xname, txchan, atm_vpi, atm_vci, atm_flags,
 1858         sc->txspeed[atm_vci]);
 1859       printf("     adjusted mlen=%d, mbsize=%d\n", mlen,
 1860                 sc->txslot[txchan].mbsize);
 1861 #endif
 1862 
 1863       IF_ENQUEUE(&sc->txslot[txchan].q, m);
 1864       en_txdma(sc, txchan);
 1865 
 1866   }
 1867   /*NOTREACHED*/
 1868 }
 1869 
 1870 
 1871 /*
 1872  * en_mfix: fix a stupid mbuf
 1873  */
 1874 
 1875 #ifndef __FreeBSD__
 1876 
 1877 STATIC int en_mfix(sc, mm, prev)
 1878 
 1879 struct en_softc *sc;
 1880 struct mbuf **mm, *prev;
 1881 
 1882 {
 1883   struct mbuf *m, *new;
 1884   u_char *d, *cp;
 1885   int off;
 1886   struct mbuf *nxt;
 1887 
 1888   m = *mm;
 1889 
 1890   EN_COUNT(sc->mfix);                   /* count # of calls */
 1891 #ifdef EN_DEBUG
 1892   printf("%s: mfix mbuf m_data=%p, m_len=%d\n", sc->sc_dev.dv_xname,
 1893         m->m_data, m->m_len);
 1894 #endif
 1895 
 1896   d = mtod(m, u_char *);
 1897   off = ((unsigned long) d) % sizeof(u_int32_t);
 1898 
 1899   if (off) {
 1900     if ((m->m_flags & M_EXT) == 0) {
 1901       memmove(d - off, d, m->m_len);   /* ALIGN! (with costly data copy...) */
 1902       d -= off;
 1903       m->m_data = (caddr_t)d;
 1904     } else {
 1905       /* can't write to an M_EXT mbuf since it may be shared */
 1906       MGET(new, M_DONTWAIT, MT_DATA);
 1907       if (!new) {
 1908         EN_COUNT(sc->mfixfail);
 1909         return(0);
 1910       }
 1911       MCLGET(new, M_DONTWAIT);
 1912       if ((new->m_flags & M_EXT) == 0) {
 1913         m_free(new);
 1914         EN_COUNT(sc->mfixfail);
 1915         return(0);
 1916       }
 1917       memcpy(new->m_data, d, m->m_len); /* ALIGN! (with costly data copy...) */
 1918       new->m_len = m->m_len;
 1919       new->m_next = m->m_next;
 1920       if (prev)
 1921         prev->m_next = new;
 1922       m_free(m);
 1923       *mm = m = new;    /* note: 'd' now invalid */
 1924     }
 1925   }
 1926 
 1927   off = m->m_len % sizeof(u_int32_t);
 1928   if (off == 0)
 1929     return(1);
 1930 
 1931   d = mtod(m, u_char *) + m->m_len;
 1932   off = sizeof(u_int32_t) - off;
 1933 
 1934   nxt = m->m_next;
 1935   while (off--) {
 1936     for ( ; nxt != NULL && nxt->m_len == 0 ; nxt = nxt->m_next)
 1937       /*null*/;
 1938     if (nxt == NULL) {          /* out of data, zero fill */
 1939       *d++ = 0;
 1940       continue;                 /* next "off" */
 1941     }
 1942     cp = mtod(nxt, u_char *);
 1943     *d++ = *cp++;
 1944     m->m_len++;
 1945     nxt->m_len--;
 1946     nxt->m_data = (caddr_t)cp;
 1947   }
 1948   return(1);
 1949 }
 1950 
 1951 #else /* __FreeBSD__ */
 1952 
 1953 STATIC int en_makeexclusive(struct en_softc *, struct mbuf **, struct mbuf *);
 1954 
 1955 STATIC int en_makeexclusive(sc, mm, prev)
 1956     struct en_softc *sc;
 1957     struct mbuf **mm, *prev;
 1958 {
 1959     struct mbuf *m, *new;
 1960 
 1961     m = *mm;
 1962 
 1963     if (m->m_flags & M_EXT) {
 1964         if (m->m_ext.ext_free) {
 1965             /* external buffer isn't an ordinary mbuf cluster! */
 1966             printf("%s: mfix: special buffer! can't make a copy!\n",
 1967                    sc->sc_dev.dv_xname);
 1968             return (0);
 1969         }
 1970 
 1971         if (mclrefcnt[mtocl(m->m_ext.ext_buf)] > 1) {
 1972             /* make a real copy of the M_EXT mbuf since it is shared */
 1973             MGET(new, M_DONTWAIT, MT_DATA);
 1974             if (!new) {
 1975                 EN_COUNT(sc->mfixfail);
 1976                 return(0);
 1977             }
 1978             if (m->m_flags & M_PKTHDR)
 1979                 M_COPY_PKTHDR(new, m);
 1980             MCLGET(new, M_DONTWAIT);
 1981             if ((new->m_flags & M_EXT) == 0) {
 1982                 m_free(new);
 1983                 EN_COUNT(sc->mfixfail);
 1984                 return(0);
 1985             }
 1986             memcpy(new->m_data, m->m_data, m->m_len);
 1987             new->m_len = m->m_len;
 1988             new->m_next = m->m_next;
 1989             if (prev)
 1990                 prev->m_next = new;
 1991             m_free(m);
 1992             *mm = new;
 1993         }
 1994         else {
 1995             /* the buffer is not shared, align the data offset using
 1996                this buffer. */
 1997             u_char *d = mtod(m, u_char *);
 1998             int off = ((u_long)d) % sizeof(u_int32_t);
 1999 
 2000             if (off > 0) {
 2001                 memmove(d - off, d, m->m_len);
 2002                 m->m_data = (caddr_t)d - off;
 2003             }
 2004         }
 2005     }
 2006     return (1);
 2007 }
 2008 
 2009 STATIC int en_mfix(sc, mm, prev)
 2010 
 2011 struct en_softc *sc;
 2012 struct mbuf **mm, *prev;
 2013 
 2014 {
 2015   struct mbuf *m;
 2016   u_char *d, *cp;
 2017   int off;
 2018   struct mbuf *nxt;
 2019 
 2020   m = *mm;
 2021 
 2022   EN_COUNT(sc->mfix);                   /* count # of calls */
 2023 #ifdef EN_DEBUG
 2024   printf("%s: mfix mbuf m_data=0x%x, m_len=%d\n", sc->sc_dev.dv_xname,
 2025         m->m_data, m->m_len);
 2026 #endif
 2027 
 2028   d = mtod(m, u_char *);
 2029   off = ((unsigned long) d) % sizeof(u_int32_t);
 2030 
 2031   if (off) {
 2032     if ((m->m_flags & M_EXT) == 0) {
 2033       memmove(d - off, d, m->m_len);   /* ALIGN! (with costly data copy...) */
 2034       d -= off;
 2035       m->m_data = (caddr_t)d;
 2036     } else {
 2037       /* can't write to an M_EXT mbuf since it may be shared */
 2038       if (en_makeexclusive(sc, &m, prev) == 0)
 2039           return (0);
 2040       *mm = m;  /* note: 'd' now invalid */
 2041     }
 2042   }
 2043 
 2044   off = m->m_len % sizeof(u_int32_t);
 2045   if (off == 0)
 2046     return(1);
 2047 
 2048   if (m->m_flags & M_EXT) {
 2049       /* can't write to an M_EXT mbuf since it may be shared */
 2050       if (en_makeexclusive(sc, &m, prev) == 0)
 2051           return (0);
 2052       *mm = m;  /* note: 'd' now invalid */
 2053   }
 2054 
 2055   d = mtod(m, u_char *) + m->m_len;
 2056   off = sizeof(u_int32_t) - off;
 2057 
 2058   nxt = m->m_next;
 2059   while (off--) {
 2060     if (nxt != NULL && nxt->m_len == 0) {
 2061         /* remove an empty mbuf.  this avoids odd byte padding to an empty
 2062            last mbuf.  */
 2063         m->m_next = nxt = m_free(nxt);
 2064     }
 2065     if (nxt == NULL) {          /* out of data, zero fill */
 2066       *d++ = 0;
 2067       continue;                 /* next "off" */
 2068     }
 2069     cp = mtod(nxt, u_char *);
 2070     *d++ = *cp++;
 2071     m->m_len++;
 2072     nxt->m_len--;
 2073     nxt->m_data = (caddr_t)cp;
 2074   }
 2075   if (nxt != NULL && nxt->m_len == 0)
 2076       m->m_next = m_free(nxt);
 2077   return(1);
 2078 }
 2079 
 2080 #endif /* __FreeBSD__ */
 2081 
 2082 /*
 2083  * en_txdma: start transmit DMA, if possible
 2084  */
 2085 
 2086 STATIC void en_txdma(sc, chan)
 2087 
 2088 struct en_softc *sc;
 2089 int chan;
 2090 
 2091 {
 2092   struct mbuf *tmp;
 2093   struct atm_pseudohdr *ap;
 2094   struct en_launch launch;
 2095   int datalen = 0, dtqneed, len, ncells;
 2096   u_int8_t *cp;
 2097   struct ifnet *ifp;
 2098 
 2099 #ifdef EN_DEBUG
 2100   printf("%s: tx%d: starting...\n", sc->sc_dev.dv_xname, chan);
 2101 #endif
 2102 
 2103   /*
 2104    * note: now that txlaunch handles non-word aligned/sized requests
 2105    * the only time you can safely set launch.nodma is if you've en_mfix()'d
 2106    * the mbuf chain.    this happens only if EN_NOTXDMA || !en_dma.
 2107    */
 2108 
 2109   launch.nodma = (EN_NOTXDMA || !en_dma);
 2110 
 2111 again:
 2112 
 2113   /*
 2114    * get an mbuf waiting for DMA
 2115    */
 2116 
 2117   launch.t = sc->txslot[chan].q.ifq_head; /* peek at head of queue */
 2118 
 2119   if (launch.t == NULL) {
 2120 #ifdef EN_DEBUG
 2121     printf("%s: tx%d: ...done!\n", sc->sc_dev.dv_xname, chan);
 2122 #endif
 2123     return;     /* >>> exit here if no data waiting for DMA <<< */
 2124   }
 2125 
 2126   /*
 2127    * get flags, vci
 2128    *
 2129    * note: launch.need = # bytes we need to get on the card
 2130    *       dtqneed = # of DTQs we need for this packet
 2131    *       launch.mlen = # of bytes in in mbuf chain (<= launch.need)
 2132    */
 2133 
 2134   ap = mtod(launch.t, struct atm_pseudohdr *);
 2135   launch.atm_vci = ATM_PH_VCI(ap);
 2136   launch.atm_flags = ATM_PH_FLAGS(ap);
 2137   launch.aal = ((launch.atm_flags & ATM_PH_AAL5) != 0) ?
 2138                 MID_TBD_AAL5 : MID_TBD_NOAAL5;
 2139 
 2140   /*
 2141    * XXX: have to recompute the length again, even though we already did
 2142    * it in en_start().   might as well compute dtqneed here as well, so
 2143    * this isn't that bad.
 2144    */
 2145 
 2146   if ((launch.atm_flags & EN_OBHDR) == 0) {
 2147     dtqneed = 1;                /* header still needs to be added */
 2148     launch.need = MID_TBD_SIZE; /* not included with mbuf */
 2149   } else {
 2150     dtqneed = 0;                /* header on-board, DMA with mbuf */
 2151     launch.need = 0;
 2152   }
 2153 
 2154   launch.mlen = 0;
 2155   for (tmp = launch.t ; tmp != NULL ; tmp = tmp->m_next) {
 2156     len = tmp->m_len;
 2157     launch.mlen += len;
 2158     cp = mtod(tmp, u_int8_t *);
 2159     if (tmp == launch.t) {
 2160       len -= sizeof(struct atm_pseudohdr); /* don't count this! */
 2161       cp += sizeof(struct atm_pseudohdr);
 2162     }
 2163     launch.need += len;
 2164     if (len == 0)
 2165       continue;                 /* atm_pseudohdr alone in first mbuf */
 2166 
 2167     dtqneed += en_dqneed(sc, (caddr_t) cp, len, 1);
 2168   }
 2169 
 2170   if ((launch.need % sizeof(u_int32_t)) != 0)
 2171     dtqneed++;                  /* need DTQ to FLUSH internal buffer */
 2172 
 2173   if ((launch.atm_flags & EN_OBTRL) == 0) {
 2174     if (launch.aal == MID_TBD_AAL5) {
 2175       datalen = launch.need - MID_TBD_SIZE;
 2176       launch.need += MID_PDU_SIZE;              /* AAL5: need PDU tail */
 2177     }
 2178     dtqneed++;                  /* need to work on the end a bit */
 2179   }
 2180 
 2181   /*
 2182    * finish calculation of launch.need (need to figure out how much padding
 2183    * we will need).   launch.need includes MID_TBD_SIZE, but we need to
 2184    * remove that to so we can round off properly.     we have to add
 2185    * MID_TBD_SIZE back in after calculating ncells.
 2186    */
 2187 
 2188   launch.need = roundup(launch.need - MID_TBD_SIZE, MID_ATMDATASZ);
 2189   ncells = launch.need / MID_ATMDATASZ;
 2190   launch.need += MID_TBD_SIZE;
 2191 
 2192   if (launch.need > EN_TXSZ * 1024) {
 2193     printf("%s: tx%d: packet larger than xmit buffer (%d > %d)\n",
 2194       sc->sc_dev.dv_xname, chan, launch.need, EN_TXSZ * 1024);
 2195     goto dequeue_drop;
 2196   }
 2197 
 2198   /*
 2199    * note: note that we cannot totally fill the circular buffer (i.e.
 2200    * we can't use up all of the remaining sc->txslot[chan].bfree free
 2201    * bytes) because that would cause the circular buffer read pointer
 2202    * to become equal to the write pointer, thus signaling 'empty buffer'
 2203    * to the hardware and stopping the transmitter.
 2204    */
 2205   if (launch.need >= sc->txslot[chan].bfree) {
 2206     EN_COUNT(sc->txoutspace);
 2207 #ifdef EN_DEBUG
 2208     printf("%s: tx%d: out of transmit space\n", sc->sc_dev.dv_xname, chan);
 2209 #endif
 2210     return;             /* >>> exit here if out of obmem buffer space <<< */
 2211   }
 2212 
 2213   /*
 2214    * ensure we have enough dtqs to go, if not, wait for more.
 2215    */
 2216 
 2217   if (launch.nodma) {
 2218     dtqneed = 1;
 2219   }
 2220   if (dtqneed > sc->dtq_free) {
 2221     sc->need_dtqs = 1;
 2222     EN_COUNT(sc->txdtqout);
 2223 #ifdef EN_DEBUG
 2224     printf("%s: tx%d: out of transmit DTQs\n", sc->sc_dev.dv_xname, chan);
 2225 #endif
 2226     return;             /* >>> exit here if out of dtqs <<< */
 2227   }
 2228 
 2229   /*
 2230    * it is a go, commit!  dequeue mbuf start working on the xfer.
 2231    */
 2232 
 2233   IF_DEQUEUE(&sc->txslot[chan].q, tmp);
 2234 #ifdef EN_DIAG
 2235   if (launch.t != tmp)
 2236     panic("en dequeue");
 2237 #endif /* EN_DIAG */
 2238 
 2239   /*
 2240    * launch!
 2241    */
 2242 
 2243   EN_COUNT(sc->launch);
 2244 #ifdef ATM_PVCEXT
 2245   /* if there's a subinterface for this vci, override ifp. */
 2246   ifp = en_vci2ifp(sc, launch.atm_vci);
 2247 #else
 2248   ifp = &sc->enif;
 2249 #endif
 2250   ifp->if_opackets++;
 2251 
 2252   if ((launch.atm_flags & EN_OBHDR) == 0) {
 2253     EN_COUNT(sc->lheader);
 2254     /* store tbd1/tbd2 in host byte order */
 2255     launch.tbd1 = MID_TBD_MK1(launch.aal, sc->txspeed[launch.atm_vci], ncells);
 2256     launch.tbd2 = MID_TBD_MK2(launch.atm_vci, 0, 0);
 2257   }
 2258   if ((launch.atm_flags & EN_OBTRL) == 0 && launch.aal == MID_TBD_AAL5) {
 2259     EN_COUNT(sc->ltail);
 2260     launch.pdu1 = MID_PDU_MK1(0, 0, datalen);  /* host byte order */
 2261   }
 2262 
 2263   en_txlaunch(sc, chan, &launch);
 2264 
 2265 #if NBPFILTER > 0
 2266   if (ifp->if_bpf) {
 2267       /*
 2268        * adjust the top of the mbuf to skip the pseudo atm header
 2269        * (and TBD, if present) before passing the packet to bpf,
 2270        * restore it afterwards.
 2271        */
 2272       int size = sizeof(struct atm_pseudohdr);
 2273       if (launch.atm_flags & EN_OBHDR)
 2274           size += MID_TBD_SIZE;
 2275 
 2276       launch.t->m_data += size;
 2277       launch.t->m_len -= size;
 2278 
 2279       BPF_MTAP(ifp, launch.t);
 2280 
 2281       launch.t->m_data -= size;
 2282       launch.t->m_len += size;
 2283   }
 2284 #endif /* NBPFILTER > 0 */
 2285   /*
 2286    * do some housekeeping and get the next packet
 2287    */
 2288 
 2289   sc->txslot[chan].bfree -= launch.need;
 2290   IF_ENQUEUE(&sc->txslot[chan].indma, launch.t);
 2291   goto again;
 2292 
 2293   /*
 2294    * END of txdma loop!
 2295    */
 2296 
 2297   /*
 2298    * error handles
 2299    */
 2300 
 2301 dequeue_drop:
 2302   IF_DEQUEUE(&sc->txslot[chan].q, tmp);
 2303   if (launch.t != tmp)
 2304     panic("en dequeue drop");
 2305   m_freem(launch.t);
 2306   sc->txslot[chan].mbsize -= launch.mlen;
 2307   goto again;
 2308 }
 2309 
 2310 
 2311 /*
 2312  * en_txlaunch: launch an mbuf into the DMA pool!
 2313  */
 2314 
 2315 STATIC void en_txlaunch(sc, chan, l)
 2316 
 2317 struct en_softc *sc;
 2318 int chan;
 2319 struct en_launch *l;
 2320 
 2321 {
 2322   struct mbuf *tmp;
 2323   u_int32_t cur = sc->txslot[chan].cur,
 2324             start = sc->txslot[chan].start,
 2325             stop = sc->txslot[chan].stop,
 2326             dma, *data, *datastop, count, bcode;
 2327   int pad, addtail, need, len, needalign, cnt, end, mx;
 2328 
 2329 
 2330  /*
 2331   * vars:
 2332   *   need = # bytes card still needs (decr. to zero)
 2333   *   len = # of bytes left in current mbuf
 2334   *   cur = our current pointer
 2335   *   dma = last place we programmed into the DMA
 2336   *   data = pointer into data area of mbuf that needs to go next
 2337   *   cnt = # of bytes to transfer in this DTQ
 2338   *   bcode/count = DMA burst code, and chip's version of cnt
 2339   *
 2340   *   a single buffer can require up to 5 DTQs depending on its size
 2341   *   and alignment requirements.   the 5 possible requests are:
 2342   *   [1] 1, 2, or 3 byte DMA to align src data pointer to word boundary
 2343   *   [2] alburst DMA to align src data pointer to bestburstlen
 2344   *   [3] 1 or more bestburstlen DMAs
 2345   *   [4] clean up burst (to last word boundary)
 2346   *   [5] 1, 2, or 3 byte final clean up DMA
 2347   */
 2348 
 2349  need = l->need;
 2350  dma = cur;
 2351  addtail = (l->atm_flags & EN_OBTRL) == 0;      /* add a tail? */
 2352 
 2353 #ifdef EN_DIAG
 2354   if ((need - MID_TBD_SIZE) % MID_ATMDATASZ)
 2355     printf("%s: tx%d: bogus transmit needs (%d)\n", sc->sc_dev.dv_xname, chan,
 2356                 need);
 2357 #endif
 2358 #ifdef EN_DEBUG
 2359   printf("%s: tx%d: launch mbuf %p!   cur=0x%x[%d], need=%d, addtail=%d\n",
 2360         sc->sc_dev.dv_xname, chan, l->t, cur, (cur-start)/4, need, addtail);
 2361   count = EN_READ(sc, MIDX_PLACE(chan));
 2362   printf("     HW: base_address=0x%x, size=%d, read=%d, descstart=%d\n",
 2363         MIDX_BASE(count), MIDX_SZ(count), EN_READ(sc, MIDX_READPTR(chan)),
 2364         EN_READ(sc, MIDX_DESCSTART(chan)));
 2365 #endif
 2366 
 2367  /*
 2368   * do we need to insert the TBD by hand?
 2369   * note that tbd1/tbd2/pdu1 are in host byte order.
 2370   */
 2371 
 2372   if ((l->atm_flags & EN_OBHDR) == 0) {
 2373 #ifdef EN_DEBUG
 2374     printf("%s: tx%d: insert header 0x%x 0x%x\n", sc->sc_dev.dv_xname,
 2375         chan, l->tbd1, l->tbd2);
 2376 #endif
 2377     EN_WRITE(sc, cur, l->tbd1);
 2378     EN_WRAPADD(start, stop, cur, 4);
 2379     EN_WRITE(sc, cur, l->tbd2);
 2380     EN_WRAPADD(start, stop, cur, 4);
 2381     need -= 8;
 2382   }
 2383 
 2384   /*
 2385    * now do the mbufs...
 2386    */
 2387 
 2388   for (tmp = l->t ; tmp != NULL ; tmp = tmp->m_next) {
 2389 
 2390     /* get pointer to data and length */
 2391     data = mtod(tmp, u_int32_t *);
 2392     len = tmp->m_len;
 2393     if (tmp == l->t) {
 2394       data += sizeof(struct atm_pseudohdr)/sizeof(u_int32_t);
 2395       len -= sizeof(struct atm_pseudohdr);
 2396     }
 2397 
 2398     /* now, determine if we should copy it */
 2399     if (l->nodma || (len < EN_MINDMA &&
 2400        (len % 4) == 0 && ((unsigned long) data % 4) == 0 && (cur % 4) == 0)) {
 2401 
 2402       /*
 2403        * roundup len: the only time this will change the value of len
 2404        * is when l->nodma is true, tmp is the last mbuf, and there is
 2405        * a non-word number of bytes to transmit.   in this case it is
 2406        * safe to round up because we've en_mfix'd the mbuf (so the first
 2407        * byte is word aligned there must be enough free bytes at the end
 2408        * to round off to the next word boundary)...
 2409        */
 2410       len = roundup(len, sizeof(u_int32_t));
 2411       datastop = data + (len / sizeof(u_int32_t));
 2412       /* copy loop: preserve byte order!!!  use WRITEDAT */
 2413       while (data != datastop) {
 2414         EN_WRITEDAT(sc, cur, *data);
 2415         data++;
 2416         EN_WRAPADD(start, stop, cur, 4);
 2417       }
 2418       need -= len;
 2419 #ifdef EN_DEBUG
 2420       printf("%s: tx%d: copied %d bytes (%d left, cur now 0x%x)\n",
 2421                 sc->sc_dev.dv_xname, chan, len, need, cur);
 2422 #endif
 2423       continue;         /* continue on to next mbuf */
 2424     }
 2425 
 2426     /* going to do DMA, first make sure the dtq is in sync. */
 2427     if (dma != cur) {
 2428       EN_DTQADD(sc, WORD_IDX(start,cur), chan, MIDDMA_JK, 0, 0, 0);
 2429 #ifdef EN_DEBUG
 2430       printf("%s: tx%d: dtq_sync: advance pointer to %d\n",
 2431                 sc->sc_dev.dv_xname, chan, cur);
 2432 #endif
 2433     }
 2434 
 2435     /*
 2436      * if this is the last buffer, and it looks like we are going to need to
 2437      * flush the internal buffer, can we extend the length of this mbuf to
 2438      * avoid the FLUSH?
 2439      */
 2440 
 2441     if (tmp->m_next == NULL) {
 2442       cnt = (need - len) % sizeof(u_int32_t);
 2443       if (cnt && M_TRAILINGSPACE(tmp) >= cnt)
 2444         len += cnt;                     /* pad for FLUSH */
 2445     }
 2446 
 2447 #if !defined(MIDWAY_ENIONLY)
 2448 
 2449     /*
 2450      * the adaptec DMA engine is smart and handles everything for us.
 2451      */
 2452 
 2453     if (sc->is_adaptec) {
 2454       /* need to DMA "len" bytes out to card */
 2455       need -= len;
 2456       EN_WRAPADD(start, stop, cur, len);
 2457 #ifdef EN_DEBUG
 2458       printf("%s: tx%d: adp_dma %d bytes (%d left, cur now 0x%x)\n",
 2459               sc->sc_dev.dv_xname, chan, len, need, cur);
 2460 #endif
 2461       end = (need == 0) ? MID_DMA_END : 0;
 2462       EN_DTQADD(sc, len, chan, 0, vtophys((vaddr_t)data), l->mlen, end);
 2463       if (end)
 2464         goto done;
 2465       dma = cur;        /* update DMA pointer */
 2466       continue;
 2467     }
 2468 #endif /* !MIDWAY_ENIONLY */
 2469 
 2470 #if !defined(MIDWAY_ADPONLY)
 2471 
 2472     /*
 2473      * the ENI DMA engine is not so smart and need more help from us
 2474      */
 2475 
 2476     /* do we need to do a DMA op to align to word boundary? */
 2477     needalign = (unsigned long) data % sizeof(u_int32_t);
 2478     if (needalign) {
 2479       EN_COUNT(sc->headbyte);
 2480       cnt = sizeof(u_int32_t) - needalign;
 2481       if (cnt == 2 && len >= cnt) {
 2482         count = 1;
 2483         bcode = MIDDMA_2BYTE;
 2484       } else {
 2485         cnt = min(cnt, len);            /* prevent overflow */
 2486         count = cnt;
 2487         bcode = MIDDMA_BYTE;
 2488       }
 2489       need -= cnt;
 2490       EN_WRAPADD(start, stop, cur, cnt);
 2491 #ifdef EN_DEBUG
 2492       printf("%s: tx%d: small al_dma %d bytes (%d left, cur now 0x%x)\n",
 2493               sc->sc_dev.dv_xname, chan, cnt, need, cur);
 2494 #endif
 2495       len -= cnt;
 2496       end = (need == 0) ? MID_DMA_END : 0;
 2497       EN_DTQADD(sc, count, chan, bcode, vtophys((vaddr_t)data), l->mlen, end);
 2498       if (end)
 2499         goto done;
 2500       data = (u_int32_t *) ((u_char *)data + cnt);
 2501     }
 2502 
 2503     /* do we need to do a DMA op to align? */
 2504     if (sc->alburst &&
 2505         (needalign = (((unsigned long) data) & sc->bestburstmask)) != 0
 2506         && len >= sizeof(u_int32_t)) {
 2507       cnt = sc->bestburstlen - needalign;
 2508       mx = len & ~(sizeof(u_int32_t)-1);        /* don't go past end */
 2509       if (cnt > mx) {
 2510         cnt = mx;
 2511         count = cnt / sizeof(u_int32_t);
 2512         bcode = MIDDMA_WORD;
 2513       } else {
 2514         count = cnt / sizeof(u_int32_t);
 2515         bcode = en_dmaplan[count].bcode;
 2516         count = cnt >> en_dmaplan[count].divshift;
 2517       }
 2518       need -= cnt;
 2519       EN_WRAPADD(start, stop, cur, cnt);
 2520 #ifdef EN_DEBUG
 2521       printf("%s: tx%d: al_dma %d bytes (%d left, cur now 0x%x)\n",
 2522                 sc->sc_dev.dv_xname, chan, cnt, need, cur);
 2523 #endif
 2524       len -= cnt;
 2525       end = (need == 0) ? MID_DMA_END : 0;
 2526       EN_DTQADD(sc, count, chan, bcode, vtophys((vaddr_t)data), l->mlen, end);
 2527       if (end)
 2528         goto done;
 2529       data = (u_int32_t *) ((u_char *)data + cnt);
 2530     }
 2531 
 2532     /* do we need to do a max-sized burst? */
 2533     if (len >= sc->bestburstlen) {
 2534       count = len >> sc->bestburstshift;
 2535       cnt = count << sc->bestburstshift;
 2536       bcode = sc->bestburstcode;
 2537       need -= cnt;
 2538       EN_WRAPADD(start, stop, cur, cnt);
 2539 #ifdef EN_DEBUG
 2540       printf("%s: tx%d: best_dma %d bytes (%d left, cur now 0x%x)\n",
 2541                 sc->sc_dev.dv_xname, chan, cnt, need, cur);
 2542 #endif
 2543       len -= cnt;
 2544       end = (need == 0) ? MID_DMA_END : 0;
 2545       EN_DTQADD(sc, count, chan, bcode, vtophys((vaddr_t)data), l->mlen, end);
 2546       if (end)
 2547         goto done;
 2548       data = (u_int32_t *) ((u_char *)data + cnt);
 2549     }
 2550 
 2551     /* do we need to do a cleanup burst? */
 2552     cnt = len & ~(sizeof(u_int32_t)-1);
 2553     if (cnt) {
 2554       count = cnt / sizeof(u_int32_t);
 2555       bcode = en_dmaplan[count].bcode;
 2556       count = cnt >> en_dmaplan[count].divshift;
 2557       need -= cnt;
 2558       EN_WRAPADD(start, stop, cur, cnt);
 2559 #ifdef EN_DEBUG
 2560       printf("%s: tx%d: cleanup_dma %d bytes (%d left, cur now 0x%x)\n",
 2561                 sc->sc_dev.dv_xname, chan, cnt, need, cur);
 2562 #endif
 2563       len -= cnt;
 2564       end = (need == 0) ? MID_DMA_END : 0;
 2565       EN_DTQADD(sc, count, chan, bcode, vtophys((vaddr_t)data), l->mlen, end);
 2566       if (end)
 2567         goto done;
 2568       data = (u_int32_t *) ((u_char *)data + cnt);
 2569     }
 2570 
 2571     /* any word fragments left? */
 2572     if (len) {
 2573       EN_COUNT(sc->tailbyte);
 2574       if (len == 2) {
 2575         count = 1;
 2576         bcode = MIDDMA_2BYTE;                 /* use 2byte mode */
 2577       } else {
 2578         count = len;
 2579         bcode = MIDDMA_BYTE;                  /* use 1 byte mode */
 2580       }
 2581       need -= len;
 2582       EN_WRAPADD(start, stop, cur, len);
 2583 #ifdef EN_DEBUG
 2584       printf("%s: tx%d: byte cleanup_dma %d bytes (%d left, cur now 0x%x)\n",
 2585               sc->sc_dev.dv_xname, chan, len, need, cur);
 2586 #endif
 2587       end = (need == 0) ? MID_DMA_END : 0;
 2588       EN_DTQADD(sc, count, chan, bcode, vtophys((vaddr_t)data), l->mlen, end);
 2589       if (end)
 2590         goto done;
 2591     }
 2592 
 2593     dma = cur;          /* update DMA pointer */
 2594 #endif /* !MIDWAY_ADPONLY */
 2595 
 2596   } /* next mbuf, please */
 2597 
 2598   /*
 2599    * all mbuf data has been copied out to the obmem (or set up to be DMAd).
 2600    * if the trailer or padding needs to be put in, do it now.
 2601    *
 2602    * NOTE: experimental results reveal the following fact:
 2603    *   if you DMA "X" bytes to the card, where X is not a multiple of 4,
 2604    *   then the card will internally buffer the last (X % 4) bytes (in
 2605    *   hopes of getting (4 - (X % 4)) more bytes to make a complete word).
 2606    *   it is imporant to make sure we don't leave any important data in
 2607    *   this internal buffer because it is discarded on the last (end) DTQ.
 2608    *   one way to do this is to DMA in (4 - (X % 4)) more bytes to flush
 2609    *   the darn thing out.
 2610    */
 2611 
 2612   if (addtail) {
 2613 
 2614     pad = need % sizeof(u_int32_t);
 2615     if (pad) {
 2616       /*
 2617        * FLUSH internal data buffer.  pad out with random data from the front
 2618        * of the mbuf chain...
 2619        */
 2620       bcode = (sc->is_adaptec) ? 0 : MIDDMA_BYTE;
 2621       EN_COUNT(sc->tailflush);
 2622       EN_WRAPADD(start, stop, cur, pad);
 2623       EN_DTQADD(sc, pad, chan, bcode, vtophys((vaddr_t)l->t->m_data), 0, 0);
 2624       need -= pad;
 2625 #ifdef EN_DEBUG
 2626       printf("%s: tx%d: pad/FLUSH DMA %d bytes (%d left, cur now 0x%x)\n",
 2627                 sc->sc_dev.dv_xname, chan, pad, need, cur);
 2628 #endif
 2629     }
 2630 
 2631     /* copy data */
 2632     pad = need / sizeof(u_int32_t);     /* round *down* */
 2633     if (l->aal == MID_TBD_AAL5)
 2634       pad -= 2;
 2635 #ifdef EN_DEBUG
 2636       printf("%s: tx%d: padding %d bytes (cur now 0x%x)\n",
 2637                 sc->sc_dev.dv_xname, chan, pad * sizeof(u_int32_t), cur);
 2638 #endif
 2639     while (pad--) {
 2640       EN_WRITEDAT(sc, cur, 0);  /* no byte order issues with zero */
 2641       EN_WRAPADD(start, stop, cur, 4);
 2642     }
 2643     if (l->aal == MID_TBD_AAL5) {
 2644       EN_WRITE(sc, cur, l->pdu1); /* in host byte order */
 2645       EN_WRAPADD(start, stop, cur, 8);
 2646     }
 2647   }
 2648 
 2649   if (addtail || dma != cur) {
 2650    /* write final descriptor  */
 2651     EN_DTQADD(sc, WORD_IDX(start,cur), chan, MIDDMA_JK, 0,
 2652                                 l->mlen, MID_DMA_END);
 2653     /* dma = cur; */    /* not necessary since we are done */
 2654   }
 2655 
 2656 done:
 2657   /* update current pointer */
 2658   sc->txslot[chan].cur = cur;
 2659 #ifdef EN_DEBUG
 2660       printf("%s: tx%d: DONE!   cur now = 0x%x\n",
 2661                 sc->sc_dev.dv_xname, chan, cur);
 2662 #endif
 2663 
 2664   return;
 2665 }
 2666 
 2667 
 2668 /*
 2669  * interrupt handler
 2670  */
 2671 
 2672 EN_INTR_TYPE en_intr(arg)
 2673 
 2674 void *arg;
 2675 
 2676 {
 2677   struct en_softc *sc = (struct en_softc *) arg;
 2678   struct mbuf *m;
 2679   struct atm_pseudohdr ah;
 2680   struct ifnet *ifp;
 2681   u_int32_t reg, kick, val, mask, chip, vci, slot, dtq, drq;
 2682   int lcv, idx, need_softserv = 0;
 2683 
 2684   reg = EN_READ(sc, MID_INTACK);
 2685 
 2686   if ((reg & MID_INT_ANY) == 0)
 2687     EN_INTR_RET(0); /* not us */
 2688 
 2689 #ifdef EN_DEBUG
 2690   {
 2691     char sbuf[256];
 2692 
 2693     bitmask_snprintf(reg, MID_INTBITS, sbuf, sizeof(sbuf));
 2694     printf("%s: interrupt=0x%s\n", sc->sc_dev.dv_xname, sbuf);
 2695   }
 2696 #endif
 2697 
 2698   /*
 2699    * unexpected errors that need a reset
 2700    */
 2701 
 2702   if ((reg & (MID_INT_IDENT|MID_INT_LERR|MID_INT_DMA_ERR|MID_INT_SUNI)) != 0) {
 2703     char sbuf[256];
 2704 
 2705     bitmask_snprintf(reg, MID_INTBITS, sbuf, sizeof(sbuf));
 2706     printf("%s: unexpected interrupt=0x%s, resetting card\n",
 2707            sc->sc_dev.dv_xname, sbuf);
 2708 #ifdef EN_DEBUG
 2709 #ifdef DDB
 2710 #ifdef __FreeBSD__
 2711     Debugger("en: unexpected error");
 2712 #else
 2713     Debugger();
 2714 #endif
 2715 #endif  /* DDB */
 2716     sc->enif.if_flags &= ~IFF_RUNNING; /* FREEZE! */
 2717 #else
 2718     en_reset(sc);
 2719     en_init(sc);
 2720 #endif
 2721     EN_INTR_RET(1); /* for us */
 2722   }
 2723 
 2724   /*******************
 2725    * xmit interrupts *
 2726    ******************/
 2727 
 2728   kick = 0;                             /* bitmask of channels to kick */
 2729   if (reg & MID_INT_TX) {               /* TX done! */
 2730 
 2731     /*
 2732      * check for tx complete, if detected then this means that some space
 2733      * has come free on the card.   we must account for it and arrange to
 2734      * kick the channel to life (in case it is stalled waiting on the card).
 2735      */
 2736     for (mask = 1, lcv = 0 ; lcv < EN_NTX ; lcv++, mask = mask * 2) {
 2737       if (reg & MID_TXCHAN(lcv)) {
 2738         kick = kick | mask;     /* want to kick later */
 2739         val = EN_READ(sc, MIDX_READPTR(lcv));   /* current read pointer */
 2740         val = (val * sizeof(u_int32_t)) + sc->txslot[lcv].start;
 2741                                                 /* convert to offset */
 2742         if (val > sc->txslot[lcv].cur)
 2743           sc->txslot[lcv].bfree = val - sc->txslot[lcv].cur;
 2744         else
 2745           sc->txslot[lcv].bfree = (val + (EN_TXSZ*1024)) - sc->txslot[lcv].cur;
 2746 #ifdef EN_DEBUG
 2747         printf("%s: tx%d: transmit done.   %d bytes now free in buffer\n",
 2748                 sc->sc_dev.dv_xname, lcv, sc->txslot[lcv].bfree);
 2749 #endif
 2750       }
 2751     }
 2752   }
 2753 
 2754   if (reg & MID_INT_DMA_TX) {           /* TX DMA done! */
 2755 
 2756   /*
 2757    * check for TX DMA complete, if detected then this means that some DTQs
 2758    * are now free.   it also means some indma mbufs can be freed.
 2759    * if we needed DTQs, kick all channels.
 2760    */
 2761     val = EN_READ(sc, MID_DMA_RDTX);    /* chip's current location */
 2762     idx = MID_DTQ_A2REG(sc->dtq_chip);/* where we last saw chip */
 2763     if (sc->need_dtqs) {
 2764       kick = MID_NTX_CH - 1;            /* assume power of 2, kick all! */
 2765       sc->need_dtqs = 0;                /* recalculated in "kick" loop below */
 2766 #ifdef EN_DEBUG
 2767       printf("%s: cleared need DTQ condition\n", sc->sc_dev.dv_xname);
 2768 #endif
 2769     }
 2770     while (idx != val) {
 2771       sc->dtq_free++;
 2772       if ((dtq = sc->dtq[idx]) != 0) {
 2773         sc->dtq[idx] = 0;       /* don't forget to zero it out when done */
 2774         slot = EN_DQ_SLOT(dtq);
 2775         IF_DEQUEUE(&sc->txslot[slot].indma, m);
 2776         if (!m) panic("enintr: dtqsync");
 2777         sc->txslot[slot].mbsize -= EN_DQ_LEN(dtq);
 2778 #ifdef EN_DEBUG
 2779         printf("%s: tx%d: free %d DMA bytes, mbsize now %d\n",
 2780                 sc->sc_dev.dv_xname, slot, EN_DQ_LEN(dtq),
 2781                 sc->txslot[slot].mbsize);
 2782 #endif
 2783         m_freem(m);
 2784       }
 2785       EN_WRAPADD(0, MID_DTQ_N, idx, 1);
 2786     };
 2787     sc->dtq_chip = MID_DTQ_REG2A(val);  /* sync softc */
 2788   }
 2789 
 2790 
 2791   /*
 2792    * kick xmit channels as needed
 2793    */
 2794 
 2795   if (kick) {
 2796 #ifdef EN_DEBUG
 2797   printf("%s: tx kick mask = 0x%x\n", sc->sc_dev.dv_xname, kick);
 2798 #endif
 2799     for (mask = 1, lcv = 0 ; lcv < EN_NTX ; lcv++, mask = mask * 2) {
 2800       if ((kick & mask) && sc->txslot[lcv].q.ifq_head) {
 2801         en_txdma(sc, lcv);              /* kick it! */
 2802       }
 2803     }           /* for each slot */
 2804   }             /* if kick */
 2805 
 2806 
 2807   /*******************
 2808    * recv interrupts *
 2809    ******************/
 2810 
 2811   /*
 2812    * check for RX DMA complete, and pass the data "upstairs"
 2813    */
 2814 
 2815   if (reg & MID_INT_DMA_RX) {
 2816     val = EN_READ(sc, MID_DMA_RDRX); /* chip's current location */
 2817     idx = MID_DRQ_A2REG(sc->drq_chip);/* where we last saw chip */
 2818     while (idx != val) {
 2819       sc->drq_free++;
 2820       if ((drq = sc->drq[idx]) != 0) {
 2821         sc->drq[idx] = 0;       /* don't forget to zero it out when done */
 2822         slot = EN_DQ_SLOT(drq);
 2823         if (EN_DQ_LEN(drq) == 0) {  /* "JK" trash DMA? */
 2824           m = NULL;
 2825         } else {
 2826           IF_DEQUEUE(&sc->rxslot[slot].indma, m);
 2827           if (!m)
 2828             panic("enintr: drqsync: %s: lost mbuf in slot %d!",
 2829                   sc->sc_dev.dv_xname, slot);
 2830         }
 2831         /* do something with this mbuf */
 2832         if (sc->rxslot[slot].oth_flags & ENOTHER_DRAIN) {  /* drain? */
 2833           if (m)
 2834             m_freem(m);
 2835           vci = sc->rxslot[slot].atm_vci;
 2836           if (sc->rxslot[slot].indma.ifq_head == NULL &&
 2837                 sc->rxslot[slot].q.ifq_head == NULL &&
 2838                 (EN_READ(sc, MID_VC(vci)) & MIDV_INSERVICE) == 0 &&
 2839                 (sc->rxslot[slot].oth_flags & ENOTHER_SWSL) == 0) {
 2840             sc->rxslot[slot].oth_flags = ENOTHER_FREE; /* done drain */
 2841             sc->rxslot[slot].atm_vci = RX_NONE;
 2842             sc->rxvc2slot[vci] = RX_NONE;
 2843 #ifdef EN_DEBUG
 2844             printf("%s: rx%d: VCI %d now free\n", sc->sc_dev.dv_xname,
 2845                         slot, vci);
 2846 #endif
 2847           }
 2848         } else if (m != NULL) {
 2849           ATM_PH_FLAGS(&ah) = sc->rxslot[slot].atm_flags;
 2850           ATM_PH_VPI(&ah) = 0;
 2851           ATM_PH_SETVCI(&ah, sc->rxslot[slot].atm_vci);
 2852 #ifdef EN_DEBUG
 2853           printf("%s: rx%d: rxvci%d: atm_input, mbuf %p, len %d, hand %p\n",
 2854                 sc->sc_dev.dv_xname, slot, sc->rxslot[slot].atm_vci, m,
 2855                 EN_DQ_LEN(drq), sc->rxslot[slot].rxhand);
 2856 #endif
 2857 
 2858 #ifdef ATM_PVCEXT
 2859           /* if there's a subinterface for this vci, override ifp. */
 2860           ifp = en_vci2ifp(sc, sc->rxslot[slot].atm_vci);
 2861           ifp->if_ipackets++;
 2862           m->m_pkthdr.rcvif = ifp;      /* XXX */
 2863 #else
 2864           ifp = &sc->enif;
 2865           ifp->if_ipackets++;
 2866 #endif
 2867 
 2868 #if NBPFILTER > 0
 2869           if (ifp->if_bpf)
 2870             BPF_MTAP(ifp, m);
 2871 #endif
 2872 
 2873           atm_input(ifp, &ah, m, sc->rxslot[slot].rxhand);
 2874         }
 2875 
 2876       }
 2877       EN_WRAPADD(0, MID_DRQ_N, idx, 1);
 2878     };
 2879     sc->drq_chip = MID_DRQ_REG2A(val);  /* sync softc */
 2880 
 2881     if (sc->need_drqs) {        /* true if we had a DRQ shortage */
 2882       need_softserv = 1;
 2883       sc->need_drqs = 0;
 2884 #ifdef EN_DEBUG
 2885         printf("%s: cleared need DRQ condition\n", sc->sc_dev.dv_xname);
 2886 #endif
 2887     }
 2888   }
 2889 
 2890   /*
 2891    * handle service interrupts
 2892    */
 2893 
 2894   if (reg & MID_INT_SERVICE) {
 2895     chip = MID_SL_REG2A(EN_READ(sc, MID_SERV_WRITE));
 2896 
 2897     while (sc->hwslistp != chip) {
 2898 
 2899       /* fetch and remove it from hardware service list */
 2900       vci = EN_READ(sc, sc->hwslistp);
 2901       EN_WRAPADD(MID_SLOFF, MID_SLEND, sc->hwslistp, 4);/* advance hw ptr */
 2902       slot = sc->rxvc2slot[vci];
 2903       if (slot == RX_NONE) {
 2904 #ifdef EN_DEBUG
 2905         printf("%s: unexpected rx interrupt on VCI %d\n",
 2906                 sc->sc_dev.dv_xname, vci);
 2907 #endif
 2908         EN_WRITE(sc, MID_VC(vci), MIDV_TRASH);  /* rx off, damn it! */
 2909         continue;                               /* next */
 2910       }
 2911       EN_WRITE(sc, MID_VC(vci), sc->rxslot[slot].mode); /* remove from hwsl */
 2912       EN_COUNT(sc->hwpull);
 2913 
 2914 #ifdef EN_DEBUG
 2915       printf("%s: pulled VCI %d off hwslist\n", sc->sc_dev.dv_xname, vci);
 2916 #endif
 2917 
 2918       /* add it to the software service list (if needed) */
 2919       if ((sc->rxslot[slot].oth_flags & ENOTHER_SWSL) == 0) {
 2920         EN_COUNT(sc->swadd);
 2921         need_softserv = 1;
 2922         sc->rxslot[slot].oth_flags |= ENOTHER_SWSL;
 2923         sc->swslist[sc->swsl_tail] = slot;
 2924         EN_WRAPADD(0, MID_SL_N, sc->swsl_tail, 1);
 2925         sc->swsl_size++;
 2926 #ifdef EN_DEBUG
 2927       printf("%s: added VCI %d to swslist\n", sc->sc_dev.dv_xname, vci);
 2928 #endif
 2929       }
 2930     };
 2931   }
 2932 
 2933   /*
 2934    * now service (function too big to include here)
 2935    */
 2936 
 2937   if (need_softserv)
 2938     en_service(sc);
 2939 
 2940   /*
 2941    * keep our stats
 2942    */
 2943 
 2944   if (reg & MID_INT_DMA_OVR) {
 2945     EN_COUNT(sc->dmaovr);
 2946 #ifdef EN_DEBUG
 2947     printf("%s: MID_INT_DMA_OVR\n", sc->sc_dev.dv_xname);
 2948 #endif
 2949   }
 2950   reg = EN_READ(sc, MID_STAT);
 2951 #ifdef EN_STAT
 2952   sc->otrash += MID_OTRASH(reg);
 2953   sc->vtrash += MID_VTRASH(reg);
 2954 #endif
 2955 
 2956   EN_INTR_RET(1); /* for us */
 2957 }
 2958 
 2959 
 2960 /*
 2961  * en_service: handle a service interrupt
 2962  *
 2963  * Q: why do we need a software service list?
 2964  *
 2965  * A: if we remove a VCI from the hardware list and we find that we are
 2966  *    out of DRQs we must defer processing until some DRQs become free.
 2967  *    so we must remember to look at this RX VCI/slot later, but we can't
 2968  *    put it back on the hardware service list (since that isn't allowed).
 2969  *    so we instead save it on the software service list.   it would be nice
 2970  *    if we could peek at the VCI on top of the hwservice list without removing
 2971  *    it, however this leads to a race condition: if we peek at it and
 2972  *    decide we are done with it new data could come in before we have a
 2973  *    chance to remove it from the hwslist.   by the time we get it out of
 2974  *    the list the interrupt for the new data will be lost.   oops!
 2975  *
 2976  */
 2977 
 2978 STATIC void en_service(sc)
 2979 
 2980 struct en_softc *sc;
 2981 
 2982 {
 2983   struct mbuf *m, *tmp;
 2984   u_int32_t cur, dstart, rbd, pdu, *sav, dma, bcode, count, *data, *datastop;
 2985   u_int32_t start, stop, cnt, needalign;
 2986   int slot, raw, aal5, vci, fill, mlen, tlen, drqneed, need, needfill, end;
 2987 
 2988   aal5 = 0;             /* Silence gcc */
 2989 next_vci:
 2990   if (sc->swsl_size == 0) {
 2991 #ifdef EN_DEBUG
 2992     printf("%s: en_service done\n", sc->sc_dev.dv_xname);
 2993 #endif
 2994     return;             /* >>> exit here if swsl now empty <<< */
 2995   }
 2996 
 2997   /*
 2998    * get slot/vci to service
 2999    */
 3000 
 3001   slot = sc->swslist[sc->swsl_head];
 3002   vci = sc->rxslot[slot].atm_vci;
 3003 #ifdef EN_DIAG
 3004   if (sc->rxvc2slot[vci] != slot) panic("en_service rx slot/vci sync");
 3005 #endif
 3006 
 3007   /*
 3008    * determine our mode and if we've got any work to do
 3009    */
 3010 
 3011   raw = sc->rxslot[slot].oth_flags & ENOTHER_RAW;
 3012   start= sc->rxslot[slot].start;
 3013   stop= sc->rxslot[slot].stop;
 3014   cur = sc->rxslot[slot].cur;
 3015 
 3016 #ifdef EN_DEBUG
 3017   printf("%s: rx%d: service vci=%d raw=%d start/stop/cur=0x%x 0x%x 0x%x\n",
 3018         sc->sc_dev.dv_xname, slot, vci, raw, start, stop, cur);
 3019 #endif
 3020 
 3021 same_vci:
 3022   dstart = MIDV_DSTART(EN_READ(sc, MID_DST_RP(vci)));
 3023   dstart = (dstart * sizeof(u_int32_t)) + start;
 3024 
 3025   /* check to see if there is any data at all */
 3026   if (dstart == cur) {
 3027 defer:                                  /* defer processing */
 3028     EN_WRAPADD(0, MID_SL_N, sc->swsl_head, 1);
 3029     sc->rxslot[slot].oth_flags &= ~ENOTHER_SWSL;
 3030     sc->swsl_size--;
 3031                                         /* >>> remove from swslist <<< */
 3032 #ifdef EN_DEBUG
 3033     printf("%s: rx%d: remove vci %d from swslist\n",
 3034                 sc->sc_dev.dv_xname, slot, vci);
 3035 #endif
 3036     goto next_vci;
 3037   }
 3038 
 3039   /*
 3040    * figure out how many bytes we need
 3041    * [mlen = # bytes to go in mbufs, fill = # bytes to dump (MIDDMA_JK)]
 3042    */
 3043 
 3044   if (raw) {
 3045 
 3046     /* raw mode (aka boodi mode) */
 3047     fill = 0;
 3048     if (dstart > cur)
 3049       mlen = dstart - cur;
 3050     else
 3051       mlen = (dstart + (EN_RXSZ*1024)) - cur;
 3052 
 3053     if (mlen < sc->rxslot[slot].raw_threshold)
 3054       goto defer;               /* too little data to deal with */
 3055 
 3056   } else {
 3057 
 3058     /* normal mode */
 3059     aal5 = (sc->rxslot[slot].atm_flags & ATM_PH_AAL5);
 3060     rbd = EN_READ(sc, cur);
 3061     if (MID_RBD_ID(rbd) != MID_RBD_STDID)
 3062       panic("en_service: id mismatch");
 3063 
 3064     if (rbd & MID_RBD_T) {
 3065       mlen = 0;                 /* we've got trash */
 3066       fill = MID_RBD_SIZE;
 3067       EN_COUNT(sc->ttrash);
 3068 #ifdef EN_DEBUG
 3069       printf("RX overflow lost %d cells!\n", MID_RBD_CNT(rbd));
 3070 #endif
 3071     } else if (!aal5) {
 3072       mlen = MID_RBD_SIZE + MID_CHDR_SIZE + MID_ATMDATASZ; /* 1 cell (ick!) */
 3073       fill = 0;
 3074     } else {
 3075       struct ifnet *ifp;
 3076 
 3077       tlen = (MID_RBD_CNT(rbd) * MID_ATMDATASZ) + MID_RBD_SIZE;
 3078       pdu = cur + tlen - MID_PDU_SIZE;
 3079       if (pdu >= stop)
 3080         pdu -= (EN_RXSZ*1024);
 3081       pdu = EN_READ(sc, pdu);   /* get PDU in correct byte order */
 3082       fill = tlen - MID_RBD_SIZE - MID_PDU_LEN(pdu);
 3083       if (fill < 0 || (rbd & MID_RBD_CRCERR) != 0) {
 3084         static int first = 1;
 3085 
 3086         if (first) {
 3087           printf("%s: %s, dropping frame\n", sc->sc_dev.dv_xname,
 3088                  (rbd & MID_RBD_CRCERR) ?
 3089                  "CRC error" : "invalid AAL5 PDU length");
 3090           printf("%s: got %d cells (%d bytes), AAL5 len is %d bytes (pdu=0x%x)\n",
 3091                  sc->sc_dev.dv_xname, MID_RBD_CNT(rbd),
 3092                  tlen - MID_RBD_SIZE, MID_PDU_LEN(pdu), pdu);
 3093 #ifndef EN_DEBUG
 3094           printf("CRC error report disabled from now on!\n");
 3095           first = 0;
 3096 #endif
 3097         }
 3098         fill = tlen;
 3099 
 3100 #ifdef ATM_PVCEXT
 3101         ifp = en_vci2ifp(sc, vci);
 3102 #else
 3103         ifp = &sc->enif;
 3104 #endif
 3105         ifp->if_ierrors++;
 3106 
 3107       }
 3108       mlen = tlen - fill;
 3109     }
 3110 
 3111   }
 3112 
 3113   /*
 3114    * now allocate mbufs for mlen bytes of data, if out of mbufs, trash all
 3115    *
 3116    * notes:
 3117    *  1. it is possible that we've already allocated an mbuf for this pkt
 3118    *     but ran out of DRQs, in which case we saved the allocated mbuf on
 3119    *     "q".
 3120    *  2. if we save an mbuf in "q" we store the "cur" (pointer) in the front
 3121    *     of the mbuf as an identity (that we can check later), and we also
 3122    *     store drqneed (so we don't have to recompute it).
 3123    *  3. after this block of code, if m is still NULL then we ran out of mbufs
 3124    */
 3125 
 3126   m = sc->rxslot[slot].q.ifq_head;
 3127   drqneed = 1;
 3128   if (m) {
 3129     sav = mtod(m, u_int32_t *);
 3130     if (sav[0] != cur) {
 3131 #ifdef EN_DEBUG
 3132       printf("%s: rx%d: q'ed mbuf %p not ours\n",
 3133                 sc->sc_dev.dv_xname, slot, m);
 3134 #endif
 3135       m = NULL;                 /* wasn't ours */
 3136       EN_COUNT(sc->rxqnotus);
 3137     } else {
 3138       EN_COUNT(sc->rxqus);
 3139       IF_DEQUEUE(&sc->rxslot[slot].q, m);
 3140       drqneed = sav[1];
 3141 #ifdef EN_DEBUG
 3142       printf("%s: rx%d: recovered q'ed mbuf %p (drqneed=%d)\n",
 3143         sc->sc_dev.dv_xname, slot, m, drqneed);
 3144 #endif
 3145     }
 3146   }
 3147 
 3148   if (mlen != 0 && m == NULL) {
 3149     m = en_mget(sc, mlen, &drqneed);            /* allocate! */
 3150     if (m == NULL) {
 3151       fill += mlen;
 3152       mlen = 0;
 3153       EN_COUNT(sc->rxmbufout);
 3154 #ifdef EN_DEBUG
 3155       printf("%s: rx%d: out of mbufs\n", sc->sc_dev.dv_xname, slot);
 3156 #endif
 3157     }
 3158 #ifdef EN_DEBUG
 3159     printf("%s: rx%d: allocate mbuf %p, mlen=%d, drqneed=%d\n",
 3160         sc->sc_dev.dv_xname, slot, m, mlen, drqneed);
 3161 #endif
 3162   }
 3163 
 3164 #ifdef EN_DEBUG
 3165   printf("%s: rx%d: VCI %d, mbuf_chain %p, mlen %d, fill %d\n",
 3166         sc->sc_dev.dv_xname, slot, vci, m, mlen, fill);
 3167 #endif
 3168 
 3169   /*
 3170    * now check to see if we've got the DRQs needed.    if we are out of
 3171    * DRQs we must quit (saving our mbuf, if we've got one).
 3172    */
 3173 
 3174   needfill = (fill) ? 1 : 0;
 3175   if (drqneed + needfill > sc->drq_free) {
 3176     sc->need_drqs = 1;  /* flag condition */
 3177     if (m == NULL) {
 3178       EN_COUNT(sc->rxoutboth);
 3179 #ifdef EN_DEBUG
 3180       printf("%s: rx%d: out of DRQs *and* mbufs!\n", sc->sc_dev.dv_xname, slot);
 3181 #endif
 3182       return;           /* >>> exit here if out of both mbufs and DRQs <<< */
 3183     }
 3184     sav = mtod(m, u_int32_t *);
 3185     sav[0] = cur;
 3186     sav[1] = drqneed;
 3187     IF_ENQUEUE(&sc->rxslot[slot].q, m);
 3188     EN_COUNT(sc->rxdrqout);
 3189 #ifdef EN_DEBUG
 3190     printf("%s: rx%d: out of DRQs\n", sc->sc_dev.dv_xname, slot);
 3191 #endif
 3192     return;             /* >>> exit here if out of DRQs <<< */
 3193   }
 3194 
 3195   /*
 3196    * at this point all resources have been allocated and we are commited
 3197    * to servicing this slot.
 3198    *
 3199    * dma = last location we told chip about
 3200    * cur = current location
 3201    * mlen = space in the mbuf we want
 3202    * need = bytes to xfer in (decrs to zero)
 3203    * fill = how much fill we need
 3204    * tlen = how much data to transfer to this mbuf
 3205    * cnt/bcode/count = <same as xmit>
 3206    *
 3207    * 'needfill' not used after this point
 3208    */
 3209 
 3210   dma = cur;            /* dma = last location we told chip about */
 3211   need = roundup(mlen, sizeof(u_int32_t));
 3212   fill = fill - (need - mlen);  /* note: may invalidate 'needfill' */
 3213 
 3214   for (tmp = m ; tmp != NULL && need > 0 ; tmp = tmp->m_next) {
 3215     tlen = roundup(tmp->m_len, sizeof(u_int32_t)); /* m_len set by en_mget */
 3216     data = mtod(tmp, u_int32_t *);
 3217 
 3218 #ifdef EN_DEBUG
 3219     printf("%s: rx%d: load mbuf %p, m_len=%d, m_data=%p, tlen=%d\n",
 3220         sc->sc_dev.dv_xname, slot, tmp, tmp->m_len, tmp->m_data, tlen);
 3221 #endif
 3222 
 3223     /* copy data */
 3224     if (EN_NORXDMA || !en_dma || tlen < EN_MINDMA) {
 3225       datastop = (u_int32_t *)((u_char *) data + tlen);
 3226       /* copy loop: preserve byte order!!!  use READDAT */
 3227       while (data != datastop) {
 3228         *data = EN_READDAT(sc, cur);
 3229         data++;
 3230         EN_WRAPADD(start, stop, cur, 4);
 3231       }
 3232       need -= tlen;
 3233 #ifdef EN_DEBUG
 3234       printf("%s: rx%d: vci%d: copied %d bytes (%d left)\n",
 3235                 sc->sc_dev.dv_xname, slot, vci, tlen, need);
 3236 #endif
 3237       continue;
 3238     }
 3239 
 3240     /* DMA data (check to see if we need to sync DRQ first) */
 3241     if (dma != cur) {
 3242       EN_DRQADD(sc, WORD_IDX(start,cur), vci, MIDDMA_JK, 0, 0, 0, 0);
 3243 #ifdef EN_DEBUG
 3244       printf("%s: rx%d: vci%d: drq_sync: advance pointer to %d\n",
 3245                 sc->sc_dev.dv_xname, slot, vci, cur);
 3246 #endif
 3247     }
 3248 
 3249 #if !defined(MIDWAY_ENIONLY)
 3250 
 3251     /*
 3252      * the adaptec DMA engine is smart and handles everything for us.
 3253      */
 3254 
 3255     if (sc->is_adaptec) {
 3256       need -= tlen;
 3257       EN_WRAPADD(start, stop, cur, tlen);
 3258 #ifdef EN_DEBUG
 3259       printf("%s: rx%d: vci%d: adp_dma %d bytes (%d left)\n",
 3260                 sc->sc_dev.dv_xname, slot, vci, tlen, need);
 3261 #endif
 3262       end = (need == 0 && !fill) ? MID_DMA_END : 0;
 3263       EN_DRQADD(sc, tlen, vci, 0, vtophys((vaddr_t)data), mlen, slot, end);
 3264       if (end)
 3265         goto done;
 3266       dma = cur;        /* update DMA pointer */
 3267       continue;
 3268     }
 3269 #endif /* !MIDWAY_ENIONLY */
 3270 
 3271 
 3272 #if !defined(MIDWAY_ADPONLY)
 3273 
 3274     /*
 3275      * the ENI DMA engine is not so smart and need more help from us
 3276      */
 3277 
 3278     /* do we need to do a DMA op to align? */
 3279     if (sc->alburst &&
 3280       (needalign = (((unsigned long) data) & sc->bestburstmask)) != 0) {
 3281       cnt = sc->bestburstlen - needalign;
 3282       if (cnt > tlen) {
 3283         cnt = tlen;
 3284         count = cnt / sizeof(u_int32_t);
 3285         bcode = MIDDMA_WORD;
 3286       } else {
 3287         count = cnt / sizeof(u_int32_t);
 3288         bcode = en_dmaplan[count].bcode;
 3289         count = cnt >> en_dmaplan[count].divshift;
 3290       }
 3291       need -= cnt;
 3292       EN_WRAPADD(start, stop, cur, cnt);
 3293 #ifdef EN_DEBUG
 3294       printf("%s: rx%d: vci%d: al_dma %d bytes (%d left)\n",
 3295                 sc->sc_dev.dv_xname, slot, vci, cnt, need);
 3296 #endif
 3297       tlen -= cnt;
 3298       end = (need == 0 && !fill) ? MID_DMA_END : 0;
 3299       EN_DRQADD(sc, count, vci, bcode, vtophys((vaddr_t)data), mlen, slot, end);
 3300       if (end)
 3301         goto done;
 3302       data = (u_int32_t *)((u_char *) data + cnt);
 3303     }
 3304 
 3305     /* do we need a max-sized burst? */
 3306     if (tlen >= sc->bestburstlen) {
 3307       count = tlen >> sc->bestburstshift;
 3308       cnt = count << sc->bestburstshift;
 3309       bcode = sc->bestburstcode;
 3310       need -= cnt;
 3311       EN_WRAPADD(start, stop, cur, cnt);
 3312 #ifdef EN_DEBUG
 3313       printf("%s: rx%d: vci%d: best_dma %d bytes (%d left)\n",
 3314                 sc->sc_dev.dv_xname, slot, vci, cnt, need);
 3315 #endif
 3316       tlen -= cnt;
 3317       end = (need == 0 && !fill) ? MID_DMA_END : 0;
 3318       EN_DRQADD(sc, count, vci, bcode, vtophys((vaddr_t)data), mlen, slot, end);
 3319       if (end)
 3320         goto done;
 3321       data = (u_int32_t *)((u_char *) data + cnt);
 3322     }
 3323 
 3324     /* do we need to do a cleanup burst? */
 3325     if (tlen) {
 3326       count = tlen / sizeof(u_int32_t);
 3327       bcode = en_dmaplan[count].bcode;
 3328       count = tlen >> en_dmaplan[count].divshift;
 3329       need -= tlen;
 3330       EN_WRAPADD(start, stop, cur, tlen);
 3331 #ifdef EN_DEBUG
 3332       printf("%s: rx%d: vci%d: cleanup_dma %d bytes (%d left)\n",
 3333                 sc->sc_dev.dv_xname, slot, vci, tlen, need);
 3334 #endif
 3335       end = (need == 0 && !fill) ? MID_DMA_END : 0;
 3336       EN_DRQADD(sc, count, vci, bcode, vtophys((vaddr_t)data), mlen, slot, end);
 3337       if (end)
 3338         goto done;
 3339     }
 3340 
 3341     dma = cur;          /* update DMA pointer */
 3342 
 3343 #endif /* !MIDWAY_ADPONLY */
 3344 
 3345   }
 3346 
 3347   /* skip the end */
 3348   if (fill || dma != cur) {
 3349 #ifdef EN_DEBUG
 3350       if (fill)
 3351         printf("%s: rx%d: vci%d: skipping %d bytes of fill\n",
 3352                 sc->sc_dev.dv_xname, slot, vci, fill);
 3353       else
 3354         printf("%s: rx%d: vci%d: syncing chip from 0x%x to 0x%x [cur]\n",
 3355                 sc->sc_dev.dv_xname, slot, vci, dma, cur);
 3356 #endif
 3357     EN_WRAPADD(start, stop, cur, fill);
 3358     EN_DRQADD(sc, WORD_IDX(start,cur), vci, MIDDMA_JK, 0, mlen,
 3359                                         slot, MID_DMA_END);
 3360     /* dma = cur; */    /* not necessary since we are done */
 3361   }
 3362 
 3363   /*
 3364    * done, remove stuff we don't want to pass up:
 3365    *   raw mode (boodi mode): pass everything up for later processing
 3366    *   aal5: remove RBD
 3367    *   aal0: remove RBD + cell header
 3368    */
 3369 
 3370 done:
 3371   if (m) {
 3372     if (!raw) {
 3373       cnt = MID_RBD_SIZE;
 3374       if (!aal5) cnt += MID_CHDR_SIZE;
 3375       m->m_len -= cnt;                          /* chop! */
 3376       m->m_pkthdr.len -= cnt;
 3377       m->m_data += cnt;
 3378     }
 3379     IF_ENQUEUE(&sc->rxslot[slot].indma, m);
 3380   }
 3381   sc->rxslot[slot].cur = cur;           /* update master copy of 'cur' */
 3382 
 3383 #ifdef EN_DEBUG
 3384   printf("%s: rx%d: vci%d: DONE!   cur now =0x%x\n",
 3385         sc->sc_dev.dv_xname, slot, vci, cur);
 3386 #endif
 3387 
 3388   goto same_vci;        /* get next packet in this slot */
 3389 }
 3390 
 3391 
 3392 #ifdef EN_DDBHOOK
 3393 /*
 3394  * functions we can call from ddb
 3395  */
 3396 
 3397 /*
 3398  * en_dump: dump the state
 3399  */
 3400 
 3401 #define END_SWSL        0x00000040              /* swsl state */
 3402 #define END_DRQ         0x00000020              /* drq state */
 3403 #define END_DTQ         0x00000010              /* dtq state */
 3404 #define END_RX          0x00000008              /* rx state */
 3405 #define END_TX          0x00000004              /* tx state */
 3406 #define END_MREGS       0x00000002              /* registers */
 3407 #define END_STATS       0x00000001              /* dump stats */
 3408 
 3409 #define END_BITS "\2\7SWSL\6DRQ\5DTQ\4RX\3TX\2MREGS\1STATS"
 3410 
 3411 int en_dump(unit, level)
 3412 
 3413 int unit, level;
 3414 
 3415 {
 3416   struct en_softc *sc;
 3417   int lcv, cnt, slot;
 3418   u_int32_t ptr, reg;
 3419 
 3420   for (lcv = 0 ; lcv < en_cd.cd_ndevs ; lcv++) {
 3421     char sbuf[256];
 3422 
 3423     sc = device_lookup(&en_cd, lcv);
 3424     if (sc == NULL) continue;
 3425     if (unit != -1 && unit != lcv)
 3426       continue;
 3427 
 3428     bitmask_snprintf(level, END_BITS, sbuf, sizeof(sbuf));
 3429     printf("dumping device %s at level 0x%s\n", sc->sc_dev.dv_xname, sbuf);
 3430 
 3431     if (sc->dtq_us == 0) {
 3432       printf("<hasn't been en_init'd yet>\n");
 3433       continue;
 3434     }
 3435 
 3436     if (level & END_STATS) {
 3437       printf("  en_stats:\n");
 3438       printf("    %d mfix (%d failed); %d/%d head/tail byte DMAs, %d flushes\n",
 3439            sc->mfix, sc->mfixfail, sc->headbyte, sc->tailbyte, sc->tailflush);
 3440       printf("    %d rx DMA overflow interrupts\n", sc->dmaovr);
 3441       printf("    %d times we ran out of TX space and stalled\n",
 3442                                                         sc->txoutspace);
 3443       printf("    %d times we ran out of DTQs\n", sc->txdtqout);
 3444       printf("    %d times we launched a packet\n", sc->launch);
 3445       printf("    %d times we launched without on-board header\n", sc->lheader);
 3446       printf("    %d times we launched without on-board tail\n", sc->ltail);
 3447       printf("    %d times we pulled the hw service list\n", sc->hwpull);
 3448       printf("    %d times we pushed a vci on the sw service list\n",
 3449                                                                 sc->swadd);
 3450       printf("    %d times RX pulled an mbuf from Q that wasn't ours\n",
 3451                                                          sc->rxqnotus);
 3452       printf("    %d times RX pulled a good mbuf from Q\n", sc->rxqus);
 3453       printf("    %d times we ran out of mbufs *and* DRQs\n", sc->rxoutboth);
 3454       printf("    %d times we ran out of DRQs\n", sc->rxdrqout);
 3455 
 3456       printf("    %d transmit packets dropped due to mbsize\n", sc->txmbovr);
 3457       printf("    %d cells trashed due to turned off rxvc\n", sc->vtrash);
 3458       printf("    %d cells trashed due to totally full buffer\n", sc->otrash);
 3459       printf("    %d cells trashed due almost full buffer\n", sc->ttrash);
 3460       printf("    %d rx mbuf allocation failures\n", sc->rxmbufout);
 3461 #ifdef NATM
 3462       printf("    %d drops at natmintrq\n", natmintrq.ifq_drops);
 3463 #ifdef NATM_STAT
 3464       printf("    natmintr so_rcv: ok/drop cnt: %d/%d, ok/drop bytes: %d/%d\n",
 3465         natm_sookcnt, natm_sodropcnt, natm_sookbytes, natm_sodropbytes);
 3466 #endif
 3467 #endif
 3468     }
 3469 
 3470     if (level & END_MREGS) {
 3471       char sbuf[256];
 3472 
 3473       printf("mregs:\n");
 3474       printf("resid = 0x%x\n", EN_READ(sc, MID_RESID));
 3475 
 3476       bitmask_snprintf(EN_READ(sc, MID_INTSTAT), MID_INTBITS, sbuf, sizeof(sbuf));
 3477       printf("interrupt status = 0x%s\n", sbuf);
 3478 
 3479       bitmask_snprintf(EN_READ(sc, MID_INTENA), MID_INTBITS, sbuf, sizeof(sbuf));
 3480       printf("interrupt enable = 0x%s\n", sbuf);
 3481 
 3482       bitmask_snprintf(EN_READ(sc, MID_MAST_CSR), MID_MCSRBITS, sbuf, sizeof(sbuf));
 3483       printf("mcsr = 0x%s\n", sbuf);
 3484 
 3485       printf("serv_write = [chip=%d] [us=%d]\n", EN_READ(sc, MID_SERV_WRITE),
 3486                         MID_SL_A2REG(sc->hwslistp));
 3487       printf("DMA addr = 0x%x\n", EN_READ(sc, MID_DMA_ADDR));
 3488       printf("DRQ: chip[rd=0x%x,wr=0x%x], sc[chip=0x%x,us=0x%x]\n",
 3489         MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX)),
 3490         MID_DRQ_REG2A(EN_READ(sc, MID_DMA_WRRX)), sc->drq_chip, sc->drq_us);
 3491       printf("DTQ: chip[rd=0x%x,wr=0x%x], sc[chip=0x%x,us=0x%x]\n",
 3492         MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX)),
 3493         MID_DTQ_REG2A(EN_READ(sc, MID_DMA_WRTX)), sc->dtq_chip, sc->dtq_us);
 3494 
 3495       printf("  unusal txspeeds: ");
 3496       for (cnt = 0 ; cnt < MID_N_VC ; cnt++)
 3497         if (sc->txspeed[cnt])
 3498           printf(" vci%d=0x%x", cnt, sc->txspeed[cnt]);
 3499       printf("\n");
 3500 
 3501       printf("  rxvc slot mappings: ");
 3502       for (cnt = 0 ; cnt < MID_N_VC ; cnt++)
 3503         if (sc->rxvc2slot[cnt] != RX_NONE)
 3504           printf("  %d->%d", cnt, sc->rxvc2slot[cnt]);
 3505       printf("\n");
 3506 
 3507     }
 3508 
 3509     if (level & END_TX) {
 3510       printf("tx:\n");
 3511       for (slot = 0 ; slot < EN_NTX; slot++) {
 3512         printf("tx%d: start/stop/cur=0x%x/0x%x/0x%x [%d]  ", slot,
 3513           sc->txslot[slot].start, sc->txslot[slot].stop, sc->txslot[slot].cur,
 3514                 (sc->txslot[slot].cur - sc->txslot[slot].start)/4);
 3515         printf("mbsize=%d, bfree=%d\n", sc->txslot[slot].mbsize,
 3516                 sc->txslot[slot].bfree);
 3517         printf("txhw: base_address=0x%lx, size=%d, read=%d, descstart=%d\n",
 3518           (u_long)MIDX_BASE(EN_READ(sc, MIDX_PLACE(slot))),
 3519           MIDX_SZ(EN_READ(sc, MIDX_PLACE(slot))),
 3520           EN_READ(sc, MIDX_READPTR(slot)), EN_READ(sc, MIDX_DESCSTART(slot)));
 3521       }
 3522     }
 3523 
 3524     if (level & END_RX) {
 3525       printf("  recv slots:\n");
 3526       for (slot = 0 ; slot < sc->en_nrx; slot++) {
 3527         printf("rx%d: vci=%d: start/stop/cur=0x%x/0x%x/0x%x ", slot,
 3528           sc->rxslot[slot].atm_vci, sc->rxslot[slot].start,
 3529           sc->rxslot[slot].stop, sc->rxslot[slot].cur);
 3530         printf("mode=0x%x, atm_flags=0x%x, oth_flags=0x%x\n",
 3531         sc->rxslot[slot].mode, sc->rxslot[slot].atm_flags,
 3532                 sc->rxslot[slot].oth_flags);
 3533         printf("RXHW: mode=0x%x, DST_RP=0x%x, WP_ST_CNT=0x%x\n",
 3534           EN_READ(sc, MID_VC(sc->rxslot[slot].atm_vci)),
 3535           EN_READ(sc, MID_DST_RP(sc->rxslot[slot].atm_vci)),
 3536           EN_READ(sc, MID_WP_ST_CNT(sc->rxslot[slot].atm_vci)));
 3537       }
 3538     }
 3539 
 3540     if (level & END_DTQ) {
 3541       printf("  dtq [need_dtqs=%d,dtq_free=%d]:\n",
 3542                                         sc->need_dtqs, sc->dtq_free);
 3543       ptr = sc->dtq_chip;
 3544       while (ptr != sc->dtq_us) {
 3545         reg = EN_READ(sc, ptr);
 3546         printf("\t0x%x=[cnt=%d, chan=%d, end=%d, type=%d @ 0x%x]\n",
 3547             sc->dtq[MID_DTQ_A2REG(ptr)], MID_DMA_CNT(reg), MID_DMA_TXCHAN(reg),
 3548             (reg & MID_DMA_END) != 0, MID_DMA_TYPE(reg), EN_READ(sc, ptr+4));
 3549         EN_WRAPADD(MID_DTQOFF, MID_DTQEND, ptr, 8);
 3550       }
 3551     }
 3552 
 3553     if (level & END_DRQ) {
 3554       printf("  drq [need_drqs=%d,drq_free=%d]:\n",
 3555                                         sc->need_drqs, sc->drq_free);
 3556       ptr = sc->drq_chip;
 3557       while (ptr != sc->drq_us) {
 3558         reg = EN_READ(sc, ptr);
 3559         printf("\t0x%x=[cnt=%d, chan=%d, end=%d, type=%d @ 0x%x]\n",
 3560           sc->drq[MID_DRQ_A2REG(ptr)], MID_DMA_CNT(reg), MID_DMA_RXVCI(reg),
 3561           (reg & MID_DMA_END) != 0, MID_DMA_TYPE(reg), EN_READ(sc, ptr+4));
 3562         EN_WRAPADD(MID_DRQOFF, MID_DRQEND, ptr, 8);
 3563       }
 3564     }
 3565 
 3566     if (level & END_SWSL) {
 3567       printf(" swslist [size=%d]: ", sc->swsl_size);
 3568       for (cnt = sc->swsl_head ; cnt != sc->swsl_tail ;
 3569                         cnt = (cnt + 1) % MID_SL_N)
 3570         printf("0x%x ", sc->swslist[cnt]);
 3571       printf("\n");
 3572     }
 3573   }
 3574   return(0);
 3575 }
 3576 
 3577 /*
 3578  * en_dumpmem: dump the memory
 3579  */
 3580 
 3581 int en_dumpmem(unit, addr, len)
 3582 
 3583 int unit, addr, len;
 3584 
 3585 {
 3586   struct en_softc *sc;
 3587   u_int32_t reg;
 3588 
 3589   sc = device_lookup(&en_cd, unit);
 3590   if (sc == NULL) {
 3591     printf("invalid unit number: %d\n", unit);
 3592     return(0);
 3593   }
 3594   addr = addr & ~3;
 3595   if (addr < MID_RAMOFF || addr + len*4 > MID_MAXOFF || len <= 0) {
 3596     printf("invalid addr/len number: %d, %d\n", addr, len);
 3597     return(0);
 3598   }
 3599   printf("dumping %d words starting at offset 0x%x\n", len, addr);
 3600   while (len--) {
 3601     reg = EN_READ(sc, addr);
 3602     printf("mem[0x%x] = 0x%x\n", addr, reg);
 3603     addr += 4;
 3604   }
 3605   return(0);
 3606 }
 3607 #endif
 3608 
 3609 #ifdef ATM_PVCEXT
 3610 /*
 3611  * ATM PVC extension: shaper control and pvc subinterfaces
 3612  */
 3613 
 3614 /*
 3615  * the list of the interfaces sharing the physical device.
 3616  * in order to avoid starvation, the interfaces are scheduled in
 3617  * a round-robin fashion when en_start is called from tx complete
 3618  * interrupts.
 3619  */
 3620 static void rrp_add(sc, ifp)
 3621         struct en_softc *sc;
 3622         struct ifnet *ifp;
 3623 {
 3624         struct rrp *head, *p, *new;
 3625 
 3626         head = sc->txrrp;
 3627         if ((p = head) != NULL) {
 3628                 while (1) {
 3629                         if (p->ifp == ifp) {
 3630                                 /* an entry for this ifp already exits */
 3631                                 p->nref++;
 3632                                 return;
 3633                         }
 3634                         if (p->next == head)
 3635                                 break;
 3636                         p = p->next;
 3637                 }
 3638         }
 3639 
 3640         /* create a new entry */
 3641         MALLOC(new, struct rrp *, sizeof(struct rrp), M_DEVBUF, M_WAITOK);
 3642         if (new == NULL) {
 3643                 printf("en_rrp_add: malloc failed!\n");
 3644                 return;
 3645         }
 3646 
 3647         new->ifp = ifp;
 3648         new->nref = 1;
 3649 
 3650         if (p == NULL) {
 3651                 /* this is the only one in the list */
 3652                 new->next = new;
 3653                 sc->txrrp = new;
 3654         }
 3655         else {
 3656                 /* add the new entry at the tail of the list */
 3657                 new->next = p->next;
 3658                 p->next = new;
 3659         }
 3660 }
 3661 
 3662 #if 0 /* not used */
 3663 static void rrp_delete(sc, ifp)
 3664         struct en_softc *sc;
 3665         struct ifnet *ifp;
 3666 {
 3667         struct rrp *head, *p, *prev;
 3668 
 3669         head = sc->txrrp;
 3670 
 3671         prev = head;
 3672         if (prev == NULL) {
 3673                 printf("rrp_delete: no list!\n");
 3674                 return;
 3675         }
 3676         p = prev->next;
 3677 
 3678         while (1) {
 3679                 if (p->ifp == ifp) {
 3680                         p->nref--;
 3681                         if (p->nref > 0)
 3682                                 return;
 3683                         /* remove this entry */
 3684                         if (p == prev) {
 3685                                 /* this is the only entry in the list */
 3686                                 sc->txrrp = NULL;
 3687                         }
 3688                         else {
 3689                                 prev->next = p->next;
 3690                                 if (head == p)
 3691                                         sc->txrrp = p->next;
 3692                         }
 3693                         FREE(p, M_DEVBUF);
 3694                 }
 3695                 prev = p;
 3696                 p = prev->next;
 3697                 if (prev == head) {
 3698                         printf("rrp_delete: no matching entry!\n");
 3699                         return;
 3700                 }
 3701         }
 3702 }
 3703 #endif
 3704 
 3705 static struct ifnet *
 3706 en_vci2ifp(sc, vci)
 3707         struct en_softc *sc;
 3708         int vci;
 3709 {
 3710         struct pvcsif *pvcsif;
 3711 
 3712         LIST_FOREACH(pvcsif, &sc->sif_list, sif_links) {
 3713                 if (vci == pvcsif->sif_vci)
 3714                         return (&pvcsif->sif_if);
 3715         }
 3716         return (&sc->enif);
 3717 }
 3718 
 3719 /*
 3720  * create and attach per pvc subinterface
 3721  * (currently detach is not supported)
 3722  */
 3723 static struct ifnet *
 3724 en_pvcattach(ifp)
 3725         struct ifnet *ifp;
 3726 {
 3727         struct en_softc *sc = (struct en_softc *) ifp->if_softc;
 3728         struct ifnet *pvc_ifp;
 3729         int s;
 3730 
 3731         if ((pvc_ifp = pvcsif_alloc()) == NULL)
 3732                 return (NULL);
 3733 
 3734         pvc_ifp->if_softc = sc;
 3735         pvc_ifp->if_ioctl = en_ioctl;
 3736         pvc_ifp->if_start = en_start;
 3737         pvc_ifp->if_flags = (IFF_POINTOPOINT|IFF_MULTICAST) |
 3738                 (ifp->if_flags & (IFF_RUNNING|IFF_SIMPLEX|IFF_NOTRAILERS));
 3739 
 3740         s = splnet();
 3741         LIST_INSERT_HEAD(&sc->sif_list, (struct pvcsif *)pvc_ifp, sif_links);
 3742         if_attach(pvc_ifp);
 3743         atm_ifattach(pvc_ifp);
 3744 
 3745 #ifdef ATM_PVCEXT
 3746         rrp_add(sc, pvc_ifp);
 3747 #endif
 3748         splx(s);
 3749 
 3750         return (pvc_ifp);
 3751 }
 3752 
 3753 
 3754 /* txspeed conversion derived from linux drivers/atm/eni.c
 3755    by Werner Almesberger, EPFL LRC */
 3756 static const int pre_div[] = { 4,16,128,2048 };
 3757 
 3758 static int en_pcr2txspeed(pcr)
 3759         int pcr;
 3760 {
 3761         int pre, res, div;
 3762 
 3763         if (pcr == 0 || pcr > 347222)
 3764                 pre = res = 0;  /* max rate */
 3765         else {
 3766                 for (pre = 0; pre < 3; pre++)
 3767                         if (25000000/pre_div[pre]/64 <= pcr)
 3768                                 break;
 3769                 div = pre_div[pre]*(pcr);
 3770 #if 1
 3771                 /*
 3772                  * the shaper value should be rounded down,
 3773                  * instead of rounded up.
 3774                  * (which means "res" should be rounded up.)
 3775                  */
 3776                 res = (25000000 + div -1)/div - 1;
 3777 #else
 3778                 res = 25000000/div-1;
 3779 #endif
 3780                 if (res < 0)
 3781                         res = 0;
 3782                 if (res > 63)
 3783                         res = 63;
 3784         }
 3785         return ((pre << 6) + res);
 3786 }
 3787 
 3788 static int en_txspeed2pcr(txspeed)
 3789         int txspeed;
 3790 {
 3791         int pre, res, pcr;
 3792 
 3793         pre = (txspeed >> 6) & 0x3;
 3794         res = txspeed & 0x3f;
 3795         pcr = 25000000 / pre_div[pre] / (res+1);
 3796         return (pcr);
 3797 }
 3798 
 3799 /*
 3800  * en_txctl selects a hardware transmit channel and sets the shaper value.
 3801  * en_txctl should be called after enabling the vc by en_rxctl
 3802  * since it assumes a transmit channel is already assigned by en_rxctl
 3803  * to the vc.
 3804  */
 3805 static int en_txctl(sc, vci, joint_vci, pcr)
 3806         struct en_softc *sc;
 3807         int vci;
 3808         int joint_vci;
 3809         int pcr;
 3810 {
 3811         int txspeed, txchan, s;
 3812 
 3813         if (pcr)
 3814                 txspeed = en_pcr2txspeed(pcr);
 3815         else
 3816                 txspeed = 0;
 3817 
 3818         s = splnet();
 3819         txchan = sc->txvc2slot[vci];
 3820         sc->txslot[txchan].nref--;
 3821 
 3822         /* select a slot */
 3823         if (joint_vci != 0)
 3824                 /* use the same channel */
 3825                 txchan = sc->txvc2slot[joint_vci];
 3826         else if (pcr == 0)
 3827                 txchan = 0;
 3828         else {
 3829                 for (txchan = 1; txchan < EN_NTX; txchan++) {
 3830                         if (sc->txslot[txchan].nref == 0)
 3831                                 break;
 3832                 }
 3833         }
 3834         if (txchan == EN_NTX) {
 3835 #if 1
 3836                 /* no free slot! */
 3837                 splx(s);
 3838                 return (ENOSPC);
 3839 #else
 3840                 /*
 3841                  * to allow multiple vc's to share a slot,
 3842                  * use a slot with the smallest reference count
 3843                  */
 3844                 int slot = 1;
 3845                 txchan = 1;
 3846                 for (slot = 2; slot < EN_NTX; slot++)
 3847                         if (sc->txslot[slot].nref < sc->txslot[txchan].nref)
 3848                                 txchan = slot;
 3849 #endif
 3850         }
 3851 
 3852         sc->txvc2slot[vci] = txchan;
 3853         sc->txslot[txchan].nref++;
 3854 
 3855         /* set the shaper parameter */
 3856         sc->txspeed[vci] = (u_int8_t)txspeed;
 3857 
 3858         splx(s);
 3859 #ifdef EN_DEBUG
 3860         printf("VCI:%d PCR set to %d, tx channel %d\n", vci, pcr, txchan);
 3861         if (joint_vci != 0)
 3862                 printf("  slot shared with VCI:%d\n", joint_vci);
 3863 #endif
 3864         return (0);
 3865 }
 3866 
 3867 static int en_pvctx(sc, pvcreq)
 3868         struct en_softc *sc;
 3869         struct pvctxreq *pvcreq;
 3870 {
 3871         struct ifnet *ifp;
 3872         struct atm_pseudoioctl api;
 3873         struct atm_pseudohdr *pvc_aph, *pvc_joint;
 3874         int vci, joint_vci, pcr;
 3875         int error = 0;
 3876 
 3877         /* check vpi:vci values */
 3878         pvc_aph = &pvcreq->pvc_aph;
 3879         pvc_joint = &pvcreq->pvc_joint;
 3880 
 3881         vci = ATM_PH_VCI(pvc_aph);
 3882         joint_vci = ATM_PH_VCI(pvc_joint);
 3883         pcr = pvcreq->pvc_pcr;
 3884 
 3885         if (ATM_PH_VPI(pvc_aph) != 0 || vci >= MID_N_VC ||
 3886             ATM_PH_VPI(pvc_joint) != 0 || joint_vci >= MID_N_VC)
 3887                 return (EADDRNOTAVAIL);
 3888 
 3889         if ((ifp = ifunit(pvcreq->pvc_ifname)) == NULL)
 3890                 return (ENXIO);
 3891 
 3892         if (pcr < 0) {
 3893                 /* negative pcr means disable the vc. */
 3894                 if (sc->rxvc2slot[vci] == RX_NONE)
 3895                         /* already disabled */
 3896                         return 0;
 3897 
 3898                 ATM_PH_FLAGS(&api.aph) = 0;
 3899                 ATM_PH_VPI(&api.aph) = 0;
 3900                 ATM_PH_SETVCI(&api.aph, vci);
 3901                 api.rxhand = NULL;
 3902 
 3903                 error = en_rxctl(sc, &api, 0);
 3904 
 3905                 if (error == 0 && &sc->enif != ifp) {
 3906                         /* clear vc info of this subinterface */
 3907                         struct pvcsif *pvcsif = (struct pvcsif *)ifp;
 3908 
 3909                         ATM_PH_SETVCI(&api.aph, 0);
 3910                         pvcsif->sif_aph = api.aph;
 3911                         pvcsif->sif_vci = 0;
 3912                 }
 3913                 return (error);
 3914         }
 3915 
 3916         if (&sc->enif == ifp) {
 3917                 /* called for an en interface */
 3918                 if (sc->rxvc2slot[vci] == RX_NONE) {
 3919                         /* vc is not active */
 3920 #ifdef __NetBSD__
 3921                         printf("%s: en_pvctx: rx not active! vci=%d\n",
 3922                                ifp->if_xname, vci);
 3923 #else
 3924                         printf("%s%d: en_pvctx: rx not active! vci=%d\n",
 3925                                ifp->if_name, ifp->if_unit, vci);
 3926 #endif
 3927                         return (EINVAL);
 3928                 }
 3929         }
 3930         else {
 3931                 /* called for a pvc subinterface */
 3932                 struct pvcsif *pvcsif = (struct pvcsif *)ifp;
 3933 
 3934 #ifdef __NetBSD__
 3935                 strlcpy(pvcreq->pvc_ifname, sc->enif.if_xname,
 3936                     sizeof(pvcreq->pvc_ifname));
 3937 #else
 3938                 snprintf(pvcreq->pvc_ifname, sizeof(pvcreq->pvc_ifname), "%s%d",
 3939                     sc->enif.if_name, sc->enif.if_unit);
 3940 #endif
 3941                 ATM_PH_FLAGS(&api.aph) =
 3942                         (ATM_PH_FLAGS(pvc_aph) & (ATM_PH_AAL5|ATM_PH_LLCSNAP));
 3943                 ATM_PH_VPI(&api.aph) = 0;
 3944                 ATM_PH_SETVCI(&api.aph, vci);
 3945                 api.rxhand = NULL;
 3946                 pvcsif->sif_aph = api.aph;
 3947                 pvcsif->sif_vci = ATM_PH_VCI(&api.aph);
 3948 
 3949                 if (sc->rxvc2slot[vci] == RX_NONE) {
 3950                         /* vc is not active, enable rx */
 3951                         error = en_rxctl(sc, &api, 1);
 3952                         if (error)
 3953                                 return error;
 3954                 }
 3955                 else {
 3956                         /* vc is already active, update aph in softc */
 3957                         sc->rxslot[sc->rxvc2slot[vci]].atm_flags =
 3958                                 ATM_PH_FLAGS(&api.aph);
 3959                 }
 3960         }
 3961 
 3962         error = en_txctl(sc, vci, joint_vci, pcr);
 3963 
 3964         if (error == 0) {
 3965                 if (sc->txspeed[vci] != 0)
 3966                         pvcreq->pvc_pcr = en_txspeed2pcr(sc->txspeed[vci]);
 3967                 else
 3968                         pvcreq->pvc_pcr = 0;
 3969         }
 3970 
 3971         return error;
 3972 }
 3973 
 3974 static int en_pvctxget(sc, pvcreq)
 3975         struct en_softc *sc;
 3976         struct pvctxreq *pvcreq;
 3977 {
 3978         struct pvcsif *pvcsif;
 3979         struct ifnet *ifp;
 3980         int vci, slot;
 3981 
 3982         if ((ifp = ifunit(pvcreq->pvc_ifname)) == NULL)
 3983                 return (ENXIO);
 3984 
 3985         if (ifp == &sc->enif) {
 3986                 /* physical interface: assume vci is specified */
 3987                 struct atm_pseudohdr *pvc_aph;
 3988 
 3989                 pvc_aph = &pvcreq->pvc_aph;
 3990                 vci = ATM_PH_VCI(pvc_aph);
 3991                 if ((slot = sc->rxvc2slot[vci]) == RX_NONE)
 3992                         ATM_PH_FLAGS(pvc_aph) = 0;
 3993                 else
 3994                         ATM_PH_FLAGS(pvc_aph) = sc->rxslot[slot].atm_flags;
 3995                 ATM_PH_VPI(pvc_aph) = 0;
 3996         }
 3997         else {
 3998                 /* pvc subinterface */
 3999 #ifdef __NetBSD__
 4000                 strlcpy(pvcreq->pvc_ifname, sc->enif.if_xname,
 4001                     sizeof(pvcreq->pvc_ifname));
 4002 #else
 4003                 snprintf(pvcreq->pvc_ifname, sizeof(pvcreq->pvc_ifname), "%s%d",
 4004                     sc->enif.if_name, sc->enif.if_unit);
 4005 #endif
 4006 
 4007                 pvcsif = (struct pvcsif *)ifp;
 4008                 pvcreq->pvc_aph = pvcsif->sif_aph;
 4009                 vci = pvcsif->sif_vci;
 4010         }
 4011 
 4012         if ((slot = sc->rxvc2slot[vci]) == RX_NONE) {
 4013                 /* vc is not active */
 4014                 ATM_PH_FLAGS(&pvcreq->pvc_aph) = 0;
 4015                 pvcreq->pvc_pcr = -1;
 4016         }
 4017         else if (sc->txspeed[vci])
 4018                 pvcreq->pvc_pcr = en_txspeed2pcr(sc->txspeed[vci]);
 4019         else
 4020                 pvcreq->pvc_pcr = 0;
 4021 
 4022         return (0);
 4023 }
 4024 
 4025 #endif /* ATM_PVCEXT */
 4026 
 4027 #endif /* NEN > 0 || !defined(__FreeBSD__) */

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