The Design and Implementation of the FreeBSD Operating System, Second Edition
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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/midway.c

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    1 /*      $NetBSD: midway.c,v 1.73 2006/07/21 16:48:49 ad Exp $   */
    2 /*      (sync'd to midway.c 1.68)       */
    3 
    4 /*
    5  *
    6  * Copyright (c) 1996 Charles D. Cranor and Washington University.
    7  * All rights reserved.
    8  *
    9  * Redistribution and use in source and binary forms, with or without
   10  * modification, are permitted provided that the following conditions
   11  * are met:
   12  * 1. Redistributions of source code must retain the above copyright
   13  *    notice, this list of conditions and the following disclaimer.
   14  * 2. Redistributions in binary form must reproduce the above copyright
   15  *    notice, this list of conditions and the following disclaimer in the
   16  *    documentation and/or other materials provided with the distribution.
   17  * 3. All advertising materials mentioning features or use of this software
   18  *    must display the following acknowledgement:
   19  *      This product includes software developed by Charles D. Cranor and
   20  *      Washington University.
   21  * 4. The name of the author may not be used to endorse or promote products
   22  *    derived from this software without specific prior written permission.
   23  *
   24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
   25  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
   26  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
   27  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
   28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
   29  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
   31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
   32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
   33  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   34  */
   35 
   36 /*
   37  *
   38  * m i d w a y . c   e n i 1 5 5   d r i v e r
   39  *
   40  * author: Chuck Cranor <chuck@ccrc.wustl.edu>
   41  * started: spring, 1996 (written from scratch).
   42  *
   43  * notes from the author:
   44  *   Extra special thanks go to Werner Almesberger, EPFL LRC.   Werner's
   45  *   ENI driver was especially useful in figuring out how this card works.
   46  *   I would also like to thank Werner for promptly answering email and being
   47  *   generally helpful.
   48  */
   49 /*
   50  *  1997/12/02, major update on 1999/04/06 kjc
   51  *    new features added:
   52  *      - BPF support (link type is DLT_ATM_RFC1483)
   53  *        BPF understands only LLC/SNAP!! (because bpf can't
   54  *        handle variable link header length.)
   55  *        (bpfwrite should work if atm_pseudohdr and LLC/SNAP are prepended.)
   56  *      - support vc shaping
   57  *      - integrate IPv6 support.
   58  *      - support pvc sub interface
   59  *
   60  *        initial work on per-pvc-interface for ipv6 was done
   61  *        by Katsushi Kobayashi <ikob@cc.uec.ac.jp> of the WIDE Project.
   62  *        some of the extensions for pvc subinterfaces are merged from
   63  *        the CAIRN project written by Suresh Bhogavilli (suresh@isi.edu).
   64  *
   65  *    code cleanup:
   66  *      - remove WMAYBE related code.  ENI WMAYBE DMA doesn't work.
   67  *      - remove updating if_lastchange for every packet.
   68  */
   69 
   70 #include <sys/cdefs.h>
   71 __KERNEL_RCSID(0, "$NetBSD: midway.c,v 1.73 2006/07/21 16:48:49 ad Exp $");
   72 
   73 #include "opt_natm.h"
   74 
   75 #undef  EN_DEBUG
   76 #undef  EN_DEBUG_RANGE          /* check ranges on en_read/en_write's? */
   77 #define EN_MBUF_OPT             /* try and put more stuff in mbuf? */
   78 #define EN_DIAG
   79 #define EN_STAT
   80 #ifndef EN_DMA
   81 #define EN_DMA          1       /* use DMA? */
   82 #endif
   83 #define EN_NOTXDMA      0       /* hook to disable tx DMA only */
   84 #define EN_NORXDMA      0       /* hook to disable rx DMA only */
   85 #define EN_NOWMAYBE     1       /* hook to disable word maybe DMA */
   86                                 /* XXX: WMAYBE doesn't work, needs debugging */
   87 #define EN_DDBHOOK      1       /* compile in ddb functions */
   88 #if defined(MIDWAY_ADPONLY)
   89 #define EN_ENIDMAFIX    0       /* no ENI cards to worry about */
   90 #else
   91 #define EN_ENIDMAFIX    1       /* avoid byte DMA on the ENI card (see below) */
   92 #endif
   93 
   94 /*
   95  * note on EN_ENIDMAFIX: the byte aligner on the ENI version of the card
   96  * appears to be broken.   it works just fine if there is no load... however
   97  * when the card is loaded the data get corrupted.   to see this, one only
   98  * has to use "telnet" over ATM.   do the following command in "telnet":
   99  *      cat /usr/share/misc/termcap
  100  * "telnet" seems to generate lots of 1023 byte mbufs (which make great
  101  * use of the byte aligner).   watch "netstat -s" for checksum errors.
  102  *
  103  * I further tested this by adding a function that compared the transmit
  104  * data on the card's SRAM with the data in the mbuf chain _after_ the
  105  * "transmit DMA complete" interrupt.   using the "telnet" test I got data
  106  * mismatches where the byte-aligned data should have been.   using ddb
  107  * and en_dumpmem() I verified that the DTQs fed into the card were
  108  * absolutely correct.   thus, we are forced to concluded that the ENI
  109  * hardware is buggy.   note that the Adaptec version of the card works
  110  * just fine with byte DMA.
  111  *
  112  * bottom line: we set EN_ENIDMAFIX to 1 to avoid byte DMAs on the ENI
  113  * card.
  114  */
  115 
  116 #if defined(DIAGNOSTIC) && !defined(EN_DIAG)
  117 #define EN_DIAG                 /* link in with master DIAG option */
  118 #endif
  119 #ifdef EN_STAT
  120 #define EN_COUNT(X) (X)++
  121 #else
  122 #define EN_COUNT(X) /* nothing */
  123 #endif
  124 
  125 #ifdef EN_DEBUG
  126 #undef  EN_DDBHOOK
  127 #define EN_DDBHOOK      1
  128 #define STATIC /* nothing */
  129 #define INLINE /* nothing */
  130 #else /* EN_DEBUG */
  131 #define STATIC static
  132 #define INLINE inline
  133 #endif /* EN_DEBUG */
  134 
  135 #ifdef __FreeBSD__
  136 #include "en.h"
  137 #endif
  138 
  139 #ifdef __NetBSD__
  140 #include "opt_ddb.h"
  141 #include "opt_inet.h"
  142 #else
  143 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
  144 #endif
  145 
  146 #if NEN > 0 || !defined(__FreeBSD__)
  147 
  148 #include <sys/param.h>
  149 #include <sys/systm.h>
  150 #if defined(__NetBSD__) || defined(__OpenBSD__) || defined(__bsdi__)
  151 #include <sys/device.h>
  152 #endif
  153 #if defined(__FreeBSD__)
  154 #include <sys/sockio.h>
  155 #else
  156 #include <sys/ioctl.h>
  157 #endif
  158 #include <sys/mbuf.h>
  159 #include <sys/socket.h>
  160 #include <sys/socketvar.h>
  161 #include <sys/queue.h>
  162 #include <sys/proc.h>
  163 #include <sys/kauth.h>
  164 
  165 #include <net/if.h>
  166 #include <net/if_ether.h>
  167 #include <net/if_atm.h>
  168 
  169 #ifdef __NetBSD__
  170 #include <uvm/uvm_extern.h>
  171 #else
  172 #include <vm/vm.h>
  173 #endif
  174 
  175 #if defined(INET) || defined(INET6)
  176 #include <netinet/in.h>
  177 #include <netinet/if_atm.h>
  178 #ifdef INET6
  179 #include <netinet6/in6_var.h>
  180 #endif
  181 #endif
  182 
  183 #ifdef NATM
  184 #if !(defined(INET) || defined(INET6))
  185 #include <netinet/in.h>
  186 #endif
  187 #include <netnatm/natm.h>
  188 #endif
  189 
  190 
  191 #if !defined(__FreeBSD__)
  192 #include <machine/bus.h>
  193 
  194 #endif
  195 
  196 #if defined(__NetBSD__) || defined(__OpenBSD__)
  197 #include <dev/ic/midwayreg.h>
  198 #include <dev/ic/midwayvar.h>
  199 #if defined(__alpha__)
  200 /* XXX XXX NEED REAL DMA MAPPING SUPPORT XXX XXX */
  201 #undef vtophys
  202 #define vtophys(va)     alpha_XXX_dmamap((vaddr_t)(va))
  203 #endif
  204 #elif defined(__FreeBSD__)
  205 #include <machine/cpufunc.h>            /* for rdtsc proto for clock.h below */
  206 #include <machine/clock.h>              /* for DELAY */
  207 #include <dev/en/midwayreg.h>
  208 #include <dev/en/midwayvar.h>
  209 #include <vm/pmap.h>                    /* for vtophys proto */
  210 
  211 /*
  212  * 2.1.x does not have if_softc.   detect this by seeing if IFF_NOTRAILERS
  213  * is defined, as per kjc.
  214  */
  215 #ifdef IFF_NOTRAILERS
  216 #define MISSING_IF_SOFTC
  217 #else
  218 #define IFF_NOTRAILERS 0
  219 #endif
  220 
  221 #endif  /* __FreeBSD__ */
  222 
  223 #ifdef ATM_PVCEXT
  224 # ifndef NATM
  225    /* this is for for __KAME__ */
  226 #  include <netinet/in.h>
  227 # endif
  228 # if defined (__KAME__) && defined(INET6)
  229 #  include <netinet6/in6_ifattach.h>
  230 # endif
  231 #endif /*ATM_PVCEXT*/
  232 
  233 #include "bpfilter.h"
  234 #if NBPFILTER > 0
  235 #include <net/bpf.h>
  236 #ifdef __FreeBSD__
  237 #define BPFATTACH(ifp, dlt, hlen)       bpfattach((ifp), (dlt), (hlen))
  238 #define BPF_MTAP(ifp, m)                bpf_mtap((ifp), (m))
  239 #else
  240 #define BPFATTACH(ifp, dlt, hlen)       bpfattach(&(ifp)->if_bpf, (ifp), (dlt), (hlen))
  241 #define BPF_MTAP(ifp, m)                bpf_mtap((ifp)->if_bpf, (m))
  242 #endif
  243 #endif /* NBPFILTER > 0 */
  244 
  245 /*
  246  * params
  247  */
  248 
  249 #ifndef EN_TXHIWAT
  250 #define EN_TXHIWAT      (64*1024)       /* max 64 KB waiting to be DMAd out */
  251 #endif
  252 
  253 #ifndef EN_MINDMA
  254 #define EN_MINDMA       32      /* don't DMA anything less than this (bytes) */
  255 #endif
  256 
  257 #define RX_NONE         0xffff  /* recv VC not in use */
  258 
  259 #define EN_OBHDR        ATM_PH_DRIVER7  /* TBD in first mbuf ! */
  260 #define EN_OBTRL        ATM_PH_DRIVER8  /* PDU trailer in last mbuf ! */
  261 
  262 #define ENOTHER_FREE    0x01            /* free rxslot */
  263 #define ENOTHER_DRAIN   0x02            /* almost free (drain DRQ DMA) */
  264 #define ENOTHER_RAW     0x04            /* 'raw' access  (aka boodi mode) */
  265 #define ENOTHER_SWSL    0x08            /* in software service list */
  266 
  267 int en_dma = EN_DMA;                    /* use DMA (switch off for dbg) */
  268 
  269 /*
  270  * autoconfig attachments
  271  */
  272 
  273 extern struct cfdriver en_cd;
  274 
  275 /*
  276  * local structures
  277  */
  278 
  279 /*
  280  * params to en_txlaunch() function
  281  */
  282 
  283 struct en_launch {
  284   u_int32_t tbd1;               /* TBD 1 */
  285   u_int32_t tbd2;               /* TBD 2 */
  286   u_int32_t pdu1;               /* PDU 1 (aal5) */
  287   int nodma;                    /* don't use DMA */
  288   int need;                     /* total space we need (pad out if less data) */
  289   int mlen;                     /* length of mbuf (for dtq) */
  290   struct mbuf *t;               /* data */
  291   u_int32_t aal;                /* aal code */
  292   u_int32_t atm_vci;            /* vci */
  293   u_int8_t atm_flags;           /* flags */
  294 };
  295 
  296 
  297 /*
  298  * DMA table (index by # of words)
  299  *
  300  * plan A: use WMAYBE
  301  * plan B: avoid WMAYBE
  302  */
  303 
  304 struct en_dmatab {
  305   u_int8_t bcode;               /* code */
  306   u_int8_t divshift;            /* byte divisor */
  307 };
  308 
  309 static struct en_dmatab en_dma_planA[] = {
  310   { 0, 0 },             /* 0 */         { MIDDMA_WORD, 2 },     /* 1 */
  311   { MIDDMA_2WORD, 3},   /* 2 */         { MIDDMA_4WMAYBE, 2},   /* 3 */
  312   { MIDDMA_4WORD, 4},   /* 4 */         { MIDDMA_8WMAYBE, 2},   /* 5 */
  313   { MIDDMA_8WMAYBE, 2}, /* 6 */         { MIDDMA_8WMAYBE, 2},   /* 7 */
  314   { MIDDMA_8WORD, 5},   /* 8 */         { MIDDMA_16WMAYBE, 2},  /* 9 */
  315   { MIDDMA_16WMAYBE,2}, /* 10 */        { MIDDMA_16WMAYBE, 2},  /* 11 */
  316   { MIDDMA_16WMAYBE,2}, /* 12 */        { MIDDMA_16WMAYBE, 2},  /* 13 */
  317   { MIDDMA_16WMAYBE,2}, /* 14 */        { MIDDMA_16WMAYBE, 2},  /* 15 */
  318   { MIDDMA_16WORD, 6},  /* 16 */
  319 };
  320 
  321 static struct en_dmatab en_dma_planB[] = {
  322   { 0, 0 },             /* 0 */         { MIDDMA_WORD, 2},      /* 1 */
  323   { MIDDMA_2WORD, 3},   /* 2 */         { MIDDMA_WORD, 2},      /* 3 */
  324   { MIDDMA_4WORD, 4},   /* 4 */         { MIDDMA_WORD, 2},      /* 5 */
  325   { MIDDMA_2WORD, 3},   /* 6 */         { MIDDMA_WORD, 2},      /* 7 */
  326   { MIDDMA_8WORD, 5},   /* 8 */         { MIDDMA_WORD, 2},      /* 9 */
  327   { MIDDMA_2WORD, 3},   /* 10 */        { MIDDMA_WORD, 2},      /* 11 */
  328   { MIDDMA_4WORD, 4},   /* 12 */        { MIDDMA_WORD, 2},      /* 13 */
  329   { MIDDMA_2WORD, 3},   /* 14 */        { MIDDMA_WORD, 2},      /* 15 */
  330   { MIDDMA_16WORD, 6},  /* 16 */
  331 };
  332 
  333 static struct en_dmatab *en_dmaplan = en_dma_planA;
  334 
  335 /*
  336  * prototypes
  337  */
  338 
  339 STATIC INLINE   int en_b2sz(int) __attribute__ ((unused));
  340 #ifdef EN_DDBHOOK
  341                 int en_dump(int,int);
  342                 int en_dumpmem(int,int,int);
  343 #endif
  344 STATIC          void en_dmaprobe(struct en_softc *);
  345 STATIC          int en_dmaprobe_doit(struct en_softc *, u_int8_t *,
  346                     u_int8_t *, int);
  347 STATIC INLINE   int en_dqneed(struct en_softc *, caddr_t, u_int,
  348                     u_int) __attribute__ ((unused));
  349 STATIC          void en_init(struct en_softc *);
  350 STATIC          int en_ioctl(struct ifnet *, EN_IOCTL_CMDT, caddr_t);
  351 STATIC INLINE   int en_k2sz(int) __attribute__ ((unused));
  352 STATIC          void en_loadvc(struct en_softc *, int);
  353 STATIC          int en_mfix(struct en_softc *, struct mbuf **,
  354                     struct mbuf *);
  355 STATIC INLINE   struct mbuf *en_mget(struct en_softc *, u_int,
  356                     u_int *) __attribute__ ((unused));
  357 STATIC INLINE   u_int32_t en_read(struct en_softc *,
  358                     u_int32_t) __attribute__ ((unused));
  359 STATIC          int en_rxctl(struct en_softc *, struct atm_pseudoioctl *, int);
  360 STATIC          void en_txdma(struct en_softc *, int);
  361 STATIC          void en_txlaunch(struct en_softc *, int, struct en_launch *);
  362 STATIC          void en_service(struct en_softc *);
  363 STATIC          void en_start(struct ifnet *);
  364 STATIC INLINE   int en_sz2b(int) __attribute__ ((unused));
  365 STATIC INLINE   void en_write(struct en_softc *, u_int32_t,
  366                     u_int32_t) __attribute__ ((unused));
  367 
  368 #ifdef ATM_PVCEXT
  369 static void rrp_add(struct en_softc *, struct ifnet *);
  370 static struct ifnet *en_pvcattach(struct ifnet *);
  371 static int en_txctl(struct en_softc *, int, int, int);
  372 static int en_pvctx(struct en_softc *, struct pvctxreq *);
  373 static int en_pvctxget(struct en_softc *, struct pvctxreq *);
  374 static int en_pcr2txspeed(int);
  375 static int en_txspeed2pcr(int);
  376 static struct ifnet *en_vci2ifp(struct en_softc *, int);
  377 #endif
  378 
  379 /*
  380  * macros/inline
  381  */
  382 
  383 /*
  384  * raw read/write macros
  385  */
  386 
  387 #define EN_READDAT(SC,R) en_read(SC,R)
  388 #define EN_WRITEDAT(SC,R,V) en_write(SC,R,V)
  389 
  390 /*
  391  * cooked read/write macros
  392  */
  393 
  394 #define EN_READ(SC,R) ntohl(en_read(SC,R))
  395 #define EN_WRITE(SC,R,V) en_write(SC,R, htonl(V))
  396 
  397 #define EN_WRAPADD(START,STOP,CUR,VAL) { \
  398         (CUR) = (CUR) + (VAL); \
  399         if ((CUR) >= (STOP)) \
  400                 (CUR) = (START) + ((CUR) - (STOP)); \
  401         }
  402 
  403 #define WORD_IDX(START, X) (((X) - (START)) / sizeof(u_int32_t))
  404 
  405 /* we store sc->dtq and sc->drq data in the following format... */
  406 #define EN_DQ_MK(SLOT,LEN) (((SLOT) << 20)|(LEN)|(0x80000))
  407                                         /* the 0x80000 ensures we != 0 */
  408 #define EN_DQ_SLOT(X) ((X) >> 20)
  409 #define EN_DQ_LEN(X) ((X) & 0x3ffff)
  410 
  411 /* format of DTQ/DRQ word 1 differs between ENI and ADP */
  412 #if defined(MIDWAY_ENIONLY)
  413 
  414 #define MID_MK_TXQ(SC,CNT,CHAN,END,BCODE) \
  415         EN_WRITE((SC), (SC)->dtq_us, \
  416                 MID_MK_TXQ_ENI((CNT), (CHAN), (END), (BCODE)));
  417 
  418 #define MID_MK_RXQ(SC,CNT,VCI,END,BCODE) \
  419         EN_WRITE((SC), (SC)->drq_us, \
  420                 MID_MK_RXQ_ENI((CNT), (VCI), (END), (BCODE)));
  421 
  422 #elif defined(MIDWAY_ADPONLY)
  423 
  424 #define MID_MK_TXQ(SC,CNT,CHAN,END,JK) \
  425         EN_WRITE((SC), (SC)->dtq_us, \
  426                 MID_MK_TXQ_ADP((CNT), (CHAN), (END), (JK)));
  427 
  428 #define MID_MK_RXQ(SC,CNT,VCI,END,JK) \
  429         EN_WRITE((SC), (SC)->drq_us, \
  430                 MID_MK_RXQ_ADP((CNT), (VCI), (END), (JK)));
  431 
  432 #else
  433 
  434 #define MID_MK_TXQ(SC,CNT,CHAN,END,JK_OR_BCODE) { \
  435         if ((SC)->is_adaptec) \
  436           EN_WRITE((SC), (SC)->dtq_us, \
  437                   MID_MK_TXQ_ADP((CNT), (CHAN), (END), (JK_OR_BCODE))); \
  438         else \
  439           EN_WRITE((SC), (SC)->dtq_us, \
  440                   MID_MK_TXQ_ENI((CNT), (CHAN), (END), (JK_OR_BCODE))); \
  441         }
  442 
  443 #define MID_MK_RXQ(SC,CNT,VCI,END,JK_OR_BCODE) { \
  444         if ((SC)->is_adaptec) \
  445           EN_WRITE((SC), (SC)->drq_us, \
  446                   MID_MK_RXQ_ADP((CNT), (VCI), (END), (JK_OR_BCODE))); \
  447         else \
  448           EN_WRITE((SC), (SC)->drq_us, \
  449                    MID_MK_RXQ_ENI((CNT), (VCI), (END), (JK_OR_BCODE))); \
  450         }
  451 
  452 #endif
  453 
  454 /* add an item to the DTQ */
  455 #define EN_DTQADD(SC,CNT,CHAN,JK_OR_BCODE,ADDR,LEN,END) { \
  456         if (END) \
  457           (SC)->dtq[MID_DTQ_A2REG((SC)->dtq_us)] = EN_DQ_MK(CHAN,LEN); \
  458         MID_MK_TXQ(SC,CNT,CHAN,END,JK_OR_BCODE); \
  459         (SC)->dtq_us += 4; \
  460         EN_WRITE((SC), (SC)->dtq_us, (ADDR)); \
  461         EN_WRAPADD(MID_DTQOFF, MID_DTQEND, (SC)->dtq_us, 4); \
  462         (SC)->dtq_free--; \
  463         if (END) \
  464           EN_WRITE((SC), MID_DMA_WRTX, MID_DTQ_A2REG((SC)->dtq_us)); \
  465 }
  466 
  467 /* DRQ add macro */
  468 #define EN_DRQADD(SC,CNT,VCI,JK_OR_BCODE,ADDR,LEN,SLOT,END) { \
  469         if (END) \
  470           (SC)->drq[MID_DRQ_A2REG((SC)->drq_us)] = EN_DQ_MK(SLOT,LEN); \
  471         MID_MK_RXQ(SC,CNT,VCI,END,JK_OR_BCODE); \
  472         (SC)->drq_us += 4; \
  473         EN_WRITE((SC), (SC)->drq_us, (ADDR)); \
  474         EN_WRAPADD(MID_DRQOFF, MID_DRQEND, (SC)->drq_us, 4); \
  475         (SC)->drq_free--; \
  476         if (END) \
  477           EN_WRITE((SC), MID_DMA_WRRX, MID_DRQ_A2REG((SC)->drq_us)); \
  478 }
  479 
  480 /*
  481  * the driver code
  482  *
  483  * the code is arranged in a specific way:
  484  * [1] short/inline functions
  485  * [2] autoconfig stuff
  486  * [3] ioctl stuff
  487  * [4] reset -> init -> transmit -> intr -> receive functions
  488  *
  489  */
  490 
  491 /***********************************************************************/
  492 
  493 /*
  494  * en_read: read a word from the card.   this is the only function
  495  * that reads from the card.
  496  */
  497 
  498 STATIC INLINE u_int32_t en_read(sc, r)
  499 
  500 struct en_softc *sc;
  501 u_int32_t r;
  502 
  503 {
  504 
  505 #ifdef EN_DEBUG_RANGE
  506   if (r > MID_MAXOFF || (r % 4))
  507     panic("en_read out of range, r=0x%x", r);
  508 #endif
  509 
  510   return(bus_space_read_4(sc->en_memt, sc->en_base, r));
  511 }
  512 
  513 /*
  514  * en_write: write a word to the card.   this is the only function that
  515  * writes to the card.
  516  */
  517 
  518 STATIC INLINE void en_write(sc, r, v)
  519 
  520 struct en_softc *sc;
  521 u_int32_t r, v;
  522 
  523 {
  524 #ifdef EN_DEBUG_RANGE
  525   if (r > MID_MAXOFF || (r % 4))
  526     panic("en_write out of range, r=0x%x", r);
  527 #endif
  528 
  529   bus_space_write_4(sc->en_memt, sc->en_base, r, v);
  530 }
  531 
  532 /*
  533  * en_k2sz: convert KBytes to a size parameter (a log2)
  534  */
  535 
  536 STATIC INLINE int en_k2sz(k)
  537 
  538 int k;
  539 
  540 {
  541   switch(k) {
  542     case 1:   return(0);
  543     case 2:   return(1);
  544     case 4:   return(2);
  545     case 8:   return(3);
  546     case 16:  return(4);
  547     case 32:  return(5);
  548     case 64:  return(6);
  549     case 128: return(7);
  550     default: panic("en_k2sz");
  551   }
  552   return(0);
  553 }
  554 #define en_log2(X) en_k2sz(X)
  555 
  556 
  557 /*
  558  * en_b2sz: convert a DMA burst code to its byte size
  559  */
  560 
  561 STATIC INLINE int en_b2sz(b)
  562 
  563 int b;
  564 
  565 {
  566   switch (b) {
  567     case MIDDMA_WORD:   return(1*4);
  568     case MIDDMA_2WMAYBE:
  569     case MIDDMA_2WORD:  return(2*4);
  570     case MIDDMA_4WMAYBE:
  571     case MIDDMA_4WORD:  return(4*4);
  572     case MIDDMA_8WMAYBE:
  573     case MIDDMA_8WORD:  return(8*4);
  574     case MIDDMA_16WMAYBE:
  575     case MIDDMA_16WORD: return(16*4);
  576     default: panic("en_b2sz");
  577   }
  578   return(0);
  579 }
  580 
  581 
  582 /*
  583  * en_sz2b: convert a burst size (bytes) to DMA burst code
  584  */
  585 
  586 STATIC INLINE int en_sz2b(sz)
  587 
  588 int sz;
  589 
  590 {
  591   switch (sz) {
  592     case 1*4:  return(MIDDMA_WORD);
  593     case 2*4:  return(MIDDMA_2WORD);
  594     case 4*4:  return(MIDDMA_4WORD);
  595     case 8*4:  return(MIDDMA_8WORD);
  596     case 16*4: return(MIDDMA_16WORD);
  597     default: panic("en_sz2b");
  598   }
  599   return(0);
  600 }
  601 
  602 
  603 /*
  604  * en_dqneed: calculate number of DTQ/DRQ's needed for a buffer
  605  */
  606 
  607 STATIC INLINE int en_dqneed(sc, data, len, tx)
  608 
  609 struct en_softc *sc;
  610 caddr_t data;
  611 u_int len, tx;
  612 
  613 {
  614   int result, needalign, sz;
  615 
  616 #if !defined(MIDWAY_ENIONLY)
  617 #if !defined(MIDWAY_ADPONLY)
  618     if (sc->is_adaptec)
  619 #endif /* !MIDWAY_ADPONLY */
  620       return(1);        /* adaptec can DMA anything in one go */
  621 #endif
  622 
  623 #if !defined(MIDWAY_ADPONLY)
  624     result = 0;
  625     if (len < EN_MINDMA) {
  626       if (!tx)                  /* XXX: conservative */
  627         return(1);              /* will copy/DMA_JK */
  628     }
  629 
  630     if (tx) {                   /* byte burst? */
  631       needalign = (((unsigned long) data) % sizeof(u_int32_t));
  632       if (needalign) {
  633         result++;
  634         sz = min(len, sizeof(u_int32_t) - needalign);
  635         len -= sz;
  636         data += sz;
  637       }
  638     }
  639 
  640     if (sc->alburst && len) {
  641       needalign = (((unsigned long) data) & sc->bestburstmask);
  642       if (needalign) {
  643         result++;               /* alburst */
  644         sz = min(len, sc->bestburstlen - needalign);
  645         len -= sz;
  646       }
  647     }
  648 
  649     if (len >= sc->bestburstlen) {
  650       sz = len / sc->bestburstlen;
  651       sz = sz * sc->bestburstlen;
  652       len -= sz;
  653       result++;                 /* best shot */
  654     }
  655 
  656     if (len) {
  657       result++;                 /* clean up */
  658       if (tx && (len % sizeof(u_int32_t)) != 0)
  659         result++;               /* byte cleanup */
  660     }
  661 
  662     return(result);
  663 #endif  /* !MIDWAY_ADPONLY */
  664 }
  665 
  666 
  667 /*
  668  * en_mget: get an mbuf chain that can hold totlen bytes and return it
  669  * (for recv)   [based on am7990_get from if_le and ieget from if_ie]
  670  * after this call the sum of all the m_len's in the chain will be totlen.
  671  */
  672 
  673 STATIC INLINE struct mbuf *en_mget(sc, totlen, drqneed)
  674 
  675 struct en_softc *sc;
  676 u_int totlen, *drqneed;
  677 
  678 {
  679   struct mbuf *m;
  680   struct mbuf *top, **mp;
  681   *drqneed = 0;
  682 
  683   MGETHDR(m, M_DONTWAIT, MT_DATA);
  684   if (m == NULL)
  685     return(NULL);
  686   m->m_pkthdr.rcvif = &sc->enif;
  687   m->m_pkthdr.len = totlen;
  688   m->m_len = MHLEN;
  689   top = NULL;
  690   mp = &top;
  691 
  692   /* if (top != NULL) then we've already got 1 mbuf on the chain */
  693   while (totlen > 0) {
  694     if (top) {
  695       MGET(m, M_DONTWAIT, MT_DATA);
  696       if (!m) {
  697         m_freem(top);
  698         return(NULL);   /* out of mbufs */
  699       }
  700       m->m_len = MLEN;
  701     }
  702     if (totlen >= MINCLSIZE) {
  703       MCLGET(m, M_DONTWAIT);
  704       if ((m->m_flags & M_EXT) == 0) {
  705         m_free(m);
  706         m_freem(top);
  707         return(NULL);   /* out of mbuf clusters */
  708       }
  709       m->m_len = MCLBYTES;
  710     }
  711     m->m_len = min(totlen, m->m_len);
  712     totlen -= m->m_len;
  713     *mp = m;
  714     mp = &m->m_next;
  715 
  716     *drqneed += en_dqneed(sc, m->m_data, m->m_len, 0);
  717 
  718   }
  719   return(top);
  720 }
  721 
  722 /***********************************************************************/
  723 
  724 /*
  725  * autoconfig stuff
  726  */
  727 
  728 void en_attach(sc)
  729 
  730 struct en_softc *sc;
  731 
  732 {
  733   struct ifnet *ifp = &sc->enif;
  734   int sz;
  735   u_int32_t reg, lcv, check, ptr, sav, midvloc;
  736 
  737   /*
  738    * probe card to determine memory size.   the stupid ENI card always
  739    * reports to PCI that it needs 4MB of space (2MB regs and 2MB RAM).
  740    * if it has less than 2MB RAM the addresses wrap in the RAM address space.
  741    * (i.e. on a 512KB card addresses 0x3ffffc, 0x37fffc, and 0x2ffffc
  742    * are aliases for 0x27fffc  [note that RAM starts at offset 0x200000]).
  743    */
  744 
  745   if (sc->en_busreset)
  746     sc->en_busreset(sc);
  747   EN_WRITE(sc, MID_RESID, 0x0); /* reset card before touching RAM */
  748   for (lcv = MID_PROBEOFF; lcv <= MID_MAXOFF ; lcv += MID_PROBSIZE) {
  749     EN_WRITE(sc, lcv, lcv);     /* data[address] = address */
  750     for (check = MID_PROBEOFF ; check < lcv ; check += MID_PROBSIZE) {
  751       reg = EN_READ(sc, check);
  752       if (reg != check) {               /* found an alias! */
  753         goto done_probe;                /* and quit */
  754       }
  755     }
  756   }
  757 done_probe:
  758   lcv -= MID_PROBSIZE;                  /* take one step back */
  759   sc->en_obmemsz = (lcv + 4) - MID_RAMOFF;
  760 
  761   /*
  762    * determine the largest DMA burst supported
  763    */
  764 
  765   en_dmaprobe(sc);
  766 
  767   /*
  768    * "hello world"
  769    */
  770 
  771   if (sc->en_busreset)
  772     sc->en_busreset(sc);
  773   EN_WRITE(sc, MID_RESID, 0x0);         /* reset */
  774   for (lcv = MID_RAMOFF ; lcv < MID_RAMOFF + sc->en_obmemsz ; lcv += 4)
  775     EN_WRITE(sc, lcv, 0);       /* zero memory */
  776 
  777   reg = EN_READ(sc, MID_RESID);
  778 
  779   aprint_normal(
  780       "%s: ATM midway v%d, board IDs %d.%d, %s%s%s, %ldKB on-board RAM\n",
  781         sc->sc_dev.dv_xname, MID_VER(reg), MID_MID(reg), MID_DID(reg),
  782         (MID_IS_SABRE(reg)) ? "sabre controller, " : "",
  783         (MID_IS_SUNI(reg)) ? "SUNI" : "Utopia",
  784         (!MID_IS_SUNI(reg) && MID_IS_UPIPE(reg)) ? " (pipelined)" : "",
  785         (u_long)sc->en_obmemsz / 1024);
  786 
  787   if (sc->is_adaptec) {
  788     if (sc->bestburstlen == 64 && sc->alburst == 0)
  789       aprint_normal("%s: passed 64 byte DMA test\n", sc->sc_dev.dv_xname);
  790     else
  791       aprint_error("%s: FAILED DMA TEST: burst=%d, alburst=%d\n",
  792             sc->sc_dev.dv_xname, sc->bestburstlen, sc->alburst);
  793   } else {
  794     aprint_normal("%s: maximum DMA burst length = %d bytes%s\n",
  795           sc->sc_dev.dv_xname,
  796           sc->bestburstlen, (sc->alburst) ? " (must align)" : "");
  797   }
  798 
  799 #if 0           /* WMAYBE doesn't work, don't complain about it */
  800   /* check if en_dmaprobe disabled wmaybe */
  801   if (en_dmaplan == en_dma_planB)
  802     aprint_normal("%s: note: WMAYBE DMA has been disabled\n",
  803         sc->sc_dev.dv_xname);
  804 #endif
  805 
  806   /*
  807    * link into network subsystem and prepare card
  808    */
  809 
  810 #if defined(__NetBSD__) || defined(__OpenBSD__)
  811   strcpy(sc->enif.if_xname, sc->sc_dev.dv_xname);
  812 #endif
  813 #if !defined(MISSING_IF_SOFTC)
  814   sc->enif.if_softc = sc;
  815 #endif
  816   ifp->if_flags = IFF_SIMPLEX|IFF_NOTRAILERS;
  817   ifp->if_ioctl = en_ioctl;
  818   ifp->if_output = atm_output;
  819   ifp->if_start = en_start;
  820   IFQ_SET_READY(&ifp->if_snd);
  821 
  822   /*
  823    * init softc
  824    */
  825 
  826   for (lcv = 0 ; lcv < MID_N_VC ; lcv++) {
  827     sc->rxvc2slot[lcv] = RX_NONE;
  828     sc->txspeed[lcv] = 0;       /* full */
  829     sc->txvc2slot[lcv] = 0;     /* full speed == slot 0 */
  830   }
  831 
  832   sz = sc->en_obmemsz - (MID_BUFOFF - MID_RAMOFF);
  833   ptr = sav = MID_BUFOFF;
  834   ptr = roundup(ptr, EN_TXSZ * 1024);   /* align */
  835   sz = sz - (ptr - sav);
  836   if (EN_TXSZ*1024 * EN_NTX > sz) {
  837     aprint_error("%s: EN_NTX/EN_TXSZ too big\n", sc->sc_dev.dv_xname);
  838     return;
  839   }
  840   for (lcv = 0 ; lcv < EN_NTX ; lcv++) {
  841     sc->txslot[lcv].mbsize = 0;
  842     sc->txslot[lcv].start = ptr;
  843     ptr += (EN_TXSZ * 1024);
  844     sz -= (EN_TXSZ * 1024);
  845     sc->txslot[lcv].stop = ptr;
  846     sc->txslot[lcv].nref = 0;
  847 #ifdef ATM_PVCEXT
  848     sc->txrrp = NULL;
  849 #endif
  850     memset(&sc->txslot[lcv].indma, 0, sizeof(sc->txslot[lcv].indma));
  851     memset(&sc->txslot[lcv].q, 0, sizeof(sc->txslot[lcv].q));
  852 #ifdef EN_DEBUG
  853     aprint_debug("%s: tx%d: start 0x%x, stop 0x%x\n", sc->sc_dev.dv_xname, lcv,
  854                 sc->txslot[lcv].start, sc->txslot[lcv].stop);
  855 #endif
  856   }
  857 
  858   sav = ptr;
  859   ptr = roundup(ptr, EN_RXSZ * 1024);   /* align */
  860   sz = sz - (ptr - sav);
  861   sc->en_nrx = sz / (EN_RXSZ * 1024);
  862   if (sc->en_nrx <= 0) {
  863     aprint_error("%s: EN_NTX/EN_TXSZ/EN_RXSZ too big\n", sc->sc_dev.dv_xname);
  864     return;
  865   }
  866 
  867   /*
  868    * ensure that there is always one VC slot on the service list free
  869    * so that we can tell the difference between a full and empty list.
  870    */
  871   if (sc->en_nrx >= MID_N_VC)
  872     sc->en_nrx = MID_N_VC - 1;
  873 
  874   for (lcv = 0 ; lcv < sc->en_nrx ; lcv++) {
  875     sc->rxslot[lcv].rxhand = NULL;
  876     sc->rxslot[lcv].oth_flags = ENOTHER_FREE;
  877     memset(&sc->rxslot[lcv].indma, 0, sizeof(sc->rxslot[lcv].indma));
  878     memset(&sc->rxslot[lcv].q, 0, sizeof(sc->rxslot[lcv].q));
  879     midvloc = sc->rxslot[lcv].start = ptr;
  880     ptr += (EN_RXSZ * 1024);
  881     sz -= (EN_RXSZ * 1024);
  882     sc->rxslot[lcv].stop = ptr;
  883     midvloc = midvloc - MID_RAMOFF;
  884     midvloc = (midvloc & ~((EN_RXSZ*1024) - 1)) >> 2; /* mask, cvt to words */
  885     midvloc = midvloc >> MIDV_LOCTOPSHFT;  /* we only want the top 11 bits */
  886     midvloc = (midvloc & MIDV_LOCMASK) << MIDV_LOCSHIFT;
  887     sc->rxslot[lcv].mode = midvloc |
  888         (en_k2sz(EN_RXSZ) << MIDV_SZSHIFT) | MIDV_TRASH;
  889 
  890 #ifdef EN_DEBUG
  891     aprint_debug("%s: rx%d: start 0x%x, stop 0x%x, mode 0x%x\n",
  892         sc->sc_dev.dv_xname,
  893         lcv, sc->rxslot[lcv].start, sc->rxslot[lcv].stop, sc->rxslot[lcv].mode);
  894 #endif
  895   }
  896 
  897 #ifdef EN_STAT
  898   sc->vtrash = sc->otrash = sc->mfix = sc->txmbovr = sc->dmaovr = 0;
  899   sc->txoutspace = sc->txdtqout = sc->launch = sc->lheader = sc->ltail = 0;
  900   sc->hwpull = sc->swadd = sc->rxqnotus = sc->rxqus = sc->rxoutboth = 0;
  901   sc->rxdrqout = sc->ttrash = sc->rxmbufout = sc->mfixfail = 0;
  902   sc->headbyte = sc->tailbyte = sc->tailflush = 0;
  903 #endif
  904   sc->need_drqs = sc->need_dtqs = 0;
  905 
  906   aprint_normal(
  907         "%s: %d %dKB receive buffers, %d %dKB transmit buffers allocated\n",
  908         sc->sc_dev.dv_xname, sc->en_nrx, EN_RXSZ, EN_NTX, EN_TXSZ);
  909 
  910   aprint_normal("%s: End Station Identifier (mac address) %s\n",
  911         sc->sc_dev.dv_xname, ether_sprintf(sc->macaddr));
  912 
  913   /*
  914    * final commit
  915    */
  916 
  917   if_attach(ifp);
  918   atm_ifattach(ifp);
  919 
  920 #ifdef ATM_PVCEXT
  921   rrp_add(sc, ifp);
  922 #endif
  923 }
  924 
  925 
  926 /*
  927  * en_dmaprobe: helper function for en_attach.
  928  *
  929  * see how the card handles DMA by running a few DMA tests.   we need
  930  * to figure out the largest number of bytes we can DMA in one burst
  931  * ("bestburstlen"), and if the starting address for a burst needs to
  932  * be aligned on any sort of boundary or not ("alburst").
  933  *
  934  * typical findings:
  935  * sparc1: bestburstlen=4, alburst=0 (ick, broken DMA!)
  936  * sparc2: bestburstlen=64, alburst=1
  937  * p166:   bestburstlen=64, alburst=0
  938  */
  939 
  940 STATIC void en_dmaprobe(sc)
  941 
  942 struct en_softc *sc;
  943 
  944 {
  945   u_int32_t srcbuf[64], dstbuf[64];
  946   u_int8_t *sp, *dp;
  947   int bestalgn, bestnotalgn, lcv, try, fail;
  948 
  949   sc->alburst = 0;
  950 
  951   sp = (u_int8_t *) srcbuf;
  952   while ((((unsigned long) sp) % MIDDMA_MAXBURST) != 0)
  953     sp += 4;
  954   dp = (u_int8_t *) dstbuf;
  955   while ((((unsigned long) dp) % MIDDMA_MAXBURST) != 0)
  956     dp += 4;
  957 
  958   bestalgn = bestnotalgn = en_dmaprobe_doit(sc, sp, dp, 0);
  959 
  960   for (lcv = 4 ; lcv < MIDDMA_MAXBURST ; lcv += 4) {
  961     try = en_dmaprobe_doit(sc, sp+lcv, dp+lcv, 0);
  962     if (try < bestnotalgn)
  963       bestnotalgn = try;
  964   }
  965 
  966   if (bestalgn != bestnotalgn)          /* need bursts aligned */
  967     sc->alburst = 1;
  968 
  969   sc->bestburstlen = bestalgn;
  970   sc->bestburstshift = en_log2(bestalgn);
  971   sc->bestburstmask = sc->bestburstlen - 1; /* must be power of 2 */
  972   sc->bestburstcode = en_sz2b(bestalgn);
  973 
  974   if (sc->bestburstlen <= 2*sizeof(u_int32_t))
  975     return;                             /* won't be using WMAYBE */
  976 
  977   /*
  978    * adaptec does not have (or need) wmaybe.   do not bother testing
  979    * for it.
  980    */
  981   if (sc->is_adaptec) {
  982     /* XXX, actually don't need a DMA plan: adaptec is smarter than that */
  983     en_dmaplan = en_dma_planB;
  984     return;
  985   }
  986 
  987   /*
  988    * test that WMAYBE DMA works like we think it should
  989    * (i.e. no alignment restrictions on host address other than alburst)
  990    */
  991 
  992   try = sc->bestburstlen - 4;
  993   fail = 0;
  994   fail += en_dmaprobe_doit(sc, sp, dp, try);
  995   for (lcv = 4 ; lcv < sc->bestburstlen ; lcv += 4) {
  996     fail += en_dmaprobe_doit(sc, sp+lcv, dp+lcv, try);
  997     if (sc->alburst)
  998       try -= 4;
  999   }
 1000   if (EN_NOWMAYBE || fail) {
 1001     if (fail)
 1002       printf("%s: WARNING: WMAYBE DMA test failed %d time(s)\n",
 1003         sc->sc_dev.dv_xname, fail);
 1004     en_dmaplan = en_dma_planB;          /* fall back to plan B */
 1005   }
 1006 
 1007 }
 1008 
 1009 
 1010 /*
 1011  * en_dmaprobe_doit: do actual testing
 1012  */
 1013 
 1014 int
 1015 en_dmaprobe_doit(sc, sp, dp, wmtry)
 1016 
 1017 struct en_softc *sc;
 1018 u_int8_t *sp, *dp;
 1019 int wmtry;
 1020 
 1021 {
 1022   int lcv, retval = 4, cnt, count;
 1023   u_int32_t reg, bcode, midvloc;
 1024 
 1025   /*
 1026    * set up a 1k buffer at MID_BUFOFF
 1027    */
 1028 
 1029   if (sc->en_busreset)
 1030     sc->en_busreset(sc);
 1031   EN_WRITE(sc, MID_RESID, 0x0); /* reset card before touching RAM */
 1032 
 1033   midvloc = ((MID_BUFOFF - MID_RAMOFF) / sizeof(u_int32_t)) >> MIDV_LOCTOPSHFT;
 1034   EN_WRITE(sc, MIDX_PLACE(0), MIDX_MKPLACE(en_k2sz(1), midvloc));
 1035   EN_WRITE(sc, MID_VC(0), (midvloc << MIDV_LOCSHIFT)
 1036                 | (en_k2sz(1) << MIDV_SZSHIFT) | MIDV_TRASH);
 1037   EN_WRITE(sc, MID_DST_RP(0), 0);
 1038   EN_WRITE(sc, MID_WP_ST_CNT(0), 0);
 1039 
 1040   for (lcv = 0 ; lcv < 68 ; lcv++)              /* set up sample data */
 1041     sp[lcv] = lcv+1;
 1042   EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA);   /* enable DMA (only) */
 1043 
 1044   sc->drq_chip = MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX));
 1045   sc->dtq_chip = MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX));
 1046 
 1047   /*
 1048    * try it now . . .  DMA it out, then DMA it back in and compare
 1049    *
 1050    * note: in order to get the DMA stuff to reverse directions it wants
 1051    * the "end" flag set!   since we are not DMA'ing valid data we may
 1052    * get an ident mismatch interrupt (which we will ignore).
 1053    *
 1054    * note: we've got two different tests rolled up in the same loop
 1055    * if (wmtry)
 1056    *   then we are doing a wmaybe test and wmtry is a byte count
 1057    *   else we are doing a burst test
 1058    */
 1059 
 1060   for (lcv = 8 ; lcv <= MIDDMA_MAXBURST ; lcv = lcv * 2) {
 1061 
 1062     /* zero SRAM and dest buffer */
 1063     for (cnt = 0 ; cnt < 1024; cnt += 4)
 1064       EN_WRITE(sc, MID_BUFOFF+cnt, 0);  /* zero memory */
 1065     for (cnt = 0 ; cnt < 68  ; cnt++)
 1066       dp[cnt] = 0;
 1067 
 1068     if (wmtry) {
 1069       count = (sc->bestburstlen - sizeof(u_int32_t)) / sizeof(u_int32_t);
 1070       bcode = en_dmaplan[count].bcode;
 1071       count = wmtry >> en_dmaplan[count].divshift;
 1072     } else {
 1073       bcode = en_sz2b(lcv);
 1074       count = 1;
 1075     }
 1076     if (sc->is_adaptec)
 1077       EN_WRITE(sc, sc->dtq_chip, MID_MK_TXQ_ADP(lcv, 0, MID_DMA_END, 0));
 1078     else
 1079       EN_WRITE(sc, sc->dtq_chip, MID_MK_TXQ_ENI(count, 0, MID_DMA_END, bcode));
 1080     EN_WRITE(sc, sc->dtq_chip+4, vtophys((vaddr_t)sp));
 1081     EN_WRITE(sc, MID_DMA_WRTX, MID_DTQ_A2REG(sc->dtq_chip+8));
 1082     cnt = 1000;
 1083     while (EN_READ(sc, MID_DMA_RDTX) == MID_DTQ_A2REG(sc->dtq_chip)) {
 1084       DELAY(1);
 1085       cnt--;
 1086       if (cnt == 0) {
 1087         printf("%s: unexpected timeout in tx DMA test\n", sc->sc_dev.dv_xname);
 1088         return(retval);         /* timeout, give up */
 1089       }
 1090     }
 1091     EN_WRAPADD(MID_DTQOFF, MID_DTQEND, sc->dtq_chip, 8);
 1092     reg = EN_READ(sc, MID_INTACK);
 1093     if ((reg & MID_INT_DMA_TX) != MID_INT_DMA_TX) {
 1094       printf("%s: unexpected status in tx DMA test: 0x%x\n",
 1095                 sc->sc_dev.dv_xname, reg);
 1096       return(retval);
 1097     }
 1098     EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA);   /* re-enable DMA (only) */
 1099 
 1100     /* "return to sender..."  address is known ... */
 1101 
 1102     if (sc->is_adaptec)
 1103       EN_WRITE(sc, sc->drq_chip, MID_MK_RXQ_ADP(lcv, 0, MID_DMA_END, 0));
 1104     else
 1105       EN_WRITE(sc, sc->drq_chip, MID_MK_RXQ_ENI(count, 0, MID_DMA_END, bcode));
 1106     EN_WRITE(sc, sc->drq_chip+4, vtophys((vaddr_t)dp));
 1107     EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip+8));
 1108     cnt = 1000;
 1109     while (EN_READ(sc, MID_DMA_RDRX) == MID_DRQ_A2REG(sc->drq_chip)) {
 1110       DELAY(1);
 1111       cnt--;
 1112       if (cnt == 0) {
 1113         printf("%s: unexpected timeout in rx DMA test\n", sc->sc_dev.dv_xname);
 1114         return(retval);         /* timeout, give up */
 1115       }
 1116     }
 1117     EN_WRAPADD(MID_DRQOFF, MID_DRQEND, sc->drq_chip, 8);
 1118     reg = EN_READ(sc, MID_INTACK);
 1119     if ((reg & MID_INT_DMA_RX) != MID_INT_DMA_RX) {
 1120       printf("%s: unexpected status in rx DMA test: 0x%x\n",
 1121                 sc->sc_dev.dv_xname, reg);
 1122       return(retval);
 1123     }
 1124     EN_WRITE(sc, MID_MAST_CSR, MID_MCSR_ENDMA);   /* re-enable DMA (only) */
 1125 
 1126     if (wmtry) {
 1127       return(memcmp(sp, dp, wmtry));  /* wmtry always exits here, no looping */
 1128     }
 1129 
 1130     if (memcmp(sp, dp, lcv))
 1131       return(retval);           /* failed, use last value */
 1132 
 1133     retval = lcv;
 1134 
 1135   }
 1136   return(retval);               /* studly 64 byte DMA present!  oh baby!! */
 1137 }
 1138 
 1139 /***********************************************************************/
 1140 
 1141 /*
 1142  * en_ioctl: handle ioctl requests
 1143  *
 1144  * NOTE: if you add an ioctl to set txspeed, you should choose a new
 1145  * TX channel/slot.   Choose the one with the lowest sc->txslot[slot].nref
 1146  * value, subtract one from sc->txslot[0].nref, add one to the
 1147  * sc->txslot[slot].nref, set sc->txvc2slot[vci] = slot, and then set
 1148  * txspeed[vci].
 1149  */
 1150 
 1151 STATIC int en_ioctl(ifp, cmd, data)
 1152 
 1153 struct ifnet *ifp;
 1154 EN_IOCTL_CMDT cmd;
 1155 caddr_t data;
 1156 
 1157 {
 1158 #ifdef MISSING_IF_SOFTC
 1159     struct en_softc *sc = (struct en_softc *) en_cd.cd_devs[ifp->if_unit];
 1160 #else
 1161     struct en_softc *sc = (struct en_softc *) ifp->if_softc;
 1162 #endif
 1163     struct ifaddr *ifa = (struct ifaddr *) data;
 1164     struct ifreq *ifr = (struct ifreq *) data;
 1165     struct atm_pseudoioctl *api = (struct atm_pseudoioctl *)data;
 1166 #ifdef NATM
 1167     struct atm_rawioctl *ario = (struct atm_rawioctl *)data;
 1168     int slot;
 1169 #endif
 1170     int s, error = 0;
 1171 
 1172     s = splnet();
 1173 
 1174     switch (cmd) {
 1175         case SIOCATMENA:                /* enable circuit for recv */
 1176                 error = en_rxctl(sc, api, 1);
 1177                 break;
 1178 
 1179         case SIOCATMDIS:                /* disable circuit for recv */
 1180                 error = en_rxctl(sc, api, 0);
 1181                 break;
 1182 
 1183 #ifdef NATM
 1184         case SIOCXRAWATM:
 1185                 if ((slot = sc->rxvc2slot[ario->npcb->npcb_vci]) == RX_NONE) {
 1186                         error = EINVAL;
 1187                         break;
 1188                 }
 1189                 if (ario->rawvalue > EN_RXSZ*1024)
 1190                         ario->rawvalue = EN_RXSZ*1024;
 1191                 if (ario->rawvalue) {
 1192                         sc->rxslot[slot].oth_flags |= ENOTHER_RAW;
 1193                         sc->rxslot[slot].raw_threshold = ario->rawvalue;
 1194                 } else {
 1195                         sc->rxslot[slot].oth_flags &= (~ENOTHER_RAW);
 1196                         sc->rxslot[slot].raw_threshold = 0;
 1197                 }
 1198 #ifdef EN_DEBUG
 1199                 printf("%s: rxvci%d: turn %s raw (boodi) mode\n",
 1200                         sc->sc_dev.dv_xname, ario->npcb->npcb_vci,
 1201                         (ario->rawvalue) ? "on" : "off");
 1202 #endif
 1203                 break;
 1204 #endif
 1205         case SIOCSIFADDR:
 1206 #ifdef INET6
 1207         case SIOCSIFADDR_IN6:
 1208 #endif
 1209                 ifp->if_flags |= IFF_UP;
 1210                 switch (ifa->ifa_addr->sa_family) {
 1211 #ifdef INET
 1212                 case AF_INET:
 1213                         en_reset(sc);
 1214                         en_init(sc);
 1215                         ifa->ifa_rtrequest = atm_rtrequest; /* ??? */
 1216                         break;
 1217 #endif
 1218 #ifdef INET6
 1219                 case AF_INET6:
 1220                         en_reset(sc);
 1221                         en_init(sc);
 1222                         ifa->ifa_rtrequest = atm_rtrequest; /* ??? */
 1223                         break;
 1224 #endif
 1225                 default:
 1226                         /* what to do if not INET? */
 1227                         en_reset(sc);
 1228                         en_init(sc);
 1229                         break;
 1230                 }
 1231                 break;
 1232 
 1233         case SIOCGIFADDR:
 1234                 error = EINVAL;
 1235                 break;
 1236 
 1237         case SIOCSIFFLAGS:
 1238 #ifdef ATM_PVCEXT
 1239                 /* point-2-point pvc is allowed to change if_flags */
 1240                 if (((ifp->if_flags & IFF_UP) && !(ifp->if_flags & IFF_RUNNING))
 1241                 ||  (!(ifp->if_flags & IFF_UP) && (ifp->if_flags & IFF_RUNNING))) {
 1242                         en_reset(sc);
 1243                         en_init(sc);
 1244                 }
 1245 #else
 1246                 error = EINVAL;
 1247 #endif
 1248                 break;
 1249 
 1250 #if defined(SIOCSIFMTU)         /* ??? copied from if_de */
 1251 #if !defined(ifr_mtu)
 1252 #define ifr_mtu ifr_metric
 1253 #endif
 1254         case SIOCSIFMTU:
 1255             /*
 1256              * Set the interface MTU.
 1257              */
 1258 #ifdef notsure
 1259             if (ifr->ifr_mtu > ATMMTU) {
 1260                 error = EINVAL;
 1261                 break;
 1262             }
 1263 #endif
 1264             ifp->if_mtu = ifr->ifr_mtu;
 1265                 /* XXXCDC: do we really need to reset on MTU size change? */
 1266             en_reset(sc);
 1267             en_init(sc);
 1268             break;
 1269 #endif /* SIOCSIFMTU */
 1270 
 1271 #ifdef ATM_PVCEXT
 1272         case SIOCADDMULTI:
 1273         case SIOCDELMULTI:
 1274                 if (ifp == &sc->enif || ifr == 0) {
 1275                         error = EAFNOSUPPORT;   /* XXX */
 1276                         break;
 1277                 }
 1278                 switch (ifr->ifr_addr.sa_family) {
 1279 #ifdef INET
 1280                 case AF_INET:
 1281                         break;
 1282 #endif
 1283 #ifdef INET6
 1284                 case AF_INET6:
 1285                         break;
 1286 #endif
 1287                 default:
 1288                         error = EAFNOSUPPORT;
 1289                         break;
 1290                 }
 1291                 break;
 1292 
 1293         case SIOCGPVCSIF:
 1294                 if (ifp != &sc->enif) {
 1295 #ifdef __NetBSD__
 1296                   strlcpy(ifr->ifr_name, sc->enif.if_xname,
 1297                       sizeof(ifr->ifr_name));
 1298 #else
 1299                   snprintf(ifr->ifr_name, sizeof(ifr->ifr_name), "%s%d",
 1300                           sc->enif.if_name, sc->enif.if_unit);
 1301 #endif
 1302                 }
 1303                 else
 1304                   error = EINVAL;
 1305                 break;
 1306 
 1307         case SIOCSPVCSIF:
 1308                 if (ifp == &sc->enif) {
 1309                   struct ifnet *sifp;
 1310 
 1311                   if ((error = kauth_authorize_generic(curlwp->l_cred,
 1312                      KAUTH_GENERIC_ISSUSER, &curlwp->l_acflag)) != 0)
 1313                     break;
 1314 
 1315                   if ((sifp = en_pvcattach(ifp)) != NULL) {
 1316 #ifdef __NetBSD__
 1317                     strlcpy(ifr->ifr_name, sifp->if_xname,
 1318                         sizeof(ifr->ifr_name));
 1319 #else
 1320                     snprintf(ifr->ifr_name, sizeof(ifr->ifr_name), "%s%d",
 1321                         sifp->if_name, sifp->if_unit);
 1322 #endif
 1323 #if defined(__KAME__) && defined(INET6)
 1324                     /* get EUI64 for PVC, from ATM hardware interface */
 1325                     in6_ifattach(sifp, ifp);
 1326 #endif
 1327                   }
 1328                   else
 1329                     error = ENOMEM;
 1330                 }
 1331                 else
 1332                   error = EINVAL;
 1333                 break;
 1334 
 1335         case SIOCGPVCTX:
 1336                 error = en_pvctxget(sc, (struct pvctxreq *)data);
 1337                 break;
 1338 
 1339         case SIOCSPVCTX:
 1340                 if ((error = kauth_authorize_generic(curlwp->l_cred,
 1341                     KAUTH_GENERIC_ISSUSER, &curlwp->l_acflag)) == 0)
 1342                         error = en_pvctx(sc, (struct pvctxreq *)data);
 1343                 break;
 1344 
 1345 #endif /* ATM_PVCEXT */
 1346 
 1347         default:
 1348             error = EINVAL;
 1349             break;
 1350     }
 1351     splx(s);
 1352     return error;
 1353 }
 1354 
 1355 
 1356 /*
 1357  * en_rxctl: turn on and off VCs for recv.
 1358  */
 1359 
 1360 STATIC int en_rxctl(sc, pi, on)
 1361 
 1362 struct en_softc *sc;
 1363 struct atm_pseudoioctl *pi;
 1364 int on;
 1365 
 1366 {
 1367   u_int s, vci, flags, slot;
 1368   u_int32_t oldmode, newmode;
 1369 
 1370   vci = ATM_PH_VCI(&pi->aph);
 1371   flags = ATM_PH_FLAGS(&pi->aph);
 1372 
 1373 #ifdef EN_DEBUG
 1374   printf("%s: %s vpi=%d, vci=%d, flags=%d\n", sc->sc_dev.dv_xname,
 1375         (on) ? "enable" : "disable", ATM_PH_VPI(&pi->aph), vci, flags);
 1376 #endif
 1377 
 1378   if (ATM_PH_VPI(&pi->aph) || vci >= MID_N_VC)
 1379     return(EINVAL);
 1380 
 1381   /*
 1382    * turn on VCI!
 1383    */
 1384 
 1385   if (on) {
 1386     if (sc->rxvc2slot[vci] != RX_NONE)
 1387       return(EINVAL);
 1388     for (slot = 0 ; slot < sc->en_nrx ; slot++)
 1389       if (sc->rxslot[slot].oth_flags & ENOTHER_FREE)
 1390         break;
 1391     if (slot == sc->en_nrx)
 1392       return(ENOSPC);
 1393     sc->rxvc2slot[vci] = slot;
 1394     sc->rxslot[slot].rxhand = NULL;
 1395     oldmode = sc->rxslot[slot].mode;
 1396     newmode = (flags & ATM_PH_AAL5) ? MIDV_AAL5 : MIDV_NOAAL;
 1397     sc->rxslot[slot].mode = MIDV_SETMODE(oldmode, newmode);
 1398     sc->rxslot[slot].atm_vci = vci;
 1399     sc->rxslot[slot].atm_flags = flags;
 1400     sc->rxslot[slot].oth_flags = 0;
 1401     sc->rxslot[slot].rxhand = pi->rxhand;
 1402     if (sc->rxslot[slot].indma.ifq_head || sc->rxslot[slot].q.ifq_head)
 1403       panic("en_rxctl: left over mbufs on enable");
 1404     sc->txspeed[vci] = 0;       /* full speed to start */
 1405     sc->txvc2slot[vci] = 0;     /* init value */
 1406     sc->txslot[0].nref++;       /* bump reference count */
 1407     en_loadvc(sc, vci);         /* does debug printf for us */
 1408     return(0);
 1409   }
 1410 
 1411   /*
 1412    * turn off VCI
 1413    */
 1414 
 1415   if (sc->rxvc2slot[vci] == RX_NONE)
 1416     return(EINVAL);
 1417   slot = sc->rxvc2slot[vci];
 1418   if ((sc->rxslot[slot].oth_flags & (ENOTHER_FREE|ENOTHER_DRAIN)) != 0)
 1419     return(EINVAL);
 1420   s = splnet();         /* block out enintr() */
 1421   oldmode = EN_READ(sc, MID_VC(vci));
 1422   newmode = MIDV_SETMODE(oldmode, MIDV_TRASH) & ~MIDV_INSERVICE;
 1423   EN_WRITE(sc, MID_VC(vci), (newmode | (oldmode & MIDV_INSERVICE)));
 1424                 /* halt in tracks, be careful to preserve inserivce bit */
 1425   DELAY(27);
 1426   sc->rxslot[slot].rxhand = NULL;
 1427   sc->rxslot[slot].mode = newmode;
 1428 
 1429   sc->txslot[sc->txvc2slot[vci]].nref--;
 1430   sc->txspeed[vci] = 0;
 1431   sc->txvc2slot[vci] = 0;
 1432 
 1433   /* if stuff is still going on we are going to have to drain it out */
 1434   if (sc->rxslot[slot].indma.ifq_head ||
 1435                 sc->rxslot[slot].q.ifq_head ||
 1436                 (sc->rxslot[slot].oth_flags & ENOTHER_SWSL) != 0) {
 1437     sc->rxslot[slot].oth_flags |= ENOTHER_DRAIN;
 1438   } else {
 1439     sc->rxslot[slot].oth_flags = ENOTHER_FREE;
 1440     sc->rxslot[slot].atm_vci = RX_NONE;
 1441     sc->rxvc2slot[vci] = RX_NONE;
 1442   }
 1443   splx(s);              /* enable enintr() */
 1444 #ifdef EN_DEBUG
 1445   printf("%s: rx%d: VCI %d is now %s\n", sc->sc_dev.dv_xname, slot, vci,
 1446         (sc->rxslot[slot].oth_flags & ENOTHER_DRAIN) ? "draining" : "free");
 1447 #endif
 1448   return(0);
 1449 }
 1450 
 1451 /***********************************************************************/
 1452 
 1453 /*
 1454  * en_reset: reset the board, throw away work in progress.
 1455  * must en_init to recover.
 1456  */
 1457 
 1458 void en_reset(sc)
 1459 
 1460 struct en_softc *sc;
 1461 
 1462 {
 1463   struct mbuf *m;
 1464   int lcv, slot;
 1465 
 1466 #ifdef EN_DEBUG
 1467   printf("%s: reset\n", sc->sc_dev.dv_xname);
 1468 #endif
 1469 
 1470   if (sc->en_busreset)
 1471     sc->en_busreset(sc);
 1472   EN_WRITE(sc, MID_RESID, 0x0); /* reset hardware */
 1473 
 1474   /*
 1475    * recv: dump any mbufs we are DMA'ing into, if DRAINing, then a reset
 1476    * will free us!
 1477    */
 1478 
 1479   for (lcv = 0 ; lcv < MID_N_VC ; lcv++) {
 1480     if (sc->rxvc2slot[lcv] == RX_NONE)
 1481       continue;
 1482     slot = sc->rxvc2slot[lcv];
 1483     while (1) {
 1484       IF_DEQUEUE(&sc->rxslot[slot].indma, m);
 1485       if (m == NULL)
 1486         break;          /* >>> exit 'while(1)' here <<< */
 1487       m_freem(m);
 1488     }
 1489     while (1) {
 1490       IF_DEQUEUE(&sc->rxslot[slot].q, m);
 1491       if (m == NULL)
 1492         break;          /* >>> exit 'while(1)' here <<< */
 1493       m_freem(m);
 1494     }
 1495     sc->rxslot[slot].oth_flags &= ~ENOTHER_SWSL;
 1496     if (sc->rxslot[slot].oth_flags & ENOTHER_DRAIN) {
 1497       sc->rxslot[slot].oth_flags = ENOTHER_FREE;
 1498       sc->rxvc2slot[lcv] = RX_NONE;
 1499 #ifdef EN_DEBUG
 1500   printf("%s: rx%d: VCI %d is now free\n", sc->sc_dev.dv_xname, slot, lcv);
 1501 #endif
 1502     }
 1503   }
 1504 
 1505   /*
 1506    * xmit: dump everything
 1507    */
 1508 
 1509   for (lcv = 0 ; lcv < EN_NTX ; lcv++) {
 1510     while (1) {
 1511       IF_DEQUEUE(&sc->txslot[lcv].indma, m);
 1512       if (m == NULL)
 1513         break;          /* >>> exit 'while(1)' here <<< */
 1514       m_freem(m);
 1515     }
 1516     while (1) {
 1517       IF_DEQUEUE(&sc->txslot[lcv].q, m);
 1518       if (m == NULL)
 1519         break;          /* >>> exit 'while(1)' here <<< */
 1520       m_freem(m);
 1521     }
 1522     sc->txslot[lcv].mbsize = 0;
 1523   }
 1524 
 1525   return;
 1526 }
 1527 
 1528 
 1529 /*
 1530  * en_init: init board and sync the card with the data in the softc.
 1531  */
 1532 
 1533 STATIC void en_init(sc)
 1534 
 1535 struct en_softc *sc;
 1536 
 1537 {
 1538   int vc, slot;
 1539   u_int32_t loc;
 1540 #ifdef ATM_PVCEXT
 1541     struct pvcsif *pvcsif;
 1542 #endif
 1543 
 1544   if ((sc->enif.if_flags & IFF_UP) == 0) {
 1545 #ifdef ATM_PVCEXT
 1546     LIST_FOREACH(pvcsif, &sc->sif_list, sif_links) {
 1547       if (pvcsif->sif_if.if_flags & IFF_UP) {
 1548         /*
 1549          * down the device only when there is no active pvc subinterface.
 1550          * if there is, we have to go through the init sequence to reflect
 1551          * the software states to the device.
 1552          */
 1553         goto up;
 1554       }
 1555     }
 1556 #endif
 1557 #ifdef EN_DEBUG
 1558     printf("%s: going down\n", sc->sc_dev.dv_xname);
 1559 #endif
 1560     en_reset(sc);                       /* to be safe */
 1561     sc->enif.if_flags &= ~IFF_RUNNING;  /* disable */
 1562     return;
 1563   }
 1564 
 1565 #ifdef ATM_PVCEXT
 1566  up:
 1567 #endif
 1568 #ifdef EN_DEBUG
 1569   printf("%s: going up\n", sc->sc_dev.dv_xname);
 1570 #endif
 1571   sc->enif.if_flags |= IFF_RUNNING;     /* enable */
 1572 #ifdef ATM_PVCEXT
 1573   LIST_FOREACH(pvcsif, &sc->sif_list, sif_links) {
 1574     pvcsif->sif_if.if_flags |= IFF_RUNNING;
 1575   }
 1576 #endif
 1577 
 1578   if (sc->en_busreset)
 1579     sc->en_busreset(sc);
 1580   EN_WRITE(sc, MID_RESID, 0x0);         /* reset */
 1581 
 1582   /*
 1583    * init obmem data structures: vc tab, DMA q's, slist.
 1584    *
 1585    * note that we set drq_free/dtq_free to one less than the total number
 1586    * of DTQ/DRQs present.   we do this because the card uses the condition
 1587    * (drq_chip == drq_us) to mean "list is empty"... but if you allow the
 1588    * circular list to be completely full then (drq_chip == drq_us) [i.e.
 1589    * the drq_us pointer will wrap all the way around].   by restricting
 1590    * the number of active requests to (N - 1) we prevent the list from
 1591    * becoming completely full.    note that the card will sometimes give
 1592    * us an interrupt for a DTQ/DRQ we have already processes... this helps
 1593    * keep that interrupt from messing us up.
 1594    */
 1595 
 1596   for (vc = 0 ; vc < MID_N_VC ; vc++)
 1597     en_loadvc(sc, vc);
 1598 
 1599   memset(&sc->drq, 0, sizeof(sc->drq));
 1600   sc->drq_free = MID_DRQ_N - 1;         /* N - 1 */
 1601   sc->drq_chip = MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX));
 1602   EN_WRITE(sc, MID_DMA_WRRX, MID_DRQ_A2REG(sc->drq_chip));
 1603                                                 /* ensure zero queue */
 1604   sc->drq_us = sc->drq_chip;
 1605 
 1606   memset(&sc->dtq, 0, sizeof(sc->dtq));
 1607   sc->dtq_free = MID_DTQ_N - 1;         /* N - 1 */
 1608   sc->dtq_chip = MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX));
 1609   EN_WRITE(sc, MID_DMA_WRTX, MID_DRQ_A2REG(sc->dtq_chip));
 1610                                                 /* ensure zero queue */
 1611   sc->dtq_us = sc->dtq_chip;
 1612 
 1613   sc->hwslistp = MID_SL_REG2A(EN_READ(sc, MID_SERV_WRITE));
 1614   sc->swsl_size = sc->swsl_head = sc->swsl_tail = 0;
 1615 
 1616 #ifdef EN_DEBUG
 1617   printf("%s: drq free/chip: %d/0x%x, dtq free/chip: %d/0x%x, hwslist: 0x%x\n",
 1618     sc->sc_dev.dv_xname, sc->drq_free, sc->drq_chip,
 1619     sc->dtq_free, sc->dtq_chip, sc->hwslistp);
 1620 #endif
 1621 
 1622   for (slot = 0 ; slot < EN_NTX ; slot++) {
 1623     sc->txslot[slot].bfree = EN_TXSZ * 1024;
 1624     EN_WRITE(sc, MIDX_READPTR(slot), 0);
 1625     EN_WRITE(sc, MIDX_DESCSTART(slot), 0);
 1626     loc = sc->txslot[slot].cur = sc->txslot[slot].start;
 1627     loc = loc - MID_RAMOFF;
 1628     loc = (loc & ~((EN_TXSZ*1024) - 1)) >> 2; /* mask, cvt to words */
 1629     loc = loc >> MIDV_LOCTOPSHFT;       /* top 11 bits */
 1630     EN_WRITE(sc, MIDX_PLACE(slot), MIDX_MKPLACE(en_k2sz(EN_TXSZ), loc));
 1631 #ifdef EN_DEBUG
 1632     printf("%s: tx%d: place 0x%x\n", sc->sc_dev.dv_xname,  slot,
 1633         EN_READ(sc, MIDX_PLACE(slot)));
 1634 #endif
 1635   }
 1636 
 1637   /*
 1638    * enable!
 1639    */
 1640 
 1641   EN_WRITE(sc, MID_INTENA, MID_INT_TX|MID_INT_DMA_OVR|MID_INT_IDENT|
 1642         MID_INT_LERR|MID_INT_DMA_ERR|MID_INT_DMA_RX|MID_INT_DMA_TX|
 1643         MID_INT_SERVICE| /* >>> MID_INT_SUNI| XXXCDC<<< */ MID_INT_STATS);
 1644   EN_WRITE(sc, MID_MAST_CSR, MID_SETIPL(sc->ipl)|MID_MCSR_ENDMA|
 1645         MID_MCSR_ENTX|MID_MCSR_ENRX);
 1646 
 1647 }
 1648 
 1649 
 1650 /*
 1651  * en_loadvc: load a vc tab entry from a slot
 1652  */
 1653 
 1654 STATIC void en_loadvc(sc, vc)
 1655 
 1656 struct en_softc *sc;
 1657 int vc;
 1658 
 1659 {
 1660   int slot;
 1661   u_int32_t reg = EN_READ(sc, MID_VC(vc));
 1662 
 1663   reg = MIDV_SETMODE(reg, MIDV_TRASH);
 1664   EN_WRITE(sc, MID_VC(vc), reg);
 1665   DELAY(27);
 1666 
 1667   if ((slot = sc->rxvc2slot[vc]) == RX_NONE)
 1668     return;
 1669 
 1670   /* no need to set CRC */
 1671   EN_WRITE(sc, MID_DST_RP(vc), 0);      /* read pointer = 0, desc. start = 0 */
 1672   EN_WRITE(sc, MID_WP_ST_CNT(vc), 0);   /* write pointer = 0 */
 1673   EN_WRITE(sc, MID_VC(vc), sc->rxslot[slot].mode);  /* set mode, size, loc */
 1674   sc->rxslot[slot].cur = sc->rxslot[slot].start;
 1675 
 1676 #ifdef EN_DEBUG
 1677     printf("%s: rx%d: assigned to VCI %d\n", sc->sc_dev.dv_xname, slot, vc);
 1678 #endif
 1679 }
 1680 
 1681 
 1682 /*
 1683  * en_start: start transmitting the next packet that needs to go out
 1684  * if there is one.    note that atm_output() has already splnet()'d us.
 1685  */
 1686 
 1687 STATIC void en_start(ifp)
 1688 
 1689 struct ifnet *ifp;
 1690 
 1691 {
 1692 #ifdef MISSING_IF_SOFTC
 1693     struct en_softc *sc = (struct en_softc *) en_cd.cd_devs[ifp->if_unit];
 1694 #else
 1695     struct en_softc *sc = (struct en_softc *) ifp->if_softc;
 1696 #endif
 1697     struct mbuf *m, *lastm, *prev;
 1698     struct atm_pseudohdr *ap, *new_ap;
 1699     int txchan, mlen, got, need, toadd, cellcnt, first;
 1700     u_int32_t atm_vpi, atm_vci, atm_flags, *dat, aal;
 1701     u_int8_t *cp;
 1702 
 1703     if ((ifp->if_flags & IFF_RUNNING) == 0)
 1704         return;
 1705 
 1706     /*
 1707      * remove everything from interface queue since we handle all queueing
 1708      * locally ...
 1709      */
 1710 
 1711     while (1) {
 1712 
 1713       IFQ_DEQUEUE(&ifp->if_snd, m);
 1714       if (m == NULL)
 1715         return;         /* EMPTY: >>> exit here <<< */
 1716 
 1717       /*
 1718        * calculate size of packet (in bytes)
 1719        * also, if we are not doing transmit DMA we eliminate all stupid
 1720        * (non-word) alignments here using en_mfix().   calls to en_mfix()
 1721        * seem to be due to tcp retransmits for the most part.
 1722        *
 1723        * after this loop mlen total length of mbuf chain (including atm_ph),
 1724        * and lastm is a pointer to the last mbuf on the chain.
 1725        */
 1726 
 1727       lastm = m;
 1728       mlen = 0;
 1729       prev = NULL;
 1730       while (1) {
 1731         /* no DMA? */
 1732         if ((!sc->is_adaptec && EN_ENIDMAFIX) || EN_NOTXDMA || !en_dma) {
 1733           if ( (mtod(lastm, unsigned long) % sizeof(u_int32_t)) != 0 ||
 1734             ((lastm->m_len % sizeof(u_int32_t)) != 0 && lastm->m_next)) {
 1735             first = (lastm == m);
 1736             if (en_mfix(sc, &lastm, prev) == 0) {       /* failed? */
 1737               m_freem(m);
 1738               m = NULL;
 1739               break;
 1740             }
 1741             if (first)
 1742               m = lastm;                /* update */
 1743           }
 1744           prev = lastm;
 1745         }
 1746         mlen += lastm->m_len;
 1747         if (lastm->m_next == NULL)
 1748           break;
 1749         lastm = lastm->m_next;
 1750       }
 1751 
 1752       if (m == NULL)            /* happens only if mfix fails */
 1753         continue;
 1754 
 1755       ap = mtod(m, struct atm_pseudohdr *);
 1756 
 1757       atm_vpi = ATM_PH_VPI(ap);
 1758       atm_vci = ATM_PH_VCI(ap);
 1759       atm_flags = ATM_PH_FLAGS(ap) & ~(EN_OBHDR|EN_OBTRL);
 1760       aal = ((atm_flags & ATM_PH_AAL5) != 0)
 1761                         ? MID_TBD_AAL5 : MID_TBD_NOAAL5;
 1762 
 1763       /*
 1764        * check that vpi/vci is one we can use
 1765        */
 1766 
 1767       if (atm_vpi || atm_vci >= MID_N_VC) {
 1768         printf("%s: output vpi=%d, vci=%d out of card range, dropping...\n",
 1769                 sc->sc_dev.dv_xname, atm_vpi, atm_vci);
 1770         m_freem(m);
 1771         continue;
 1772       }
 1773 
 1774       /*
 1775        * computing how much padding we need on the end of the mbuf, then
 1776        * see if we can put the TBD at the front of the mbuf where the
 1777        * link header goes (well behaved protocols will reserve room for us).
 1778        * last, check if room for PDU tail.
 1779        *
 1780        * got = number of bytes of data we have
 1781        * cellcnt = number of cells in this mbuf
 1782        * need = number of bytes of data + padding we need (excludes TBD)
 1783        * toadd = number of bytes of data we need to add to end of mbuf,
 1784        *        [including AAL5 PDU, if AAL5]
 1785        */
 1786 
 1787       got = mlen - sizeof(struct atm_pseudohdr);
 1788       toadd = (aal == MID_TBD_AAL5) ? MID_PDU_SIZE : 0; /* PDU */
 1789       cellcnt = (got + toadd + (MID_ATMDATASZ - 1)) / MID_ATMDATASZ;
 1790       need = cellcnt * MID_ATMDATASZ;
 1791       toadd = need - got;               /* recompute, including zero padding */
 1792 
 1793 #ifdef EN_DEBUG
 1794       printf("%s: txvci%d: mlen=%d, got=%d, need=%d, toadd=%d, cell#=%d\n",
 1795         sc->sc_dev.dv_xname, atm_vci, mlen, got, need, toadd, cellcnt);
 1796       printf("     leading_space=%d, trailing_space=%d\n",
 1797         M_LEADINGSPACE(m), M_TRAILINGSPACE(lastm));
 1798 #endif
 1799 
 1800 #ifdef EN_MBUF_OPT
 1801 
 1802       /*
 1803        * note: external storage (M_EXT) can be shared between mbufs
 1804        * to avoid copying (see m_copym()).    this means that the same
 1805        * data buffer could be shared by several mbufs, and thus it isn't
 1806        * a good idea to try and write TBDs or PDUs to M_EXT data areas.
 1807        */
 1808 
 1809       if (M_LEADINGSPACE(m) >= MID_TBD_SIZE && (m->m_flags & M_EXT) == 0) {
 1810         m->m_data -= MID_TBD_SIZE;
 1811         m->m_len += MID_TBD_SIZE;
 1812         mlen += MID_TBD_SIZE;
 1813         new_ap = mtod(m, struct atm_pseudohdr *);
 1814         *new_ap = *ap;                  /* move it back */
 1815         ap = new_ap;
 1816         dat = ((u_int32_t *) ap) + 1;
 1817         /* make sure the TBD is in proper byte order */
 1818         *dat++ = htonl(MID_TBD_MK1(aal, sc->txspeed[atm_vci], cellcnt));
 1819         *dat = htonl(MID_TBD_MK2(atm_vci, 0, 0));
 1820         atm_flags |= EN_OBHDR;
 1821       }
 1822 
 1823       if (toadd && (lastm->m_flags & M_EXT) == 0 &&
 1824                                         M_TRAILINGSPACE(lastm) >= toadd) {
 1825         cp = mtod(lastm, u_int8_t *) + lastm->m_len;
 1826         lastm->m_len += toadd;
 1827         mlen += toadd;
 1828         if (aal == MID_TBD_AAL5) {
 1829           memset(cp, 0, toadd - MID_PDU_SIZE);
 1830           dat = (u_int32_t *)(cp + toadd - MID_PDU_SIZE);
 1831           /* make sure the PDU is in proper byte order */
 1832           *dat = htonl(MID_PDU_MK1(0, 0, got));
 1833         } else {
 1834           memset(cp, 0, toadd);
 1835         }
 1836         atm_flags |= EN_OBTRL;
 1837       }
 1838       ATM_PH_FLAGS(ap) = atm_flags;     /* update EN_OBHDR/EN_OBTRL bits */
 1839 #endif  /* EN_MBUF_OPT */
 1840 
 1841       /*
 1842        * get assigned channel (will be zero unless txspeed[atm_vci] is set)
 1843        */
 1844 
 1845       txchan = sc->txvc2slot[atm_vci];
 1846 
 1847       if (sc->txslot[txchan].mbsize > EN_TXHIWAT) {
 1848         EN_COUNT(sc->txmbovr);
 1849         m_freem(m);
 1850 #ifdef EN_DEBUG
 1851         printf("%s: tx%d: buffer space shortage\n", sc->sc_dev.dv_xname,
 1852                 txchan);
 1853 #endif
 1854         continue;
 1855       }
 1856 
 1857       sc->txslot[txchan].mbsize += mlen;
 1858 
 1859 #ifdef EN_DEBUG
 1860       printf("%s: tx%d: VPI=%d, VCI=%d, FLAGS=0x%x, speed=0x%x\n",
 1861         sc->sc_dev.dv_xname, txchan, atm_vpi, atm_vci, atm_flags,
 1862         sc->txspeed[atm_vci]);
 1863       printf("     adjusted mlen=%d, mbsize=%d\n", mlen,
 1864                 sc->txslot[txchan].mbsize);
 1865 #endif
 1866 
 1867       IF_ENQUEUE(&sc->txslot[txchan].q, m);
 1868       en_txdma(sc, txchan);
 1869 
 1870   }
 1871   /*NOTREACHED*/
 1872 }
 1873 
 1874 
 1875 /*
 1876  * en_mfix: fix a stupid mbuf
 1877  */
 1878 
 1879 #ifndef __FreeBSD__
 1880 
 1881 STATIC int en_mfix(sc, mm, prev)
 1882 
 1883 struct en_softc *sc;
 1884 struct mbuf **mm, *prev;
 1885 
 1886 {
 1887   struct mbuf *m, *new;
 1888   u_char *d, *cp;
 1889   int off;
 1890   struct mbuf *nxt;
 1891 
 1892   m = *mm;
 1893 
 1894   EN_COUNT(sc->mfix);                   /* count # of calls */
 1895 #ifdef EN_DEBUG
 1896   printf("%s: mfix mbuf m_data=%p, m_len=%d\n", sc->sc_dev.dv_xname,
 1897         m->m_data, m->m_len);
 1898 #endif
 1899 
 1900   d = mtod(m, u_char *);
 1901   off = ((unsigned long) d) % sizeof(u_int32_t);
 1902 
 1903   if (off) {
 1904     if ((m->m_flags & M_EXT) == 0) {
 1905       memmove(d - off, d, m->m_len);   /* ALIGN! (with costly data copy...) */
 1906       d -= off;
 1907       m->m_data = (caddr_t)d;
 1908     } else {
 1909       /* can't write to an M_EXT mbuf since it may be shared */
 1910       MGET(new, M_DONTWAIT, MT_DATA);
 1911       if (!new) {
 1912         EN_COUNT(sc->mfixfail);
 1913         return(0);
 1914       }
 1915       MCLGET(new, M_DONTWAIT);
 1916       if ((new->m_flags & M_EXT) == 0) {
 1917         m_free(new);
 1918         EN_COUNT(sc->mfixfail);
 1919         return(0);
 1920       }
 1921       memcpy(new->m_data, d, m->m_len); /* ALIGN! (with costly data copy...) */
 1922       new->m_len = m->m_len;
 1923       new->m_next = m->m_next;
 1924       if (prev)
 1925         prev->m_next = new;
 1926       m_free(m);
 1927       *mm = m = new;    /* note: 'd' now invalid */
 1928     }
 1929   }
 1930 
 1931   off = m->m_len % sizeof(u_int32_t);
 1932   if (off == 0)
 1933     return(1);
 1934 
 1935   d = mtod(m, u_char *) + m->m_len;
 1936   off = sizeof(u_int32_t) - off;
 1937 
 1938   nxt = m->m_next;
 1939   while (off--) {
 1940     for ( ; nxt != NULL && nxt->m_len == 0 ; nxt = nxt->m_next)
 1941       /*null*/;
 1942     if (nxt == NULL) {          /* out of data, zero fill */
 1943       *d++ = 0;
 1944       continue;                 /* next "off" */
 1945     }
 1946     cp = mtod(nxt, u_char *);
 1947     *d++ = *cp++;
 1948     m->m_len++;
 1949     nxt->m_len--;
 1950     nxt->m_data = (caddr_t)cp;
 1951   }
 1952   return(1);
 1953 }
 1954 
 1955 #else /* __FreeBSD__ */
 1956 
 1957 STATIC int en_makeexclusive(struct en_softc *, struct mbuf **, struct mbuf *);
 1958 
 1959 STATIC int en_makeexclusive(sc, mm, prev)
 1960     struct en_softc *sc;
 1961     struct mbuf **mm, *prev;
 1962 {
 1963     struct mbuf *m, *new;
 1964 
 1965     m = *mm;
 1966 
 1967     if (m->m_flags & M_EXT) {
 1968         if (m->m_ext.ext_free) {
 1969             /* external buffer isn't an ordinary mbuf cluster! */
 1970             printf("%s: mfix: special buffer! can't make a copy!\n",
 1971                    sc->sc_dev.dv_xname);
 1972             return (0);
 1973         }
 1974 
 1975         if (mclrefcnt[mtocl(m->m_ext.ext_buf)] > 1) {
 1976             /* make a real copy of the M_EXT mbuf since it is shared */
 1977             MGET(new, M_DONTWAIT, MT_DATA);
 1978             if (!new) {
 1979                 EN_COUNT(sc->mfixfail);
 1980                 return(0);
 1981             }
 1982             if (m->m_flags & M_PKTHDR)
 1983                 M_COPY_PKTHDR(new, m);
 1984             MCLGET(new, M_DONTWAIT);
 1985             if ((new->m_flags & M_EXT) == 0) {
 1986                 m_free(new);
 1987                 EN_COUNT(sc->mfixfail);
 1988                 return(0);
 1989             }
 1990             memcpy(new->m_data, m->m_data, m->m_len);
 1991             new->m_len = m->m_len;
 1992             new->m_next = m->m_next;
 1993             if (prev)
 1994                 prev->m_next = new;
 1995             m_free(m);
 1996             *mm = new;
 1997         }
 1998         else {
 1999             /* the buffer is not shared, align the data offset using
 2000                this buffer. */
 2001             u_char *d = mtod(m, u_char *);
 2002             int off = ((u_long)d) % sizeof(u_int32_t);
 2003 
 2004             if (off > 0) {
 2005                 memmove(d - off, d, m->m_len);
 2006                 m->m_data = (caddr_t)d - off;
 2007             }
 2008         }
 2009     }
 2010     return (1);
 2011 }
 2012 
 2013 STATIC int en_mfix(sc, mm, prev)
 2014 
 2015 struct en_softc *sc;
 2016 struct mbuf **mm, *prev;
 2017 
 2018 {
 2019   struct mbuf *m;
 2020   u_char *d, *cp;
 2021   int off;
 2022   struct mbuf *nxt;
 2023 
 2024   m = *mm;
 2025 
 2026   EN_COUNT(sc->mfix);                   /* count # of calls */
 2027 #ifdef EN_DEBUG
 2028   printf("%s: mfix mbuf m_data=0x%x, m_len=%d\n", sc->sc_dev.dv_xname,
 2029         m->m_data, m->m_len);
 2030 #endif
 2031 
 2032   d = mtod(m, u_char *);
 2033   off = ((unsigned long) d) % sizeof(u_int32_t);
 2034 
 2035   if (off) {
 2036     if ((m->m_flags & M_EXT) == 0) {
 2037       memmove(d - off, d, m->m_len);   /* ALIGN! (with costly data copy...) */
 2038       d -= off;
 2039       m->m_data = (caddr_t)d;
 2040     } else {
 2041       /* can't write to an M_EXT mbuf since it may be shared */
 2042       if (en_makeexclusive(sc, &m, prev) == 0)
 2043           return (0);
 2044       *mm = m;  /* note: 'd' now invalid */
 2045     }
 2046   }
 2047 
 2048   off = m->m_len % sizeof(u_int32_t);
 2049   if (off == 0)
 2050     return(1);
 2051 
 2052   if (m->m_flags & M_EXT) {
 2053       /* can't write to an M_EXT mbuf since it may be shared */
 2054       if (en_makeexclusive(sc, &m, prev) == 0)
 2055           return (0);
 2056       *mm = m;  /* note: 'd' now invalid */
 2057   }
 2058 
 2059   d = mtod(m, u_char *) + m->m_len;
 2060   off = sizeof(u_int32_t) - off;
 2061 
 2062   nxt = m->m_next;
 2063   while (off--) {
 2064     if (nxt != NULL && nxt->m_len == 0) {
 2065         /* remove an empty mbuf.  this avoids odd byte padding to an empty
 2066            last mbuf.  */
 2067         m->m_next = nxt = m_free(nxt);
 2068     }
 2069     if (nxt == NULL) {          /* out of data, zero fill */
 2070       *d++ = 0;
 2071       continue;                 /* next "off" */
 2072     }
 2073     cp = mtod(nxt, u_char *);
 2074     *d++ = *cp++;
 2075     m->m_len++;
 2076     nxt->m_len--;
 2077     nxt->m_data = (caddr_t)cp;
 2078   }
 2079   if (nxt != NULL && nxt->m_len == 0)
 2080       m->m_next = m_free(nxt);
 2081   return(1);
 2082 }
 2083 
 2084 #endif /* __FreeBSD__ */
 2085 
 2086 /*
 2087  * en_txdma: start transmit DMA, if possible
 2088  */
 2089 
 2090 STATIC void en_txdma(sc, chan)
 2091 
 2092 struct en_softc *sc;
 2093 int chan;
 2094 
 2095 {
 2096   struct mbuf *tmp;
 2097   struct atm_pseudohdr *ap;
 2098   struct en_launch launch;
 2099   int datalen = 0, dtqneed, len, ncells;
 2100   u_int8_t *cp;
 2101   struct ifnet *ifp;
 2102 
 2103   memset(&launch, 0, sizeof launch);    /* XXX gcc */
 2104 
 2105 #ifdef EN_DEBUG
 2106   printf("%s: tx%d: starting...\n", sc->sc_dev.dv_xname, chan);
 2107 #endif
 2108 
 2109   /*
 2110    * note: now that txlaunch handles non-word aligned/sized requests
 2111    * the only time you can safely set launch.nodma is if you've en_mfix()'d
 2112    * the mbuf chain.    this happens only if EN_NOTXDMA || !en_dma.
 2113    */
 2114 
 2115   launch.nodma = (EN_NOTXDMA || !en_dma);
 2116 
 2117 again:
 2118 
 2119   /*
 2120    * get an mbuf waiting for DMA
 2121    */
 2122 
 2123   launch.t = sc->txslot[chan].q.ifq_head; /* peek at head of queue */
 2124 
 2125   if (launch.t == NULL) {
 2126 #ifdef EN_DEBUG
 2127     printf("%s: tx%d: ...done!\n", sc->sc_dev.dv_xname, chan);
 2128 #endif
 2129     return;     /* >>> exit here if no data waiting for DMA <<< */
 2130   }
 2131 
 2132   /*
 2133    * get flags, vci
 2134    *
 2135    * note: launch.need = # bytes we need to get on the card
 2136    *       dtqneed = # of DTQs we need for this packet
 2137    *       launch.mlen = # of bytes in in mbuf chain (<= launch.need)
 2138    */
 2139 
 2140   ap = mtod(launch.t, struct atm_pseudohdr *);
 2141   launch.atm_vci = ATM_PH_VCI(ap);
 2142   launch.atm_flags = ATM_PH_FLAGS(ap);
 2143   launch.aal = ((launch.atm_flags & ATM_PH_AAL5) != 0) ?
 2144                 MID_TBD_AAL5 : MID_TBD_NOAAL5;
 2145 
 2146   /*
 2147    * XXX: have to recompute the length again, even though we already did
 2148    * it in en_start().   might as well compute dtqneed here as well, so
 2149    * this isn't that bad.
 2150    */
 2151 
 2152   if ((launch.atm_flags & EN_OBHDR) == 0) {
 2153     dtqneed = 1;                /* header still needs to be added */
 2154     launch.need = MID_TBD_SIZE; /* not included with mbuf */
 2155   } else {
 2156     dtqneed = 0;                /* header on-board, DMA with mbuf */
 2157     launch.need = 0;
 2158   }
 2159 
 2160   launch.mlen = 0;
 2161   for (tmp = launch.t ; tmp != NULL ; tmp = tmp->m_next) {
 2162     len = tmp->m_len;
 2163     launch.mlen += len;
 2164     cp = mtod(tmp, u_int8_t *);
 2165     if (tmp == launch.t) {
 2166       len -= sizeof(struct atm_pseudohdr); /* don't count this! */
 2167       cp += sizeof(struct atm_pseudohdr);
 2168     }
 2169     launch.need += len;
 2170     if (len == 0)
 2171       continue;                 /* atm_pseudohdr alone in first mbuf */
 2172 
 2173     dtqneed += en_dqneed(sc, (caddr_t) cp, len, 1);
 2174   }
 2175 
 2176   if ((launch.need % sizeof(u_int32_t)) != 0)
 2177     dtqneed++;                  /* need DTQ to FLUSH internal buffer */
 2178 
 2179   if ((launch.atm_flags & EN_OBTRL) == 0) {
 2180     if (launch.aal == MID_TBD_AAL5) {
 2181       datalen = launch.need - MID_TBD_SIZE;
 2182       launch.need += MID_PDU_SIZE;              /* AAL5: need PDU tail */
 2183     }
 2184     dtqneed++;                  /* need to work on the end a bit */
 2185   }
 2186 
 2187   /*
 2188    * finish calculation of launch.need (need to figure out how much padding
 2189    * we will need).   launch.need includes MID_TBD_SIZE, but we need to
 2190    * remove that to so we can round off properly.     we have to add
 2191    * MID_TBD_SIZE back in after calculating ncells.
 2192    */
 2193 
 2194   launch.need = roundup(launch.need - MID_TBD_SIZE, MID_ATMDATASZ);
 2195   ncells = launch.need / MID_ATMDATASZ;
 2196   launch.need += MID_TBD_SIZE;
 2197 
 2198   if (launch.need > EN_TXSZ * 1024) {
 2199     printf("%s: tx%d: packet larger than xmit buffer (%d > %d)\n",
 2200       sc->sc_dev.dv_xname, chan, launch.need, EN_TXSZ * 1024);
 2201     goto dequeue_drop;
 2202   }
 2203 
 2204   /*
 2205    * note: note that we cannot totally fill the circular buffer (i.e.
 2206    * we can't use up all of the remaining sc->txslot[chan].bfree free
 2207    * bytes) because that would cause the circular buffer read pointer
 2208    * to become equal to the write pointer, thus signaling 'empty buffer'
 2209    * to the hardware and stopping the transmitter.
 2210    */
 2211   if (launch.need >= sc->txslot[chan].bfree) {
 2212     EN_COUNT(sc->txoutspace);
 2213 #ifdef EN_DEBUG
 2214     printf("%s: tx%d: out of transmit space\n", sc->sc_dev.dv_xname, chan);
 2215 #endif
 2216     return;             /* >>> exit here if out of obmem buffer space <<< */
 2217   }
 2218 
 2219   /*
 2220    * ensure we have enough dtqs to go, if not, wait for more.
 2221    */
 2222 
 2223   if (launch.nodma) {
 2224     dtqneed = 1;
 2225   }
 2226   if (dtqneed > sc->dtq_free) {
 2227     sc->need_dtqs = 1;
 2228     EN_COUNT(sc->txdtqout);
 2229 #ifdef EN_DEBUG
 2230     printf("%s: tx%d: out of transmit DTQs\n", sc->sc_dev.dv_xname, chan);
 2231 #endif
 2232     return;             /* >>> exit here if out of dtqs <<< */
 2233   }
 2234 
 2235   /*
 2236    * it is a go, commit!  dequeue mbuf start working on the xfer.
 2237    */
 2238 
 2239   IF_DEQUEUE(&sc->txslot[chan].q, tmp);
 2240 #ifdef EN_DIAG
 2241   if (launch.t != tmp)
 2242     panic("en dequeue");
 2243 #endif /* EN_DIAG */
 2244 
 2245   /*
 2246    * launch!
 2247    */
 2248 
 2249   EN_COUNT(sc->launch);
 2250 #ifdef ATM_PVCEXT
 2251   /* if there's a subinterface for this vci, override ifp. */
 2252   ifp = en_vci2ifp(sc, launch.atm_vci);
 2253 #else
 2254   ifp = &sc->enif;
 2255 #endif
 2256   ifp->if_opackets++;
 2257 
 2258   if ((launch.atm_flags & EN_OBHDR) == 0) {
 2259     EN_COUNT(sc->lheader);
 2260     /* store tbd1/tbd2 in host byte order */
 2261     launch.tbd1 = MID_TBD_MK1(launch.aal, sc->txspeed[launch.atm_vci], ncells);
 2262     launch.tbd2 = MID_TBD_MK2(launch.atm_vci, 0, 0);
 2263   }
 2264   if ((launch.atm_flags & EN_OBTRL) == 0 && launch.aal == MID_TBD_AAL5) {
 2265     EN_COUNT(sc->ltail);
 2266     launch.pdu1 = MID_PDU_MK1(0, 0, datalen);  /* host byte order */
 2267   }
 2268 
 2269   en_txlaunch(sc, chan, &launch);
 2270 
 2271 #if NBPFILTER > 0
 2272   if (ifp->if_bpf) {
 2273       /*
 2274        * adjust the top of the mbuf to skip the pseudo atm header
 2275        * (and TBD, if present) before passing the packet to bpf,
 2276        * restore it afterwards.
 2277        */
 2278       int size = sizeof(struct atm_pseudohdr);
 2279       if (launch.atm_flags & EN_OBHDR)
 2280           size += MID_TBD_SIZE;
 2281 
 2282       launch.t->m_data += size;
 2283       launch.t->m_len -= size;
 2284 
 2285       BPF_MTAP(ifp, launch.t);
 2286 
 2287       launch.t->m_data -= size;
 2288       launch.t->m_len += size;
 2289   }
 2290 #endif /* NBPFILTER > 0 */
 2291   /*
 2292    * do some housekeeping and get the next packet
 2293    */
 2294 
 2295   sc->txslot[chan].bfree -= launch.need;
 2296   IF_ENQUEUE(&sc->txslot[chan].indma, launch.t);
 2297   goto again;
 2298 
 2299   /*
 2300    * END of txdma loop!
 2301    */
 2302 
 2303   /*
 2304    * error handles
 2305    */
 2306 
 2307 dequeue_drop:
 2308   IF_DEQUEUE(&sc->txslot[chan].q, tmp);
 2309   if (launch.t != tmp)
 2310     panic("en dequeue drop");
 2311   m_freem(launch.t);
 2312   sc->txslot[chan].mbsize -= launch.mlen;
 2313   goto again;
 2314 }
 2315 
 2316 
 2317 /*
 2318  * en_txlaunch: launch an mbuf into the DMA pool!
 2319  */
 2320 
 2321 STATIC void en_txlaunch(sc, chan, l)
 2322 
 2323 struct en_softc *sc;
 2324 int chan;
 2325 struct en_launch *l;
 2326 
 2327 {
 2328   struct mbuf *tmp;
 2329   u_int32_t cur = sc->txslot[chan].cur,
 2330             start = sc->txslot[chan].start,
 2331             stop = sc->txslot[chan].stop,
 2332             dma, *data, *datastop, count, bcode;
 2333   int pad, addtail, need, len, needalign, cnt, end, mx;
 2334 
 2335 
 2336  /*
 2337   * vars:
 2338   *   need = # bytes card still needs (decr. to zero)
 2339   *   len = # of bytes left in current mbuf
 2340   *   cur = our current pointer
 2341   *   dma = last place we programmed into the DMA
 2342   *   data = pointer into data area of mbuf that needs to go next
 2343   *   cnt = # of bytes to transfer in this DTQ
 2344   *   bcode/count = DMA burst code, and chip's version of cnt
 2345   *
 2346   *   a single buffer can require up to 5 DTQs depending on its size
 2347   *   and alignment requirements.   the 5 possible requests are:
 2348   *   [1] 1, 2, or 3 byte DMA to align src data pointer to word boundary
 2349   *   [2] alburst DMA to align src data pointer to bestburstlen
 2350   *   [3] 1 or more bestburstlen DMAs
 2351   *   [4] clean up burst (to last word boundary)
 2352   *   [5] 1, 2, or 3 byte final clean up DMA
 2353   */
 2354 
 2355  need = l->need;
 2356  dma = cur;
 2357  addtail = (l->atm_flags & EN_OBTRL) == 0;      /* add a tail? */
 2358 
 2359 #ifdef EN_DIAG
 2360   if ((need - MID_TBD_SIZE) % MID_ATMDATASZ)
 2361     printf("%s: tx%d: bogus transmit needs (%d)\n", sc->sc_dev.dv_xname, chan,
 2362                 need);
 2363 #endif
 2364 #ifdef EN_DEBUG
 2365   printf("%s: tx%d: launch mbuf %p!   cur=0x%x[%d], need=%d, addtail=%d\n",
 2366         sc->sc_dev.dv_xname, chan, l->t, cur, (cur-start)/4, need, addtail);
 2367   count = EN_READ(sc, MIDX_PLACE(chan));
 2368   printf("     HW: base_address=0x%x, size=%d, read=%d, descstart=%d\n",
 2369         MIDX_BASE(count), MIDX_SZ(count), EN_READ(sc, MIDX_READPTR(chan)),
 2370         EN_READ(sc, MIDX_DESCSTART(chan)));
 2371 #endif
 2372 
 2373  /*
 2374   * do we need to insert the TBD by hand?
 2375   * note that tbd1/tbd2/pdu1 are in host byte order.
 2376   */
 2377 
 2378   if ((l->atm_flags & EN_OBHDR) == 0) {
 2379 #ifdef EN_DEBUG
 2380     printf("%s: tx%d: insert header 0x%x 0x%x\n", sc->sc_dev.dv_xname,
 2381         chan, l->tbd1, l->tbd2);
 2382 #endif
 2383     EN_WRITE(sc, cur, l->tbd1);
 2384     EN_WRAPADD(start, stop, cur, 4);
 2385     EN_WRITE(sc, cur, l->tbd2);
 2386     EN_WRAPADD(start, stop, cur, 4);
 2387     need -= 8;
 2388   }
 2389 
 2390   /*
 2391    * now do the mbufs...
 2392    */
 2393 
 2394   for (tmp = l->t ; tmp != NULL ; tmp = tmp->m_next) {
 2395 
 2396     /* get pointer to data and length */
 2397     data = mtod(tmp, u_int32_t *);
 2398     len = tmp->m_len;
 2399     if (tmp == l->t) {
 2400       data += sizeof(struct atm_pseudohdr)/sizeof(u_int32_t);
 2401       len -= sizeof(struct atm_pseudohdr);
 2402     }
 2403 
 2404     /* now, determine if we should copy it */
 2405     if (l->nodma || (len < EN_MINDMA &&
 2406        (len % 4) == 0 && ((unsigned long) data % 4) == 0 && (cur % 4) == 0)) {
 2407 
 2408       /*
 2409        * roundup len: the only time this will change the value of len
 2410        * is when l->nodma is true, tmp is the last mbuf, and there is
 2411        * a non-word number of bytes to transmit.   in this case it is
 2412        * safe to round up because we've en_mfix'd the mbuf (so the first
 2413        * byte is word aligned there must be enough free bytes at the end
 2414        * to round off to the next word boundary)...
 2415        */
 2416       len = roundup(len, sizeof(u_int32_t));
 2417       datastop = data + (len / sizeof(u_int32_t));
 2418       /* copy loop: preserve byte order!!!  use WRITEDAT */
 2419       while (data != datastop) {
 2420         EN_WRITEDAT(sc, cur, *data);
 2421         data++;
 2422         EN_WRAPADD(start, stop, cur, 4);
 2423       }
 2424       need -= len;
 2425 #ifdef EN_DEBUG
 2426       printf("%s: tx%d: copied %d bytes (%d left, cur now 0x%x)\n",
 2427                 sc->sc_dev.dv_xname, chan, len, need, cur);
 2428 #endif
 2429       continue;         /* continue on to next mbuf */
 2430     }
 2431 
 2432     /* going to do DMA, first make sure the dtq is in sync. */
 2433     if (dma != cur) {
 2434       EN_DTQADD(sc, WORD_IDX(start,cur), chan, MIDDMA_JK, 0, 0, 0);
 2435 #ifdef EN_DEBUG
 2436       printf("%s: tx%d: dtq_sync: advance pointer to %d\n",
 2437                 sc->sc_dev.dv_xname, chan, cur);
 2438 #endif
 2439     }
 2440 
 2441     /*
 2442      * if this is the last buffer, and it looks like we are going to need to
 2443      * flush the internal buffer, can we extend the length of this mbuf to
 2444      * avoid the FLUSH?
 2445      */
 2446 
 2447     if (tmp->m_next == NULL) {
 2448       cnt = (need - len) % sizeof(u_int32_t);
 2449       if (cnt && M_TRAILINGSPACE(tmp) >= cnt)
 2450         len += cnt;                     /* pad for FLUSH */
 2451     }
 2452 
 2453 #if !defined(MIDWAY_ENIONLY)
 2454 
 2455     /*
 2456      * the adaptec DMA engine is smart and handles everything for us.
 2457      */
 2458 
 2459     if (sc->is_adaptec) {
 2460       /* need to DMA "len" bytes out to card */
 2461       need -= len;
 2462       EN_WRAPADD(start, stop, cur, len);
 2463 #ifdef EN_DEBUG
 2464       printf("%s: tx%d: adp_dma %d bytes (%d left, cur now 0x%x)\n",
 2465               sc->sc_dev.dv_xname, chan, len, need, cur);
 2466 #endif
 2467       end = (need == 0) ? MID_DMA_END : 0;
 2468       EN_DTQADD(sc, len, chan, 0, vtophys((vaddr_t)data), l->mlen, end);
 2469       if (end)
 2470         goto done;
 2471       dma = cur;        /* update DMA pointer */
 2472       continue;
 2473     }
 2474 #endif /* !MIDWAY_ENIONLY */
 2475 
 2476 #if !defined(MIDWAY_ADPONLY)
 2477 
 2478     /*
 2479      * the ENI DMA engine is not so smart and need more help from us
 2480      */
 2481 
 2482     /* do we need to do a DMA op to align to word boundary? */
 2483     needalign = (unsigned long) data % sizeof(u_int32_t);
 2484     if (needalign) {
 2485       EN_COUNT(sc->headbyte);
 2486       cnt = sizeof(u_int32_t) - needalign;
 2487       if (cnt == 2 && len >= cnt) {
 2488         count = 1;
 2489         bcode = MIDDMA_2BYTE;
 2490       } else {
 2491         cnt = min(cnt, len);            /* prevent overflow */
 2492         count = cnt;
 2493         bcode = MIDDMA_BYTE;
 2494       }
 2495       need -= cnt;
 2496       EN_WRAPADD(start, stop, cur, cnt);
 2497 #ifdef EN_DEBUG
 2498       printf("%s: tx%d: small al_dma %d bytes (%d left, cur now 0x%x)\n",
 2499               sc->sc_dev.dv_xname, chan, cnt, need, cur);
 2500 #endif
 2501       len -= cnt;
 2502       end = (need == 0) ? MID_DMA_END : 0;
 2503       EN_DTQADD(sc, count, chan, bcode, vtophys((vaddr_t)data), l->mlen, end);
 2504       if (end)
 2505         goto done;
 2506       data = (u_int32_t *) ((u_char *)data + cnt);
 2507     }
 2508 
 2509     /* do we need to do a DMA op to align? */
 2510     if (sc->alburst &&
 2511         (needalign = (((unsigned long) data) & sc->bestburstmask)) != 0
 2512         && len >= sizeof(u_int32_t)) {
 2513       cnt = sc->bestburstlen - needalign;
 2514       mx = len & ~(sizeof(u_int32_t)-1);        /* don't go past end */
 2515       if (cnt > mx) {
 2516         cnt = mx;
 2517         count = cnt / sizeof(u_int32_t);
 2518         bcode = MIDDMA_WORD;
 2519       } else {
 2520         count = cnt / sizeof(u_int32_t);
 2521         bcode = en_dmaplan[count].bcode;
 2522         count = cnt >> en_dmaplan[count].divshift;
 2523       }
 2524       need -= cnt;
 2525       EN_WRAPADD(start, stop, cur, cnt);
 2526 #ifdef EN_DEBUG
 2527       printf("%s: tx%d: al_dma %d bytes (%d left, cur now 0x%x)\n",
 2528                 sc->sc_dev.dv_xname, chan, cnt, need, cur);
 2529 #endif
 2530       len -= cnt;
 2531       end = (need == 0) ? MID_DMA_END : 0;
 2532       EN_DTQADD(sc, count, chan, bcode, vtophys((vaddr_t)data), l->mlen, end);
 2533       if (end)
 2534         goto done;
 2535       data = (u_int32_t *) ((u_char *)data + cnt);
 2536     }
 2537 
 2538     /* do we need to do a max-sized burst? */
 2539     if (len >= sc->bestburstlen) {
 2540       count = len >> sc->bestburstshift;
 2541       cnt = count << sc->bestburstshift;
 2542       bcode = sc->bestburstcode;
 2543       need -= cnt;
 2544       EN_WRAPADD(start, stop, cur, cnt);
 2545 #ifdef EN_DEBUG
 2546       printf("%s: tx%d: best_dma %d bytes (%d left, cur now 0x%x)\n",
 2547                 sc->sc_dev.dv_xname, chan, cnt, need, cur);
 2548 #endif
 2549       len -= cnt;
 2550       end = (need == 0) ? MID_DMA_END : 0;
 2551       EN_DTQADD(sc, count, chan, bcode, vtophys((vaddr_t)data), l->mlen, end);
 2552       if (end)
 2553         goto done;
 2554       data = (u_int32_t *) ((u_char *)data + cnt);
 2555     }
 2556 
 2557     /* do we need to do a cleanup burst? */
 2558     cnt = len & ~(sizeof(u_int32_t)-1);
 2559     if (cnt) {
 2560       count = cnt / sizeof(u_int32_t);
 2561       bcode = en_dmaplan[count].bcode;
 2562       count = cnt >> en_dmaplan[count].divshift;
 2563       need -= cnt;
 2564       EN_WRAPADD(start, stop, cur, cnt);
 2565 #ifdef EN_DEBUG
 2566       printf("%s: tx%d: cleanup_dma %d bytes (%d left, cur now 0x%x)\n",
 2567                 sc->sc_dev.dv_xname, chan, cnt, need, cur);
 2568 #endif
 2569       len -= cnt;
 2570       end = (need == 0) ? MID_DMA_END : 0;
 2571       EN_DTQADD(sc, count, chan, bcode, vtophys((vaddr_t)data), l->mlen, end);
 2572       if (end)
 2573         goto done;
 2574       data = (u_int32_t *) ((u_char *)data + cnt);
 2575     }
 2576 
 2577     /* any word fragments left? */
 2578     if (len) {
 2579       EN_COUNT(sc->tailbyte);
 2580       if (len == 2) {
 2581         count = 1;
 2582         bcode = MIDDMA_2BYTE;                 /* use 2byte mode */
 2583       } else {
 2584         count = len;
 2585         bcode = MIDDMA_BYTE;                  /* use 1 byte mode */
 2586       }
 2587       need -= len;
 2588       EN_WRAPADD(start, stop, cur, len);
 2589 #ifdef EN_DEBUG
 2590       printf("%s: tx%d: byte cleanup_dma %d bytes (%d left, cur now 0x%x)\n",
 2591               sc->sc_dev.dv_xname, chan, len, need, cur);
 2592 #endif
 2593       end = (need == 0) ? MID_DMA_END : 0;
 2594       EN_DTQADD(sc, count, chan, bcode, vtophys((vaddr_t)data), l->mlen, end);
 2595       if (end)
 2596         goto done;
 2597     }
 2598 
 2599     dma = cur;          /* update DMA pointer */
 2600 #endif /* !MIDWAY_ADPONLY */
 2601 
 2602   } /* next mbuf, please */
 2603 
 2604   /*
 2605    * all mbuf data has been copied out to the obmem (or set up to be DMAd).
 2606    * if the trailer or padding needs to be put in, do it now.
 2607    *
 2608    * NOTE: experimental results reveal the following fact:
 2609    *   if you DMA "X" bytes to the card, where X is not a multiple of 4,
 2610    *   then the card will internally buffer the last (X % 4) bytes (in
 2611    *   hopes of getting (4 - (X % 4)) more bytes to make a complete word).
 2612    *   it is imporant to make sure we don't leave any important data in
 2613    *   this internal buffer because it is discarded on the last (end) DTQ.
 2614    *   one way to do this is to DMA in (4 - (X % 4)) more bytes to flush
 2615    *   the darn thing out.
 2616    */
 2617 
 2618   if (addtail) {
 2619 
 2620     pad = need % sizeof(u_int32_t);
 2621     if (pad) {
 2622       /*
 2623        * FLUSH internal data buffer.  pad out with random data from the front
 2624        * of the mbuf chain...
 2625        */
 2626       bcode = (sc->is_adaptec) ? 0 : MIDDMA_BYTE;
 2627       EN_COUNT(sc->tailflush);
 2628       EN_WRAPADD(start, stop, cur, pad);
 2629       EN_DTQADD(sc, pad, chan, bcode, vtophys((vaddr_t)l->t->m_data), 0, 0);
 2630       need -= pad;
 2631 #ifdef EN_DEBUG
 2632       printf("%s: tx%d: pad/FLUSH DMA %d bytes (%d left, cur now 0x%x)\n",
 2633                 sc->sc_dev.dv_xname, chan, pad, need, cur);
 2634 #endif
 2635     }
 2636 
 2637     /* copy data */
 2638     pad = need / sizeof(u_int32_t);     /* round *down* */
 2639     if (l->aal == MID_TBD_AAL5)
 2640       pad -= 2;
 2641 #ifdef EN_DEBUG
 2642       printf("%s: tx%d: padding %d bytes (cur now 0x%x)\n",
 2643                 sc->sc_dev.dv_xname, chan, pad * sizeof(u_int32_t), cur);
 2644 #endif
 2645     while (pad--) {
 2646       EN_WRITEDAT(sc, cur, 0);  /* no byte order issues with zero */
 2647       EN_WRAPADD(start, stop, cur, 4);
 2648     }
 2649     if (l->aal == MID_TBD_AAL5) {
 2650       EN_WRITE(sc, cur, l->pdu1); /* in host byte order */
 2651       EN_WRAPADD(start, stop, cur, 8);
 2652     }
 2653   }
 2654 
 2655   if (addtail || dma != cur) {
 2656    /* write final descriptor  */
 2657     EN_DTQADD(sc, WORD_IDX(start,cur), chan, MIDDMA_JK, 0,
 2658                                 l->mlen, MID_DMA_END);
 2659     /* dma = cur; */    /* not necessary since we are done */
 2660   }
 2661 
 2662 done:
 2663   /* update current pointer */
 2664   sc->txslot[chan].cur = cur;
 2665 #ifdef EN_DEBUG
 2666       printf("%s: tx%d: DONE!   cur now = 0x%x\n",
 2667                 sc->sc_dev.dv_xname, chan, cur);
 2668 #endif
 2669 
 2670   return;
 2671 }
 2672 
 2673 
 2674 /*
 2675  * interrupt handler
 2676  */
 2677 
 2678 EN_INTR_TYPE en_intr(arg)
 2679 
 2680 void *arg;
 2681 
 2682 {
 2683   struct en_softc *sc = (struct en_softc *) arg;
 2684   struct mbuf *m;
 2685   struct atm_pseudohdr ah;
 2686   struct ifnet *ifp;
 2687   u_int32_t reg, kick, val, mask, chip, vci, slot, dtq, drq;
 2688   int lcv, idx, need_softserv = 0;
 2689 
 2690   reg = EN_READ(sc, MID_INTACK);
 2691 
 2692   if ((reg & MID_INT_ANY) == 0)
 2693     EN_INTR_RET(0); /* not us */
 2694 
 2695 #ifdef EN_DEBUG
 2696   {
 2697     char sbuf[256];
 2698 
 2699     bitmask_snprintf(reg, MID_INTBITS, sbuf, sizeof(sbuf));
 2700     printf("%s: interrupt=0x%s\n", sc->sc_dev.dv_xname, sbuf);
 2701   }
 2702 #endif
 2703 
 2704   /*
 2705    * unexpected errors that need a reset
 2706    */
 2707 
 2708   if ((reg & (MID_INT_IDENT|MID_INT_LERR|MID_INT_DMA_ERR|MID_INT_SUNI)) != 0) {
 2709     char sbuf[256];
 2710 
 2711     bitmask_snprintf(reg, MID_INTBITS, sbuf, sizeof(sbuf));
 2712     printf("%s: unexpected interrupt=0x%s, resetting card\n",
 2713            sc->sc_dev.dv_xname, sbuf);
 2714 #ifdef EN_DEBUG
 2715 #ifdef DDB
 2716 #ifdef __FreeBSD__
 2717     Debugger("en: unexpected error");
 2718 #else
 2719     Debugger();
 2720 #endif
 2721 #endif  /* DDB */
 2722     sc->enif.if_flags &= ~IFF_RUNNING; /* FREEZE! */
 2723 #else
 2724     en_reset(sc);
 2725     en_init(sc);
 2726 #endif
 2727     EN_INTR_RET(1); /* for us */
 2728   }
 2729 
 2730   /*******************
 2731    * xmit interrupts *
 2732    ******************/
 2733 
 2734   kick = 0;                             /* bitmask of channels to kick */
 2735   if (reg & MID_INT_TX) {               /* TX done! */
 2736 
 2737     /*
 2738      * check for tx complete, if detected then this means that some space
 2739      * has come free on the card.   we must account for it and arrange to
 2740      * kick the channel to life (in case it is stalled waiting on the card).
 2741      */
 2742     for (mask = 1, lcv = 0 ; lcv < EN_NTX ; lcv++, mask = mask * 2) {
 2743       if (reg & MID_TXCHAN(lcv)) {
 2744         kick = kick | mask;     /* want to kick later */
 2745         val = EN_READ(sc, MIDX_READPTR(lcv));   /* current read pointer */
 2746         val = (val * sizeof(u_int32_t)) + sc->txslot[lcv].start;
 2747                                                 /* convert to offset */
 2748         if (val > sc->txslot[lcv].cur)
 2749           sc->txslot[lcv].bfree = val - sc->txslot[lcv].cur;
 2750         else
 2751           sc->txslot[lcv].bfree = (val + (EN_TXSZ*1024)) - sc->txslot[lcv].cur;
 2752 #ifdef EN_DEBUG
 2753         printf("%s: tx%d: transmit done.   %d bytes now free in buffer\n",
 2754                 sc->sc_dev.dv_xname, lcv, sc->txslot[lcv].bfree);
 2755 #endif
 2756       }
 2757     }
 2758   }
 2759 
 2760   if (reg & MID_INT_DMA_TX) {           /* TX DMA done! */
 2761 
 2762   /*
 2763    * check for TX DMA complete, if detected then this means that some DTQs
 2764    * are now free.   it also means some indma mbufs can be freed.
 2765    * if we needed DTQs, kick all channels.
 2766    */
 2767     val = EN_READ(sc, MID_DMA_RDTX);    /* chip's current location */
 2768     idx = MID_DTQ_A2REG(sc->dtq_chip);/* where we last saw chip */
 2769     if (sc->need_dtqs) {
 2770       kick = MID_NTX_CH - 1;            /* assume power of 2, kick all! */
 2771       sc->need_dtqs = 0;                /* recalculated in "kick" loop below */
 2772 #ifdef EN_DEBUG
 2773       printf("%s: cleared need DTQ condition\n", sc->sc_dev.dv_xname);
 2774 #endif
 2775     }
 2776     while (idx != val) {
 2777       sc->dtq_free++;
 2778       if ((dtq = sc->dtq[idx]) != 0) {
 2779         sc->dtq[idx] = 0;       /* don't forget to zero it out when done */
 2780         slot = EN_DQ_SLOT(dtq);
 2781         IF_DEQUEUE(&sc->txslot[slot].indma, m);
 2782         if (!m) panic("enintr: dtqsync");
 2783         sc->txslot[slot].mbsize -= EN_DQ_LEN(dtq);
 2784 #ifdef EN_DEBUG
 2785         printf("%s: tx%d: free %d DMA bytes, mbsize now %d\n",
 2786                 sc->sc_dev.dv_xname, slot, EN_DQ_LEN(dtq),
 2787                 sc->txslot[slot].mbsize);
 2788 #endif
 2789         m_freem(m);
 2790       }
 2791       EN_WRAPADD(0, MID_DTQ_N, idx, 1);
 2792     };
 2793     sc->dtq_chip = MID_DTQ_REG2A(val);  /* sync softc */
 2794   }
 2795 
 2796 
 2797   /*
 2798    * kick xmit channels as needed
 2799    */
 2800 
 2801   if (kick) {
 2802 #ifdef EN_DEBUG
 2803   printf("%s: tx kick mask = 0x%x\n", sc->sc_dev.dv_xname, kick);
 2804 #endif
 2805     for (mask = 1, lcv = 0 ; lcv < EN_NTX ; lcv++, mask = mask * 2) {
 2806       if ((kick & mask) && sc->txslot[lcv].q.ifq_head) {
 2807         en_txdma(sc, lcv);              /* kick it! */
 2808       }
 2809     }           /* for each slot */
 2810   }             /* if kick */
 2811 
 2812 
 2813   /*******************
 2814    * recv interrupts *
 2815    ******************/
 2816 
 2817   /*
 2818    * check for RX DMA complete, and pass the data "upstairs"
 2819    */
 2820 
 2821   if (reg & MID_INT_DMA_RX) {
 2822     val = EN_READ(sc, MID_DMA_RDRX); /* chip's current location */
 2823     idx = MID_DRQ_A2REG(sc->drq_chip);/* where we last saw chip */
 2824     while (idx != val) {
 2825       sc->drq_free++;
 2826       if ((drq = sc->drq[idx]) != 0) {
 2827         sc->drq[idx] = 0;       /* don't forget to zero it out when done */
 2828         slot = EN_DQ_SLOT(drq);
 2829         if (EN_DQ_LEN(drq) == 0) {  /* "JK" trash DMA? */
 2830           m = NULL;
 2831         } else {
 2832           IF_DEQUEUE(&sc->rxslot[slot].indma, m);
 2833           if (!m)
 2834             panic("enintr: drqsync: %s: lost mbuf in slot %d!",
 2835                   sc->sc_dev.dv_xname, slot);
 2836         }
 2837         /* do something with this mbuf */
 2838         if (sc->rxslot[slot].oth_flags & ENOTHER_DRAIN) {  /* drain? */
 2839           if (m)
 2840             m_freem(m);
 2841           vci = sc->rxslot[slot].atm_vci;
 2842           if (sc->rxslot[slot].indma.ifq_head == NULL &&
 2843                 sc->rxslot[slot].q.ifq_head == NULL &&
 2844                 (EN_READ(sc, MID_VC(vci)) & MIDV_INSERVICE) == 0 &&
 2845                 (sc->rxslot[slot].oth_flags & ENOTHER_SWSL) == 0) {
 2846             sc->rxslot[slot].oth_flags = ENOTHER_FREE; /* done drain */
 2847             sc->rxslot[slot].atm_vci = RX_NONE;
 2848             sc->rxvc2slot[vci] = RX_NONE;
 2849 #ifdef EN_DEBUG
 2850             printf("%s: rx%d: VCI %d now free\n", sc->sc_dev.dv_xname,
 2851                         slot, vci);
 2852 #endif
 2853           }
 2854         } else if (m != NULL) {
 2855           ATM_PH_FLAGS(&ah) = sc->rxslot[slot].atm_flags;
 2856           ATM_PH_VPI(&ah) = 0;
 2857           ATM_PH_SETVCI(&ah, sc->rxslot[slot].atm_vci);
 2858 #ifdef EN_DEBUG
 2859           printf("%s: rx%d: rxvci%d: atm_input, mbuf %p, len %d, hand %p\n",
 2860                 sc->sc_dev.dv_xname, slot, sc->rxslot[slot].atm_vci, m,
 2861                 EN_DQ_LEN(drq), sc->rxslot[slot].rxhand);
 2862 #endif
 2863 
 2864 #ifdef ATM_PVCEXT
 2865           /* if there's a subinterface for this vci, override ifp. */
 2866           ifp = en_vci2ifp(sc, sc->rxslot[slot].atm_vci);
 2867           ifp->if_ipackets++;
 2868           m->m_pkthdr.rcvif = ifp;      /* XXX */
 2869 #else
 2870           ifp = &sc->enif;
 2871           ifp->if_ipackets++;
 2872 #endif
 2873 
 2874 #if NBPFILTER > 0
 2875           if (ifp->if_bpf)
 2876             BPF_MTAP(ifp, m);
 2877 #endif
 2878 
 2879           atm_input(ifp, &ah, m, sc->rxslot[slot].rxhand);
 2880         }
 2881 
 2882       }
 2883       EN_WRAPADD(0, MID_DRQ_N, idx, 1);
 2884     };
 2885     sc->drq_chip = MID_DRQ_REG2A(val);  /* sync softc */
 2886 
 2887     if (sc->need_drqs) {        /* true if we had a DRQ shortage */
 2888       need_softserv = 1;
 2889       sc->need_drqs = 0;
 2890 #ifdef EN_DEBUG
 2891         printf("%s: cleared need DRQ condition\n", sc->sc_dev.dv_xname);
 2892 #endif
 2893     }
 2894   }
 2895 
 2896   /*
 2897    * handle service interrupts
 2898    */
 2899 
 2900   if (reg & MID_INT_SERVICE) {
 2901     chip = MID_SL_REG2A(EN_READ(sc, MID_SERV_WRITE));
 2902 
 2903     while (sc->hwslistp != chip) {
 2904 
 2905       /* fetch and remove it from hardware service list */
 2906       vci = EN_READ(sc, sc->hwslistp);
 2907       EN_WRAPADD(MID_SLOFF, MID_SLEND, sc->hwslistp, 4);/* advance hw ptr */
 2908       slot = sc->rxvc2slot[vci];
 2909       if (slot == RX_NONE) {
 2910 #ifdef EN_DEBUG
 2911         printf("%s: unexpected rx interrupt on VCI %d\n",
 2912                 sc->sc_dev.dv_xname, vci);
 2913 #endif
 2914         EN_WRITE(sc, MID_VC(vci), MIDV_TRASH);  /* rx off, damn it! */
 2915         continue;                               /* next */
 2916       }
 2917       EN_WRITE(sc, MID_VC(vci), sc->rxslot[slot].mode); /* remove from hwsl */
 2918       EN_COUNT(sc->hwpull);
 2919 
 2920 #ifdef EN_DEBUG
 2921       printf("%s: pulled VCI %d off hwslist\n", sc->sc_dev.dv_xname, vci);
 2922 #endif
 2923 
 2924       /* add it to the software service list (if needed) */
 2925       if ((sc->rxslot[slot].oth_flags & ENOTHER_SWSL) == 0) {
 2926         EN_COUNT(sc->swadd);
 2927         need_softserv = 1;
 2928         sc->rxslot[slot].oth_flags |= ENOTHER_SWSL;
 2929         sc->swslist[sc->swsl_tail] = slot;
 2930         EN_WRAPADD(0, MID_SL_N, sc->swsl_tail, 1);
 2931         sc->swsl_size++;
 2932 #ifdef EN_DEBUG
 2933       printf("%s: added VCI %d to swslist\n", sc->sc_dev.dv_xname, vci);
 2934 #endif
 2935       }
 2936     };
 2937   }
 2938 
 2939   /*
 2940    * now service (function too big to include here)
 2941    */
 2942 
 2943   if (need_softserv)
 2944     en_service(sc);
 2945 
 2946   /*
 2947    * keep our stats
 2948    */
 2949 
 2950   if (reg & MID_INT_DMA_OVR) {
 2951     EN_COUNT(sc->dmaovr);
 2952 #ifdef EN_DEBUG
 2953     printf("%s: MID_INT_DMA_OVR\n", sc->sc_dev.dv_xname);
 2954 #endif
 2955   }
 2956   reg = EN_READ(sc, MID_STAT);
 2957 #ifdef EN_STAT
 2958   sc->otrash += MID_OTRASH(reg);
 2959   sc->vtrash += MID_VTRASH(reg);
 2960 #endif
 2961 
 2962   EN_INTR_RET(1); /* for us */
 2963 }
 2964 
 2965 
 2966 /*
 2967  * en_service: handle a service interrupt
 2968  *
 2969  * Q: why do we need a software service list?
 2970  *
 2971  * A: if we remove a VCI from the hardware list and we find that we are
 2972  *    out of DRQs we must defer processing until some DRQs become free.
 2973  *    so we must remember to look at this RX VCI/slot later, but we can't
 2974  *    put it back on the hardware service list (since that isn't allowed).
 2975  *    so we instead save it on the software service list.   it would be nice
 2976  *    if we could peek at the VCI on top of the hwservice list without removing
 2977  *    it, however this leads to a race condition: if we peek at it and
 2978  *    decide we are done with it new data could come in before we have a
 2979  *    chance to remove it from the hwslist.   by the time we get it out of
 2980  *    the list the interrupt for the new data will be lost.   oops!
 2981  *
 2982  */
 2983 
 2984 STATIC void en_service(sc)
 2985 
 2986 struct en_softc *sc;
 2987 
 2988 {
 2989   struct mbuf *m, *tmp;
 2990   u_int32_t cur, dstart, rbd, pdu, *sav, dma, bcode, count, *data, *datastop;
 2991   u_int32_t start, stop, cnt, needalign;
 2992   int slot, raw, aal5, vci, fill, mlen, tlen, drqneed, need, needfill, end;
 2993 
 2994   aal5 = 0;             /* Silence gcc */
 2995 next_vci:
 2996   if (sc->swsl_size == 0) {
 2997 #ifdef EN_DEBUG
 2998     printf("%s: en_service done\n", sc->sc_dev.dv_xname);
 2999 #endif
 3000     return;             /* >>> exit here if swsl now empty <<< */
 3001   }
 3002 
 3003   /*
 3004    * get slot/vci to service
 3005    */
 3006 
 3007   slot = sc->swslist[sc->swsl_head];
 3008   vci = sc->rxslot[slot].atm_vci;
 3009 #ifdef EN_DIAG
 3010   if (sc->rxvc2slot[vci] != slot) panic("en_service rx slot/vci sync");
 3011 #endif
 3012 
 3013   /*
 3014    * determine our mode and if we've got any work to do
 3015    */
 3016 
 3017   raw = sc->rxslot[slot].oth_flags & ENOTHER_RAW;
 3018   start= sc->rxslot[slot].start;
 3019   stop= sc->rxslot[slot].stop;
 3020   cur = sc->rxslot[slot].cur;
 3021 
 3022 #ifdef EN_DEBUG
 3023   printf("%s: rx%d: service vci=%d raw=%d start/stop/cur=0x%x 0x%x 0x%x\n",
 3024         sc->sc_dev.dv_xname, slot, vci, raw, start, stop, cur);
 3025 #endif
 3026 
 3027 same_vci:
 3028   dstart = MIDV_DSTART(EN_READ(sc, MID_DST_RP(vci)));
 3029   dstart = (dstart * sizeof(u_int32_t)) + start;
 3030 
 3031   /* check to see if there is any data at all */
 3032   if (dstart == cur) {
 3033 defer:                                  /* defer processing */
 3034     EN_WRAPADD(0, MID_SL_N, sc->swsl_head, 1);
 3035     sc->rxslot[slot].oth_flags &= ~ENOTHER_SWSL;
 3036     sc->swsl_size--;
 3037                                         /* >>> remove from swslist <<< */
 3038 #ifdef EN_DEBUG
 3039     printf("%s: rx%d: remove vci %d from swslist\n",
 3040                 sc->sc_dev.dv_xname, slot, vci);
 3041 #endif
 3042     goto next_vci;
 3043   }
 3044 
 3045   /*
 3046    * figure out how many bytes we need
 3047    * [mlen = # bytes to go in mbufs, fill = # bytes to dump (MIDDMA_JK)]
 3048    */
 3049 
 3050   if (raw) {
 3051 
 3052     /* raw mode (aka boodi mode) */
 3053     fill = 0;
 3054     if (dstart > cur)
 3055       mlen = dstart - cur;
 3056     else
 3057       mlen = (dstart + (EN_RXSZ*1024)) - cur;
 3058 
 3059     if (mlen < sc->rxslot[slot].raw_threshold)
 3060       goto defer;               /* too little data to deal with */
 3061 
 3062   } else {
 3063 
 3064     /* normal mode */
 3065     aal5 = (sc->rxslot[slot].atm_flags & ATM_PH_AAL5);
 3066     rbd = EN_READ(sc, cur);
 3067     if (MID_RBD_ID(rbd) != MID_RBD_STDID)
 3068       panic("en_service: id mismatch");
 3069 
 3070     if (rbd & MID_RBD_T) {
 3071       mlen = 0;                 /* we've got trash */
 3072       fill = MID_RBD_SIZE;
 3073       EN_COUNT(sc->ttrash);
 3074 #ifdef EN_DEBUG
 3075       printf("RX overflow lost %d cells!\n", MID_RBD_CNT(rbd));
 3076 #endif
 3077     } else if (!aal5) {
 3078       mlen = MID_RBD_SIZE + MID_CHDR_SIZE + MID_ATMDATASZ; /* 1 cell (ick!) */
 3079       fill = 0;
 3080     } else {
 3081       struct ifnet *ifp;
 3082 
 3083       tlen = (MID_RBD_CNT(rbd) * MID_ATMDATASZ) + MID_RBD_SIZE;
 3084       pdu = cur + tlen - MID_PDU_SIZE;
 3085       if (pdu >= stop)
 3086         pdu -= (EN_RXSZ*1024);
 3087       pdu = EN_READ(sc, pdu);   /* get PDU in correct byte order */
 3088       fill = tlen - MID_RBD_SIZE - MID_PDU_LEN(pdu);
 3089       if (fill < 0 || (rbd & MID_RBD_CRCERR) != 0) {
 3090         static int first = 1;
 3091 
 3092         if (first) {
 3093           printf("%s: %s, dropping frame\n", sc->sc_dev.dv_xname,
 3094                  (rbd & MID_RBD_CRCERR) ?
 3095                  "CRC error" : "invalid AAL5 PDU length");
 3096           printf("%s: got %d cells (%d bytes), AAL5 len is %d bytes (pdu=0x%x)\n",
 3097                  sc->sc_dev.dv_xname, MID_RBD_CNT(rbd),
 3098                  tlen - MID_RBD_SIZE, MID_PDU_LEN(pdu), pdu);
 3099 #ifndef EN_DEBUG
 3100           printf("CRC error report disabled from now on!\n");
 3101           first = 0;
 3102 #endif
 3103         }
 3104         fill = tlen;
 3105 
 3106 #ifdef ATM_PVCEXT
 3107         ifp = en_vci2ifp(sc, vci);
 3108 #else
 3109         ifp = &sc->enif;
 3110 #endif
 3111         ifp->if_ierrors++;
 3112 
 3113       }
 3114       mlen = tlen - fill;
 3115     }
 3116 
 3117   }
 3118 
 3119   /*
 3120    * now allocate mbufs for mlen bytes of data, if out of mbufs, trash all
 3121    *
 3122    * notes:
 3123    *  1. it is possible that we've already allocated an mbuf for this pkt
 3124    *     but ran out of DRQs, in which case we saved the allocated mbuf on
 3125    *     "q".
 3126    *  2. if we save an mbuf in "q" we store the "cur" (pointer) in the front
 3127    *     of the mbuf as an identity (that we can check later), and we also
 3128    *     store drqneed (so we don't have to recompute it).
 3129    *  3. after this block of code, if m is still NULL then we ran out of mbufs
 3130    */
 3131 
 3132   m = sc->rxslot[slot].q.ifq_head;
 3133   drqneed = 1;
 3134   if (m) {
 3135     sav = mtod(m, u_int32_t *);
 3136     if (sav[0] != cur) {
 3137 #ifdef EN_DEBUG
 3138       printf("%s: rx%d: q'ed mbuf %p not ours\n",
 3139                 sc->sc_dev.dv_xname, slot, m);
 3140 #endif
 3141       m = NULL;                 /* wasn't ours */
 3142       EN_COUNT(sc->rxqnotus);
 3143     } else {
 3144       EN_COUNT(sc->rxqus);
 3145       IF_DEQUEUE(&sc->rxslot[slot].q, m);
 3146       drqneed = sav[1];
 3147 #ifdef EN_DEBUG
 3148       printf("%s: rx%d: recovered q'ed mbuf %p (drqneed=%d)\n",
 3149         sc->sc_dev.dv_xname, slot, m, drqneed);
 3150 #endif
 3151     }
 3152   }
 3153 
 3154   if (mlen != 0 && m == NULL) {
 3155     m = en_mget(sc, mlen, &drqneed);            /* allocate! */
 3156     if (m == NULL) {
 3157       fill += mlen;
 3158       mlen = 0;
 3159       EN_COUNT(sc->rxmbufout);
 3160 #ifdef EN_DEBUG
 3161       printf("%s: rx%d: out of mbufs\n", sc->sc_dev.dv_xname, slot);
 3162 #endif
 3163     }
 3164 #ifdef EN_DEBUG
 3165     printf("%s: rx%d: allocate mbuf %p, mlen=%d, drqneed=%d\n",
 3166         sc->sc_dev.dv_xname, slot, m, mlen, drqneed);
 3167 #endif
 3168   }
 3169 
 3170 #ifdef EN_DEBUG
 3171   printf("%s: rx%d: VCI %d, mbuf_chain %p, mlen %d, fill %d\n",
 3172         sc->sc_dev.dv_xname, slot, vci, m, mlen, fill);
 3173 #endif
 3174 
 3175   /*
 3176    * now check to see if we've got the DRQs needed.    if we are out of
 3177    * DRQs we must quit (saving our mbuf, if we've got one).
 3178    */
 3179 
 3180   needfill = (fill) ? 1 : 0;
 3181   if (drqneed + needfill > sc->drq_free) {
 3182     sc->need_drqs = 1;  /* flag condition */
 3183     if (m == NULL) {
 3184       EN_COUNT(sc->rxoutboth);
 3185 #ifdef EN_DEBUG
 3186       printf("%s: rx%d: out of DRQs *and* mbufs!\n", sc->sc_dev.dv_xname, slot);
 3187 #endif
 3188       return;           /* >>> exit here if out of both mbufs and DRQs <<< */
 3189     }
 3190     sav = mtod(m, u_int32_t *);
 3191     sav[0] = cur;
 3192     sav[1] = drqneed;
 3193     IF_ENQUEUE(&sc->rxslot[slot].q, m);
 3194     EN_COUNT(sc->rxdrqout);
 3195 #ifdef EN_DEBUG
 3196     printf("%s: rx%d: out of DRQs\n", sc->sc_dev.dv_xname, slot);
 3197 #endif
 3198     return;             /* >>> exit here if out of DRQs <<< */
 3199   }
 3200 
 3201   /*
 3202    * at this point all resources have been allocated and we are commited
 3203    * to servicing this slot.
 3204    *
 3205    * dma = last location we told chip about
 3206    * cur = current location
 3207    * mlen = space in the mbuf we want
 3208    * need = bytes to xfer in (decrs to zero)
 3209    * fill = how much fill we need
 3210    * tlen = how much data to transfer to this mbuf
 3211    * cnt/bcode/count = <same as xmit>
 3212    *
 3213    * 'needfill' not used after this point
 3214    */
 3215 
 3216   dma = cur;            /* dma = last location we told chip about */
 3217   need = roundup(mlen, sizeof(u_int32_t));
 3218   fill = fill - (need - mlen);  /* note: may invalidate 'needfill' */
 3219 
 3220   for (tmp = m ; tmp != NULL && need > 0 ; tmp = tmp->m_next) {
 3221     tlen = roundup(tmp->m_len, sizeof(u_int32_t)); /* m_len set by en_mget */
 3222     data = mtod(tmp, u_int32_t *);
 3223 
 3224 #ifdef EN_DEBUG
 3225     printf("%s: rx%d: load mbuf %p, m_len=%d, m_data=%p, tlen=%d\n",
 3226         sc->sc_dev.dv_xname, slot, tmp, tmp->m_len, tmp->m_data, tlen);
 3227 #endif
 3228 
 3229     /* copy data */
 3230     if (EN_NORXDMA || !en_dma || tlen < EN_MINDMA) {
 3231       datastop = (u_int32_t *)((u_char *) data + tlen);
 3232       /* copy loop: preserve byte order!!!  use READDAT */
 3233       while (data != datastop) {
 3234         *data = EN_READDAT(sc, cur);
 3235         data++;
 3236         EN_WRAPADD(start, stop, cur, 4);
 3237       }
 3238       need -= tlen;
 3239 #ifdef EN_DEBUG
 3240       printf("%s: rx%d: vci%d: copied %d bytes (%d left)\n",
 3241                 sc->sc_dev.dv_xname, slot, vci, tlen, need);
 3242 #endif
 3243       continue;
 3244     }
 3245 
 3246     /* DMA data (check to see if we need to sync DRQ first) */
 3247     if (dma != cur) {
 3248       EN_DRQADD(sc, WORD_IDX(start,cur), vci, MIDDMA_JK, 0, 0, 0, 0);
 3249 #ifdef EN_DEBUG
 3250       printf("%s: rx%d: vci%d: drq_sync: advance pointer to %d\n",
 3251                 sc->sc_dev.dv_xname, slot, vci, cur);
 3252 #endif
 3253     }
 3254 
 3255 #if !defined(MIDWAY_ENIONLY)
 3256 
 3257     /*
 3258      * the adaptec DMA engine is smart and handles everything for us.
 3259      */
 3260 
 3261     if (sc->is_adaptec) {
 3262       need -= tlen;
 3263       EN_WRAPADD(start, stop, cur, tlen);
 3264 #ifdef EN_DEBUG
 3265       printf("%s: rx%d: vci%d: adp_dma %d bytes (%d left)\n",
 3266                 sc->sc_dev.dv_xname, slot, vci, tlen, need);
 3267 #endif
 3268       end = (need == 0 && !fill) ? MID_DMA_END : 0;
 3269       EN_DRQADD(sc, tlen, vci, 0, vtophys((vaddr_t)data), mlen, slot, end);
 3270       if (end)
 3271         goto done;
 3272       dma = cur;        /* update DMA pointer */
 3273       continue;
 3274     }
 3275 #endif /* !MIDWAY_ENIONLY */
 3276 
 3277 
 3278 #if !defined(MIDWAY_ADPONLY)
 3279 
 3280     /*
 3281      * the ENI DMA engine is not so smart and need more help from us
 3282      */
 3283 
 3284     /* do we need to do a DMA op to align? */
 3285     if (sc->alburst &&
 3286       (needalign = (((unsigned long) data) & sc->bestburstmask)) != 0) {
 3287       cnt = sc->bestburstlen - needalign;
 3288       if (cnt > tlen) {
 3289         cnt = tlen;
 3290         count = cnt / sizeof(u_int32_t);
 3291         bcode = MIDDMA_WORD;
 3292       } else {
 3293         count = cnt / sizeof(u_int32_t);
 3294         bcode = en_dmaplan[count].bcode;
 3295         count = cnt >> en_dmaplan[count].divshift;
 3296       }
 3297       need -= cnt;
 3298       EN_WRAPADD(start, stop, cur, cnt);
 3299 #ifdef EN_DEBUG
 3300       printf("%s: rx%d: vci%d: al_dma %d bytes (%d left)\n",
 3301                 sc->sc_dev.dv_xname, slot, vci, cnt, need);
 3302 #endif
 3303       tlen -= cnt;
 3304       end = (need == 0 && !fill) ? MID_DMA_END : 0;
 3305       EN_DRQADD(sc, count, vci, bcode, vtophys((vaddr_t)data), mlen, slot, end);
 3306       if (end)
 3307         goto done;
 3308       data = (u_int32_t *)((u_char *) data + cnt);
 3309     }
 3310 
 3311     /* do we need a max-sized burst? */
 3312     if (tlen >= sc->bestburstlen) {
 3313       count = tlen >> sc->bestburstshift;
 3314       cnt = count << sc->bestburstshift;
 3315       bcode = sc->bestburstcode;
 3316       need -= cnt;
 3317       EN_WRAPADD(start, stop, cur, cnt);
 3318 #ifdef EN_DEBUG
 3319       printf("%s: rx%d: vci%d: best_dma %d bytes (%d left)\n",
 3320                 sc->sc_dev.dv_xname, slot, vci, cnt, need);
 3321 #endif
 3322       tlen -= cnt;
 3323       end = (need == 0 && !fill) ? MID_DMA_END : 0;
 3324       EN_DRQADD(sc, count, vci, bcode, vtophys((vaddr_t)data), mlen, slot, end);
 3325       if (end)
 3326         goto done;
 3327       data = (u_int32_t *)((u_char *) data + cnt);
 3328     }
 3329 
 3330     /* do we need to do a cleanup burst? */
 3331     if (tlen) {
 3332       count = tlen / sizeof(u_int32_t);
 3333       bcode = en_dmaplan[count].bcode;
 3334       count = tlen >> en_dmaplan[count].divshift;
 3335       need -= tlen;
 3336       EN_WRAPADD(start, stop, cur, tlen);
 3337 #ifdef EN_DEBUG
 3338       printf("%s: rx%d: vci%d: cleanup_dma %d bytes (%d left)\n",
 3339                 sc->sc_dev.dv_xname, slot, vci, tlen, need);
 3340 #endif
 3341       end = (need == 0 && !fill) ? MID_DMA_END : 0;
 3342       EN_DRQADD(sc, count, vci, bcode, vtophys((vaddr_t)data), mlen, slot, end);
 3343       if (end)
 3344         goto done;
 3345     }
 3346 
 3347     dma = cur;          /* update DMA pointer */
 3348 
 3349 #endif /* !MIDWAY_ADPONLY */
 3350 
 3351   }
 3352 
 3353   /* skip the end */
 3354   if (fill || dma != cur) {
 3355 #ifdef EN_DEBUG
 3356       if (fill)
 3357         printf("%s: rx%d: vci%d: skipping %d bytes of fill\n",
 3358                 sc->sc_dev.dv_xname, slot, vci, fill);
 3359       else
 3360         printf("%s: rx%d: vci%d: syncing chip from 0x%x to 0x%x [cur]\n",
 3361                 sc->sc_dev.dv_xname, slot, vci, dma, cur);
 3362 #endif
 3363     EN_WRAPADD(start, stop, cur, fill);
 3364     EN_DRQADD(sc, WORD_IDX(start,cur), vci, MIDDMA_JK, 0, mlen,
 3365                                         slot, MID_DMA_END);
 3366     /* dma = cur; */    /* not necessary since we are done */
 3367   }
 3368 
 3369   /*
 3370    * done, remove stuff we don't want to pass up:
 3371    *   raw mode (boodi mode): pass everything up for later processing
 3372    *   aal5: remove RBD
 3373    *   aal0: remove RBD + cell header
 3374    */
 3375 
 3376 done:
 3377   if (m) {
 3378     if (!raw) {
 3379       cnt = MID_RBD_SIZE;
 3380       if (!aal5) cnt += MID_CHDR_SIZE;
 3381       m->m_len -= cnt;                          /* chop! */
 3382       m->m_pkthdr.len -= cnt;
 3383       m->m_data += cnt;
 3384     }
 3385     IF_ENQUEUE(&sc->rxslot[slot].indma, m);
 3386   }
 3387   sc->rxslot[slot].cur = cur;           /* update master copy of 'cur' */
 3388 
 3389 #ifdef EN_DEBUG
 3390   printf("%s: rx%d: vci%d: DONE!   cur now =0x%x\n",
 3391         sc->sc_dev.dv_xname, slot, vci, cur);
 3392 #endif
 3393 
 3394   goto same_vci;        /* get next packet in this slot */
 3395 }
 3396 
 3397 
 3398 #ifdef EN_DDBHOOK
 3399 /*
 3400  * functions we can call from ddb
 3401  */
 3402 
 3403 /*
 3404  * en_dump: dump the state
 3405  */
 3406 
 3407 #define END_SWSL        0x00000040              /* swsl state */
 3408 #define END_DRQ         0x00000020              /* drq state */
 3409 #define END_DTQ         0x00000010              /* dtq state */
 3410 #define END_RX          0x00000008              /* rx state */
 3411 #define END_TX          0x00000004              /* tx state */
 3412 #define END_MREGS       0x00000002              /* registers */
 3413 #define END_STATS       0x00000001              /* dump stats */
 3414 
 3415 #define END_BITS "\2\7SWSL\6DRQ\5DTQ\4RX\3TX\2MREGS\1STATS"
 3416 
 3417 int en_dump(unit, level)
 3418 
 3419 int unit, level;
 3420 
 3421 {
 3422   struct en_softc *sc;
 3423   int lcv, cnt, slot;
 3424   u_int32_t ptr, reg;
 3425 
 3426   for (lcv = 0 ; lcv < en_cd.cd_ndevs ; lcv++) {
 3427     char sbuf[256];
 3428 
 3429     sc = device_lookup(&en_cd, lcv);
 3430     if (sc == NULL) continue;
 3431     if (unit != -1 && unit != lcv)
 3432       continue;
 3433 
 3434     bitmask_snprintf(level, END_BITS, sbuf, sizeof(sbuf));
 3435     printf("dumping device %s at level 0x%s\n", sc->sc_dev.dv_xname, sbuf);
 3436 
 3437     if (sc->dtq_us == 0) {
 3438       printf("<hasn't been en_init'd yet>\n");
 3439       continue;
 3440     }
 3441 
 3442     if (level & END_STATS) {
 3443       printf("  en_stats:\n");
 3444       printf("    %d mfix (%d failed); %d/%d head/tail byte DMAs, %d flushes\n",
 3445            sc->mfix, sc->mfixfail, sc->headbyte, sc->tailbyte, sc->tailflush);
 3446       printf("    %d rx DMA overflow interrupts\n", sc->dmaovr);
 3447       printf("    %d times we ran out of TX space and stalled\n",
 3448                                                         sc->txoutspace);
 3449       printf("    %d times we ran out of DTQs\n", sc->txdtqout);
 3450       printf("    %d times we launched a packet\n", sc->launch);
 3451       printf("    %d times we launched without on-board header\n", sc->lheader);
 3452       printf("    %d times we launched without on-board tail\n", sc->ltail);
 3453       printf("    %d times we pulled the hw service list\n", sc->hwpull);
 3454       printf("    %d times we pushed a vci on the sw service list\n",
 3455                                                                 sc->swadd);
 3456       printf("    %d times RX pulled an mbuf from Q that wasn't ours\n",
 3457                                                          sc->rxqnotus);
 3458       printf("    %d times RX pulled a good mbuf from Q\n", sc->rxqus);
 3459       printf("    %d times we ran out of mbufs *and* DRQs\n", sc->rxoutboth);
 3460       printf("    %d times we ran out of DRQs\n", sc->rxdrqout);
 3461 
 3462       printf("    %d transmit packets dropped due to mbsize\n", sc->txmbovr);
 3463       printf("    %d cells trashed due to turned off rxvc\n", sc->vtrash);
 3464       printf("    %d cells trashed due to totally full buffer\n", sc->otrash);
 3465       printf("    %d cells trashed due almost full buffer\n", sc->ttrash);
 3466       printf("    %d rx mbuf allocation failures\n", sc->rxmbufout);
 3467 #ifdef NATM
 3468       printf("    %d drops at natmintrq\n", natmintrq.ifq_drops);
 3469 #ifdef NATM_STAT
 3470       printf("    natmintr so_rcv: ok/drop cnt: %d/%d, ok/drop bytes: %d/%d\n",
 3471         natm_sookcnt, natm_sodropcnt, natm_sookbytes, natm_sodropbytes);
 3472 #endif
 3473 #endif
 3474     }
 3475 
 3476     if (level & END_MREGS) {
 3477       char ybuf[256];
 3478 
 3479       printf("mregs:\n");
 3480       printf("resid = 0x%x\n", EN_READ(sc, MID_RESID));
 3481 
 3482       bitmask_snprintf(EN_READ(sc, MID_INTSTAT), MID_INTBITS, ybuf, sizeof(ybuf));
 3483       printf("interrupt status = 0x%s\n", ybuf);
 3484 
 3485       bitmask_snprintf(EN_READ(sc, MID_INTENA), MID_INTBITS, ybuf, sizeof(ybuf));
 3486       printf("interrupt enable = 0x%s\n", ybuf);
 3487 
 3488       bitmask_snprintf(EN_READ(sc, MID_MAST_CSR), MID_MCSRBITS, ybuf, sizeof(ybuf));
 3489       printf("mcsr = 0x%s\n", ybuf);
 3490 
 3491       printf("serv_write = [chip=%d] [us=%d]\n", EN_READ(sc, MID_SERV_WRITE),
 3492                         MID_SL_A2REG(sc->hwslistp));
 3493       printf("DMA addr = 0x%x\n", EN_READ(sc, MID_DMA_ADDR));
 3494       printf("DRQ: chip[rd=0x%x,wr=0x%x], sc[chip=0x%x,us=0x%x]\n",
 3495         MID_DRQ_REG2A(EN_READ(sc, MID_DMA_RDRX)),
 3496         MID_DRQ_REG2A(EN_READ(sc, MID_DMA_WRRX)), sc->drq_chip, sc->drq_us);
 3497       printf("DTQ: chip[rd=0x%x,wr=0x%x], sc[chip=0x%x,us=0x%x]\n",
 3498         MID_DTQ_REG2A(EN_READ(sc, MID_DMA_RDTX)),
 3499         MID_DTQ_REG2A(EN_READ(sc, MID_DMA_WRTX)), sc->dtq_chip, sc->dtq_us);
 3500 
 3501       printf("  unusal txspeeds: ");
 3502       for (cnt = 0 ; cnt < MID_N_VC ; cnt++)
 3503         if (sc->txspeed[cnt])
 3504           printf(" vci%d=0x%x", cnt, sc->txspeed[cnt]);
 3505       printf("\n");
 3506 
 3507       printf("  rxvc slot mappings: ");
 3508       for (cnt = 0 ; cnt < MID_N_VC ; cnt++)
 3509         if (sc->rxvc2slot[cnt] != RX_NONE)
 3510           printf("  %d->%d", cnt, sc->rxvc2slot[cnt]);
 3511       printf("\n");
 3512 
 3513     }
 3514 
 3515     if (level & END_TX) {
 3516       printf("tx:\n");
 3517       for (slot = 0 ; slot < EN_NTX; slot++) {
 3518         printf("tx%d: start/stop/cur=0x%x/0x%x/0x%x [%d]  ", slot,
 3519           sc->txslot[slot].start, sc->txslot[slot].stop, sc->txslot[slot].cur,
 3520                 (sc->txslot[slot].cur - sc->txslot[slot].start)/4);
 3521         printf("mbsize=%d, bfree=%d\n", sc->txslot[slot].mbsize,
 3522                 sc->txslot[slot].bfree);
 3523         printf("txhw: base_address=0x%lx, size=%d, read=%d, descstart=%d\n",
 3524           (u_long)MIDX_BASE(EN_READ(sc, MIDX_PLACE(slot))),
 3525           MIDX_SZ(EN_READ(sc, MIDX_PLACE(slot))),
 3526           EN_READ(sc, MIDX_READPTR(slot)), EN_READ(sc, MIDX_DESCSTART(slot)));
 3527       }
 3528     }
 3529 
 3530     if (level & END_RX) {
 3531       printf("  recv slots:\n");
 3532       for (slot = 0 ; slot < sc->en_nrx; slot++) {
 3533         printf("rx%d: vci=%d: start/stop/cur=0x%x/0x%x/0x%x ", slot,
 3534           sc->rxslot[slot].atm_vci, sc->rxslot[slot].start,
 3535           sc->rxslot[slot].stop, sc->rxslot[slot].cur);
 3536         printf("mode=0x%x, atm_flags=0x%x, oth_flags=0x%x\n",
 3537         sc->rxslot[slot].mode, sc->rxslot[slot].atm_flags,
 3538                 sc->rxslot[slot].oth_flags);
 3539         printf("RXHW: mode=0x%x, DST_RP=0x%x, WP_ST_CNT=0x%x\n",
 3540           EN_READ(sc, MID_VC(sc->rxslot[slot].atm_vci)),
 3541           EN_READ(sc, MID_DST_RP(sc->rxslot[slot].atm_vci)),
 3542           EN_READ(sc, MID_WP_ST_CNT(sc->rxslot[slot].atm_vci)));
 3543       }
 3544     }
 3545 
 3546     if (level & END_DTQ) {
 3547       printf("  dtq [need_dtqs=%d,dtq_free=%d]:\n",
 3548                                         sc->need_dtqs, sc->dtq_free);
 3549       ptr = sc->dtq_chip;
 3550       while (ptr != sc->dtq_us) {
 3551         reg = EN_READ(sc, ptr);
 3552         printf("\t0x%x=[cnt=%d, chan=%d, end=%d, type=%d @ 0x%x]\n",
 3553             sc->dtq[MID_DTQ_A2REG(ptr)], MID_DMA_CNT(reg), MID_DMA_TXCHAN(reg),
 3554             (reg & MID_DMA_END) != 0, MID_DMA_TYPE(reg), EN_READ(sc, ptr+4));
 3555         EN_WRAPADD(MID_DTQOFF, MID_DTQEND, ptr, 8);
 3556       }
 3557     }
 3558 
 3559     if (level & END_DRQ) {
 3560       printf("  drq [need_drqs=%d,drq_free=%d]:\n",
 3561                                         sc->need_drqs, sc->drq_free);
 3562       ptr = sc->drq_chip;
 3563       while (ptr != sc->drq_us) {
 3564         reg = EN_READ(sc, ptr);
 3565         printf("\t0x%x=[cnt=%d, chan=%d, end=%d, type=%d @ 0x%x]\n",
 3566           sc->drq[MID_DRQ_A2REG(ptr)], MID_DMA_CNT(reg), MID_DMA_RXVCI(reg),
 3567           (reg & MID_DMA_END) != 0, MID_DMA_TYPE(reg), EN_READ(sc, ptr+4));
 3568         EN_WRAPADD(MID_DRQOFF, MID_DRQEND, ptr, 8);
 3569       }
 3570     }
 3571 
 3572     if (level & END_SWSL) {
 3573       printf(" swslist [size=%d]: ", sc->swsl_size);
 3574       for (cnt = sc->swsl_head ; cnt != sc->swsl_tail ;
 3575                         cnt = (cnt + 1) % MID_SL_N)
 3576         printf("0x%x ", sc->swslist[cnt]);
 3577       printf("\n");
 3578     }
 3579   }
 3580   return(0);
 3581 }
 3582 
 3583 /*
 3584  * en_dumpmem: dump the memory
 3585  */
 3586 
 3587 int en_dumpmem(unit, addr, len)
 3588 
 3589 int unit, addr, len;
 3590 
 3591 {
 3592   struct en_softc *sc;
 3593   u_int32_t reg;
 3594 
 3595   sc = device_lookup(&en_cd, unit);
 3596   if (sc == NULL) {
 3597     printf("invalid unit number: %d\n", unit);
 3598     return(0);
 3599   }
 3600   addr = addr & ~3;
 3601   if (addr < MID_RAMOFF || addr + len*4 > MID_MAXOFF || len <= 0) {
 3602     printf("invalid addr/len number: %d, %d\n", addr, len);
 3603     return(0);
 3604   }
 3605   printf("dumping %d words starting at offset 0x%x\n", len, addr);
 3606   while (len--) {
 3607     reg = EN_READ(sc, addr);
 3608     printf("mem[0x%x] = 0x%x\n", addr, reg);
 3609     addr += 4;
 3610   }
 3611   return(0);
 3612 }
 3613 #endif
 3614 
 3615 #ifdef ATM_PVCEXT
 3616 /*
 3617  * ATM PVC extension: shaper control and pvc subinterfaces
 3618  */
 3619 
 3620 /*
 3621  * the list of the interfaces sharing the physical device.
 3622  * in order to avoid starvation, the interfaces are scheduled in
 3623  * a round-robin fashion when en_start is called from tx complete
 3624  * interrupts.
 3625  */
 3626 static void rrp_add(sc, ifp)
 3627         struct en_softc *sc;
 3628         struct ifnet *ifp;
 3629 {
 3630         struct rrp *head, *p, *new;
 3631 
 3632         head = sc->txrrp;
 3633         if ((p = head) != NULL) {
 3634                 while (1) {
 3635                         if (p->ifp == ifp) {
 3636                                 /* an entry for this ifp already exits */
 3637                                 p->nref++;
 3638                                 return;
 3639                         }
 3640                         if (p->next == head)
 3641                                 break;
 3642                         p = p->next;
 3643                 }
 3644         }
 3645 
 3646         /* create a new entry */
 3647         MALLOC(new, struct rrp *, sizeof(struct rrp), M_DEVBUF, M_WAITOK);
 3648         if (new == NULL) {
 3649                 printf("en_rrp_add: malloc failed!\n");
 3650                 return;
 3651         }
 3652 
 3653         new->ifp = ifp;
 3654         new->nref = 1;
 3655 
 3656         if (p == NULL) {
 3657                 /* this is the only one in the list */
 3658                 new->next = new;
 3659                 sc->txrrp = new;
 3660         }
 3661         else {
 3662                 /* add the new entry at the tail of the list */
 3663                 new->next = p->next;
 3664                 p->next = new;
 3665         }
 3666 }
 3667 
 3668 #if 0 /* not used */
 3669 static void rrp_delete(sc, ifp)
 3670         struct en_softc *sc;
 3671         struct ifnet *ifp;
 3672 {
 3673         struct rrp *head, *p, *prev;
 3674 
 3675         head = sc->txrrp;
 3676 
 3677         prev = head;
 3678         if (prev == NULL) {
 3679                 printf("rrp_delete: no list!\n");
 3680                 return;
 3681         }
 3682         p = prev->next;
 3683 
 3684         while (1) {
 3685                 if (p->ifp == ifp) {
 3686                         p->nref--;
 3687                         if (p->nref > 0)
 3688                                 return;
 3689                         /* remove this entry */
 3690                         if (p == prev) {
 3691                                 /* this is the only entry in the list */
 3692                                 sc->txrrp = NULL;
 3693                         }
 3694                         else {
 3695                                 prev->next = p->next;
 3696                                 if (head == p)
 3697                                         sc->txrrp = p->next;
 3698                         }
 3699                         FREE(p, M_DEVBUF);
 3700                 }
 3701                 prev = p;
 3702                 p = prev->next;
 3703                 if (prev == head) {
 3704                         printf("rrp_delete: no matching entry!\n");
 3705                         return;
 3706                 }
 3707         }
 3708 }
 3709 #endif
 3710 
 3711 static struct ifnet *
 3712 en_vci2ifp(sc, vci)
 3713         struct en_softc *sc;
 3714         int vci;
 3715 {
 3716         struct pvcsif *pvcsif;
 3717 
 3718         LIST_FOREACH(pvcsif, &sc->sif_list, sif_links) {
 3719                 if (vci == pvcsif->sif_vci)
 3720                         return (&pvcsif->sif_if);
 3721         }
 3722         return (&sc->enif);
 3723 }
 3724 
 3725 /*
 3726  * create and attach per pvc subinterface
 3727  * (currently detach is not supported)
 3728  */
 3729 static struct ifnet *
 3730 en_pvcattach(ifp)
 3731         struct ifnet *ifp;
 3732 {
 3733         struct en_softc *sc = (struct en_softc *) ifp->if_softc;
 3734         struct ifnet *pvc_ifp;
 3735         int s;
 3736 
 3737         if ((pvc_ifp = pvcsif_alloc()) == NULL)
 3738                 return (NULL);
 3739 
 3740         pvc_ifp->if_softc = sc;
 3741         pvc_ifp->if_ioctl = en_ioctl;
 3742         pvc_ifp->if_start = en_start;
 3743         pvc_ifp->if_flags = (IFF_POINTOPOINT|IFF_MULTICAST) |
 3744                 (ifp->if_flags & (IFF_RUNNING|IFF_SIMPLEX|IFF_NOTRAILERS));
 3745 
 3746         s = splnet();
 3747         LIST_INSERT_HEAD(&sc->sif_list, (struct pvcsif *)pvc_ifp, sif_links);
 3748         if_attach(pvc_ifp);
 3749         atm_ifattach(pvc_ifp);
 3750 
 3751 #ifdef ATM_PVCEXT
 3752         rrp_add(sc, pvc_ifp);
 3753 #endif
 3754         splx(s);
 3755 
 3756         return (pvc_ifp);
 3757 }
 3758 
 3759 
 3760 /* txspeed conversion derived from linux drivers/atm/eni.c
 3761    by Werner Almesberger, EPFL LRC */
 3762 static const int pre_div[] = { 4,16,128,2048 };
 3763 
 3764 static int en_pcr2txspeed(pcr)
 3765         int pcr;
 3766 {
 3767         int pre, res, div;
 3768 
 3769         if (pcr == 0 || pcr > 347222)
 3770                 pre = res = 0;  /* max rate */
 3771         else {
 3772                 for (pre = 0; pre < 3; pre++)
 3773                         if (25000000/pre_div[pre]/64 <= pcr)
 3774                                 break;
 3775                 div = pre_div[pre]*(pcr);
 3776 #if 1
 3777                 /*
 3778                  * the shaper value should be rounded down,
 3779                  * instead of rounded up.
 3780                  * (which means "res" should be rounded up.)
 3781                  */
 3782                 res = (25000000 + div -1)/div - 1;
 3783 #else
 3784                 res = 25000000/div-1;
 3785 #endif
 3786                 if (res < 0)
 3787                         res = 0;
 3788                 if (res > 63)
 3789                         res = 63;
 3790         }
 3791         return ((pre << 6) + res);
 3792 }
 3793 
 3794 static int en_txspeed2pcr(txspeed)
 3795         int txspeed;
 3796 {
 3797         int pre, res, pcr;
 3798 
 3799         pre = (txspeed >> 6) & 0x3;
 3800         res = txspeed & 0x3f;
 3801         pcr = 25000000 / pre_div[pre] / (res+1);
 3802         return (pcr);
 3803 }
 3804 
 3805 /*
 3806  * en_txctl selects a hardware transmit channel and sets the shaper value.
 3807  * en_txctl should be called after enabling the vc by en_rxctl
 3808  * since it assumes a transmit channel is already assigned by en_rxctl
 3809  * to the vc.
 3810  */
 3811 static int en_txctl(sc, vci, joint_vci, pcr)
 3812         struct en_softc *sc;
 3813         int vci;
 3814         int joint_vci;
 3815         int pcr;
 3816 {
 3817         int txspeed, txchan, s;
 3818 
 3819         if (pcr)
 3820                 txspeed = en_pcr2txspeed(pcr);
 3821         else
 3822                 txspeed = 0;
 3823 
 3824         s = splnet();
 3825         txchan = sc->txvc2slot[vci];
 3826         sc->txslot[txchan].nref--;
 3827 
 3828         /* select a slot */
 3829         if (joint_vci != 0)
 3830                 /* use the same channel */
 3831                 txchan = sc->txvc2slot[joint_vci];
 3832         else if (pcr == 0)
 3833                 txchan = 0;
 3834         else {
 3835                 for (txchan = 1; txchan < EN_NTX; txchan++) {
 3836                         if (sc->txslot[txchan].nref == 0)
 3837                                 break;
 3838                 }
 3839         }
 3840         if (txchan == EN_NTX) {
 3841 #if 1
 3842                 /* no free slot! */
 3843                 splx(s);
 3844                 return (ENOSPC);
 3845 #else
 3846                 /*
 3847                  * to allow multiple vc's to share a slot,
 3848                  * use a slot with the smallest reference count
 3849                  */
 3850                 int slot = 1;
 3851                 txchan = 1;
 3852                 for (slot = 2; slot < EN_NTX; slot++)
 3853                         if (sc->txslot[slot].nref < sc->txslot[txchan].nref)
 3854                                 txchan = slot;
 3855 #endif
 3856         }
 3857 
 3858         sc->txvc2slot[vci] = txchan;
 3859         sc->txslot[txchan].nref++;
 3860 
 3861         /* set the shaper parameter */
 3862         sc->txspeed[vci] = (u_int8_t)txspeed;
 3863 
 3864         splx(s);
 3865 #ifdef EN_DEBUG
 3866         printf("VCI:%d PCR set to %d, tx channel %d\n", vci, pcr, txchan);
 3867         if (joint_vci != 0)
 3868                 printf("  slot shared with VCI:%d\n", joint_vci);
 3869 #endif
 3870         return (0);
 3871 }
 3872 
 3873 static int en_pvctx(sc, pvcreq)
 3874         struct en_softc *sc;
 3875         struct pvctxreq *pvcreq;
 3876 {
 3877         struct ifnet *ifp;
 3878         struct atm_pseudoioctl api;
 3879         struct atm_pseudohdr *pvc_aph, *pvc_joint;
 3880         int vci, joint_vci, pcr;
 3881         int error = 0;
 3882 
 3883         /* check vpi:vci values */
 3884         pvc_aph = &pvcreq->pvc_aph;
 3885         pvc_joint = &pvcreq->pvc_joint;
 3886 
 3887         vci = ATM_PH_VCI(pvc_aph);
 3888         joint_vci = ATM_PH_VCI(pvc_joint);
 3889         pcr = pvcreq->pvc_pcr;
 3890 
 3891         if (ATM_PH_VPI(pvc_aph) != 0 || vci >= MID_N_VC ||
 3892             ATM_PH_VPI(pvc_joint) != 0 || joint_vci >= MID_N_VC)
 3893                 return (EADDRNOTAVAIL);
 3894 
 3895         if ((ifp = ifunit(pvcreq->pvc_ifname)) == NULL)
 3896                 return (ENXIO);
 3897 
 3898         if (pcr < 0) {
 3899                 /* negative pcr means disable the vc. */
 3900                 if (sc->rxvc2slot[vci] == RX_NONE)
 3901                         /* already disabled */
 3902                         return 0;
 3903 
 3904                 ATM_PH_FLAGS(&api.aph) = 0;
 3905                 ATM_PH_VPI(&api.aph) = 0;
 3906                 ATM_PH_SETVCI(&api.aph, vci);
 3907                 api.rxhand = NULL;
 3908 
 3909                 error = en_rxctl(sc, &api, 0);
 3910 
 3911                 if (error == 0 && &sc->enif != ifp) {
 3912                         /* clear vc info of this subinterface */
 3913                         struct pvcsif *pvcsif = (struct pvcsif *)ifp;
 3914 
 3915                         ATM_PH_SETVCI(&api.aph, 0);
 3916                         pvcsif->sif_aph = api.aph;
 3917                         pvcsif->sif_vci = 0;
 3918                 }
 3919                 return (error);
 3920         }
 3921 
 3922         if (&sc->enif == ifp) {
 3923                 /* called for an en interface */
 3924                 if (sc->rxvc2slot[vci] == RX_NONE) {
 3925                         /* vc is not active */
 3926 #ifdef __NetBSD__
 3927                         printf("%s: en_pvctx: rx not active! vci=%d\n",
 3928                                ifp->if_xname, vci);
 3929 #else
 3930                         printf("%s%d: en_pvctx: rx not active! vci=%d\n",
 3931                                ifp->if_name, ifp->if_unit, vci);
 3932 #endif
 3933                         return (EINVAL);
 3934                 }
 3935         }
 3936         else {
 3937                 /* called for a pvc subinterface */
 3938                 struct pvcsif *pvcsif = (struct pvcsif *)ifp;
 3939 
 3940 #ifdef __NetBSD__
 3941                 strlcpy(pvcreq->pvc_ifname, sc->enif.if_xname,
 3942                     sizeof(pvcreq->pvc_ifname));
 3943 #else
 3944                 snprintf(pvcreq->pvc_ifname, sizeof(pvcreq->pvc_ifname), "%s%d",
 3945                     sc->enif.if_name, sc->enif.if_unit);
 3946 #endif
 3947                 ATM_PH_FLAGS(&api.aph) =
 3948                         (ATM_PH_FLAGS(pvc_aph) & (ATM_PH_AAL5|ATM_PH_LLCSNAP));
 3949                 ATM_PH_VPI(&api.aph) = 0;
 3950                 ATM_PH_SETVCI(&api.aph, vci);
 3951                 api.rxhand = NULL;
 3952                 pvcsif->sif_aph = api.aph;
 3953                 pvcsif->sif_vci = ATM_PH_VCI(&api.aph);
 3954 
 3955                 if (sc->rxvc2slot[vci] == RX_NONE) {
 3956                         /* vc is not active, enable rx */
 3957                         error = en_rxctl(sc, &api, 1);
 3958                         if (error)
 3959                                 return error;
 3960                 }
 3961                 else {
 3962                         /* vc is already active, update aph in softc */
 3963                         sc->rxslot[sc->rxvc2slot[vci]].atm_flags =
 3964                                 ATM_PH_FLAGS(&api.aph);
 3965                 }
 3966         }
 3967 
 3968         error = en_txctl(sc, vci, joint_vci, pcr);
 3969 
 3970         if (error == 0) {
 3971                 if (sc->txspeed[vci] != 0)
 3972                         pvcreq->pvc_pcr = en_txspeed2pcr(sc->txspeed[vci]);
 3973                 else
 3974                         pvcreq->pvc_pcr = 0;
 3975         }
 3976 
 3977         return error;
 3978 }
 3979 
 3980 static int en_pvctxget(sc, pvcreq)
 3981         struct en_softc *sc;
 3982         struct pvctxreq *pvcreq;
 3983 {
 3984         struct pvcsif *pvcsif;
 3985         struct ifnet *ifp;
 3986         int vci, slot;
 3987 
 3988         if ((ifp = ifunit(pvcreq->pvc_ifname)) == NULL)
 3989                 return (ENXIO);
 3990 
 3991         if (ifp == &sc->enif) {
 3992                 /* physical interface: assume vci is specified */
 3993                 struct atm_pseudohdr *pvc_aph;
 3994 
 3995                 pvc_aph = &pvcreq->pvc_aph;
 3996                 vci = ATM_PH_VCI(pvc_aph);
 3997                 if ((slot = sc->rxvc2slot[vci]) == RX_NONE)
 3998                         ATM_PH_FLAGS(pvc_aph) = 0;
 3999                 else
 4000                         ATM_PH_FLAGS(pvc_aph) = sc->rxslot[slot].atm_flags;
 4001                 ATM_PH_VPI(pvc_aph) = 0;
 4002         }
 4003         else {
 4004                 /* pvc subinterface */
 4005 #ifdef __NetBSD__
 4006                 strlcpy(pvcreq->pvc_ifname, sc->enif.if_xname,
 4007                     sizeof(pvcreq->pvc_ifname));
 4008 #else
 4009                 snprintf(pvcreq->pvc_ifname, sizeof(pvcreq->pvc_ifname), "%s%d",
 4010                     sc->enif.if_name, sc->enif.if_unit);
 4011 #endif
 4012 
 4013                 pvcsif = (struct pvcsif *)ifp;
 4014                 pvcreq->pvc_aph = pvcsif->sif_aph;
 4015                 vci = pvcsif->sif_vci;
 4016         }
 4017 
 4018         if ((slot = sc->rxvc2slot[vci]) == RX_NONE) {
 4019                 /* vc is not active */
 4020                 ATM_PH_FLAGS(&pvcreq->pvc_aph) = 0;
 4021                 pvcreq->pvc_pcr = -1;
 4022         }
 4023         else if (sc->txspeed[vci])
 4024                 pvcreq->pvc_pcr = en_txspeed2pcr(sc->txspeed[vci]);
 4025         else
 4026                 pvcreq->pvc_pcr = 0;
 4027 
 4028         return (0);
 4029 }
 4030 
 4031 #endif /* ATM_PVCEXT */
 4032 
 4033 #endif /* NEN > 0 || !defined(__FreeBSD__) */

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