FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/mlxvar.h
1 /* $NetBSD: mlxvar.h,v 1.9 2005/02/27 00:27:02 perry Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Andrew Doran.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*-
40 * Copyright (c) 1999 Michael Smith
41 * All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 *
52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
53 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
54 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
55 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
56 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
57 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
58 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
59 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
60 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
61 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
62 * SUCH DAMAGE.
63 *
64 * from FreeBSD: mlxvar.h,v 1.5.2.2 2000/04/24 19:40:50 msmith Exp
65 */
66
67 #ifndef _IC_MLXVAR_H_
68 #define _IC_MLXVAR_H_
69
70 /* Older boards allow up to 17 segments and 64kB transfers. */
71 #define MLX_MAX_SEGS 17
72 #define MLX_MAX_XFER 65536
73 #define MLX_SGL_SIZE (sizeof(struct mlx_sgentry) * MLX_MAX_SEGS)
74
75 /* This shouldn't be ajusted lightly... */
76 #define MLX_MAX_DRIVES 32
77
78 /* Maximum queue depth, matching the older controllers. */
79 #define MLX_MAX_QUEUECNT 63
80
81 /* Number of CCBs to reserve for control operations. */
82 #define MLX_NCCBS_CONTROL 7
83
84 /* Structure describing a system drive as attached to the controller. */
85 struct mlx_sysdrive {
86 u_int32_t ms_size;
87 u_short ms_state;
88 u_short ms_raidlevel;
89 struct device *ms_dv;
90 };
91
92 /* Optional per-CCB context. */
93 struct mlx_ccb;
94 struct mlx_context {
95 void (*mx_handler)(struct mlx_ccb *);
96 void *mx_context;
97 struct device *mx_dv;
98 };
99
100 /* Command control block. */
101 struct mlx_ccb {
102 union {
103 SIMPLEQ_ENTRY(mlx_ccb) simpleq;
104 SLIST_ENTRY(mlx_ccb) slist;
105 TAILQ_ENTRY(mlx_ccb) tailq;
106 } mc_chain;
107 u_int mc_flags;
108 u_int mc_status;
109 u_int mc_ident;
110 time_t mc_expiry;
111 u_int mc_nsgent;
112 u_int mc_xfer_size;
113 bus_addr_t mc_xfer_phys;
114 bus_dmamap_t mc_xfer_map;
115 struct mlx_context mc_mx;
116 u_int8_t mc_mbox[16];
117 };
118 #define MC_XFER_IN MU_XFER_IN /* Map describes inbound xfer */
119 #define MC_XFER_OUT MU_XFER_OUT /* Map describes outbound xfer */
120 #define MC_WAITING 0x0400 /* We have waiters */
121 #define MC_CONTROL 0x0800 /* Control operation */
122
123 /*
124 * Per-controller state.
125 */
126 struct mlx_softc {
127 struct device mlx_dv;
128 bus_space_tag_t mlx_iot;
129 bus_space_handle_t mlx_ioh;
130 bus_dma_tag_t mlx_dmat;
131 bus_dmamap_t mlx_dmamap;
132 void *mlx_ih;
133
134 SLIST_HEAD(, mlx_ccb) mlx_ccb_freelist;
135 TAILQ_HEAD(, mlx_ccb) mlx_ccb_worklist;
136 SIMPLEQ_HEAD(, mlx_ccb) mlx_ccb_queue;
137 struct mlx_ccb *mlx_ccbs;
138 int mlx_nccbs;
139 int mlx_nccbs_ctrl;
140
141 caddr_t mlx_sgls;
142 bus_addr_t mlx_sgls_paddr;
143
144 int (*mlx_submit)(struct mlx_softc *, struct mlx_ccb *);
145 int (*mlx_findcomplete)(struct mlx_softc *, u_int *, u_int *);
146 void (*mlx_intaction)(struct mlx_softc *, int);
147 int (*mlx_fw_handshake)(struct mlx_softc *, int *, int *, int *);
148 int (*mlx_reset)(struct mlx_softc *);
149
150 int mlx_max_queuecnt;
151 struct mlx_cinfo mlx_ci;
152
153 time_t mlx_lastpoll;
154 u_int mlx_lastevent;
155 u_int mlx_currevent;
156 u_int mlx_bg;
157 struct mlx_rebuild_status mlx_rebuildstat;
158 struct mlx_pause mlx_pause;
159 int mlx_flags;
160
161 struct mlx_sysdrive mlx_sysdrive[MLX_MAX_DRIVES];
162 int mlx_numsysdrives;
163 };
164
165 #define MLX_BG_CHECK 1 /* we started a check */
166 #define MLX_BG_REBUILD 2 /* we started a rebuild */
167 #define MLX_BG_SPONTANEOUS 3 /* it just happened somehow */
168
169 #define MLXF_SPINUP_REPORTED 0x0001 /* "spinning up drives" displayed */
170 #define MLXF_EVENTLOG_BUSY 0x0002 /* currently reading event log */
171 #define MLXF_FW_INITTED 0x0004 /* firmware init crap done */
172 #define MLXF_PAUSEWORKS 0x0008 /* channel pause works as expected */
173 #define MLXF_OPEN 0x0010 /* control device is open */
174 #define MLXF_INITOK 0x0020 /* controller initialised OK */
175 #define MLXF_PERIODIC_CTLR 0x0040 /* periodic check running */
176 #define MLXF_PERIODIC_DRIVE 0x0080 /* periodic check running */
177 #define MLXF_PERIODIC_REBUILD 0x0100 /* periodic check running */
178 #define MLXF_RESCANNING 0x0400 /* rescanning drive table */
179
180 struct mlx_attach_args {
181 int mlxa_unit;
182 };
183
184 int mlx_flush(struct mlx_softc *, int);
185 void mlx_init(struct mlx_softc *, const char *);
186 int mlx_intr(void *);
187
188 int mlx_ccb_alloc(struct mlx_softc *, struct mlx_ccb **, int);
189 const char *mlx_ccb_diagnose(struct mlx_ccb *);
190 void mlx_ccb_enqueue(struct mlx_softc *, struct mlx_ccb *);
191 void mlx_ccb_free(struct mlx_softc *, struct mlx_ccb *);
192 int mlx_ccb_map(struct mlx_softc *, struct mlx_ccb *, void *, int, int);
193 int mlx_ccb_poll(struct mlx_softc *, struct mlx_ccb *, int);
194 void mlx_ccb_unmap(struct mlx_softc *, struct mlx_ccb *);
195 int mlx_ccb_wait(struct mlx_softc *, struct mlx_ccb *);
196
197 static __inline__ void mlx_make_type1(struct mlx_ccb *, u_int8_t, u_int16_t,
198 u_int32_t, u_int8_t, u_int32_t,
199 u_int8_t);
200 static __inline__ void mlx_make_type2(struct mlx_ccb *, u_int8_t, u_int8_t,
201 u_int8_t, u_int8_t, u_int8_t,
202 u_int8_t, u_int8_t, u_int32_t,
203 u_int8_t);
204 static __inline__ void mlx_make_type3(struct mlx_ccb *, u_int8_t, u_int8_t,
205 u_int8_t, u_int16_t, u_int8_t,
206 u_int8_t, u_int32_t, u_int8_t);
207 static __inline__ void mlx_make_type4(struct mlx_ccb *, u_int8_t, u_int16_t,
208 u_int32_t, u_int32_t, u_int8_t);
209 static __inline__ void mlx_make_type5(struct mlx_ccb *, u_int8_t, u_int8_t,
210 u_int8_t, u_int32_t, u_int32_t,
211 u_int8_t);
212
213 static __inline__ u_int8_t mlx_inb(struct mlx_softc *, int);
214 static __inline__ u_int16_t mlx_inw(struct mlx_softc *, int);
215 static __inline__ u_int32_t mlx_inl(struct mlx_softc *, int);
216 static __inline__ void mlx_outb(struct mlx_softc *, int, u_int8_t);
217 static __inline__ void mlx_outw(struct mlx_softc *, int, u_int16_t);
218 static __inline__ void mlx_outl(struct mlx_softc *, int, u_int32_t);
219
220 static __inline__ void
221 mlx_make_type1(struct mlx_ccb *mc, u_int8_t code, u_int16_t f1, u_int32_t f2,
222 u_int8_t f3, u_int32_t f4, u_int8_t f5)
223 {
224
225 mc->mc_mbox[0x0] = code;
226 mc->mc_mbox[0x2] = f1;
227 mc->mc_mbox[0x3] = ((f2 >> 18) & 0xc0) | ((f1 >> 8) & 0x3f);
228 mc->mc_mbox[0x4] = f2;
229 mc->mc_mbox[0x5] = (f2 >> 8);
230 mc->mc_mbox[0x6] = (f2 >> 16);
231 mc->mc_mbox[0x7] = f3;
232 mc->mc_mbox[0x8] = f4;
233 mc->mc_mbox[0x9] = (f4 >> 8);
234 mc->mc_mbox[0xa] = (f4 >> 16);
235 mc->mc_mbox[0xb] = (f4 >> 24);
236 mc->mc_mbox[0xc] = f5;
237 }
238
239 static __inline__ void
240 mlx_make_type2(struct mlx_ccb *mc, u_int8_t code, u_int8_t f1, u_int8_t f2,
241 u_int8_t f3, u_int8_t f4, u_int8_t f5, u_int8_t f6,
242 u_int32_t f7, u_int8_t f8)
243 {
244
245 mc->mc_mbox[0x0] = code;
246 mc->mc_mbox[0x2] = f1;
247 mc->mc_mbox[0x3] = f2;
248 mc->mc_mbox[0x4] = f3;
249 mc->mc_mbox[0x5] = f4;
250 mc->mc_mbox[0x6] = f5;
251 mc->mc_mbox[0x7] = f6;
252 mc->mc_mbox[0x8] = f7;
253 mc->mc_mbox[0x9] = (f7 >> 8);
254 mc->mc_mbox[0xa] = (f7 >> 16);
255 mc->mc_mbox[0xb] = (f7 >> 24);
256 mc->mc_mbox[0xc] = f8;
257 }
258
259 static __inline__ void
260 mlx_make_type3(struct mlx_ccb *mc, u_int8_t code, u_int8_t f1, u_int8_t f2,
261 u_int16_t f3, u_int8_t f4, u_int8_t f5, u_int32_t f6,
262 u_int8_t f7)
263 {
264
265 mc->mc_mbox[0x0] = code;
266 mc->mc_mbox[0x2] = f1;
267 mc->mc_mbox[0x3] = f2;
268 mc->mc_mbox[0x4] = f3;
269 mc->mc_mbox[0x5] = (f3 >> 8);
270 mc->mc_mbox[0x6] = f4;
271 mc->mc_mbox[0x7] = f5;
272 mc->mc_mbox[0x8] = f6;
273 mc->mc_mbox[0x9] = (f6 >> 8);
274 mc->mc_mbox[0xa] = (f6 >> 16);
275 mc->mc_mbox[0xb] = (f6 >> 24);
276 mc->mc_mbox[0xc] = f7;
277 }
278
279 static __inline__ void
280 mlx_make_type4(struct mlx_ccb *mc, u_int8_t code, u_int16_t f1, u_int32_t f2,
281 u_int32_t f3, u_int8_t f4)
282 {
283
284 mc->mc_mbox[0x0] = code;
285 mc->mc_mbox[0x2] = f1;
286 mc->mc_mbox[0x3] = (f1 >> 8);
287 mc->mc_mbox[0x4] = f2;
288 mc->mc_mbox[0x5] = (f2 >> 8);
289 mc->mc_mbox[0x6] = (f2 >> 16);
290 mc->mc_mbox[0x7] = (f2 >> 24);
291 mc->mc_mbox[0x8] = f3;
292 mc->mc_mbox[0x9] = (f3 >> 8);
293 mc->mc_mbox[0xa] = (f3 >> 16);
294 mc->mc_mbox[0xb] = (f3 >> 24);
295 mc->mc_mbox[0xc] = f4;
296 }
297
298 static __inline__ void
299 mlx_make_type5(struct mlx_ccb *mc, u_int8_t code, u_int8_t f1, u_int8_t f2,
300 u_int32_t f3, u_int32_t f4, u_int8_t f5)
301 {
302
303 mc->mc_mbox[0x0] = code;
304 mc->mc_mbox[0x2] = f1;
305 mc->mc_mbox[0x3] = f2;
306 mc->mc_mbox[0x4] = f3;
307 mc->mc_mbox[0x5] = (f3 >> 8);
308 mc->mc_mbox[0x6] = (f3 >> 16);
309 mc->mc_mbox[0x7] = (f3 >> 24);
310 mc->mc_mbox[0x8] = f4;
311 mc->mc_mbox[0x9] = (f4 >> 8);
312 mc->mc_mbox[0xa] = (f4 >> 16);
313 mc->mc_mbox[0xb] = (f4 >> 24);
314 mc->mc_mbox[0xc] = f5;
315 }
316
317 static __inline__ u_int8_t
318 mlx_inb(struct mlx_softc *mlx, int off)
319 {
320
321 bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, off, 1,
322 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
323 return (bus_space_read_1(mlx->mlx_iot, mlx->mlx_ioh, off));
324 }
325
326 static __inline__ u_int16_t
327 mlx_inw(struct mlx_softc *mlx, int off)
328 {
329
330 bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, off, 2,
331 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
332 return (bus_space_read_2(mlx->mlx_iot, mlx->mlx_ioh, off));
333 }
334
335 static __inline__ u_int32_t
336 mlx_inl(struct mlx_softc *mlx, int off)
337 {
338
339 bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, off, 4,
340 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
341 return (bus_space_read_4(mlx->mlx_iot, mlx->mlx_ioh, off));
342 }
343
344 static __inline__ void
345 mlx_outb(struct mlx_softc *mlx, int off, u_int8_t val)
346 {
347
348 bus_space_write_1(mlx->mlx_iot, mlx->mlx_ioh, off, val);
349 bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, off, 1,
350 BUS_SPACE_BARRIER_WRITE);
351 }
352
353 static __inline__ void
354 mlx_outw(struct mlx_softc *mlx, int off, u_int16_t val)
355 {
356
357 bus_space_write_2(mlx->mlx_iot, mlx->mlx_ioh, off, val);
358 bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, off, 2,
359 BUS_SPACE_BARRIER_WRITE);
360 }
361
362 static __inline__ void
363 mlx_outl(struct mlx_softc *mlx, int off, u_int32_t val)
364 {
365
366 bus_space_write_4(mlx->mlx_iot, mlx->mlx_ioh, off, val);
367 bus_space_barrier(mlx->mlx_iot, mlx->mlx_ioh, off, 4,
368 BUS_SPACE_BARRIER_WRITE);
369 }
370
371 #endif /* !_IC_MLXVAR_H_ */
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