FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/mtd803var.h
1 /* $NetBSD: mtd803var.h,v 1.2 2003/09/23 19:37:39 martin Exp $ */
2
3 /*-
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Peter Bex <Peter.Bex@student.kun.nl>.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/device.h>
40 #include <sys/socket.h>
41 #include <net/if.h>
42 #include <net/if_ether.h>
43 #include <net/if_media.h>
44 #include <dev/mii/miivar.h>
45
46
47 /* Number of Tx and Rx descriptors */
48 #define MTD_NUM_TXD 64
49 #define MTD_NUM_RXD 64
50 /* Tx and Rx buffer size */
51 #define MTD_RXBUF_SIZE 1536
52 #define MTD_TXBUF_SIZE 1536
53
54 /* DMA mem must be longword (4 bytes) aligned */
55 #define MTD_DMA_ALIGN 4
56
57
58 /* Descriptor structure */
59 struct mtd_desc {
60 u_int32_t stat; /* Status field */
61 u_int32_t conf; /* Config field */
62 u_int32_t data; /* Data buffer start address */
63 u_int32_t next; /* Next descriptor address */
64 };
65
66 /* Softc struct */
67 struct mtd_softc {
68 struct device dev;
69 struct mii_data mii;
70 struct ethercom ethercom;
71 bus_space_tag_t bus_tag;
72 bus_space_handle_t bus_handle;
73 void * sd_hook;
74 u_int8_t eaddr[ETHER_ADDR_LEN];
75 volatile unsigned int cur_tx;
76 volatile unsigned int cur_rx;
77
78 bus_dma_tag_t dma_tag;
79 struct mtd_desc * desc;
80 bus_dmamap_t desc_dma_map;
81 caddr_t buf;
82 bus_dmamap_t buf_dma_map;
83
84 #if NRND > 0
85 rndsource_element_t rnd_src;
86 #endif
87 };
88
89
90 /* Transmit descriptor layout */
91 /* Status register */
92 #define MTD_TXD_OWNER 0x80000000 /* Owner bit */
93 #define MTD_TXD_RSRVD0 0x7fffc000 /* Bits [30:14] are reserved */
94 #define MTD_TXD_ABORT 0x00002000 /* Transmit aborted */
95 #define MTD_TXD_CSL 0x00001000 /* Carrier Sense Loss */
96 #define MTD_TXD_LCOL 0x00000800 /* Late collision */
97 #define MTD_TXD_EXCOL 0x00000400 /* Excessive collisions */
98 #define MTD_TXD_DFD 0x00000200 /* Deferred */
99 #define MTD_TXD_HBFAIL 0x00000100 /* Heart-beat failure */
100 #define MTD_TXD_NRC 0x000000ff /* Collision Retry Count */
101 /* Configuration register */
102 #define MTD_TXD_CONF_IRQC 0x80000000 /* Interrupt control */
103 #define MTD_TXD_CONF_EIRQC 0x40000000 /* Early interrupt control */
104 #define MTD_TXD_CONF_LSD 0x20000000 /* Last descriptor */
105 #define MTD_TXD_CONF_FSD 0x10000000 /* First descriptor */
106 #define MTD_TXD_CONF_CRC 0x08000000 /* CRC append */
107 #define MTD_TXD_CONF_PAD 0x04000000 /* Pad control */
108 #define MTD_TXD_CONF_RLCOL 0x02000000 /* Retry Late Collision */
109 #define MTD_TXD_CONF_RSRVD0 0x01c00000 /* Bits [24:22] are reserved */
110 #define MTD_TXD_CONF_PKTS 0x003ff800 /* Packet size */
111 #define MTD_TXD_CONF_BUFS 0x000007ff /* Transmit buffer size */
112
113 #define MTD_TXD_PKTS_SHIFT 11
114
115 /* Receive descriptor layout */
116 /* Status register */
117 #define MTD_RXD_OWNER 0x80000000 /* Owner bit */
118 #define MTD_RXD_RSRVD3 0x70000000 /* Bits [30:28] are reserved */
119 #define MTD_RXD_FLEN 0x0fff0000 /* Frame length */
120 #define MTD_RXD_RSRVD2 0x00008000 /* Bit 15 is reserved */
121 #define MTD_RXD_MAR 0x00004000 /* Multicast Address Received */
122 #define MTD_RXD_BAR 0x00002000 /* Broadcast Address Received */
123 #define MTD_RXD_PAR 0x00001000 /* Physical Address Received */
124 #define MTD_RXD_FSD 0x00000800 /* First Descriptor */
125 #define MTD_RXD_LSD 0x00000400 /* Last Descriptor */
126 #define MTD_RXD_RSRVD1 0x00000300 /* Bits [9:8] are reserved */
127 #define MTD_RXD_ERRSUM 0x00000080 /* Error summary */
128 #define MTD_RXD_RUNT 0x00000040 /* Runt packet received */
129 #define MTD_RXD_LONG 0x00000020 /* Long packet received */
130 #define MTD_RXD_FALERR 0x00000010 /* Frame alignment error */
131 #define MTD_RXD_CRC 0x00000008 /* CRC error. See manual :) */
132 #define MTD_RXD_RXERR 0x00000004 /* Receive error */
133 #define MTD_RXD_RSRVD0 0x00000003 /* Bits [1:0] are reserved */
134 /* Configuration register */
135 #define MTD_RXD_CONF_RSRVD0 0xfffff800 /* Bits [31:11] are reserved */
136 #define MTD_RXD_CONF_BUFS 0x000007ff /* Receive buffer size */
137
138 #define MTD_RXD_FLEN_SHIFT 16
139
140 extern int mtd_config __P((struct mtd_softc *));
141 extern int mtd_irq_h __P((void *));
Cache object: 9b96a6059425138f690447023f031d2d
|