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sys/dev/ic/ncr53c9x.c
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1 /* $NetBSD: ncr53c9x.c,v 1.110.2.2 2004/09/11 13:03:49 he Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1994 Peter Galbavy 41 * Copyright (c) 1995 Paul Kranenburg 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Peter Galbavy 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 /* 72 * Based on aic6360 by Jarle Greipsland 73 * 74 * Acknowledgements: Many of the algorithms used in this driver are 75 * inspired by the work of Julian Elischer (julian@tfs.com) and 76 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.110.2.2 2004/09/11 13:03:49 he Exp $"); 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/callout.h> 85 #include <sys/kernel.h> 86 #include <sys/errno.h> 87 #include <sys/ioctl.h> 88 #include <sys/device.h> 89 #include <sys/buf.h> 90 #include <sys/malloc.h> 91 #include <sys/proc.h> 92 #include <sys/queue.h> 93 #include <sys/pool.h> 94 #include <sys/scsiio.h> 95 96 #include <dev/scsipi/scsi_all.h> 97 #include <dev/scsipi/scsipi_all.h> 98 #include <dev/scsipi/scsiconf.h> 99 #include <dev/scsipi/scsi_message.h> 100 101 #include <dev/ic/ncr53c9xreg.h> 102 #include <dev/ic/ncr53c9xvar.h> 103 104 int ncr53c9x_debug = NCR_SHOWMISC; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/ 105 #ifdef DEBUG 106 int ncr53c9x_notag = 0; 107 #endif 108 109 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *); 110 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 111 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int); 112 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *); 113 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *, 114 struct scsipi_xfer *, int); 115 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *); 116 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 117 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *); 118 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *); 119 /*static*/ void ncr53c9x_timeout(void *arg); 120 /*static*/ void ncr53c9x_watch(void *arg); 121 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 122 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, 123 struct ncr53c9x_ecb *); 124 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long, 125 caddr_t, int, struct proc *); 126 127 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 128 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 129 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int); 130 131 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int); 132 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *, 133 struct ncr53c9x_tinfo *); 134 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int); 135 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *, 136 int64_t lun); 137 138 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int); 139 140 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int); 141 #define NCR_RDFIFO_START 0 142 #define NCR_RDFIFO_CONTINUE 1 143 144 145 #define NCR_SET_COUNT(sc, size) do { \ 146 NCR_WRITE_REG((sc), NCR_TCL, (size)); \ 147 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \ 148 if ((sc->sc_cfg2 & NCRCFG2_FE) || \ 149 (sc->sc_rev == NCR_VARIANT_FAS366)) { \ 150 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \ 151 } \ 152 if (sc->sc_rev == NCR_VARIANT_FAS366) { \ 153 NCR_WRITE_REG(sc, NCR_RCH, 0); \ 154 } \ 155 } while (0) 156 157 static int ecb_pool_initialized = 0; 158 static struct pool ecb_pool; 159 160 /* 161 * Names for the NCR53c9x variants, corresponding to the variant tags 162 * in ncr53c9xvar.h. 163 */ 164 static const char *ncr53c9x_variant_names[] = { 165 "ESP100", 166 "ESP100A", 167 "ESP200", 168 "NCR53C94", 169 "NCR53C96", 170 "ESP406", 171 "FAS408", 172 "FAS216", 173 "AM53C974", 174 "FAS366/HME", 175 "NCR53C90 (86C01)", 176 }; 177 178 /* 179 * Search linked list for LUN info by LUN id. 180 */ 181 static struct ncr53c9x_linfo * 182 ncr53c9x_lunsearch(ti, lun) 183 struct ncr53c9x_tinfo *ti; 184 int64_t lun; 185 { 186 struct ncr53c9x_linfo *li; 187 LIST_FOREACH(li, &ti->luns, link) 188 if (li->lun == lun) 189 return (li); 190 return (NULL); 191 } 192 193 /* 194 * Attach this instance, and then all the sub-devices 195 */ 196 void 197 ncr53c9x_attach(sc) 198 struct ncr53c9x_softc *sc; 199 { 200 struct scsipi_adapter *adapt = &sc->sc_adapter; 201 struct scsipi_channel *chan = &sc->sc_channel; 202 203 simple_lock_init(&sc->sc_lock); 204 205 /* 206 * Note, the front-end has set us up to print the chip variation. 207 */ 208 if (sc->sc_rev >= NCR_VARIANT_MAX) { 209 printf("\n%s: unknown variant %d, devices not attached\n", 210 sc->sc_dev.dv_xname, sc->sc_rev); 211 return; 212 } 213 214 printf(": %s, %dMHz, SCSI ID %d\n", 215 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id); 216 217 sc->sc_ntarg = (sc->sc_rev == NCR_VARIANT_FAS366) ? 16 : 8; 218 219 /* 220 * Allocate SCSI message buffers. 221 * Front-ends can override allocation to avoid alignment 222 * handling in the DMA engines. Note that that ncr53c9x_msgout() 223 * can request a 1 byte DMA transfer. 224 */ 225 if (sc->sc_omess == NULL) 226 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT); 227 228 if (sc->sc_imess == NULL) 229 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT); 230 231 sc->sc_tinfo = malloc(sc->sc_ntarg * sizeof(sc->sc_tinfo[0]), 232 M_DEVBUF, M_NOWAIT | M_ZERO); 233 234 if (!sc->sc_omess || !sc->sc_imess || !sc->sc_tinfo) { 235 printf("out of memory\n"); 236 return; 237 } 238 239 callout_init(&sc->sc_watchdog); 240 241 /* 242 * Treat NCR53C90 with the 86C01 DMA chip exactly as ESP100 243 * from now on. 244 */ 245 if (sc->sc_rev == NCR_VARIANT_NCR53C90_86C01) 246 sc->sc_rev = NCR_VARIANT_ESP100; 247 248 sc->sc_ccf = FREQTOCCF(sc->sc_freq); 249 250 /* The value *must not* be == 1. Make it 2 */ 251 if (sc->sc_ccf == 1) 252 sc->sc_ccf = 2; 253 254 /* 255 * The recommended timeout is 250ms. This register is loaded 256 * with a value calculated as follows, from the docs: 257 * 258 * (timout period) x (CLK frequency) 259 * reg = ------------------------------------- 260 * 8192 x (Clock Conversion Factor) 261 * 262 * Since CCF has a linear relation to CLK, this generally computes 263 * to the constant of 153. 264 */ 265 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); 266 267 /* CCF register only has 3 bits; 0 is actually 8 */ 268 sc->sc_ccf &= 7; 269 270 /* 271 * Fill in the scsipi_adapter. 272 */ 273 adapt->adapt_dev = &sc->sc_dev; 274 adapt->adapt_nchannels = 1; 275 adapt->adapt_openings = 256; 276 adapt->adapt_max_periph = 256; 277 adapt->adapt_ioctl = ncr53c9x_ioctl; 278 /* adapt_request initialized by front-end */ 279 /* adapt_minphys initialized by front-end */ 280 281 /* 282 * Fill in the scsipi_channel. 283 */ 284 memset(chan, 0, sizeof(*chan)); 285 chan->chan_adapter = adapt; 286 chan->chan_bustype = &scsi_bustype; 287 chan->chan_channel = 0; 288 chan->chan_ntargets = sc->sc_ntarg; 289 chan->chan_nluns = 8; 290 chan->chan_id = sc->sc_id; 291 292 /* 293 * Add reference to adapter so that we drop the reference after 294 * config_found() to make sure the adatper is disabled. 295 */ 296 if (scsipi_adapter_addref(adapt) != 0) { 297 printf("%s: unable to enable controller\n", 298 sc->sc_dev.dv_xname); 299 return; 300 } 301 302 /* Reset state & bus */ 303 sc->sc_cfflags = sc->sc_dev.dv_cfdata->cf_flags; 304 sc->sc_state = 0; 305 ncr53c9x_init(sc, 1); 306 307 /* 308 * Now try to attach all the sub-devices 309 */ 310 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 311 312 scsipi_adapter_delref(adapt); 313 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc); 314 } 315 316 int 317 ncr53c9x_detach(sc, flags) 318 struct ncr53c9x_softc *sc; 319 int flags; 320 { 321 int error; 322 323 if (sc->sc_child) { 324 error = config_detach(sc->sc_child, flags); 325 if (error) 326 return (error); 327 } 328 329 free(sc->sc_imess, M_DEVBUF); 330 free(sc->sc_omess, M_DEVBUF); 331 332 return (0); 333 } 334 335 /* 336 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus, 337 * only this controller, but kills any on-going commands, and also stops 338 * and resets the DMA. 339 * 340 * After reset, registers are loaded with the defaults from the attach 341 * routine above. 342 */ 343 void 344 ncr53c9x_reset(sc) 345 struct ncr53c9x_softc *sc; 346 { 347 348 /* reset DMA first */ 349 NCRDMA_RESET(sc); 350 351 /* reset SCSI chip */ 352 NCRCMD(sc, NCRCMD_RSTCHIP); 353 NCRCMD(sc, NCRCMD_NOP); 354 DELAY(500); 355 356 /* do these backwards, and fall through */ 357 switch (sc->sc_rev) { 358 case NCR_VARIANT_ESP406: 359 case NCR_VARIANT_FAS408: 360 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT); 361 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4); 362 case NCR_VARIANT_AM53C974: 363 case NCR_VARIANT_FAS216: 364 case NCR_VARIANT_NCR53C94: 365 case NCR_VARIANT_NCR53C96: 366 case NCR_VARIANT_ESP200: 367 sc->sc_features |= NCR_F_HASCFG3; 368 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 369 case NCR_VARIANT_ESP100A: 370 sc->sc_features |= NCR_F_SELATN3; 371 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 372 case NCR_VARIANT_ESP100: 373 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 374 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 375 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 376 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 377 break; 378 379 case NCR_VARIANT_FAS366: 380 sc->sc_features |= 381 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3; 382 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO; 383 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI; 384 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 385 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */ 386 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 387 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 388 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 389 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 390 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 391 break; 392 393 default: 394 printf("%s: unknown revision code, assuming ESP100\n", 395 sc->sc_dev.dv_xname); 396 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 397 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 398 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 399 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 400 } 401 402 if (sc->sc_rev == NCR_VARIANT_AM53C974) 403 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4); 404 405 #if 0 406 printf("%s: ncr53c9x_reset: revision %d\n", 407 sc->sc_dev.dv_xname, sc->sc_rev); 408 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, " 409 "ccf 0x%x, timeout 0x%x\n", 410 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, 411 sc->sc_ccf, sc->sc_timeout); 412 #endif 413 } 414 415 /* 416 * Reset the SCSI bus, but not the chip 417 */ 418 void 419 ncr53c9x_scsi_reset(sc) 420 struct ncr53c9x_softc *sc; 421 { 422 423 (*sc->sc_glue->gl_dma_stop)(sc); 424 425 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname); 426 NCRCMD(sc, NCRCMD_RSTSCSI); 427 } 428 429 /* 430 * Initialize ncr53c9x state machine 431 */ 432 void 433 ncr53c9x_init(sc, doreset) 434 struct ncr53c9x_softc *sc; 435 int doreset; 436 { 437 struct ncr53c9x_ecb *ecb; 438 struct ncr53c9x_linfo *li; 439 int i, r; 440 441 NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state)); 442 443 if (!ecb_pool_initialized) { 444 /* All instances share this pool */ 445 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0, 446 "ncr53c9x_ecb", NULL); 447 /* make sure to always have some items to play with */ 448 if (pool_prime(&ecb_pool, 1) == ENOMEM) { 449 printf("WARNING: not enough memory for ncr53c9x_ecb\n"); 450 } 451 ecb_pool_initialized = 1; 452 } 453 454 if (sc->sc_state == 0) { 455 /* First time through; initialize. */ 456 457 TAILQ_INIT(&sc->ready_list); 458 sc->sc_nexus = NULL; 459 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 460 for (r = 0; r < sc->sc_ntarg; r++) { 461 LIST_INIT(&sc->sc_tinfo[r].luns); 462 } 463 } else { 464 /* Cancel any active commands. */ 465 sc->sc_state = NCR_CLEANING; 466 sc->sc_msgify = 0; 467 if ((ecb = sc->sc_nexus) != NULL) { 468 ecb->xs->error = XS_TIMEOUT; 469 ncr53c9x_done(sc, ecb); 470 } 471 /* Cancel outstanding disconnected commands on each LUN */ 472 for (r = 0; r < sc->sc_ntarg; r++) { 473 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) { 474 if ((ecb = li->untagged) != NULL) { 475 li->untagged = NULL; 476 /* 477 * XXXXXXX 478 * 479 * Should we terminate a command 480 * that never reached the disk? 481 */ 482 li->busy = 0; 483 ecb->xs->error = XS_TIMEOUT; 484 ncr53c9x_done(sc, ecb); 485 } 486 for (i = 0; i < 256; i++) 487 if ((ecb = li->queued[i])) { 488 li->queued[i] = NULL; 489 ecb->xs->error = XS_TIMEOUT; 490 ncr53c9x_done(sc, ecb); 491 } 492 li->used = 0; 493 } 494 } 495 } 496 497 /* 498 * reset the chip to a known state 499 */ 500 ncr53c9x_reset(sc); 501 502 sc->sc_flags = 0; 503 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 504 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; 505 506 for (r = 0; r < sc->sc_ntarg; r++) { 507 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r]; 508 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */ 509 510 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<((r&7)+8)))) 511 ? 0 : T_SYNCHOFF) | 512 ((sc->sc_cfflags & (1<<(r&7))) ? T_RSELECTOFF : 0); 513 #ifdef DEBUG 514 if (ncr53c9x_notag) 515 ti->flags &= ~T_TAG; 516 #endif 517 ti->period = sc->sc_minsync; 518 ti->offset = 0; 519 ti->cfg3 = 0; 520 521 ncr53c9x_update_xfer_mode(sc, r); 522 } 523 524 if (doreset) { 525 sc->sc_state = NCR_SBR; 526 NCRCMD(sc, NCRCMD_RSTSCSI); 527 } else { 528 sc->sc_state = NCR_IDLE; 529 ncr53c9x_sched(sc); 530 } 531 532 /* Notify upper layer */ 533 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_RESET, NULL); 534 } 535 536 /* 537 * Read the NCR registers, and save their contents for later use. 538 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading 539 * NCR_INTR - so make sure it is the last read. 540 * 541 * I think that (from reading the docs) most bits in these registers 542 * only make sense when he DMA CSR has an interrupt showing. Call only 543 * if an interrupt is pending. 544 */ 545 __inline__ void 546 ncr53c9x_readregs(sc) 547 struct ncr53c9x_softc *sc; 548 { 549 550 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT); 551 /* Only the stepo bits are of interest */ 552 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK; 553 554 if (sc->sc_rev == NCR_VARIANT_FAS366) 555 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2); 556 557 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR); 558 559 if (sc->sc_glue->gl_clear_latched_intr != NULL) 560 (*sc->sc_glue->gl_clear_latched_intr)(sc); 561 562 /* 563 * Determine the SCSI bus phase, return either a real SCSI bus phase 564 * or some pseudo phase we use to detect certain exceptions. 565 */ 566 567 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ? 568 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE; 569 570 NCR_INTS(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ", 571 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2)); 572 } 573 574 /* 575 * Convert Synchronous Transfer Period to chip register Clock Per Byte value. 576 */ 577 static inline int 578 ncr53c9x_stp2cpb(sc, period) 579 struct ncr53c9x_softc *sc; 580 int period; 581 { 582 int v; 583 v = (sc->sc_freq * period) / 250; 584 if (ncr53c9x_cpb2stp(sc, v) < period) 585 /* Correct round-down error */ 586 v++; 587 return (v); 588 } 589 590 static inline void 591 ncr53c9x_setsync(sc, ti) 592 struct ncr53c9x_softc *sc; 593 struct ncr53c9x_tinfo *ti; 594 { 595 u_char syncoff, synctp; 596 u_char cfg3 = sc->sc_cfg3 | ti->cfg3; 597 598 if (ti->flags & T_SYNCMODE) { 599 syncoff = ti->offset; 600 synctp = ncr53c9x_stp2cpb(sc, ti->period); 601 if (sc->sc_features & NCR_F_FASTSCSI) { 602 /* 603 * If the period is 200ns or less (ti->period <= 50), 604 * put the chip in Fast SCSI mode. 605 */ 606 if (ti->period <= 50) 607 /* 608 * There are (at least) 4 variations of the 609 * configuration 3 register. The drive attach 610 * routine sets the appropriate bit to put the 611 * chip into Fast SCSI mode so that it doesn't 612 * have to be figured out here each time. 613 */ 614 cfg3 |= sc->sc_cfg3_fscsi; 615 } 616 617 /* 618 * Am53c974 requires different SYNCTP values when the 619 * FSCSI bit is off. 620 */ 621 if (sc->sc_rev == NCR_VARIANT_AM53C974 && 622 (cfg3 & NCRAMDCFG3_FSCSI) == 0) 623 synctp--; 624 } else { 625 syncoff = 0; 626 synctp = 0; 627 } 628 629 if (sc->sc_features & NCR_F_HASCFG3) 630 NCR_WRITE_REG(sc, NCR_CFG3, cfg3); 631 632 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff); 633 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp); 634 } 635 636 /* 637 * Send a command to a target, set the driver state to NCR_SELECTING 638 * and let the caller take care of the rest. 639 * 640 * Keeping this as a function allows me to say that this may be done 641 * by DMA instead of programmed I/O soon. 642 */ 643 void 644 ncr53c9x_select(sc, ecb) 645 struct ncr53c9x_softc *sc; 646 struct ncr53c9x_ecb *ecb; 647 { 648 struct scsipi_periph *periph = ecb->xs->xs_periph; 649 int target = periph->periph_target; 650 int lun = periph->periph_lun; 651 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 652 int tiflags = ti->flags; 653 u_char *cmd; 654 int clen; 655 int selatn3, selatns; 656 size_t dmasize; 657 658 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ", 659 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1])); 660 661 sc->sc_state = NCR_SELECTING; 662 /* 663 * Schedule the timeout now, the first time we will go away 664 * expecting to come back due to an interrupt, because it is 665 * always possible that the interrupt may never happen. 666 */ 667 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) { 668 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 669 ncr53c9x_timeout, ecb); 670 } 671 672 /* 673 * The docs say the target register is never reset, and I 674 * can't think of a better place to set it 675 */ 676 if (sc->sc_rev == NCR_VARIANT_FAS366) { 677 NCRCMD(sc, NCRCMD_FLUSH); 678 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME); 679 } else { 680 NCR_WRITE_REG(sc, NCR_SELID, target); 681 } 682 ncr53c9x_setsync(sc, ti); 683 684 if ((ecb->flags & ECB_SENSE) != 0) { 685 /* 686 * For REQUEST SENSE, we should not send an IDENTIFY or 687 * otherwise mangle the target. There should be no MESSAGE IN 688 * phase. 689 */ 690 if (sc->sc_features & NCR_F_DMASELECT) { 691 /* setup DMA transfer for command */ 692 dmasize = clen = ecb->clen; 693 sc->sc_cmdlen = clen; 694 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 695 696 /* Program the SCSI counter */ 697 NCR_SET_COUNT(sc, dmasize); 698 699 if (sc->sc_rev != NCR_VARIANT_FAS366) 700 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 701 702 /* And get the targets attention */ 703 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA); 704 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, 705 &dmasize); 706 NCRDMA_GO(sc); 707 } else { 708 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 709 NCRCMD(sc, NCRCMD_SELNATN); 710 } 711 return; 712 } 713 714 selatn3 = selatns = 0; 715 if (ecb->tag[0] != 0) { 716 if (sc->sc_features & NCR_F_SELATN3) 717 /* use SELATN3 to send tag messages */ 718 selatn3 = 1; 719 else 720 /* We don't have SELATN3; use SELATNS to send tags */ 721 selatns = 1; 722 } 723 724 if (ti->flags & T_NEGOTIATE) { 725 /* We have to use SELATNS to send sync/wide messages */ 726 selatn3 = 0; 727 selatns = 1; 728 } 729 730 cmd = (u_char *)&ecb->cmd.cmd; 731 732 if (selatn3) { 733 /* We'll use tags with SELATN3 */ 734 clen = ecb->clen + 3; 735 cmd -= 3; 736 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */ 737 cmd[1] = ecb->tag[0]; /* msg[1] */ 738 cmd[2] = ecb->tag[1]; /* msg[2] */ 739 } else { 740 /* We don't have tags, or will send messages with SELATNS */ 741 clen = ecb->clen + 1; 742 cmd -= 1; 743 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0); 744 } 745 746 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) { 747 748 /* setup DMA transfer for command */ 749 dmasize = clen; 750 sc->sc_cmdlen = clen; 751 sc->sc_cmdp = cmd; 752 753 /* Program the SCSI counter */ 754 NCR_SET_COUNT(sc, dmasize); 755 756 /* load the count in */ 757 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */ 758 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 759 760 /* And get the targets attention */ 761 if (selatn3) { 762 sc->sc_msgout = SEND_TAG; 763 sc->sc_flags |= NCR_ATN; 764 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA); 765 } else 766 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA); 767 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize); 768 NCRDMA_GO(sc); 769 return; 770 } 771 772 /* 773 * Who am I. This is where we tell the target that we are 774 * happy for it to disconnect etc. 775 */ 776 777 /* Now get the command into the FIFO */ 778 ncr53c9x_wrfifo(sc, cmd, clen); 779 780 /* And get the targets attention */ 781 if (selatns) { 782 NCR_MSGS(("SELATNS \n")); 783 /* Arbitrate, select and stop after IDENTIFY message */ 784 NCRCMD(sc, NCRCMD_SELATNS); 785 } else if (selatn3) { 786 sc->sc_msgout = SEND_TAG; 787 sc->sc_flags |= NCR_ATN; 788 NCRCMD(sc, NCRCMD_SELATN3); 789 } else 790 NCRCMD(sc, NCRCMD_SELATN); 791 } 792 793 void 794 ncr53c9x_free_ecb(sc, ecb) 795 struct ncr53c9x_softc *sc; 796 struct ncr53c9x_ecb *ecb; 797 { 798 int s; 799 800 s = splbio(); 801 ecb->flags = 0; 802 pool_put(&ecb_pool, (void *)ecb); 803 splx(s); 804 return; 805 } 806 807 struct ncr53c9x_ecb * 808 ncr53c9x_get_ecb(sc, flags) 809 struct ncr53c9x_softc *sc; 810 int flags; 811 { 812 struct ncr53c9x_ecb *ecb; 813 int s; 814 815 s = splbio(); 816 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT); 817 splx(s); 818 if (ecb) { 819 memset(ecb, 0, sizeof(*ecb)); 820 ecb->flags |= ECB_ALLOC; 821 } 822 return (ecb); 823 } 824 825 /* 826 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 827 */ 828 829 /* 830 * Start a SCSI-command 831 * This function is called by the higher level SCSI-driver to queue/run 832 * SCSI-commands. 833 */ 834 835 void 836 ncr53c9x_scsipi_request(chan, req, arg) 837 struct scsipi_channel *chan; 838 scsipi_adapter_req_t req; 839 void *arg; 840 { 841 struct scsipi_xfer *xs; 842 struct scsipi_periph *periph; 843 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 844 struct ncr53c9x_ecb *ecb; 845 int s, flags; 846 847 NCR_TRACE(("[ncr53c9x_scsipi_request] ")); 848 849 s = splbio(); 850 simple_lock(&sc->sc_lock); 851 852 switch (req) { 853 case ADAPTER_REQ_RUN_XFER: 854 xs = arg; 855 periph = xs->xs_periph; 856 flags = xs->xs_control; 857 858 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 859 periph->periph_target)); 860 861 /* Get an ECB to use. */ 862 ecb = ncr53c9x_get_ecb(sc, xs->xs_control); 863 /* 864 * This should never happen as we track resources 865 * in the mid-layer, but for now it can as pool_get() 866 * can fail. 867 */ 868 if (ecb == NULL) { 869 scsipi_printaddr(periph); 870 printf("unable to allocate ecb\n"); 871 xs->error = XS_RESOURCE_SHORTAGE; 872 simple_unlock(&sc->sc_lock); 873 splx(s); 874 scsipi_done(xs); 875 return; 876 } 877 878 /* Initialize ecb */ 879 ecb->xs = xs; 880 ecb->timeout = xs->timeout; 881 882 if (flags & XS_CTL_RESET) { 883 ecb->flags |= ECB_RESET; 884 ecb->clen = 0; 885 ecb->dleft = 0; 886 } else { 887 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen); 888 ecb->clen = xs->cmdlen; 889 ecb->daddr = xs->data; 890 ecb->dleft = xs->datalen; 891 } 892 ecb->stat = 0; 893 894 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); 895 ecb->flags |= ECB_READY; 896 if (sc->sc_state == NCR_IDLE) 897 ncr53c9x_sched(sc); 898 899 if ((flags & XS_CTL_POLL) == 0) 900 break; 901 902 /* Not allowed to use interrupts, use polling instead */ 903 if (ncr53c9x_poll(sc, xs, ecb->timeout)) { 904 ncr53c9x_timeout(ecb); 905 if (ncr53c9x_poll(sc, xs, ecb->timeout)) 906 ncr53c9x_timeout(ecb); 907 } 908 break; 909 910 case ADAPTER_REQ_GROW_RESOURCES: 911 /* XXX Not supported. */ 912 break; 913 914 case ADAPTER_REQ_SET_XFER_MODE: 915 { 916 struct ncr53c9x_tinfo *ti; 917 struct scsipi_xfer_mode *xm = arg; 918 919 ti = &sc->sc_tinfo[xm->xm_target]; 920 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE); 921 ti->period = 0; 922 ti->offset = 0; 923 924 if ((sc->sc_cfflags & (1<<((xm->xm_target&7)+16))) == 0 && 925 (xm->xm_mode & PERIPH_CAP_TQING)) { 926 NCR_MISC(("%s: target %d: tagged queuing\n", 927 sc->sc_dev.dv_xname, xm->xm_target)); 928 ti->flags |= T_TAG; 929 } else 930 ti->flags &= ~T_TAG; 931 932 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) { 933 NCR_MISC(("%s: target %d: wide scsi negotiation\n", 934 sc->sc_dev.dv_xname, xm->xm_target)); 935 if (sc->sc_rev == NCR_VARIANT_FAS366) { 936 ti->flags |= T_WIDE; 937 ti->width = 1; 938 } 939 } 940 941 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 && 942 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) { 943 NCR_MISC(("%s: target %d: sync negotiation\n", 944 sc->sc_dev.dv_xname, xm->xm_target)); 945 ti->flags |= T_NEGOTIATE; 946 ti->period = sc->sc_minsync; 947 } 948 /* 949 * If we're not going to negotiate, send the notification 950 * now, since it won't happen later. 951 */ 952 if ((ti->flags & T_NEGOTIATE) == 0) 953 ncr53c9x_update_xfer_mode(sc, xm->xm_target); 954 } 955 break; 956 } 957 958 simple_unlock(&sc->sc_lock); 959 splx(s); 960 } 961 962 void 963 ncr53c9x_update_xfer_mode(sc, target) 964 struct ncr53c9x_softc *sc; 965 int target; 966 { 967 struct scsipi_xfer_mode xm; 968 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 969 970 xm.xm_target = target; 971 xm.xm_mode = 0; 972 xm.xm_period = 0; 973 xm.xm_offset = 0; 974 975 if (ti->flags & T_SYNCMODE) { 976 xm.xm_mode |= PERIPH_CAP_SYNC; 977 xm.xm_period = ti->period; 978 xm.xm_offset = ti->offset; 979 } 980 if (ti->width) 981 xm.xm_mode |= PERIPH_CAP_WIDE16; 982 983 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG) 984 xm.xm_mode |= PERIPH_CAP_TQING; 985 986 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 987 } 988 989 /* 990 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 991 */ 992 int 993 ncr53c9x_poll(sc, xs, count) 994 struct ncr53c9x_softc *sc; 995 struct scsipi_xfer *xs; 996 int count; 997 { 998 999 NCR_TRACE(("[ncr53c9x_poll] ")); 1000 while (count) { 1001 if (NCRDMA_ISINTR(sc)) { 1002 simple_unlock(&sc->sc_lock); 1003 ncr53c9x_intr(sc); 1004 simple_lock(&sc->sc_lock); 1005 } 1006 #if alternatively 1007 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) 1008 ncr53c9x_intr(sc); 1009 #endif 1010 if ((xs->xs_status & XS_STS_DONE) != 0) 1011 return (0); 1012 if (sc->sc_state == NCR_IDLE) { 1013 NCR_TRACE(("[ncr53c9x_poll: rescheduling] ")); 1014 ncr53c9x_sched(sc); 1015 } 1016 DELAY(1000); 1017 count--; 1018 } 1019 return (1); 1020 } 1021 1022 int 1023 ncr53c9x_ioctl(chan, cmd, arg, flag, p) 1024 struct scsipi_channel *chan; 1025 u_long cmd; 1026 caddr_t arg; 1027 int flag; 1028 struct proc *p; 1029 { 1030 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 1031 int s, error = 0; 1032 1033 switch (cmd) { 1034 case SCBUSIORESET: 1035 s = splbio(); 1036 simple_lock(&sc->sc_lock); 1037 ncr53c9x_init(sc, 1); 1038 simple_unlock(&sc->sc_lock); 1039 splx(s); 1040 break; 1041 default: 1042 error = ENOTTY; 1043 break; 1044 } 1045 return (error); 1046 } 1047 1048 1049 /* 1050 * LOW LEVEL SCSI UTILITIES 1051 */ 1052 1053 /* 1054 * Schedule a scsi operation. This has now been pulled out of the interrupt 1055 * handler so that we may call it from ncr53c9x_scsipi_request and 1056 * ncr53c9x_done. This may save us an unnecessary interrupt just to get 1057 * things going. Should only be called when state == NCR_IDLE and at bio pl. 1058 */ 1059 void 1060 ncr53c9x_sched(sc) 1061 struct ncr53c9x_softc *sc; 1062 { 1063 struct ncr53c9x_ecb *ecb; 1064 struct scsipi_periph *periph; 1065 struct ncr53c9x_tinfo *ti; 1066 struct ncr53c9x_linfo *li; 1067 int lun; 1068 int tag; 1069 1070 NCR_TRACE(("[ncr53c9x_sched] ")); 1071 if (sc->sc_state != NCR_IDLE) 1072 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state); 1073 1074 /* 1075 * Find first ecb in ready queue that is for a target/lunit 1076 * combinations that is not busy. 1077 */ 1078 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL; 1079 ecb = TAILQ_NEXT(ecb, chain)) { 1080 periph = ecb->xs->xs_periph; 1081 ti = &sc->sc_tinfo[periph->periph_target]; 1082 lun = periph->periph_lun; 1083 1084 /* Select type of tag for this command */ 1085 if ((ti->flags & (T_RSELECTOFF)) != 0) 1086 tag = 0; 1087 else if ((ti->flags & (T_TAG)) == 0) 1088 tag = 0; 1089 else if ((ecb->flags & ECB_SENSE) != 0) 1090 tag = 0; 1091 else 1092 tag = ecb->xs->xs_tag_type; 1093 #if 0 1094 /* XXXX Use tags for polled commands? */ 1095 if (ecb->xs->xs_control & XS_CTL_POLL) 1096 tag = 0; 1097 #endif 1098 1099 li = TINFO_LUN(ti, lun); 1100 if (li == NULL) { 1101 /* Initialize LUN info and add to list. */ 1102 if ((li = malloc(sizeof(*li), 1103 M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) { 1104 continue; 1105 } 1106 li->lun = lun; 1107 1108 LIST_INSERT_HEAD(&ti->luns, li, link); 1109 if (lun < NCR_NLUN) 1110 ti->lun[lun] = li; 1111 } 1112 li->last_used = time.tv_sec; 1113 if (tag == 0) { 1114 /* Try to issue this as an un-tagged command */ 1115 if (li->untagged == NULL) 1116 li->untagged = ecb; 1117 } 1118 if (li->untagged != NULL) { 1119 tag = 0; 1120 if ((li->busy != 1) && li->used == 0) { 1121 /* We need to issue this untagged command now */ 1122 ecb = li->untagged; 1123 periph = ecb->xs->xs_periph; 1124 } else { 1125 /* Not ready yet */ 1126 continue; 1127 } 1128 } 1129 ecb->tag[0] = tag; 1130 if (tag != 0) { 1131 li->queued[ecb->xs->xs_tag_id] = ecb; 1132 ecb->tag[1] = ecb->xs->xs_tag_id; 1133 li->used++; 1134 } 1135 if (li->untagged != NULL && (li->busy != 1)) { 1136 li->busy = 1; 1137 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1138 ecb->flags &= ~ECB_READY; 1139 sc->sc_nexus = ecb; 1140 ncr53c9x_select(sc, ecb); 1141 break; 1142 } 1143 if (li->untagged == NULL && tag != 0) { 1144 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1145 ecb->flags &= ~ECB_READY; 1146 sc->sc_nexus = ecb; 1147 ncr53c9x_select(sc, ecb); 1148 break; 1149 } else 1150 NCR_TRACE(("%d:%d busy\n", 1151 periph->periph_target, 1152 periph->periph_lun)); 1153 } 1154 } 1155 1156 void 1157 ncr53c9x_sense(sc, ecb) 1158 struct ncr53c9x_softc *sc; 1159 struct ncr53c9x_ecb *ecb; 1160 { 1161 struct scsipi_xfer *xs = ecb->xs; 1162 struct scsipi_periph *periph = xs->xs_periph; 1163 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1164 struct scsipi_sense *ss = (void *)&ecb->cmd.cmd; 1165 struct ncr53c9x_linfo *li; 1166 int lun = periph->periph_lun; 1167 1168 NCR_TRACE(("requesting sense ")); 1169 /* Next, setup a request sense command block */ 1170 memset(ss, 0, sizeof(*ss)); 1171 ss->opcode = REQUEST_SENSE; 1172 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT; 1173 ss->length = sizeof(struct scsipi_sense_data); 1174 ecb->clen = sizeof(*ss); 1175 ecb->daddr = (char *)&xs->sense.scsi_sense; 1176 ecb->dleft = sizeof(struct scsipi_sense_data); 1177 ecb->flags |= ECB_SENSE; 1178 ecb->timeout = NCR_SENSE_TIMEOUT; 1179 ti->senses++; 1180 li = TINFO_LUN(ti, lun); 1181 if (li->busy) 1182 li->busy = 0; 1183 ncr53c9x_dequeue(sc, ecb); 1184 li->untagged = ecb; /* must be executed first to fix C/A */ 1185 li->busy = 2; 1186 if (ecb == sc->sc_nexus) { 1187 ncr53c9x_select(sc, ecb); 1188 } else { 1189 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 1190 ecb->flags |= ECB_READY; 1191 if (sc->sc_state == NCR_IDLE) 1192 ncr53c9x_sched(sc); 1193 } 1194 } 1195 1196 /* 1197 * POST PROCESSING OF SCSI_CMD (usually current) 1198 */ 1199 void 1200 ncr53c9x_done(sc, ecb) 1201 struct ncr53c9x_softc *sc; 1202 struct ncr53c9x_ecb *ecb; 1203 { 1204 struct scsipi_xfer *xs = ecb->xs; 1205 struct scsipi_periph *periph = xs->xs_periph; 1206 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1207 int lun = periph->periph_lun; 1208 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun); 1209 1210 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error)); 1211 1212 callout_stop(&ecb->xs->xs_callout); 1213 1214 /* 1215 * Now, if we've come here with no error code, i.e. we've kept the 1216 * initial XS_NOERROR, and the status code signals that we should 1217 * check sense, we'll need to set up a request sense cmd block and 1218 * push the command back into the ready queue *before* any other 1219 * commands for this target/lunit, else we lose the sense info. 1220 * We don't support chk sense conditions for the request sense cmd. 1221 */ 1222 if (xs->error == XS_NOERROR) { 1223 xs->status = ecb->stat; 1224 if ((ecb->flags & ECB_ABORT) != 0) { 1225 xs->error = XS_TIMEOUT; 1226 } else if ((ecb->flags & ECB_SENSE) != 0) { 1227 xs->error = XS_SENSE; 1228 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { 1229 /* First, save the return values */ 1230 xs->resid = ecb->dleft; 1231 ncr53c9x_sense(sc, ecb); 1232 return; 1233 } else { 1234 xs->resid = ecb->dleft; 1235 } 1236 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY) 1237 xs->error = XS_BUSY; 1238 } 1239 1240 #ifdef NCR53C9X_DEBUG 1241 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1242 if (xs->resid != 0) 1243 printf("resid=%d ", xs->resid); 1244 if (xs->error == XS_SENSE) 1245 printf("sense=0x%02x\n", 1246 xs->sense.scsi_sense.error_code); 1247 else 1248 printf("error=%d\n", xs->error); 1249 } 1250 #endif 1251 1252 /* 1253 * Remove the ECB from whatever queue it's on. 1254 */ 1255 ncr53c9x_dequeue(sc, ecb); 1256 if (ecb == sc->sc_nexus) { 1257 sc->sc_nexus = NULL; 1258 if (sc->sc_state != NCR_CLEANING) { 1259 sc->sc_state = NCR_IDLE; 1260 ncr53c9x_sched(sc); 1261 } 1262 } 1263 1264 if (xs->error == XS_SELTIMEOUT) { 1265 /* Selection timeout -- discard this LUN if empty */ 1266 if (li->untagged == NULL && li->used == 0) { 1267 if (lun < NCR_NLUN) 1268 ti->lun[lun] = NULL; 1269 LIST_REMOVE(li, link); 1270 free(li, M_DEVBUF); 1271 } 1272 } 1273 1274 ncr53c9x_free_ecb(sc, ecb); 1275 ti->cmds++; 1276 simple_unlock(&sc->sc_lock); 1277 scsipi_done(xs); 1278 simple_lock(&sc->sc_lock); 1279 } 1280 1281 void 1282 ncr53c9x_dequeue(sc, ecb) 1283 struct ncr53c9x_softc *sc; 1284 struct ncr53c9x_ecb *ecb; 1285 { 1286 struct ncr53c9x_tinfo *ti = 1287 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1288 struct ncr53c9x_linfo *li; 1289 int64_t lun = ecb->xs->xs_periph->periph_lun; 1290 1291 li = TINFO_LUN(ti, lun); 1292 #ifdef DIAGNOSTIC 1293 if (li == NULL || li->lun != lun) 1294 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist", 1295 (long long) lun, ecb); 1296 #endif 1297 if (li->untagged == ecb) { 1298 li->busy = 0; 1299 li->untagged = NULL; 1300 } 1301 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) { 1302 #ifdef DIAGNOSTIC 1303 if (li->queued[ecb->tag[1]] != NULL && 1304 (li->queued[ecb->tag[1]] != ecb)) 1305 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p " 1306 "instead of ecb %p\n", ecb->tag[1], 1307 (long long) lun, 1308 li->queued[ecb->tag[1]], ecb); 1309 #endif 1310 li->queued[ecb->tag[1]] = NULL; 1311 li->used--; 1312 } 1313 1314 if ((ecb->flags & ECB_READY) != 0) { 1315 ecb->flags &= ~ECB_READY; 1316 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1317 } 1318 } 1319 1320 /* 1321 * INTERRUPT/PROTOCOL ENGINE 1322 */ 1323 1324 /* 1325 * Schedule an outgoing message by prioritizing it, and asserting 1326 * attention on the bus. We can only do this when we are the initiator 1327 * else there will be an illegal command interrupt. 1328 */ 1329 #define ncr53c9x_sched_msgout(m) \ 1330 do { \ 1331 NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \ 1332 NCRCMD(sc, NCRCMD_SETATN); \ 1333 sc->sc_flags |= NCR_ATN; \ 1334 sc->sc_msgpriq |= (m); \ 1335 } while (0) 1336 1337 static void 1338 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc) 1339 { 1340 NCR_TRACE(("[flushfifo] ")); 1341 1342 NCRCMD(sc, NCRCMD_FLUSH); 1343 1344 if (sc->sc_phase == COMMAND_PHASE || 1345 sc->sc_phase == MESSAGE_OUT_PHASE) 1346 DELAY(2); 1347 } 1348 1349 static int 1350 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how) 1351 { 1352 int i, n; 1353 u_char *buf; 1354 1355 switch(how) { 1356 case NCR_RDFIFO_START: 1357 buf = sc->sc_imess; 1358 sc->sc_imlen = 0; 1359 break; 1360 case NCR_RDFIFO_CONTINUE: 1361 buf = sc->sc_imess + sc->sc_imlen; 1362 break; 1363 default: 1364 panic("ncr53c9x_rdfifo: bad flag"); 1365 break; 1366 } 1367 1368 /* 1369 * XXX buffer (sc_imess) size for message 1370 */ 1371 1372 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 1373 1374 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1375 n *= 2; 1376 1377 for (i = 0; i < n; i++) 1378 buf[i] = NCR_READ_REG(sc, NCR_FIFO); 1379 1380 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) { 1381 1382 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1383 buf[i++] = NCR_READ_REG(sc, NCR_FIFO); 1384 1385 NCR_READ_REG(sc, NCR_FIFO); 1386 1387 ncr53c9x_flushfifo(sc); 1388 } 1389 } else { 1390 for (i = 0; i < n; i++) 1391 buf[i] = NCR_READ_REG(sc, NCR_FIFO); 1392 } 1393 1394 sc->sc_imlen += i; 1395 1396 #if 0 1397 #ifdef NCR53C9X_DEBUG 1398 { 1399 int j; 1400 1401 NCR_TRACE(("\n[rdfifo %s (%d):", 1402 (how == NCR_RDFIFO_START) ? "start" : "cont", 1403 (int)sc->sc_imlen)); 1404 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1405 for (j = 0; j < sc->sc_imlen; j++) 1406 printf(" %02x", sc->sc_imess[j]); 1407 printf("]\n"); 1408 } 1409 } 1410 #endif 1411 #endif 1412 return sc->sc_imlen; 1413 } 1414 1415 static void 1416 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len) 1417 { 1418 int i; 1419 1420 #ifdef NCR53C9X_DEBUG 1421 NCR_MSGS(("[wrfifo(%d):", len)); 1422 if (ncr53c9x_debug & NCR_SHOWMSGS) { 1423 for (i = 0; i < len; i++) 1424 printf(" %02x", p[i]); 1425 printf("]\n"); 1426 } 1427 #endif 1428 1429 for (i = 0; i < len; i++) { 1430 NCR_WRITE_REG(sc, NCR_FIFO, p[i]); 1431 1432 if (sc->sc_rev == NCR_VARIANT_FAS366) 1433 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1434 } 1435 } 1436 1437 int 1438 ncr53c9x_reselect(sc, message, tagtype, tagid) 1439 struct ncr53c9x_softc *sc; 1440 int message; 1441 int tagtype, tagid; 1442 { 1443 u_char selid, target, lun; 1444 struct ncr53c9x_ecb *ecb = NULL; 1445 struct ncr53c9x_tinfo *ti; 1446 struct ncr53c9x_linfo *li; 1447 1448 1449 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1450 target = sc->sc_selid; 1451 } else { 1452 /* 1453 * The SCSI chip made a snapshot of the data bus 1454 * while the reselection was being negotiated. 1455 * This enables us to determine which target did 1456 * the reselect. 1457 */ 1458 selid = sc->sc_selid & ~(1 << sc->sc_id); 1459 if (selid & (selid - 1)) { 1460 printf("%s: reselect with invalid selid %02x;" 1461 " sending DEVICE RESET\n", 1462 sc->sc_dev.dv_xname, selid); 1463 goto reset; 1464 } 1465 1466 target = ffs(selid) - 1; 1467 } 1468 lun = message & 0x07; 1469 1470 /* 1471 * Search wait queue for disconnected cmd 1472 * The list should be short, so I haven't bothered with 1473 * any more sophisticated structures than a simple 1474 * singly linked list. 1475 */ 1476 ti = &sc->sc_tinfo[target]; 1477 li = TINFO_LUN(ti, lun); 1478 1479 /* 1480 * We can get as far as the LUN with the IDENTIFY 1481 * message. Check to see if we're running an 1482 * un-tagged command. Otherwise ack the IDENTIFY 1483 * and wait for a tag message. 1484 */ 1485 if (li != NULL) { 1486 if (li->untagged != NULL && li->busy) 1487 ecb = li->untagged; 1488 else if (tagtype != MSG_SIMPLE_Q_TAG) { 1489 /* Wait for tag to come by */ 1490 sc->sc_state = NCR_IDENTIFIED; 1491 return (0); 1492 } else if (tagtype) 1493 ecb = li->queued[tagid]; 1494 } 1495 if (ecb == NULL) { 1496 printf("%s: reselect from target %d lun %d tag %x:%x " 1497 "with no nexus; sending ABORT\n", 1498 sc->sc_dev.dv_xname, target, lun, tagtype, tagid); 1499 goto abort; 1500 } 1501 1502 /* Make this nexus active again. */ 1503 sc->sc_state = NCR_CONNECTED; 1504 sc->sc_nexus = ecb; 1505 ncr53c9x_setsync(sc, ti); 1506 1507 if (ecb->flags & ECB_RESET) 1508 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1509 else if (ecb->flags & ECB_ABORT) 1510 ncr53c9x_sched_msgout(SEND_ABORT); 1511 1512 /* Do an implicit RESTORE POINTERS. */ 1513 sc->sc_dp = ecb->daddr; 1514 sc->sc_dleft = ecb->dleft; 1515 1516 return (0); 1517 1518 reset: 1519 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1520 return (1); 1521 1522 abort: 1523 ncr53c9x_sched_msgout(SEND_ABORT); 1524 return (1); 1525 } 1526 1527 static inline int 1528 __verify_msg_format(u_char *p, int len) 1529 { 1530 1531 if (len == 1 && MSG_IS1BYTE(p[0])) 1532 return 1; 1533 if (len == 2 && MSG_IS2BYTE(p[0])) 1534 return 1; 1535 if (len >= 3 && MSG_ISEXTENDED(p[0]) && 1536 len == p[1] + 2) 1537 return 1; 1538 1539 return 0; 1540 } 1541 1542 /* 1543 * Get an incoming message as initiator. 1544 * 1545 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a 1546 * byte in the FIFO 1547 */ 1548 void 1549 ncr53c9x_msgin(sc) 1550 struct ncr53c9x_softc *sc; 1551 { 1552 1553 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); 1554 1555 if (sc->sc_imlen == 0) { 1556 printf("%s: msgin: no msg byte available\n", 1557 sc->sc_dev.dv_xname); 1558 return; 1559 } 1560 1561 /* 1562 * Prepare for a new message. A message should (according 1563 * to the SCSI standard) be transmitted in one single 1564 * MESSAGE_IN_PHASE. If we have been in some other phase, 1565 * then this is a new message. 1566 */ 1567 if (sc->sc_prevphase != MESSAGE_IN_PHASE && 1568 sc->sc_state != NCR_RESELECTED) { 1569 printf("%s: phase change, dropping message, " 1570 "prev %d, state %d\n", 1571 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state); 1572 sc->sc_flags &= ~NCR_DROP_MSGI; 1573 sc->sc_imlen = 0; 1574 } 1575 1576 /* 1577 * If we're going to reject the message, don't bother storing 1578 * the incoming bytes. But still, we need to ACK them. 1579 */ 1580 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) { 1581 NCRCMD(sc, NCRCMD_MSGOK); 1582 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]); 1583 return; 1584 } 1585 1586 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) { 1587 ncr53c9x_sched_msgout(SEND_REJECT); 1588 sc->sc_flags |= NCR_DROP_MSGI; 1589 } else { 1590 u_char *pb; 1591 int plen; 1592 1593 switch (sc->sc_state) { 1594 /* 1595 * if received message is the first of reselection 1596 * then first byte is selid, and then message 1597 */ 1598 case NCR_RESELECTED: 1599 pb = sc->sc_imess + 1; 1600 plen = sc->sc_imlen - 1; 1601 break; 1602 default: 1603 pb = sc->sc_imess; 1604 plen = sc->sc_imlen; 1605 break; 1606 } 1607 1608 if (__verify_msg_format(pb, plen)) 1609 goto gotit; 1610 } 1611 1612 /* Ack what we have so far */ 1613 NCRCMD(sc, NCRCMD_MSGOK); 1614 return; 1615 1616 gotit: 1617 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state)); 1618 /* we got complete message, flush the imess, */ 1619 /* XXX nobody uses imlen below */ 1620 sc->sc_imlen = 0; 1621 /* 1622 * Now we should have a complete message (1 byte, 2 byte 1623 * and moderately long extended messages). We only handle 1624 * extended messages which total length is shorter than 1625 * NCR_MAX_MSG_LEN. Longer messages will be amputated. 1626 */ 1627 switch (sc->sc_state) { 1628 struct ncr53c9x_ecb *ecb; 1629 struct ncr53c9x_tinfo *ti; 1630 struct ncr53c9x_linfo *li; 1631 int lun; 1632 1633 case NCR_CONNECTED: 1634 ecb = sc->sc_nexus; 1635 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1636 1637 switch (sc->sc_imess[0]) { 1638 case MSG_CMDCOMPLETE: 1639 NCR_MSGS(("cmdcomplete ")); 1640 if (sc->sc_dleft < 0) { 1641 scsipi_printaddr(ecb->xs->xs_periph); 1642 printf("got %ld extra bytes\n", 1643 -(long)sc->sc_dleft); 1644 sc->sc_dleft = 0; 1645 } 1646 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ? 1647 0 : sc->sc_dleft; 1648 if ((ecb->flags & ECB_SENSE) == 0) 1649 ecb->xs->resid = ecb->dleft; 1650 sc->sc_state = NCR_CMDCOMPLETE; 1651 break; 1652 1653 case MSG_MESSAGE_REJECT: 1654 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout)); 1655 switch (sc->sc_msgout) { 1656 case SEND_TAG: 1657 /* 1658 * Target does not like tagged queuing. 1659 * - Flush the command queue 1660 * - Disable tagged queuing for the target 1661 * - Dequeue ecb from the queued array. 1662 */ 1663 printf("%s: tagged queuing rejected: " 1664 "target %d\n", 1665 sc->sc_dev.dv_xname, 1666 ecb->xs->xs_periph->periph_target); 1667 1668 NCR_MSGS(("(rejected sent tag)")); 1669 NCRCMD(sc, NCRCMD_FLUSH); 1670 DELAY(1); 1671 ti->flags &= ~T_TAG; 1672 lun = ecb->xs->xs_periph->periph_lun; 1673 li = TINFO_LUN(ti, lun); 1674 if (ecb->tag[0] && 1675 li->queued[ecb->tag[1]] != NULL) { 1676 li->queued[ecb->tag[1]] = NULL; 1677 li->used--; 1678 } 1679 ecb->tag[0] = ecb->tag[1] = 0; 1680 li->untagged = ecb; 1681 li->busy = 1; 1682 break; 1683 1684 case SEND_SDTR: 1685 printf("%s: sync transfer rejected: " 1686 "target %d\n", 1687 sc->sc_dev.dv_xname, 1688 ecb->xs->xs_periph->periph_target); 1689 1690 sc->sc_flags &= ~NCR_SYNCHNEGO; 1691 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 1692 ncr53c9x_setsync(sc, ti); 1693 ncr53c9x_update_xfer_mode(sc, 1694 ecb->xs->xs_periph->periph_target); 1695 break; 1696 1697 case SEND_WDTR: 1698 printf("%s: wide transfer rejected: " 1699 "target %d\n", 1700 sc->sc_dev.dv_xname, 1701 ecb->xs->xs_periph->periph_target); 1702 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1703 ti->width = 0; 1704 break; 1705 1706 case SEND_INIT_DET_ERR: 1707 goto abort; 1708 } 1709 break; 1710 1711 case MSG_NOOP: 1712 NCR_MSGS(("noop ")); 1713 break; 1714 1715 case MSG_HEAD_OF_Q_TAG: 1716 case MSG_SIMPLE_Q_TAG: 1717 case MSG_ORDERED_Q_TAG: 1718 NCR_MSGS(("TAG %x:%x", 1719 sc->sc_imess[0], sc->sc_imess[1])); 1720 break; 1721 1722 case MSG_DISCONNECT: 1723 NCR_MSGS(("disconnect ")); 1724 ti->dconns++; 1725 sc->sc_state = NCR_DISCONNECT; 1726 1727 /* 1728 * Mark the fact that all bytes have moved. The 1729 * target may not bother to do a SAVE POINTERS 1730 * at this stage. This flag will set the residual 1731 * count to zero on MSG COMPLETE. 1732 */ 1733 if (sc->sc_dleft == 0) 1734 ecb->flags |= ECB_TENTATIVE_DONE; 1735 1736 break; 1737 1738 case MSG_SAVEDATAPOINTER: 1739 NCR_MSGS(("save datapointer ")); 1740 ecb->daddr = sc->sc_dp; 1741 ecb->dleft = sc->sc_dleft; 1742 break; 1743 1744 case MSG_RESTOREPOINTERS: 1745 NCR_MSGS(("restore datapointer ")); 1746 sc->sc_dp = ecb->daddr; 1747 sc->sc_dleft = ecb->dleft; 1748 break; 1749 1750 case MSG_EXTENDED: 1751 NCR_MSGS(("extended(%x) ", sc->sc_imess[2])); 1752 switch (sc->sc_imess[2]) { 1753 case MSG_EXT_SDTR: 1754 NCR_MSGS(("SDTR period %d, offset %d ", 1755 sc->sc_imess[3], sc->sc_imess[4])); 1756 if (sc->sc_imess[1] != 3) 1757 goto reject; 1758 ti->period = sc->sc_imess[3]; 1759 ti->offset = sc->sc_imess[4]; 1760 ti->flags &= ~T_NEGOTIATE; 1761 if (sc->sc_minsync == 0 || 1762 ti->offset == 0 || 1763 ti->period > 124) { 1764 #if 0 1765 #ifdef NCR53C9X_DEBUG 1766 scsipi_printaddr(ecb->xs->xs_periph); 1767 printf("async mode\n"); 1768 #endif 1769 #endif 1770 ti->flags &= ~T_SYNCMODE; 1771 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1772 /* 1773 * target initiated negotiation 1774 */ 1775 ti->offset = 0; 1776 ncr53c9x_sched_msgout( 1777 SEND_SDTR); 1778 } 1779 } else { 1780 int p; 1781 1782 p = ncr53c9x_stp2cpb(sc, ti->period); 1783 ti->period = ncr53c9x_cpb2stp(sc, p); 1784 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1785 /* 1786 * target initiated negotiation 1787 */ 1788 if (ti->period < 1789 sc->sc_minsync) 1790 ti->period = 1791 sc->sc_minsync; 1792 if (ti->offset > 15) 1793 ti->offset = 15; 1794 ti->flags &= ~T_SYNCMODE; 1795 ncr53c9x_sched_msgout( 1796 SEND_SDTR); 1797 } else { 1798 /* we are sync */ 1799 ti->flags |= T_SYNCMODE; 1800 } 1801 } 1802 ncr53c9x_update_xfer_mode(sc, 1803 ecb->xs->xs_periph->periph_target); 1804 sc->sc_flags &= ~NCR_SYNCHNEGO; 1805 ncr53c9x_setsync(sc, ti); 1806 break; 1807 1808 case MSG_EXT_WDTR: 1809 #ifdef NCR53C9X_DEBUG 1810 printf("%s: wide mode %d\n", 1811 sc->sc_dev.dv_xname, sc->sc_imess[3]); 1812 #endif 1813 if (sc->sc_imess[3] == 1) { 1814 ti->cfg3 |= NCRFASCFG3_EWIDE; 1815 ncr53c9x_setsync(sc, ti); 1816 } else 1817 ti->width = 0; 1818 /* 1819 * Device started width negotiation. 1820 */ 1821 if (!(ti->flags & T_WDTRSENT)) 1822 ncr53c9x_sched_msgout(SEND_WDTR); 1823 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1824 break; 1825 default: 1826 scsipi_printaddr(ecb->xs->xs_periph); 1827 printf("unrecognized MESSAGE EXTENDED;" 1828 " sending REJECT\n"); 1829 goto reject; 1830 } 1831 break; 1832 1833 default: 1834 NCR_MSGS(("ident ")); 1835 scsipi_printaddr(ecb->xs->xs_periph); 1836 printf("unrecognized MESSAGE; sending REJECT\n"); 1837 reject: 1838 ncr53c9x_sched_msgout(SEND_REJECT); 1839 break; 1840 } 1841 break; 1842 1843 case NCR_IDENTIFIED: 1844 /* 1845 * IDENTIFY message was received and queue tag is expected now 1846 */ 1847 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) || 1848 (sc->sc_msgify == 0)) { 1849 printf("%s: TAG reselect without IDENTIFY;" 1850 " MSG %x;" 1851 " sending DEVICE RESET\n", 1852 sc->sc_dev.dv_xname, 1853 sc->sc_imess[0]); 1854 goto reset; 1855 } 1856 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 1857 sc->sc_imess[0], sc->sc_imess[1]); 1858 break; 1859 1860 case NCR_RESELECTED: 1861 if (MSG_ISIDENTIFY(sc->sc_imess[1])) { 1862 sc->sc_msgify = sc->sc_imess[1]; 1863 } else { 1864 printf("%s: reselect without IDENTIFY;" 1865 " MSG %x;" 1866 " sending DEVICE RESET\n", 1867 sc->sc_dev.dv_xname, 1868 sc->sc_imess[1]); 1869 goto reset; 1870 } 1871 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0); 1872 break; 1873 1874 default: 1875 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1876 sc->sc_dev.dv_xname); 1877 reset: 1878 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1879 break; 1880 1881 abort: 1882 ncr53c9x_sched_msgout(SEND_ABORT); 1883 break; 1884 } 1885 1886 /* if we have more messages to send set ATN */ 1887 if (sc->sc_msgpriq) 1888 NCRCMD(sc, NCRCMD_SETATN); 1889 1890 /* Ack last message byte */ 1891 NCRCMD(sc, NCRCMD_MSGOK); 1892 1893 /* Done, reset message pointer. */ 1894 sc->sc_flags &= ~NCR_DROP_MSGI; 1895 sc->sc_imlen = 0; 1896 } 1897 1898 1899 /* 1900 * Send the highest priority, scheduled message 1901 */ 1902 void 1903 ncr53c9x_msgout(sc) 1904 struct ncr53c9x_softc *sc; 1905 { 1906 struct ncr53c9x_tinfo *ti; 1907 struct ncr53c9x_ecb *ecb; 1908 size_t size; 1909 1910 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]", 1911 sc->sc_msgpriq, sc->sc_prevphase)); 1912 1913 /* 1914 * XXX - the NCR_ATN flag is not in sync with the actual ATN 1915 * condition on the SCSI bus. The 53c9x chip 1916 * automatically turns off ATN before sending the 1917 * message byte. (see also the comment below in the 1918 * default case when picking out a message to send) 1919 */ 1920 if (sc->sc_flags & NCR_ATN) { 1921 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { 1922 new: 1923 NCRCMD(sc, NCRCMD_FLUSH); 1924 /* DELAY(1); */ 1925 sc->sc_msgoutq = 0; 1926 sc->sc_omlen = 0; 1927 } 1928 } else { 1929 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 1930 ncr53c9x_sched_msgout(sc->sc_msgoutq); 1931 goto new; 1932 } else { 1933 printf("%s at line %d: unexpected MESSAGE OUT phase\n", 1934 sc->sc_dev.dv_xname, __LINE__); 1935 } 1936 } 1937 1938 if (sc->sc_omlen == 0) { 1939 /* Pick up highest priority message */ 1940 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1941 sc->sc_msgoutq |= sc->sc_msgout; 1942 sc->sc_msgpriq &= ~sc->sc_msgout; 1943 sc->sc_omlen = 1; /* "Default" message len */ 1944 switch (sc->sc_msgout) { 1945 case SEND_SDTR: 1946 ecb = sc->sc_nexus; 1947 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1948 sc->sc_omess[0] = MSG_EXTENDED; 1949 sc->sc_omess[1] = MSG_EXT_SDTR_LEN; 1950 sc->sc_omess[2] = MSG_EXT_SDTR; 1951 sc->sc_omess[3] = ti->period; 1952 sc->sc_omess[4] = ti->offset; 1953 sc->sc_omlen = 5; 1954 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) { 1955 ti->flags |= T_SYNCMODE; 1956 ncr53c9x_setsync(sc, ti); 1957 } 1958 break; 1959 case SEND_WDTR: 1960 ecb = sc->sc_nexus; 1961 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1962 sc->sc_omess[0] = MSG_EXTENDED; 1963 sc->sc_omess[1] = MSG_EXT_WDTR_LEN; 1964 sc->sc_omess[2] = MSG_EXT_WDTR; 1965 sc->sc_omess[3] = ti->width; 1966 sc->sc_omlen = 4; 1967 break; 1968 case SEND_IDENTIFY: 1969 if (sc->sc_state != NCR_CONNECTED) { 1970 printf("%s at line %d: no nexus\n", 1971 sc->sc_dev.dv_xname, __LINE__); 1972 } 1973 ecb = sc->sc_nexus; 1974 sc->sc_omess[0] = 1975 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0); 1976 break; 1977 case SEND_TAG: 1978 if (sc->sc_state != NCR_CONNECTED) { 1979 printf("%s at line %d: no nexus\n", 1980 sc->sc_dev.dv_xname, __LINE__); 1981 } 1982 ecb = sc->sc_nexus; 1983 sc->sc_omess[0] = ecb->tag[0]; 1984 sc->sc_omess[1] = ecb->tag[1]; 1985 sc->sc_omlen = 2; 1986 break; 1987 case SEND_DEV_RESET: 1988 sc->sc_flags |= NCR_ABORTING; 1989 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1990 ecb = sc->sc_nexus; 1991 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1992 ti->flags &= ~T_SYNCMODE; 1993 ncr53c9x_update_xfer_mode(sc, 1994 ecb->xs->xs_periph->periph_target); 1995 if ((ti->flags & T_SYNCHOFF) == 0) 1996 /* We can re-start sync negotiation */ 1997 ti->flags |= T_NEGOTIATE; 1998 break; 1999 case SEND_PARITY_ERROR: 2000 sc->sc_omess[0] = MSG_PARITY_ERROR; 2001 break; 2002 case SEND_ABORT: 2003 sc->sc_flags |= NCR_ABORTING; 2004 sc->sc_omess[0] = MSG_ABORT; 2005 break; 2006 case SEND_INIT_DET_ERR: 2007 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 2008 break; 2009 case SEND_REJECT: 2010 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 2011 break; 2012 default: 2013 /* 2014 * We normally do not get here, since the chip 2015 * automatically turns off ATN before the last 2016 * byte of a message is sent to the target. 2017 * However, if the target rejects our (multi-byte) 2018 * message early by switching to MSG IN phase 2019 * ATN remains on, so the target may return to 2020 * MSG OUT phase. If there are no scheduled messages 2021 * left we send a NO-OP. 2022 * 2023 * XXX - Note that this leaves no useful purpose for 2024 * the NCR_ATN flag. 2025 */ 2026 sc->sc_flags &= ~NCR_ATN; 2027 sc->sc_omess[0] = MSG_NOOP; 2028 break; 2029 } 2030 sc->sc_omp = sc->sc_omess; 2031 } 2032 2033 #ifdef DEBUG 2034 if (ncr53c9x_debug & NCR_SHOWMSGS) { 2035 int i; 2036 2037 NCR_MSGS(("<msgout:")); 2038 for (i = 0; i < sc->sc_omlen; i++) 2039 NCR_MSGS((" %02x", sc->sc_omess[i])); 2040 NCR_MSGS(("> ")); 2041 } 2042 #endif 2043 if (sc->sc_rev == NCR_VARIANT_FAS366) { 2044 /* 2045 * XXX fifo size 2046 */ 2047 ncr53c9x_flushfifo(sc); 2048 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen); 2049 NCRCMD(sc, NCRCMD_TRANS); 2050 } else { 2051 /* (re)send the message */ 2052 size = min(sc->sc_omlen, sc->sc_maxxfer); 2053 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size); 2054 /* Program the SCSI counter */ 2055 NCR_SET_COUNT(sc, size); 2056 2057 /* Load the count in and start the message-out transfer */ 2058 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2059 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA); 2060 NCRDMA_GO(sc); 2061 } 2062 } 2063 2064 /* 2065 * This is the most critical part of the driver, and has to know 2066 * how to deal with *all* error conditions and phases from the SCSI 2067 * bus. If there are no errors and the DMA was active, then call the 2068 * DMA pseudo-interrupt handler. If this returns 1, then that was it 2069 * and we can return from here without further processing. 2070 * 2071 * Most of this needs verifying. 2072 */ 2073 int 2074 ncr53c9x_intr(arg) 2075 void *arg; 2076 { 2077 struct ncr53c9x_softc *sc = arg; 2078 struct ncr53c9x_ecb *ecb; 2079 struct scsipi_periph *periph; 2080 struct ncr53c9x_tinfo *ti; 2081 size_t size; 2082 int nfifo; 2083 2084 NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state)); 2085 2086 if (!NCRDMA_ISINTR(sc)) 2087 return (0); 2088 2089 simple_lock(&sc->sc_lock); 2090 again: 2091 /* and what do the registers say... */ 2092 ncr53c9x_readregs(sc); 2093 2094 sc->sc_intrcnt.ev_count++; 2095 2096 /* 2097 * At the moment, only a SCSI Bus Reset or Illegal 2098 * Command are classed as errors. A disconnect is a 2099 * valid condition, and we let the code check is the 2100 * "NCR_BUSFREE_OK" flag was set before declaring it 2101 * and error. 2102 * 2103 * Also, the status register tells us about "Gross 2104 * Errors" and "Parity errors". Only the Gross Error 2105 * is really bad, and the parity errors are dealt 2106 * with later 2107 * 2108 * TODO 2109 * If there are too many parity error, go to slow 2110 * cable mode ? 2111 */ 2112 2113 /* SCSI Reset */ 2114 if ((sc->sc_espintr & NCRINTR_SBR) != 0) { 2115 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) { 2116 NCRCMD(sc, NCRCMD_FLUSH); 2117 DELAY(1); 2118 } 2119 if (sc->sc_state != NCR_SBR) { 2120 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 2121 ncr53c9x_init(sc, 0); /* Restart everything */ 2122 goto out; 2123 } 2124 #if 0 2125 /*XXX*/ printf("<expected bus reset: " 2126 "[intr %x, stat %x, step %d]>\n", 2127 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2128 #endif 2129 if (sc->sc_nexus != NULL) 2130 panic("%s: nexus in reset state", 2131 sc->sc_dev.dv_xname); 2132 goto sched; 2133 } 2134 2135 ecb = sc->sc_nexus; 2136 2137 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL) 2138 if (sc->sc_espintr & NCRINTR_ERR || 2139 sc->sc_espstat & NCRSTAT_GE) { 2140 2141 if ((sc->sc_espstat & NCRSTAT_GE) != 0) { 2142 /* Gross Error; no target ? */ 2143 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2144 NCRCMD(sc, NCRCMD_FLUSH); 2145 DELAY(1); 2146 } 2147 if (sc->sc_state == NCR_CONNECTED || 2148 sc->sc_state == NCR_SELECTING) { 2149 ecb->xs->error = XS_TIMEOUT; 2150 ncr53c9x_done(sc, ecb); 2151 } 2152 goto out; 2153 } 2154 2155 if ((sc->sc_espintr & NCRINTR_ILL) != 0) { 2156 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) { 2157 /* 2158 * Eat away "Illegal command" interrupt 2159 * on a ESP100 caused by a re-selection 2160 * while we were trying to select 2161 * another target. 2162 */ 2163 #ifdef DEBUG 2164 printf("%s: ESP100 work-around activated\n", 2165 sc->sc_dev.dv_xname); 2166 #endif 2167 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2168 goto out; 2169 } 2170 /* illegal command, out of sync ? */ 2171 printf("%s: illegal command: 0x%x " 2172 "(state %d, phase %x, prevphase %x)\n", 2173 sc->sc_dev.dv_xname, sc->sc_lastcmd, 2174 sc->sc_state, sc->sc_phase, sc->sc_prevphase); 2175 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2176 NCRCMD(sc, NCRCMD_FLUSH); 2177 DELAY(1); 2178 } 2179 ncr53c9x_init(sc, 1); /* Restart everything */ 2180 goto out; 2181 } 2182 } 2183 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2184 2185 /* 2186 * Call if DMA is active. 2187 * 2188 * If DMA_INTR returns true, then maybe go 'round the loop 2189 * again in case there is no more DMA queued, but a phase 2190 * change is expected. 2191 */ 2192 if (NCRDMA_ISACTIVE(sc)) { 2193 int r = NCRDMA_INTR(sc); 2194 if (r == -1) { 2195 printf("%s: DMA error; resetting\n", 2196 sc->sc_dev.dv_xname); 2197 ncr53c9x_init(sc, 1); 2198 goto out; 2199 } 2200 /* If DMA active here, then go back to work... */ 2201 if (NCRDMA_ISACTIVE(sc)) 2202 goto out; 2203 2204 if ((sc->sc_espstat & NCRSTAT_TC) == 0) { 2205 /* 2206 * DMA not completed. If we can not find a 2207 * acceptable explanation, print a diagnostic. 2208 */ 2209 if (sc->sc_state == NCR_SELECTING) 2210 /* 2211 * This can happen if we are reselected 2212 * while using DMA to select a target. 2213 */ 2214 /*void*/; 2215 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 2216 /* 2217 * Our (multi-byte) message (eg SDTR) was 2218 * interrupted by the target to send 2219 * a MSG REJECT. 2220 * Print diagnostic if current phase 2221 * is not MESSAGE IN. 2222 */ 2223 if (sc->sc_phase != MESSAGE_IN_PHASE) 2224 printf("%s: !TC on MSG OUT" 2225 " [intr %x, stat %x, step %d]" 2226 " prevphase %x, resid %lx\n", 2227 sc->sc_dev.dv_xname, 2228 sc->sc_espintr, 2229 sc->sc_espstat, 2230 sc->sc_espstep, 2231 sc->sc_prevphase, 2232 (u_long)sc->sc_omlen); 2233 } else if (sc->sc_dleft == 0) { 2234 /* 2235 * The DMA operation was started for 2236 * a DATA transfer. Print a diagnostic 2237 * if the DMA counter and TC bit 2238 * appear to be out of sync. 2239 */ 2240 printf("%s: !TC on DATA XFER" 2241 " [intr %x, stat %x, step %d]" 2242 " prevphase %x, resid %x\n", 2243 sc->sc_dev.dv_xname, 2244 sc->sc_espintr, 2245 sc->sc_espstat, 2246 sc->sc_espstep, 2247 sc->sc_prevphase, 2248 ecb ? ecb->dleft : -1); 2249 } 2250 } 2251 } 2252 2253 /* 2254 * Check for less serious errors. 2255 */ 2256 if ((sc->sc_espstat & NCRSTAT_PE) != 0) { 2257 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 2258 if (sc->sc_prevphase == MESSAGE_IN_PHASE) 2259 ncr53c9x_sched_msgout(SEND_PARITY_ERROR); 2260 else 2261 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR); 2262 } 2263 2264 if ((sc->sc_espintr & NCRINTR_DIS) != 0) { 2265 sc->sc_msgify = 0; 2266 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>", 2267 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); 2268 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2269 NCRCMD(sc, NCRCMD_FLUSH); 2270 /* DELAY(1); */ 2271 } 2272 /* 2273 * This command must (apparently) be issued within 2274 * 250mS of a disconnect. So here you are... 2275 */ 2276 NCRCMD(sc, NCRCMD_ENSEL); 2277 2278 switch (sc->sc_state) { 2279 case NCR_RESELECTED: 2280 goto sched; 2281 2282 case NCR_SELECTING: 2283 { 2284 struct ncr53c9x_linfo *li; 2285 2286 ecb->xs->error = XS_SELTIMEOUT; 2287 2288 /* Selection timeout -- discard all LUNs if empty */ 2289 periph = ecb->xs->xs_periph; 2290 ti = &sc->sc_tinfo[periph->periph_target]; 2291 li = LIST_FIRST(&ti->luns); 2292 while (li != NULL) { 2293 if (li->untagged == NULL && li->used == 0) { 2294 if (li->lun < NCR_NLUN) 2295 ti->lun[li->lun] = NULL; 2296 LIST_REMOVE(li, link); 2297 free(li, M_DEVBUF); 2298 /* 2299 * Restart the search at the beginning 2300 */ 2301 li = LIST_FIRST(&ti->luns); 2302 continue; 2303 } 2304 li = LIST_NEXT(li, link); 2305 } 2306 goto finish; 2307 } 2308 case NCR_CONNECTED: 2309 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) { 2310 #ifdef NCR53C9X_DEBUG 2311 if (ecb != NULL) 2312 scsipi_printaddr(ecb->xs->xs_periph); 2313 printf("sync nego not completed!\n"); 2314 #endif 2315 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 2316 sc->sc_flags &= ~NCR_SYNCHNEGO; 2317 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 2318 } 2319 2320 /* it may be OK to disconnect */ 2321 if ((sc->sc_flags & NCR_ABORTING) == 0) { 2322 /* 2323 * Section 5.1.1 of the SCSI 2 spec 2324 * suggests issuing a REQUEST SENSE 2325 * following an unexpected disconnect. 2326 * Some devices go into a contingent 2327 * allegiance condition when 2328 * disconnecting, and this is necessary 2329 * to clean up their state. 2330 */ 2331 printf("%s: unexpected disconnect " 2332 "[state %d, intr %x, stat %x, phase(c %x, p %x)]; ", 2333 sc->sc_dev.dv_xname, sc->sc_state, 2334 sc->sc_espintr, sc->sc_espstat, 2335 sc->sc_phase, sc->sc_prevphase); 2336 2337 if ((ecb->flags & ECB_SENSE) != 0) { 2338 printf("resetting\n"); 2339 goto reset; 2340 } 2341 printf("sending REQUEST SENSE\n"); 2342 callout_stop(&ecb->xs->xs_callout); 2343 ncr53c9x_sense(sc, ecb); 2344 goto out; 2345 } 2346 2347 ecb->xs->error = XS_TIMEOUT; 2348 goto finish; 2349 2350 case NCR_DISCONNECT: 2351 sc->sc_nexus = NULL; 2352 goto sched; 2353 2354 case NCR_CMDCOMPLETE: 2355 goto finish; 2356 } 2357 } 2358 2359 switch (sc->sc_state) { 2360 2361 case NCR_SBR: 2362 printf("%s: waiting for SCSI Bus Reset to happen\n", 2363 sc->sc_dev.dv_xname); 2364 goto out; 2365 2366 case NCR_RESELECTED: 2367 /* 2368 * we must be continuing a message ? 2369 */ 2370 printf("%s: unhandled reselect continuation, " 2371 "state %d, intr %02x\n", 2372 sc->sc_dev.dv_xname, sc->sc_state, sc->sc_espintr); 2373 ncr53c9x_init(sc, 1); 2374 goto out; 2375 2376 case NCR_IDENTIFIED: 2377 ecb = sc->sc_nexus; 2378 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2379 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF); 2380 /* 2381 * Things are seriously screwed up. 2382 * Pull the brakes, i.e. reset 2383 */ 2384 printf("%s: target didn't send tag: %d bytes in fifo\n", 2385 sc->sc_dev.dv_xname, i); 2386 /* Drain and display fifo */ 2387 while (i-- > 0) 2388 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO)); 2389 2390 ncr53c9x_init(sc, 1); 2391 goto out; 2392 } else 2393 goto msgin; 2394 2395 case NCR_IDLE: 2396 case NCR_SELECTING: 2397 ecb = sc->sc_nexus; 2398 if (sc->sc_espintr & NCRINTR_RESEL) { 2399 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 2400 sc->sc_flags = 0; 2401 /* 2402 * If we're trying to select a 2403 * target ourselves, push our command 2404 * back into the ready list. 2405 */ 2406 if (sc->sc_state == NCR_SELECTING) { 2407 NCR_INTS(("backoff selector ")); 2408 callout_stop(&ecb->xs->xs_callout); 2409 ncr53c9x_dequeue(sc, ecb); 2410 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 2411 ecb->flags |= ECB_READY; 2412 ecb = sc->sc_nexus = NULL; 2413 } 2414 sc->sc_state = NCR_RESELECTED; 2415 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2416 /* 2417 * Things are seriously screwed up. 2418 * Pull the brakes, i.e. reset 2419 */ 2420 printf("%s: target didn't identify\n", 2421 sc->sc_dev.dv_xname); 2422 ncr53c9x_init(sc, 1); 2423 goto out; 2424 } 2425 /* 2426 * The C90 only inhibits FIFO writes until reselection 2427 * is complete, instead of waiting until the interrupt 2428 * status register has been read. So, if the reselect 2429 * happens while we were entering command bytes (for 2430 * another target) some of those bytes can appear in 2431 * the FIFO here, after the interrupt is taken. 2432 * 2433 * To remedy this situation, pull the Selection ID 2434 * and Identify message from the FIFO directly, and 2435 * ignore any extraneous fifo contents. Also, set 2436 * a flag that allows one Illegal Command Interrupt 2437 * to occur which the chip also generates as a result 2438 * of writing to the FIFO during a reselect. 2439 */ 2440 if (sc->sc_rev == NCR_VARIANT_ESP100) { 2441 nfifo = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 2442 sc->sc_imess[0] = NCR_READ_REG(sc, NCR_FIFO); 2443 sc->sc_imess[1] = NCR_READ_REG(sc, NCR_FIFO); 2444 sc->sc_imlen = 2; 2445 if (nfifo != 2) { 2446 /* Flush the rest */ 2447 NCRCMD(sc, NCRCMD_FLUSH); 2448 } 2449 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2450 if (nfifo > 2) 2451 nfifo = 2; /* We fixed it.. */ 2452 } else 2453 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2454 2455 if (nfifo != 2) { 2456 printf("%s: RESELECT: %d bytes in FIFO! " 2457 "[intr %x, stat %x, step %d, " 2458 "prevphase %x]\n", 2459 sc->sc_dev.dv_xname, 2460 nfifo, 2461 sc->sc_espintr, 2462 sc->sc_espstat, 2463 sc->sc_espstep, 2464 sc->sc_prevphase); 2465 ncr53c9x_init(sc, 1); 2466 goto out; 2467 } 2468 sc->sc_selid = sc->sc_imess[0]; 2469 NCR_INTS(("selid=%02x ", sc->sc_selid)); 2470 2471 /* Handle identify message */ 2472 ncr53c9x_msgin(sc); 2473 2474 if (sc->sc_state != NCR_CONNECTED && 2475 sc->sc_state != NCR_IDENTIFIED) { 2476 /* IDENTIFY fail?! */ 2477 printf("%s: identify failed, " 2478 "state %d, intr %02x\n", 2479 sc->sc_dev.dv_xname, sc->sc_state, 2480 sc->sc_espintr); 2481 ncr53c9x_init(sc, 1); 2482 goto out; 2483 } 2484 goto shortcut; /* ie. next phase expected soon */ 2485 } 2486 2487 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS) 2488 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) { 2489 /* 2490 * Arbitration won; examine the `step' register 2491 * to determine how far the selection could progress. 2492 */ 2493 ecb = sc->sc_nexus; 2494 if (ecb == NULL) 2495 panic("ncr53c9x: no nexus"); 2496 2497 periph = ecb->xs->xs_periph; 2498 ti = &sc->sc_tinfo[periph->periph_target]; 2499 2500 switch (sc->sc_espstep) { 2501 case 0: 2502 /* 2503 * The target did not respond with a 2504 * message out phase - probably an old 2505 * device that doesn't recognize ATN. 2506 * Clear ATN and just continue, the 2507 * target should be in the command 2508 * phase. 2509 * XXXX check for command phase? 2510 */ 2511 NCRCMD(sc, NCRCMD_RSTATN); 2512 break; 2513 case 1: 2514 if ((ti->flags & T_NEGOTIATE) == 0 && 2515 ecb->tag[0] == 0) { 2516 printf("%s: step 1 & !NEG\n", 2517 sc->sc_dev.dv_xname); 2518 goto reset; 2519 } 2520 if (sc->sc_phase != MESSAGE_OUT_PHASE) { 2521 printf("%s: !MSGOUT\n", 2522 sc->sc_dev.dv_xname); 2523 goto reset; 2524 } 2525 if (ti->flags & T_WIDE) { 2526 ti->flags |= T_WDTRSENT; 2527 ncr53c9x_sched_msgout(SEND_WDTR); 2528 } 2529 if (ti->flags & T_NEGOTIATE) { 2530 /* Start negotiating */ 2531 ti->period = sc->sc_minsync; 2532 ti->offset = 15; 2533 sc->sc_flags |= NCR_SYNCHNEGO; 2534 if (ecb->tag[0]) 2535 ncr53c9x_sched_msgout( 2536 SEND_TAG|SEND_SDTR); 2537 else 2538 ncr53c9x_sched_msgout( 2539 SEND_SDTR); 2540 } else { 2541 /* Could not do ATN3 so send TAG */ 2542 ncr53c9x_sched_msgout(SEND_TAG); 2543 } 2544 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */ 2545 break; 2546 case 3: 2547 /* 2548 * Grr, this is supposed to mean 2549 * "target left command phase prematurely". 2550 * It seems to happen regularly when 2551 * sync mode is on. 2552 * Look at FIFO to see if command went out. 2553 * (Timing problems?) 2554 */ 2555 if (sc->sc_features & NCR_F_DMASELECT) { 2556 if (sc->sc_cmdlen == 0) 2557 /* Hope for the best.. */ 2558 break; 2559 } else if ((NCR_READ_REG(sc, NCR_FFLAG) 2560 & NCRFIFO_FF) == 0) { 2561 /* Hope for the best.. */ 2562 break; 2563 } 2564 printf("(%s:%d:%d): selection failed;" 2565 " %d left in FIFO " 2566 "[intr %x, stat %x, step %d]\n", 2567 sc->sc_dev.dv_xname, 2568 periph->periph_target, 2569 periph->periph_lun, 2570 NCR_READ_REG(sc, NCR_FFLAG) 2571 & NCRFIFO_FF, 2572 sc->sc_espintr, sc->sc_espstat, 2573 sc->sc_espstep); 2574 NCRCMD(sc, NCRCMD_FLUSH); 2575 ncr53c9x_sched_msgout(SEND_ABORT); 2576 goto out; 2577 case 2: 2578 /* Select stuck at Command Phase */ 2579 NCRCMD(sc, NCRCMD_FLUSH); 2580 break; 2581 case 4: 2582 if (sc->sc_features & NCR_F_DMASELECT && 2583 sc->sc_cmdlen != 0) 2584 printf("(%s:%d:%d): select; " 2585 "%lu left in DMA buffer " 2586 "[intr %x, stat %x, step %d]\n", 2587 sc->sc_dev.dv_xname, 2588 periph->periph_target, 2589 periph->periph_lun, 2590 (u_long)sc->sc_cmdlen, 2591 sc->sc_espintr, 2592 sc->sc_espstat, 2593 sc->sc_espstep); 2594 /* So far, everything went fine */ 2595 break; 2596 } 2597 2598 sc->sc_prevphase = INVALID_PHASE; /* ?? */ 2599 /* Do an implicit RESTORE POINTERS. */ 2600 sc->sc_dp = ecb->daddr; 2601 sc->sc_dleft = ecb->dleft; 2602 sc->sc_state = NCR_CONNECTED; 2603 break; 2604 2605 } else { 2606 2607 printf("%s: unexpected status after select" 2608 ": [intr %x, stat %x, step %x]\n", 2609 sc->sc_dev.dv_xname, 2610 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2611 NCRCMD(sc, NCRCMD_FLUSH); 2612 DELAY(1); 2613 goto reset; 2614 } 2615 if (sc->sc_state == NCR_IDLE) { 2616 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname); 2617 simple_unlock(&sc->sc_lock); 2618 return (0); 2619 } 2620 break; 2621 2622 case NCR_CONNECTED: 2623 if ((sc->sc_flags & NCR_ICCS) != 0) { 2624 /* "Initiate Command Complete Steps" in progress */ 2625 u_char msg; 2626 2627 sc->sc_flags &= ~NCR_ICCS; 2628 2629 if (!(sc->sc_espintr & NCRINTR_DONE)) { 2630 printf("%s: ICCS: " 2631 ": [intr %x, stat %x, step %x]\n", 2632 sc->sc_dev.dv_xname, 2633 sc->sc_espintr, sc->sc_espstat, 2634 sc->sc_espstep); 2635 } 2636 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2637 if (sc->sc_imlen < 2) 2638 printf("%s: can't get status, only %d bytes\n", 2639 sc->sc_dev.dv_xname, (int)sc->sc_imlen); 2640 ecb->stat = sc->sc_imess[sc->sc_imlen - 2]; 2641 msg = sc->sc_imess[sc->sc_imlen - 1]; 2642 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg)); 2643 if (msg == MSG_CMDCOMPLETE) { 2644 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) 2645 ? 0 : sc->sc_dleft; 2646 if ((ecb->flags & ECB_SENSE) == 0) 2647 ecb->xs->resid = ecb->dleft; 2648 sc->sc_state = NCR_CMDCOMPLETE; 2649 } else 2650 printf("%s: STATUS_PHASE: msg %d\n", 2651 sc->sc_dev.dv_xname, msg); 2652 sc->sc_imlen = 0; 2653 NCRCMD(sc, NCRCMD_MSGOK); 2654 goto shortcut; /* ie. wait for disconnect */ 2655 } 2656 break; 2657 2658 default: 2659 printf("%s: invalid state: %d [intr %x, phase(c %x, p %x)]\n", 2660 sc->sc_dev.dv_xname, sc->sc_state, 2661 sc->sc_espintr, sc->sc_phase, sc->sc_prevphase); 2662 goto reset; 2663 } 2664 2665 /* 2666 * Driver is now in state NCR_CONNECTED, i.e. we 2667 * have a current command working the SCSI bus. 2668 */ 2669 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) { 2670 panic("ncr53c9x: no nexus"); 2671 } 2672 2673 switch (sc->sc_phase) { 2674 case MESSAGE_OUT_PHASE: 2675 NCR_PHASE(("MESSAGE_OUT_PHASE ")); 2676 ncr53c9x_msgout(sc); 2677 sc->sc_prevphase = MESSAGE_OUT_PHASE; 2678 break; 2679 2680 case MESSAGE_IN_PHASE: 2681 msgin: 2682 NCR_PHASE(("MESSAGE_IN_PHASE ")); 2683 if ((sc->sc_espintr & NCRINTR_BS) != 0) { 2684 if ((sc->sc_rev != NCR_VARIANT_FAS366) || 2685 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) { 2686 NCRCMD(sc, NCRCMD_FLUSH); 2687 } 2688 sc->sc_flags |= NCR_WAITI; 2689 NCRCMD(sc, NCRCMD_TRANS); 2690 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) { 2691 if ((sc->sc_flags & NCR_WAITI) == 0) { 2692 printf("%s: MSGIN: unexpected FC bit: " 2693 "[intr %x, stat %x, step %x]\n", 2694 sc->sc_dev.dv_xname, 2695 sc->sc_espintr, sc->sc_espstat, 2696 sc->sc_espstep); 2697 } 2698 sc->sc_flags &= ~NCR_WAITI; 2699 ncr53c9x_rdfifo(sc, 2700 (sc->sc_prevphase == sc->sc_phase) ? 2701 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START); 2702 ncr53c9x_msgin(sc); 2703 } else { 2704 printf("%s: MSGIN: weird bits: " 2705 "[intr %x, stat %x, step %x]\n", 2706 sc->sc_dev.dv_xname, 2707 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2708 } 2709 sc->sc_prevphase = MESSAGE_IN_PHASE; 2710 goto shortcut; /* i.e. expect data to be ready */ 2711 2712 case COMMAND_PHASE: 2713 /* 2714 * Send the command block. Normally we don't see this 2715 * phase because the SEL_ATN command takes care of 2716 * all this. However, we end up here if either the 2717 * target or we wanted to exchange some more messages 2718 * first (e.g. to start negotiations). 2719 */ 2720 2721 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ", 2722 ecb->cmd.cmd.opcode, ecb->clen)); 2723 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2724 NCRCMD(sc, NCRCMD_FLUSH); 2725 /* DELAY(1);*/ 2726 } 2727 if (sc->sc_features & NCR_F_DMASELECT) { 2728 /* setup DMA transfer for command */ 2729 size = ecb->clen; 2730 sc->sc_cmdlen = size; 2731 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 2732 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 2733 0, &size); 2734 /* Program the SCSI counter */ 2735 NCR_SET_COUNT(sc, size); 2736 2737 /* load the count in */ 2738 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2739 2740 /* start the command transfer */ 2741 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2742 NCRDMA_GO(sc); 2743 } else { 2744 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 2745 NCRCMD(sc, NCRCMD_TRANS); 2746 } 2747 sc->sc_prevphase = COMMAND_PHASE; 2748 break; 2749 2750 case DATA_OUT_PHASE: 2751 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); 2752 NCRCMD(sc, NCRCMD_FLUSH); 2753 size = min(sc->sc_dleft, sc->sc_maxxfer); 2754 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size); 2755 sc->sc_prevphase = DATA_OUT_PHASE; 2756 goto setup_xfer; 2757 2758 case DATA_IN_PHASE: 2759 NCR_PHASE(("DATA_IN_PHASE ")); 2760 if (sc->sc_rev == NCR_VARIANT_ESP100) 2761 NCRCMD(sc, NCRCMD_FLUSH); 2762 size = min(sc->sc_dleft, sc->sc_maxxfer); 2763 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size); 2764 sc->sc_prevphase = DATA_IN_PHASE; 2765 setup_xfer: 2766 /* Target returned to data phase: wipe "done" memory */ 2767 ecb->flags &= ~ECB_TENTATIVE_DONE; 2768 2769 /* Program the SCSI counter */ 2770 NCR_SET_COUNT(sc, size); 2771 2772 /* load the count in */ 2773 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2774 2775 /* 2776 * Note that if `size' is 0, we've already transceived 2777 * all the bytes we want but we're still in DATA PHASE. 2778 * Apparently, the device needs padding. Also, a 2779 * transfer size of 0 means "maximum" to the chip 2780 * DMA logic. 2781 */ 2782 NCRCMD(sc, 2783 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA); 2784 NCRDMA_GO(sc); 2785 goto out; 2786 2787 case STATUS_PHASE: 2788 NCR_PHASE(("STATUS_PHASE ")); 2789 sc->sc_flags |= NCR_ICCS; 2790 NCRCMD(sc, NCRCMD_ICCS); 2791 sc->sc_prevphase = STATUS_PHASE; 2792 goto shortcut; /* i.e. expect status results soon */ 2793 2794 case INVALID_PHASE: 2795 break; 2796 2797 default: 2798 printf("%s: unexpected bus phase; resetting\n", 2799 sc->sc_dev.dv_xname); 2800 goto reset; 2801 } 2802 2803 out: 2804 simple_unlock(&sc->sc_lock); 2805 return (1); 2806 2807 reset: 2808 ncr53c9x_init(sc, 1); 2809 goto out; 2810 2811 finish: 2812 ncr53c9x_done(sc, ecb); 2813 goto out; 2814 2815 sched: 2816 sc->sc_state = NCR_IDLE; 2817 ncr53c9x_sched(sc); 2818 goto out; 2819 2820 shortcut: 2821 /* 2822 * The idea is that many of the SCSI operations take very little 2823 * time, and going away and getting interrupted is too high an 2824 * overhead to pay. For example, selecting, sending a message 2825 * and command and then doing some work can be done in one "pass". 2826 * 2827 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1 2828 * at 40MHz. This needs testing. 2829 */ 2830 { 2831 struct timeval wait, cur; 2832 2833 microtime(&wait); 2834 wait.tv_usec += 50 / sc->sc_freq; 2835 if (wait.tv_usec > 1000000) { 2836 wait.tv_sec++; 2837 wait.tv_usec -= 1000000; 2838 } 2839 do { 2840 if (NCRDMA_ISINTR(sc)) 2841 goto again; 2842 microtime(&cur); 2843 } while (cur.tv_sec <= wait.tv_sec && 2844 cur.tv_usec <= wait.tv_usec); 2845 } 2846 goto out; 2847 } 2848 2849 void 2850 ncr53c9x_abort(sc, ecb) 2851 struct ncr53c9x_softc *sc; 2852 struct ncr53c9x_ecb *ecb; 2853 { 2854 2855 /* 2 secs for the abort */ 2856 ecb->timeout = NCR_ABORT_TIMEOUT; 2857 ecb->flags |= ECB_ABORT; 2858 2859 if (ecb == sc->sc_nexus) { 2860 /* 2861 * If we're still selecting, the message will be scheduled 2862 * after selection is complete. 2863 */ 2864 if (sc->sc_state == NCR_CONNECTED) 2865 ncr53c9x_sched_msgout(SEND_ABORT); 2866 2867 /* 2868 * Reschedule timeout. 2869 */ 2870 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 2871 ncr53c9x_timeout, ecb); 2872 } else { 2873 /* 2874 * Just leave the command where it is. 2875 * XXX - what choice do we have but to reset the SCSI 2876 * eventually? 2877 */ 2878 if (sc->sc_state == NCR_IDLE) 2879 ncr53c9x_sched(sc); 2880 } 2881 } 2882 2883 void 2884 ncr53c9x_timeout(arg) 2885 void *arg; 2886 { 2887 struct ncr53c9x_ecb *ecb = arg; 2888 struct scsipi_xfer *xs = ecb->xs; 2889 struct scsipi_periph *periph = xs->xs_periph; 2890 struct ncr53c9x_softc *sc = 2891 (void *)periph->periph_channel->chan_adapter->adapt_dev; 2892 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 2893 int s; 2894 2895 scsipi_printaddr(periph); 2896 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " 2897 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, " 2898 "msg(q %x,o %x) %s>", 2899 sc->sc_dev.dv_xname, 2900 ecb, ecb->flags, ecb->dleft, ecb->stat, 2901 sc->sc_state, sc->sc_nexus, 2902 NCR_READ_REG(sc, NCR_STAT), 2903 sc->sc_phase, sc->sc_prevphase, 2904 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, 2905 NCRDMA_ISACTIVE(sc) ? "DMA active" : ""); 2906 #if NCR53C9X_DEBUG > 1 2907 printf("TRACE: %s.", ecb->trace); 2908 #endif 2909 2910 s = splbio(); 2911 simple_lock(&sc->sc_lock); 2912 2913 if (ecb->flags & ECB_ABORT) { 2914 /* abort timed out */ 2915 printf(" AGAIN\n"); 2916 2917 ncr53c9x_init(sc, 1); 2918 } else { 2919 /* abort the operation that has timed out */ 2920 printf("\n"); 2921 xs->error = XS_TIMEOUT; 2922 ncr53c9x_abort(sc, ecb); 2923 2924 /* Disable sync mode if stuck in a data phase */ 2925 if (ecb == sc->sc_nexus && 2926 (ti->flags & T_SYNCMODE) != 0 && 2927 (sc->sc_phase & (MSGI|CDI)) == 0) { 2928 /* XXX ASYNC CALLBACK! */ 2929 scsipi_printaddr(periph); 2930 printf("sync negotiation disabled\n"); 2931 sc->sc_cfflags |= 2932 (1 << ((periph->periph_target & 7) + 8)); 2933 ncr53c9x_update_xfer_mode(sc, periph->periph_target); 2934 } 2935 } 2936 2937 simple_unlock(&sc->sc_lock); 2938 splx(s); 2939 } 2940 2941 void 2942 ncr53c9x_watch(arg) 2943 void *arg; 2944 { 2945 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg; 2946 struct ncr53c9x_tinfo *ti; 2947 struct ncr53c9x_linfo *li; 2948 int t, s; 2949 /* Delete any structures that have not been used in 10min. */ 2950 time_t old = time.tv_sec - (10 * 60); 2951 2952 s = splbio(); 2953 simple_lock(&sc->sc_lock); 2954 for (t = 0; t < sc->sc_ntarg; t++) { 2955 ti = &sc->sc_tinfo[t]; 2956 li = LIST_FIRST(&ti->luns); 2957 while (li) { 2958 if (li->last_used < old && 2959 li->untagged == NULL && 2960 li->used == 0) { 2961 if (li->lun < NCR_NLUN) 2962 ti->lun[li->lun] = NULL; 2963 LIST_REMOVE(li, link); 2964 free(li, M_DEVBUF); 2965 /* Restart the search at the beginning */ 2966 li = LIST_FIRST(&ti->luns); 2967 continue; 2968 } 2969 li = LIST_NEXT(li, link); 2970 } 2971 } 2972 simple_unlock(&sc->sc_lock); 2973 splx(s); 2974 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 2975 } 2976
Cache object: 02692a5c096142d8e8bb646e5c06cb33
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