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sys/dev/ic/ncr53c9x.c
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1 /* $NetBSD: ncr53c9x.c,v 1.123 2006/11/16 01:32:52 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1994 Peter Galbavy 41 * Copyright (c) 1995 Paul Kranenburg 42 * All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Peter Galbavy 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 60 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 61 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 62 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 63 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 64 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 65 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 66 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 67 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71 /* 72 * Based on aic6360 by Jarle Greipsland 73 * 74 * Acknowledgements: Many of the algorithms used in this driver are 75 * inspired by the work of Julian Elischer (julian@tfs.com) and 76 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 77 */ 78 79 #include <sys/cdefs.h> 80 __KERNEL_RCSID(0, "$NetBSD: ncr53c9x.c,v 1.123 2006/11/16 01:32:52 christos Exp $"); 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/callout.h> 85 #include <sys/kernel.h> 86 #include <sys/errno.h> 87 #include <sys/ioctl.h> 88 #include <sys/device.h> 89 #include <sys/buf.h> 90 #include <sys/malloc.h> 91 #include <sys/proc.h> 92 #include <sys/queue.h> 93 #include <sys/pool.h> 94 #include <sys/scsiio.h> 95 96 #include <dev/scsipi/scsi_spc.h> 97 #include <dev/scsipi/scsi_all.h> 98 #include <dev/scsipi/scsipi_all.h> 99 #include <dev/scsipi/scsiconf.h> 100 #include <dev/scsipi/scsi_message.h> 101 102 #include <dev/ic/ncr53c9xreg.h> 103 #include <dev/ic/ncr53c9xvar.h> 104 105 int ncr53c9x_debug = NCR_SHOWMISC; /*NCR_SHOWPHASE|NCR_SHOWMISC|NCR_SHOWTRAC|NCR_SHOWCMDS;*/ 106 #ifdef DEBUG 107 int ncr53c9x_notag = 0; 108 #endif 109 110 /*static*/ void ncr53c9x_readregs(struct ncr53c9x_softc *); 111 /*static*/ void ncr53c9x_select(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 112 /*static*/ int ncr53c9x_reselect(struct ncr53c9x_softc *, int, int, int); 113 /*static*/ void ncr53c9x_scsi_reset(struct ncr53c9x_softc *); 114 /*static*/ int ncr53c9x_poll(struct ncr53c9x_softc *, 115 struct scsipi_xfer *, int); 116 /*static*/ void ncr53c9x_sched(struct ncr53c9x_softc *); 117 /*static*/ void ncr53c9x_done(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 118 /*static*/ void ncr53c9x_msgin(struct ncr53c9x_softc *); 119 /*static*/ void ncr53c9x_msgout(struct ncr53c9x_softc *); 120 /*static*/ void ncr53c9x_timeout(void *arg); 121 /*static*/ void ncr53c9x_watch(void *arg); 122 /*static*/ void ncr53c9x_abort(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 123 /*static*/ void ncr53c9x_dequeue(struct ncr53c9x_softc *, 124 struct ncr53c9x_ecb *); 125 /*static*/ int ncr53c9x_ioctl(struct scsipi_channel *, u_long, 126 caddr_t, int, struct proc *); 127 128 void ncr53c9x_sense(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 129 void ncr53c9x_free_ecb(struct ncr53c9x_softc *, struct ncr53c9x_ecb *); 130 struct ncr53c9x_ecb *ncr53c9x_get_ecb(struct ncr53c9x_softc *, int); 131 132 static inline int ncr53c9x_stp2cpb(struct ncr53c9x_softc *, int); 133 static inline void ncr53c9x_setsync(struct ncr53c9x_softc *, 134 struct ncr53c9x_tinfo *); 135 void ncr53c9x_update_xfer_mode (struct ncr53c9x_softc *, int); 136 static struct ncr53c9x_linfo *ncr53c9x_lunsearch(struct ncr53c9x_tinfo *, 137 int64_t lun); 138 139 static void ncr53c9x_wrfifo(struct ncr53c9x_softc *, u_char *, int); 140 141 static int ncr53c9x_rdfifo(struct ncr53c9x_softc *, int); 142 #define NCR_RDFIFO_START 0 143 #define NCR_RDFIFO_CONTINUE 1 144 145 146 #define NCR_SET_COUNT(sc, size) do { \ 147 NCR_WRITE_REG((sc), NCR_TCL, (size)); \ 148 NCR_WRITE_REG((sc), NCR_TCM, (size) >> 8); \ 149 if ((sc->sc_cfg2 & NCRCFG2_FE) || \ 150 (sc->sc_rev == NCR_VARIANT_FAS366)) { \ 151 NCR_WRITE_REG((sc), NCR_TCH, (size) >> 16); \ 152 } \ 153 if (sc->sc_rev == NCR_VARIANT_FAS366) { \ 154 NCR_WRITE_REG(sc, NCR_RCH, 0); \ 155 } \ 156 } while (0) 157 158 static int ecb_pool_initialized = 0; 159 static struct pool ecb_pool; 160 161 /* 162 * Names for the NCR53c9x variants, corresponding to the variant tags 163 * in ncr53c9xvar.h. 164 */ 165 static const char *ncr53c9x_variant_names[] = { 166 "ESP100", 167 "ESP100A", 168 "ESP200", 169 "NCR53C94", 170 "NCR53C96", 171 "ESP406", 172 "FAS408", 173 "FAS216", 174 "AM53C974", 175 "FAS366/HME", 176 "NCR53C90 (86C01)", 177 }; 178 179 /* 180 * Search linked list for LUN info by LUN id. 181 */ 182 static struct ncr53c9x_linfo * 183 ncr53c9x_lunsearch(ti, lun) 184 struct ncr53c9x_tinfo *ti; 185 int64_t lun; 186 { 187 struct ncr53c9x_linfo *li; 188 LIST_FOREACH(li, &ti->luns, link) 189 if (li->lun == lun) 190 return (li); 191 return (NULL); 192 } 193 194 /* 195 * Attach this instance, and then all the sub-devices 196 */ 197 void 198 ncr53c9x_attach(sc) 199 struct ncr53c9x_softc *sc; 200 { 201 struct scsipi_adapter *adapt = &sc->sc_adapter; 202 struct scsipi_channel *chan = &sc->sc_channel; 203 204 simple_lock_init(&sc->sc_lock); 205 206 /* 207 * Note, the front-end has set us up to print the chip variation. 208 */ 209 if (sc->sc_rev >= NCR_VARIANT_MAX) { 210 printf("\n%s: unknown variant %d, devices not attached\n", 211 sc->sc_dev.dv_xname, sc->sc_rev); 212 return; 213 } 214 215 printf(": %s, %dMHz, SCSI ID %d\n", 216 ncr53c9x_variant_names[sc->sc_rev], sc->sc_freq, sc->sc_id); 217 218 sc->sc_ntarg = (sc->sc_rev == NCR_VARIANT_FAS366) ? 16 : 8; 219 220 /* 221 * Allocate SCSI message buffers. 222 * Front-ends can override allocation to avoid alignment 223 * handling in the DMA engines. Note that that ncr53c9x_msgout() 224 * can request a 1 byte DMA transfer. 225 */ 226 if (sc->sc_omess == NULL) 227 sc->sc_omess = malloc(NCR_MAX_MSG_LEN, M_DEVBUF, M_NOWAIT); 228 229 if (sc->sc_imess == NULL) 230 sc->sc_imess = malloc(NCR_MAX_MSG_LEN + 1, M_DEVBUF, M_NOWAIT); 231 232 sc->sc_tinfo = malloc(sc->sc_ntarg * sizeof(sc->sc_tinfo[0]), 233 M_DEVBUF, M_NOWAIT | M_ZERO); 234 235 if (!sc->sc_omess || !sc->sc_imess || !sc->sc_tinfo) { 236 printf("out of memory\n"); 237 return; 238 } 239 240 callout_init(&sc->sc_watchdog); 241 242 /* 243 * Treat NCR53C90 with the 86C01 DMA chip exactly as ESP100 244 * from now on. 245 */ 246 if (sc->sc_rev == NCR_VARIANT_NCR53C90_86C01) 247 sc->sc_rev = NCR_VARIANT_ESP100; 248 249 sc->sc_ccf = FREQTOCCF(sc->sc_freq); 250 251 /* The value *must not* be == 1. Make it 2 */ 252 if (sc->sc_ccf == 1) 253 sc->sc_ccf = 2; 254 255 /* 256 * The recommended timeout is 250ms. This register is loaded 257 * with a value calculated as follows, from the docs: 258 * 259 * (timout period) x (CLK frequency) 260 * reg = ------------------------------------- 261 * 8192 x (Clock Conversion Factor) 262 * 263 * Since CCF has a linear relation to CLK, this generally computes 264 * to the constant of 153. 265 */ 266 sc->sc_timeout = ((250 * 1000) * sc->sc_freq) / (8192 * sc->sc_ccf); 267 268 /* CCF register only has 3 bits; 0 is actually 8 */ 269 sc->sc_ccf &= 7; 270 271 /* 272 * Fill in the scsipi_adapter. 273 */ 274 adapt->adapt_dev = &sc->sc_dev; 275 adapt->adapt_nchannels = 1; 276 adapt->adapt_openings = 256; 277 adapt->adapt_max_periph = 256; 278 adapt->adapt_ioctl = ncr53c9x_ioctl; 279 /* adapt_request initialized by front-end */ 280 /* adapt_minphys initialized by front-end */ 281 282 /* 283 * Fill in the scsipi_channel. 284 */ 285 memset(chan, 0, sizeof(*chan)); 286 chan->chan_adapter = adapt; 287 chan->chan_bustype = &scsi_bustype; 288 chan->chan_channel = 0; 289 chan->chan_ntargets = sc->sc_ntarg; 290 chan->chan_nluns = 8; 291 chan->chan_id = sc->sc_id; 292 293 /* 294 * Add reference to adapter so that we drop the reference after 295 * config_found() to make sure the adatper is disabled. 296 */ 297 if (scsipi_adapter_addref(adapt) != 0) { 298 printf("%s: unable to enable controller\n", 299 sc->sc_dev.dv_xname); 300 return; 301 } 302 303 /* Reset state & bus */ 304 sc->sc_cfflags = device_cfdata(&sc->sc_dev)->cf_flags; 305 sc->sc_state = 0; 306 ncr53c9x_init(sc, 1); 307 308 /* 309 * Now try to attach all the sub-devices 310 */ 311 sc->sc_child = config_found(&sc->sc_dev, &sc->sc_channel, scsiprint); 312 313 scsipi_adapter_delref(adapt); 314 callout_reset(&sc->sc_watchdog, 60*hz, ncr53c9x_watch, sc); 315 } 316 317 int 318 ncr53c9x_detach(sc, flags) 319 struct ncr53c9x_softc *sc; 320 int flags; 321 { 322 int error; 323 324 if (sc->sc_child) { 325 error = config_detach(sc->sc_child, flags); 326 if (error) 327 return (error); 328 } 329 330 free(sc->sc_imess, M_DEVBUF); 331 free(sc->sc_omess, M_DEVBUF); 332 333 return (0); 334 } 335 336 /* 337 * This is the generic ncr53c9x reset function. It does not reset the SCSI bus, 338 * only this controller, but kills any on-going commands, and also stops 339 * and resets the DMA. 340 * 341 * After reset, registers are loaded with the defaults from the attach 342 * routine above. 343 */ 344 void 345 ncr53c9x_reset(sc) 346 struct ncr53c9x_softc *sc; 347 { 348 349 /* reset DMA first */ 350 NCRDMA_RESET(sc); 351 352 /* reset SCSI chip */ 353 NCRCMD(sc, NCRCMD_RSTCHIP); 354 NCRCMD(sc, NCRCMD_NOP); 355 DELAY(500); 356 357 /* do these backwards, and fall through */ 358 switch (sc->sc_rev) { 359 case NCR_VARIANT_ESP406: 360 case NCR_VARIANT_FAS408: 361 NCR_WRITE_REG(sc, NCR_CFG5, sc->sc_cfg5 | NCRCFG5_SINT); 362 NCR_WRITE_REG(sc, NCR_CFG4, sc->sc_cfg4); 363 case NCR_VARIANT_AM53C974: 364 case NCR_VARIANT_FAS216: 365 case NCR_VARIANT_NCR53C94: 366 case NCR_VARIANT_NCR53C96: 367 case NCR_VARIANT_ESP200: 368 sc->sc_features |= NCR_F_HASCFG3; 369 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 370 case NCR_VARIANT_ESP100A: 371 sc->sc_features |= NCR_F_SELATN3; 372 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 373 case NCR_VARIANT_ESP100: 374 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 375 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 376 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 377 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 378 break; 379 380 case NCR_VARIANT_FAS366: 381 sc->sc_features |= 382 NCR_F_HASCFG3 | NCR_F_FASTSCSI | NCR_F_SELATN3; 383 sc->sc_cfg3 = NCRFASCFG3_FASTCLK | NCRFASCFG3_OBAUTO; 384 sc->sc_cfg3_fscsi = NCRFASCFG3_FASTSCSI; 385 NCR_WRITE_REG(sc, NCR_CFG3, sc->sc_cfg3); 386 sc->sc_cfg2 = 0; /* NCRCFG2_HMEFE| NCRCFG2_HME32 */ 387 NCR_WRITE_REG(sc, NCR_CFG2, sc->sc_cfg2); 388 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 389 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 390 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 391 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 392 break; 393 394 default: 395 printf("%s: unknown revision code, assuming ESP100\n", 396 sc->sc_dev.dv_xname); 397 NCR_WRITE_REG(sc, NCR_CFG1, sc->sc_cfg1); 398 NCR_WRITE_REG(sc, NCR_CCF, sc->sc_ccf); 399 NCR_WRITE_REG(sc, NCR_SYNCOFF, 0); 400 NCR_WRITE_REG(sc, NCR_TIMEOUT, sc->sc_timeout); 401 } 402 403 if (sc->sc_rev == NCR_VARIANT_AM53C974) 404 NCR_WRITE_REG(sc, NCR_AMDCFG4, sc->sc_cfg4); 405 406 #if 0 407 printf("%s: ncr53c9x_reset: revision %d\n", 408 sc->sc_dev.dv_xname, sc->sc_rev); 409 printf("%s: ncr53c9x_reset: cfg1 0x%x, cfg2 0x%x, cfg3 0x%x, " 410 "ccf 0x%x, timeout 0x%x\n", 411 sc->sc_dev.dv_xname, sc->sc_cfg1, sc->sc_cfg2, sc->sc_cfg3, 412 sc->sc_ccf, sc->sc_timeout); 413 #endif 414 } 415 416 /* 417 * Reset the SCSI bus, but not the chip 418 */ 419 void 420 ncr53c9x_scsi_reset(sc) 421 struct ncr53c9x_softc *sc; 422 { 423 424 (*sc->sc_glue->gl_dma_stop)(sc); 425 426 printf("%s: resetting SCSI bus\n", sc->sc_dev.dv_xname); 427 NCRCMD(sc, NCRCMD_RSTSCSI); 428 } 429 430 /* 431 * Initialize ncr53c9x state machine 432 */ 433 void 434 ncr53c9x_init(sc, doreset) 435 struct ncr53c9x_softc *sc; 436 int doreset; 437 { 438 struct ncr53c9x_ecb *ecb; 439 struct ncr53c9x_linfo *li; 440 int i, r; 441 442 NCR_MISC(("[NCR_INIT(%d) %d] ", doreset, sc->sc_state)); 443 444 if (!ecb_pool_initialized) { 445 /* All instances share this pool */ 446 pool_init(&ecb_pool, sizeof(struct ncr53c9x_ecb), 0, 0, 0, 447 "ncr53c9x_ecb", NULL); 448 /* make sure to always have some items to play with */ 449 if (pool_prime(&ecb_pool, 1) == ENOMEM) { 450 printf("WARNING: not enough memory for ncr53c9x_ecb\n"); 451 } 452 ecb_pool_initialized = 1; 453 } 454 455 if (sc->sc_state == 0) { 456 /* First time through; initialize. */ 457 458 TAILQ_INIT(&sc->ready_list); 459 sc->sc_nexus = NULL; 460 memset(sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 461 for (r = 0; r < sc->sc_ntarg; r++) { 462 LIST_INIT(&sc->sc_tinfo[r].luns); 463 } 464 } else { 465 /* Cancel any active commands. */ 466 sc->sc_state = NCR_CLEANING; 467 sc->sc_msgify = 0; 468 if ((ecb = sc->sc_nexus) != NULL) { 469 ecb->xs->error = XS_TIMEOUT; 470 ncr53c9x_done(sc, ecb); 471 } 472 /* Cancel outstanding disconnected commands on each LUN */ 473 for (r = 0; r < sc->sc_ntarg; r++) { 474 LIST_FOREACH(li, &sc->sc_tinfo[r].luns, link) { 475 if ((ecb = li->untagged) != NULL) { 476 li->untagged = NULL; 477 /* 478 * XXXXXXX 479 * 480 * Should we terminate a command 481 * that never reached the disk? 482 */ 483 li->busy = 0; 484 ecb->xs->error = XS_TIMEOUT; 485 ncr53c9x_done(sc, ecb); 486 } 487 for (i = 0; i < 256; i++) 488 if ((ecb = li->queued[i])) { 489 li->queued[i] = NULL; 490 ecb->xs->error = XS_TIMEOUT; 491 ncr53c9x_done(sc, ecb); 492 } 493 li->used = 0; 494 } 495 } 496 } 497 498 /* 499 * reset the chip to a known state 500 */ 501 ncr53c9x_reset(sc); 502 503 sc->sc_flags = 0; 504 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 505 sc->sc_phase = sc->sc_prevphase = INVALID_PHASE; 506 507 for (r = 0; r < sc->sc_ntarg; r++) { 508 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[r]; 509 /* XXX - config flags per target: low bits: no reselect; high bits: no synch */ 510 511 ti->flags = ((sc->sc_minsync && !(sc->sc_cfflags & (1<<((r&7)+8)))) 512 ? 0 : T_SYNCHOFF) | 513 ((sc->sc_cfflags & (1<<(r&7))) ? T_RSELECTOFF : 0); 514 #ifdef DEBUG 515 if (ncr53c9x_notag) 516 ti->flags &= ~T_TAG; 517 #endif 518 ti->period = sc->sc_minsync; 519 ti->offset = 0; 520 ti->cfg3 = 0; 521 522 ncr53c9x_update_xfer_mode(sc, r); 523 } 524 525 if (doreset) { 526 sc->sc_state = NCR_SBR; 527 NCRCMD(sc, NCRCMD_RSTSCSI); 528 } else { 529 sc->sc_state = NCR_IDLE; 530 ncr53c9x_sched(sc); 531 } 532 533 /* Notify upper layer */ 534 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_RESET, NULL); 535 } 536 537 /* 538 * Read the NCR registers, and save their contents for later use. 539 * NCR_STAT, NCR_STEP & NCR_INTR are mostly zeroed out when reading 540 * NCR_INTR - so make sure it is the last read. 541 * 542 * I think that (from reading the docs) most bits in these registers 543 * only make sense when he DMA CSR has an interrupt showing. Call only 544 * if an interrupt is pending. 545 */ 546 inline void 547 ncr53c9x_readregs(sc) 548 struct ncr53c9x_softc *sc; 549 { 550 551 sc->sc_espstat = NCR_READ_REG(sc, NCR_STAT); 552 /* Only the stepo bits are of interest */ 553 sc->sc_espstep = NCR_READ_REG(sc, NCR_STEP) & NCRSTEP_MASK; 554 555 if (sc->sc_rev == NCR_VARIANT_FAS366) 556 sc->sc_espstat2 = NCR_READ_REG(sc, NCR_STAT2); 557 558 sc->sc_espintr = NCR_READ_REG(sc, NCR_INTR); 559 560 if (sc->sc_glue->gl_clear_latched_intr != NULL) 561 (*sc->sc_glue->gl_clear_latched_intr)(sc); 562 563 /* 564 * Determine the SCSI bus phase, return either a real SCSI bus phase 565 * or some pseudo phase we use to detect certain exceptions. 566 */ 567 568 sc->sc_phase = (sc->sc_espintr & NCRINTR_DIS) ? 569 /* Disconnected */ BUSFREE_PHASE : sc->sc_espstat & NCRSTAT_PHASE; 570 571 NCR_INTS(("regs[intr=%02x,stat=%02x,step=%02x,stat2=%02x] ", 572 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep, sc->sc_espstat2)); 573 } 574 575 /* 576 * Convert Synchronous Transfer Period to chip register Clock Per Byte value. 577 */ 578 static inline int 579 ncr53c9x_stp2cpb(sc, period) 580 struct ncr53c9x_softc *sc; 581 int period; 582 { 583 int v; 584 v = (sc->sc_freq * period) / 250; 585 if (ncr53c9x_cpb2stp(sc, v) < period) 586 /* Correct round-down error */ 587 v++; 588 return (v); 589 } 590 591 static inline void 592 ncr53c9x_setsync(sc, ti) 593 struct ncr53c9x_softc *sc; 594 struct ncr53c9x_tinfo *ti; 595 { 596 u_char syncoff, synctp; 597 u_char cfg3 = sc->sc_cfg3 | ti->cfg3; 598 599 if (ti->flags & T_SYNCMODE) { 600 syncoff = ti->offset; 601 synctp = ncr53c9x_stp2cpb(sc, ti->period); 602 if (sc->sc_features & NCR_F_FASTSCSI) { 603 /* 604 * If the period is 200ns or less (ti->period <= 50), 605 * put the chip in Fast SCSI mode. 606 */ 607 if (ti->period <= 50) 608 /* 609 * There are (at least) 4 variations of the 610 * configuration 3 register. The drive attach 611 * routine sets the appropriate bit to put the 612 * chip into Fast SCSI mode so that it doesn't 613 * have to be figured out here each time. 614 */ 615 cfg3 |= sc->sc_cfg3_fscsi; 616 } 617 618 /* 619 * Am53c974 requires different SYNCTP values when the 620 * FSCSI bit is off. 621 */ 622 if (sc->sc_rev == NCR_VARIANT_AM53C974 && 623 (cfg3 & NCRAMDCFG3_FSCSI) == 0) 624 synctp--; 625 } else { 626 syncoff = 0; 627 synctp = 0; 628 } 629 630 if (sc->sc_features & NCR_F_HASCFG3) 631 NCR_WRITE_REG(sc, NCR_CFG3, cfg3); 632 633 NCR_WRITE_REG(sc, NCR_SYNCOFF, syncoff); 634 NCR_WRITE_REG(sc, NCR_SYNCTP, synctp); 635 } 636 637 /* 638 * Send a command to a target, set the driver state to NCR_SELECTING 639 * and let the caller take care of the rest. 640 * 641 * Keeping this as a function allows me to say that this may be done 642 * by DMA instead of programmed I/O soon. 643 */ 644 void 645 ncr53c9x_select(sc, ecb) 646 struct ncr53c9x_softc *sc; 647 struct ncr53c9x_ecb *ecb; 648 { 649 struct scsipi_periph *periph = ecb->xs->xs_periph; 650 int target = periph->periph_target; 651 int lun = periph->periph_lun; 652 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 653 int tiflags = ti->flags; 654 u_char *cmd; 655 int clen; 656 int selatn3, selatns; 657 size_t dmasize; 658 659 NCR_TRACE(("[ncr53c9x_select(t%d,l%d,cmd:%x,tag:%x,%x)] ", 660 target, lun, ecb->cmd.cmd.opcode, ecb->tag[0], ecb->tag[1])); 661 662 sc->sc_state = NCR_SELECTING; 663 /* 664 * Schedule the timeout now, the first time we will go away 665 * expecting to come back due to an interrupt, because it is 666 * always possible that the interrupt may never happen. 667 */ 668 if ((ecb->xs->xs_control & XS_CTL_POLL) == 0) { 669 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 670 ncr53c9x_timeout, ecb); 671 } 672 673 /* 674 * The docs say the target register is never reset, and I 675 * can't think of a better place to set it 676 */ 677 if (sc->sc_rev == NCR_VARIANT_FAS366) { 678 NCRCMD(sc, NCRCMD_FLUSH); 679 NCR_WRITE_REG(sc, NCR_SELID, target | NCR_BUSID_HME); 680 } else { 681 NCR_WRITE_REG(sc, NCR_SELID, target); 682 } 683 ncr53c9x_setsync(sc, ti); 684 685 if ((ecb->flags & ECB_SENSE) != 0) { 686 /* 687 * For REQUEST SENSE, we should not send an IDENTIFY or 688 * otherwise mangle the target. There should be no MESSAGE IN 689 * phase. 690 */ 691 if (sc->sc_features & NCR_F_DMASELECT) { 692 /* setup DMA transfer for command */ 693 dmasize = clen = ecb->clen; 694 sc->sc_cmdlen = clen; 695 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 696 697 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, 698 &dmasize); 699 /* Program the SCSI counter */ 700 NCR_SET_COUNT(sc, dmasize); 701 702 if (sc->sc_rev != NCR_VARIANT_FAS366) 703 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 704 705 /* And get the targets attention */ 706 NCRCMD(sc, NCRCMD_SELNATN | NCRCMD_DMA); 707 NCRDMA_GO(sc); 708 } else { 709 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 710 NCRCMD(sc, NCRCMD_SELNATN); 711 } 712 return; 713 } 714 715 selatn3 = selatns = 0; 716 if (ecb->tag[0] != 0) { 717 if (sc->sc_features & NCR_F_SELATN3) 718 /* use SELATN3 to send tag messages */ 719 selatn3 = 1; 720 else 721 /* We don't have SELATN3; use SELATNS to send tags */ 722 selatns = 1; 723 } 724 725 if (ti->flags & T_NEGOTIATE) { 726 /* We have to use SELATNS to send sync/wide messages */ 727 selatn3 = 0; 728 selatns = 1; 729 } 730 731 cmd = (u_char *)&ecb->cmd.cmd; 732 733 if (selatn3) { 734 /* We'll use tags with SELATN3 */ 735 clen = ecb->clen + 3; 736 cmd -= 3; 737 cmd[0] = MSG_IDENTIFY(lun, 1); /* msg[0] */ 738 cmd[1] = ecb->tag[0]; /* msg[1] */ 739 cmd[2] = ecb->tag[1]; /* msg[2] */ 740 } else { 741 /* We don't have tags, or will send messages with SELATNS */ 742 clen = ecb->clen + 1; 743 cmd -= 1; 744 cmd[0] = MSG_IDENTIFY(lun, (tiflags & T_RSELECTOFF) == 0); 745 } 746 747 if ((sc->sc_features & NCR_F_DMASELECT) && !selatns) { 748 749 /* setup DMA transfer for command */ 750 dmasize = clen; 751 sc->sc_cmdlen = clen; 752 sc->sc_cmdp = cmd; 753 754 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 0, &dmasize); 755 /* Program the SCSI counter */ 756 NCR_SET_COUNT(sc, dmasize); 757 758 /* load the count in */ 759 /* if (sc->sc_rev != NCR_VARIANT_FAS366) */ 760 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 761 762 /* And get the targets attention */ 763 if (selatn3) { 764 sc->sc_msgout = SEND_TAG; 765 sc->sc_flags |= NCR_ATN; 766 NCRCMD(sc, NCRCMD_SELATN3 | NCRCMD_DMA); 767 } else 768 NCRCMD(sc, NCRCMD_SELATN | NCRCMD_DMA); 769 NCRDMA_GO(sc); 770 return; 771 } 772 773 /* 774 * Who am I. This is where we tell the target that we are 775 * happy for it to disconnect etc. 776 */ 777 778 /* Now get the command into the FIFO */ 779 ncr53c9x_wrfifo(sc, cmd, clen); 780 781 /* And get the targets attention */ 782 if (selatns) { 783 NCR_MSGS(("SELATNS \n")); 784 /* Arbitrate, select and stop after IDENTIFY message */ 785 NCRCMD(sc, NCRCMD_SELATNS); 786 } else if (selatn3) { 787 sc->sc_msgout = SEND_TAG; 788 sc->sc_flags |= NCR_ATN; 789 NCRCMD(sc, NCRCMD_SELATN3); 790 } else 791 NCRCMD(sc, NCRCMD_SELATN); 792 } 793 794 void 795 ncr53c9x_free_ecb(struct ncr53c9x_softc *sc, 796 struct ncr53c9x_ecb *ecb) 797 { 798 int s; 799 800 s = splbio(); 801 ecb->flags = 0; 802 pool_put(&ecb_pool, (void *)ecb); 803 splx(s); 804 return; 805 } 806 807 struct ncr53c9x_ecb * 808 ncr53c9x_get_ecb(struct ncr53c9x_softc *sc, int flags) 809 { 810 struct ncr53c9x_ecb *ecb; 811 int s; 812 813 s = splbio(); 814 ecb = (struct ncr53c9x_ecb *)pool_get(&ecb_pool, PR_NOWAIT); 815 splx(s); 816 if (ecb) { 817 memset(ecb, 0, sizeof(*ecb)); 818 ecb->flags |= ECB_ALLOC; 819 } 820 return (ecb); 821 } 822 823 /* 824 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 825 */ 826 827 /* 828 * Start a SCSI-command 829 * This function is called by the higher level SCSI-driver to queue/run 830 * SCSI-commands. 831 */ 832 833 void 834 ncr53c9x_scsipi_request(chan, req, arg) 835 struct scsipi_channel *chan; 836 scsipi_adapter_req_t req; 837 void *arg; 838 { 839 struct scsipi_xfer *xs; 840 struct scsipi_periph *periph; 841 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 842 struct ncr53c9x_ecb *ecb; 843 int s, flags; 844 845 NCR_TRACE(("[ncr53c9x_scsipi_request] ")); 846 847 s = splbio(); 848 simple_lock(&sc->sc_lock); 849 850 switch (req) { 851 case ADAPTER_REQ_RUN_XFER: 852 xs = arg; 853 periph = xs->xs_periph; 854 flags = xs->xs_control; 855 856 NCR_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 857 periph->periph_target)); 858 859 /* Get an ECB to use. */ 860 ecb = ncr53c9x_get_ecb(sc, xs->xs_control); 861 /* 862 * This should never happen as we track resources 863 * in the mid-layer, but for now it can as pool_get() 864 * can fail. 865 */ 866 if (ecb == NULL) { 867 scsipi_printaddr(periph); 868 printf("unable to allocate ecb\n"); 869 xs->error = XS_RESOURCE_SHORTAGE; 870 simple_unlock(&sc->sc_lock); 871 splx(s); 872 scsipi_done(xs); 873 return; 874 } 875 876 /* Initialize ecb */ 877 ecb->xs = xs; 878 ecb->timeout = xs->timeout; 879 880 if (flags & XS_CTL_RESET) { 881 ecb->flags |= ECB_RESET; 882 ecb->clen = 0; 883 ecb->dleft = 0; 884 } else { 885 memcpy(&ecb->cmd.cmd, xs->cmd, xs->cmdlen); 886 ecb->clen = xs->cmdlen; 887 ecb->daddr = xs->data; 888 ecb->dleft = xs->datalen; 889 } 890 ecb->stat = 0; 891 892 TAILQ_INSERT_TAIL(&sc->ready_list, ecb, chain); 893 ecb->flags |= ECB_READY; 894 if (sc->sc_state == NCR_IDLE) 895 ncr53c9x_sched(sc); 896 897 if ((flags & XS_CTL_POLL) == 0) 898 break; 899 900 /* Not allowed to use interrupts, use polling instead */ 901 if (ncr53c9x_poll(sc, xs, ecb->timeout)) { 902 ncr53c9x_timeout(ecb); 903 if (ncr53c9x_poll(sc, xs, ecb->timeout)) 904 ncr53c9x_timeout(ecb); 905 } 906 break; 907 908 case ADAPTER_REQ_GROW_RESOURCES: 909 /* XXX Not supported. */ 910 break; 911 912 case ADAPTER_REQ_SET_XFER_MODE: 913 { 914 struct ncr53c9x_tinfo *ti; 915 struct scsipi_xfer_mode *xm = arg; 916 917 ti = &sc->sc_tinfo[xm->xm_target]; 918 ti->flags &= ~(T_NEGOTIATE|T_SYNCMODE); 919 ti->period = 0; 920 ti->offset = 0; 921 922 if ((sc->sc_cfflags & (1<<((xm->xm_target&7)+16))) == 0 && 923 (xm->xm_mode & PERIPH_CAP_TQING)) { 924 NCR_MISC(("%s: target %d: tagged queuing\n", 925 sc->sc_dev.dv_xname, xm->xm_target)); 926 ti->flags |= T_TAG; 927 } else 928 ti->flags &= ~T_TAG; 929 930 if ((xm->xm_mode & PERIPH_CAP_WIDE16) != 0) { 931 NCR_MISC(("%s: target %d: wide scsi negotiation\n", 932 sc->sc_dev.dv_xname, xm->xm_target)); 933 if (sc->sc_rev == NCR_VARIANT_FAS366) { 934 ti->flags |= T_WIDE; 935 ti->width = 1; 936 } 937 } 938 939 if ((xm->xm_mode & PERIPH_CAP_SYNC) != 0 && 940 (ti->flags & T_SYNCHOFF) == 0 && sc->sc_minsync != 0) { 941 NCR_MISC(("%s: target %d: sync negotiation\n", 942 sc->sc_dev.dv_xname, xm->xm_target)); 943 ti->flags |= T_NEGOTIATE; 944 ti->period = sc->sc_minsync; 945 } 946 /* 947 * If we're not going to negotiate, send the notification 948 * now, since it won't happen later. 949 */ 950 if ((ti->flags & T_NEGOTIATE) == 0) 951 ncr53c9x_update_xfer_mode(sc, xm->xm_target); 952 } 953 break; 954 } 955 956 simple_unlock(&sc->sc_lock); 957 splx(s); 958 } 959 960 void 961 ncr53c9x_update_xfer_mode(sc, target) 962 struct ncr53c9x_softc *sc; 963 int target; 964 { 965 struct scsipi_xfer_mode xm; 966 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[target]; 967 968 xm.xm_target = target; 969 xm.xm_mode = 0; 970 xm.xm_period = 0; 971 xm.xm_offset = 0; 972 973 if (ti->flags & T_SYNCMODE) { 974 xm.xm_mode |= PERIPH_CAP_SYNC; 975 xm.xm_period = ti->period; 976 xm.xm_offset = ti->offset; 977 } 978 if (ti->width) 979 xm.xm_mode |= PERIPH_CAP_WIDE16; 980 981 if ((ti->flags & (T_RSELECTOFF|T_TAG)) == T_TAG) 982 xm.xm_mode |= PERIPH_CAP_TQING; 983 984 scsipi_async_event(&sc->sc_channel, ASYNC_EVENT_XFER_MODE, &xm); 985 } 986 987 /* 988 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 989 */ 990 int 991 ncr53c9x_poll(sc, xs, count) 992 struct ncr53c9x_softc *sc; 993 struct scsipi_xfer *xs; 994 int count; 995 { 996 997 NCR_TRACE(("[ncr53c9x_poll] ")); 998 while (count) { 999 if (NCRDMA_ISINTR(sc)) { 1000 simple_unlock(&sc->sc_lock); 1001 ncr53c9x_intr(sc); 1002 simple_lock(&sc->sc_lock); 1003 } 1004 #if alternatively 1005 if (NCR_READ_REG(sc, NCR_STAT) & NCRSTAT_INT) 1006 ncr53c9x_intr(sc); 1007 #endif 1008 if ((xs->xs_status & XS_STS_DONE) != 0) 1009 return (0); 1010 if (sc->sc_state == NCR_IDLE) { 1011 NCR_TRACE(("[ncr53c9x_poll: rescheduling] ")); 1012 ncr53c9x_sched(sc); 1013 } 1014 DELAY(1000); 1015 count--; 1016 } 1017 return (1); 1018 } 1019 1020 int 1021 ncr53c9x_ioctl(struct scsipi_channel *chan, u_long cmd, caddr_t arg, 1022 int flag, struct proc *p) 1023 { 1024 struct ncr53c9x_softc *sc = (void *)chan->chan_adapter->adapt_dev; 1025 int s, error = 0; 1026 1027 switch (cmd) { 1028 case SCBUSIORESET: 1029 s = splbio(); 1030 simple_lock(&sc->sc_lock); 1031 ncr53c9x_init(sc, 1); 1032 simple_unlock(&sc->sc_lock); 1033 splx(s); 1034 break; 1035 default: 1036 error = ENOTTY; 1037 break; 1038 } 1039 return (error); 1040 } 1041 1042 1043 /* 1044 * LOW LEVEL SCSI UTILITIES 1045 */ 1046 1047 /* 1048 * Schedule a scsi operation. This has now been pulled out of the interrupt 1049 * handler so that we may call it from ncr53c9x_scsipi_request and 1050 * ncr53c9x_done. This may save us an unnecessary interrupt just to get 1051 * things going. Should only be called when state == NCR_IDLE and at bio pl. 1052 */ 1053 void 1054 ncr53c9x_sched(sc) 1055 struct ncr53c9x_softc *sc; 1056 { 1057 struct ncr53c9x_ecb *ecb; 1058 struct scsipi_periph *periph; 1059 struct ncr53c9x_tinfo *ti; 1060 struct ncr53c9x_linfo *li; 1061 int lun; 1062 int tag; 1063 1064 NCR_TRACE(("[ncr53c9x_sched] ")); 1065 if (sc->sc_state != NCR_IDLE) 1066 panic("ncr53c9x_sched: not IDLE (state=%d)", sc->sc_state); 1067 1068 /* 1069 * Find first ecb in ready queue that is for a target/lunit 1070 * combinations that is not busy. 1071 */ 1072 for (ecb = TAILQ_FIRST(&sc->ready_list); ecb != NULL; 1073 ecb = TAILQ_NEXT(ecb, chain)) { 1074 periph = ecb->xs->xs_periph; 1075 ti = &sc->sc_tinfo[periph->periph_target]; 1076 lun = periph->periph_lun; 1077 1078 /* Select type of tag for this command */ 1079 if ((ti->flags & (T_RSELECTOFF)) != 0) 1080 tag = 0; 1081 else if ((ti->flags & (T_TAG)) == 0) 1082 tag = 0; 1083 else if ((ecb->flags & ECB_SENSE) != 0) 1084 tag = 0; 1085 else 1086 tag = ecb->xs->xs_tag_type; 1087 #if 0 1088 /* XXXX Use tags for polled commands? */ 1089 if (ecb->xs->xs_control & XS_CTL_POLL) 1090 tag = 0; 1091 #endif 1092 1093 li = TINFO_LUN(ti, lun); 1094 if (li == NULL) { 1095 /* Initialize LUN info and add to list. */ 1096 if ((li = malloc(sizeof(*li), 1097 M_DEVBUF, M_NOWAIT|M_ZERO)) == NULL) { 1098 continue; 1099 } 1100 li->lun = lun; 1101 1102 LIST_INSERT_HEAD(&ti->luns, li, link); 1103 if (lun < NCR_NLUN) 1104 ti->lun[lun] = li; 1105 } 1106 li->last_used = time_second; 1107 if (tag == 0) { 1108 /* Try to issue this as an un-tagged command */ 1109 if (li->untagged == NULL) 1110 li->untagged = ecb; 1111 } 1112 if (li->untagged != NULL) { 1113 tag = 0; 1114 if ((li->busy != 1) && li->used == 0) { 1115 /* We need to issue this untagged command now */ 1116 ecb = li->untagged; 1117 periph = ecb->xs->xs_periph; 1118 } else { 1119 /* Not ready yet */ 1120 continue; 1121 } 1122 } 1123 ecb->tag[0] = tag; 1124 if (tag != 0) { 1125 li->queued[ecb->xs->xs_tag_id] = ecb; 1126 ecb->tag[1] = ecb->xs->xs_tag_id; 1127 li->used++; 1128 } 1129 if (li->untagged != NULL && (li->busy != 1)) { 1130 li->busy = 1; 1131 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1132 ecb->flags &= ~ECB_READY; 1133 sc->sc_nexus = ecb; 1134 ncr53c9x_select(sc, ecb); 1135 break; 1136 } 1137 if (li->untagged == NULL && tag != 0) { 1138 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1139 ecb->flags &= ~ECB_READY; 1140 sc->sc_nexus = ecb; 1141 ncr53c9x_select(sc, ecb); 1142 break; 1143 } else { 1144 NCR_TRACE(("%d:%d busy\n", 1145 periph->periph_target, 1146 periph->periph_lun)); 1147 } 1148 } 1149 } 1150 1151 void 1152 ncr53c9x_sense(sc, ecb) 1153 struct ncr53c9x_softc *sc; 1154 struct ncr53c9x_ecb *ecb; 1155 { 1156 struct scsipi_xfer *xs = ecb->xs; 1157 struct scsipi_periph *periph = xs->xs_periph; 1158 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1159 struct scsi_request_sense *ss = (void *)&ecb->cmd.cmd; 1160 struct ncr53c9x_linfo *li; 1161 int lun = periph->periph_lun; 1162 1163 NCR_TRACE(("requesting sense ")); 1164 /* Next, setup a request sense command block */ 1165 memset(ss, 0, sizeof(*ss)); 1166 ss->opcode = SCSI_REQUEST_SENSE; 1167 ss->byte2 = periph->periph_lun << SCSI_CMD_LUN_SHIFT; 1168 ss->length = sizeof(struct scsi_sense_data); 1169 ecb->clen = sizeof(*ss); 1170 ecb->daddr = (char *)&xs->sense.scsi_sense; 1171 ecb->dleft = sizeof(struct scsi_sense_data); 1172 ecb->flags |= ECB_SENSE; 1173 ecb->timeout = NCR_SENSE_TIMEOUT; 1174 ti->senses++; 1175 li = TINFO_LUN(ti, lun); 1176 if (li->busy) 1177 li->busy = 0; 1178 ncr53c9x_dequeue(sc, ecb); 1179 li->untagged = ecb; /* must be executed first to fix C/A */ 1180 li->busy = 2; 1181 if (ecb == sc->sc_nexus) { 1182 ncr53c9x_select(sc, ecb); 1183 } else { 1184 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 1185 ecb->flags |= ECB_READY; 1186 if (sc->sc_state == NCR_IDLE) 1187 ncr53c9x_sched(sc); 1188 } 1189 } 1190 1191 /* 1192 * POST PROCESSING OF SCSI_CMD (usually current) 1193 */ 1194 void 1195 ncr53c9x_done(sc, ecb) 1196 struct ncr53c9x_softc *sc; 1197 struct ncr53c9x_ecb *ecb; 1198 { 1199 struct scsipi_xfer *xs = ecb->xs; 1200 struct scsipi_periph *periph = xs->xs_periph; 1201 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 1202 int lun = periph->periph_lun; 1203 struct ncr53c9x_linfo *li = TINFO_LUN(ti, lun); 1204 1205 NCR_TRACE(("[ncr53c9x_done(error:%x)] ", xs->error)); 1206 1207 callout_stop(&ecb->xs->xs_callout); 1208 1209 /* 1210 * Now, if we've come here with no error code, i.e. we've kept the 1211 * initial XS_NOERROR, and the status code signals that we should 1212 * check sense, we'll need to set up a request sense cmd block and 1213 * push the command back into the ready queue *before* any other 1214 * commands for this target/lunit, else we lose the sense info. 1215 * We don't support chk sense conditions for the request sense cmd. 1216 */ 1217 if (xs->error == XS_NOERROR) { 1218 xs->status = ecb->stat; 1219 if ((ecb->flags & ECB_ABORT) != 0) { 1220 xs->error = XS_TIMEOUT; 1221 } else if ((ecb->flags & ECB_SENSE) != 0) { 1222 xs->error = XS_SENSE; 1223 } else if ((ecb->stat & ST_MASK) == SCSI_CHECK) { 1224 /* First, save the return values */ 1225 xs->resid = ecb->dleft; 1226 ncr53c9x_sense(sc, ecb); 1227 return; 1228 } else { 1229 xs->resid = ecb->dleft; 1230 } 1231 if (xs->status == SCSI_QUEUE_FULL || xs->status == XS_BUSY) 1232 xs->error = XS_BUSY; 1233 } 1234 1235 #ifdef NCR53C9X_DEBUG 1236 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1237 if (xs->resid != 0) 1238 printf("resid=%d ", xs->resid); 1239 if (xs->error == XS_SENSE) 1240 printf("sense=0x%02x\n", 1241 xs->sense.scsi_sense.response_code); 1242 else 1243 printf("error=%d\n", xs->error); 1244 } 1245 #endif 1246 1247 /* 1248 * Remove the ECB from whatever queue it's on. 1249 */ 1250 ncr53c9x_dequeue(sc, ecb); 1251 if (ecb == sc->sc_nexus) { 1252 sc->sc_nexus = NULL; 1253 if (sc->sc_state != NCR_CLEANING) { 1254 sc->sc_state = NCR_IDLE; 1255 ncr53c9x_sched(sc); 1256 } 1257 } 1258 1259 if (xs->error == XS_SELTIMEOUT) { 1260 /* Selection timeout -- discard this LUN if empty */ 1261 if (li->untagged == NULL && li->used == 0) { 1262 if (lun < NCR_NLUN) 1263 ti->lun[lun] = NULL; 1264 LIST_REMOVE(li, link); 1265 free(li, M_DEVBUF); 1266 } 1267 } 1268 1269 ncr53c9x_free_ecb(sc, ecb); 1270 ti->cmds++; 1271 simple_unlock(&sc->sc_lock); 1272 scsipi_done(xs); 1273 simple_lock(&sc->sc_lock); 1274 } 1275 1276 void 1277 ncr53c9x_dequeue(sc, ecb) 1278 struct ncr53c9x_softc *sc; 1279 struct ncr53c9x_ecb *ecb; 1280 { 1281 struct ncr53c9x_tinfo *ti = 1282 &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1283 struct ncr53c9x_linfo *li; 1284 int64_t lun = ecb->xs->xs_periph->periph_lun; 1285 1286 li = TINFO_LUN(ti, lun); 1287 #ifdef DIAGNOSTIC 1288 if (li == NULL || li->lun != lun) 1289 panic("ncr53c9x_dequeue: lun %qx for ecb %p does not exist", 1290 (long long) lun, ecb); 1291 #endif 1292 if (li->untagged == ecb) { 1293 li->busy = 0; 1294 li->untagged = NULL; 1295 } 1296 if (ecb->tag[0] && li->queued[ecb->tag[1]] != NULL) { 1297 #ifdef DIAGNOSTIC 1298 if (li->queued[ecb->tag[1]] != NULL && 1299 (li->queued[ecb->tag[1]] != ecb)) 1300 panic("ncr53c9x_dequeue: slot %d for lun %qx has %p " 1301 "instead of ecb %p\n", ecb->tag[1], 1302 (long long) lun, 1303 li->queued[ecb->tag[1]], ecb); 1304 #endif 1305 li->queued[ecb->tag[1]] = NULL; 1306 li->used--; 1307 } 1308 1309 if ((ecb->flags & ECB_READY) != 0) { 1310 ecb->flags &= ~ECB_READY; 1311 TAILQ_REMOVE(&sc->ready_list, ecb, chain); 1312 } 1313 } 1314 1315 /* 1316 * INTERRUPT/PROTOCOL ENGINE 1317 */ 1318 1319 /* 1320 * Schedule an outgoing message by prioritizing it, and asserting 1321 * attention on the bus. We can only do this when we are the initiator 1322 * else there will be an illegal command interrupt. 1323 */ 1324 #define ncr53c9x_sched_msgout(m) \ 1325 do { \ 1326 NCR_MSGS(("ncr53c9x_sched_msgout %x %d", m, __LINE__)); \ 1327 NCRCMD(sc, NCRCMD_SETATN); \ 1328 sc->sc_flags |= NCR_ATN; \ 1329 sc->sc_msgpriq |= (m); \ 1330 } while (0) 1331 1332 static void 1333 ncr53c9x_flushfifo(struct ncr53c9x_softc *sc) 1334 { 1335 NCR_TRACE(("[flushfifo] ")); 1336 1337 NCRCMD(sc, NCRCMD_FLUSH); 1338 1339 if (sc->sc_phase == COMMAND_PHASE || 1340 sc->sc_phase == MESSAGE_OUT_PHASE) 1341 DELAY(2); 1342 } 1343 1344 static int 1345 ncr53c9x_rdfifo(struct ncr53c9x_softc *sc, int how) 1346 { 1347 int i, n; 1348 u_char *ibuf; 1349 1350 switch(how) { 1351 case NCR_RDFIFO_START: 1352 ibuf = sc->sc_imess; 1353 sc->sc_imlen = 0; 1354 break; 1355 case NCR_RDFIFO_CONTINUE: 1356 ibuf = sc->sc_imess + sc->sc_imlen; 1357 break; 1358 default: 1359 panic("ncr53c9x_rdfifo: bad flag"); 1360 break; 1361 } 1362 1363 /* 1364 * XXX buffer (sc_imess) size for message 1365 */ 1366 1367 n = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 1368 1369 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1370 n *= 2; 1371 1372 for (i = 0; i < n; i++) 1373 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO); 1374 1375 if (sc->sc_espstat2 & NCRFAS_STAT2_ISHUTTLE) { 1376 1377 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1378 ibuf[i++] = NCR_READ_REG(sc, NCR_FIFO); 1379 1380 NCR_READ_REG(sc, NCR_FIFO); 1381 1382 ncr53c9x_flushfifo(sc); 1383 } 1384 } else { 1385 for (i = 0; i < n; i++) 1386 ibuf[i] = NCR_READ_REG(sc, NCR_FIFO); 1387 } 1388 1389 sc->sc_imlen += i; 1390 1391 #if 0 1392 #ifdef NCR53C9X_DEBUG 1393 { 1394 int j; 1395 1396 NCR_TRACE(("\n[rdfifo %s (%d):", 1397 (how == NCR_RDFIFO_START) ? "start" : "cont", 1398 (int)sc->sc_imlen)); 1399 if (ncr53c9x_debug & NCR_SHOWTRAC) { 1400 for (j = 0; j < sc->sc_imlen; j++) 1401 printf(" %02x", sc->sc_imess[j]); 1402 printf("]\n"); 1403 } 1404 } 1405 #endif 1406 #endif 1407 return sc->sc_imlen; 1408 } 1409 1410 static void 1411 ncr53c9x_wrfifo(struct ncr53c9x_softc *sc, u_char *p, int len) 1412 { 1413 int i; 1414 1415 #ifdef NCR53C9X_DEBUG 1416 NCR_MSGS(("[wrfifo(%d):", len)); 1417 if (ncr53c9x_debug & NCR_SHOWMSGS) { 1418 for (i = 0; i < len; i++) 1419 printf(" %02x", p[i]); 1420 printf("]\n"); 1421 } 1422 #endif 1423 1424 for (i = 0; i < len; i++) { 1425 NCR_WRITE_REG(sc, NCR_FIFO, p[i]); 1426 1427 if (sc->sc_rev == NCR_VARIANT_FAS366) 1428 NCR_WRITE_REG(sc, NCR_FIFO, 0); 1429 } 1430 } 1431 1432 int 1433 ncr53c9x_reselect(sc, message, tagtype, tagid) 1434 struct ncr53c9x_softc *sc; 1435 int message; 1436 int tagtype, tagid; 1437 { 1438 u_char selid, target, lun; 1439 struct ncr53c9x_ecb *ecb = NULL; 1440 struct ncr53c9x_tinfo *ti; 1441 struct ncr53c9x_linfo *li; 1442 1443 1444 if (sc->sc_rev == NCR_VARIANT_FAS366) { 1445 target = sc->sc_selid; 1446 } else { 1447 /* 1448 * The SCSI chip made a snapshot of the data bus 1449 * while the reselection was being negotiated. 1450 * This enables us to determine which target did 1451 * the reselect. 1452 */ 1453 selid = sc->sc_selid & ~(1 << sc->sc_id); 1454 if (selid & (selid - 1)) { 1455 printf("%s: reselect with invalid selid %02x;" 1456 " sending DEVICE RESET\n", 1457 sc->sc_dev.dv_xname, selid); 1458 goto reset; 1459 } 1460 1461 target = ffs(selid) - 1; 1462 } 1463 lun = message & 0x07; 1464 1465 /* 1466 * Search wait queue for disconnected cmd 1467 * The list should be short, so I haven't bothered with 1468 * any more sophisticated structures than a simple 1469 * singly linked list. 1470 */ 1471 ti = &sc->sc_tinfo[target]; 1472 li = TINFO_LUN(ti, lun); 1473 1474 /* 1475 * We can get as far as the LUN with the IDENTIFY 1476 * message. Check to see if we're running an 1477 * un-tagged command. Otherwise ack the IDENTIFY 1478 * and wait for a tag message. 1479 */ 1480 if (li != NULL) { 1481 if (li->untagged != NULL && li->busy) 1482 ecb = li->untagged; 1483 else if (tagtype != MSG_SIMPLE_Q_TAG) { 1484 /* Wait for tag to come by */ 1485 sc->sc_state = NCR_IDENTIFIED; 1486 return (0); 1487 } else if (tagtype) 1488 ecb = li->queued[tagid]; 1489 } 1490 if (ecb == NULL) { 1491 printf("%s: reselect from target %d lun %d tag %x:%x " 1492 "with no nexus; sending ABORT\n", 1493 sc->sc_dev.dv_xname, target, lun, tagtype, tagid); 1494 goto abort; 1495 } 1496 1497 /* Make this nexus active again. */ 1498 sc->sc_state = NCR_CONNECTED; 1499 sc->sc_nexus = ecb; 1500 ncr53c9x_setsync(sc, ti); 1501 1502 if (ecb->flags & ECB_RESET) 1503 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1504 else if (ecb->flags & ECB_ABORT) 1505 ncr53c9x_sched_msgout(SEND_ABORT); 1506 1507 /* Do an implicit RESTORE POINTERS. */ 1508 sc->sc_dp = ecb->daddr; 1509 sc->sc_dleft = ecb->dleft; 1510 1511 return (0); 1512 1513 reset: 1514 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1515 return (1); 1516 1517 abort: 1518 ncr53c9x_sched_msgout(SEND_ABORT); 1519 return (1); 1520 } 1521 1522 static inline int 1523 __verify_msg_format(u_char *p, int len) 1524 { 1525 1526 if (len == 1 && MSG_IS1BYTE(p[0])) 1527 return 1; 1528 if (len == 2 && MSG_IS2BYTE(p[0])) 1529 return 1; 1530 if (len >= 3 && MSG_ISEXTENDED(p[0]) && 1531 len == p[1] + 2) 1532 return 1; 1533 1534 return 0; 1535 } 1536 1537 /* 1538 * Get an incoming message as initiator. 1539 * 1540 * The SCSI bus must already be in MESSAGE_IN_PHASE and there is a 1541 * byte in the FIFO 1542 */ 1543 void 1544 ncr53c9x_msgin(sc) 1545 struct ncr53c9x_softc *sc; 1546 { 1547 1548 NCR_TRACE(("[ncr53c9x_msgin(curmsglen:%ld)] ", (long)sc->sc_imlen)); 1549 1550 if (sc->sc_imlen == 0) { 1551 printf("%s: msgin: no msg byte available\n", 1552 sc->sc_dev.dv_xname); 1553 return; 1554 } 1555 1556 /* 1557 * Prepare for a new message. A message should (according 1558 * to the SCSI standard) be transmitted in one single 1559 * MESSAGE_IN_PHASE. If we have been in some other phase, 1560 * then this is a new message. 1561 */ 1562 if (sc->sc_prevphase != MESSAGE_IN_PHASE && 1563 sc->sc_state != NCR_RESELECTED) { 1564 printf("%s: phase change, dropping message, " 1565 "prev %d, state %d\n", 1566 sc->sc_dev.dv_xname, sc->sc_prevphase, sc->sc_state); 1567 sc->sc_flags &= ~NCR_DROP_MSGI; 1568 sc->sc_imlen = 0; 1569 } 1570 1571 /* 1572 * If we're going to reject the message, don't bother storing 1573 * the incoming bytes. But still, we need to ACK them. 1574 */ 1575 if ((sc->sc_flags & NCR_DROP_MSGI) != 0) { 1576 NCRCMD(sc, NCRCMD_MSGOK); 1577 printf("<dropping msg byte %x>", sc->sc_imess[sc->sc_imlen]); 1578 return; 1579 } 1580 1581 if (sc->sc_imlen >= NCR_MAX_MSG_LEN) { 1582 ncr53c9x_sched_msgout(SEND_REJECT); 1583 sc->sc_flags |= NCR_DROP_MSGI; 1584 } else { 1585 u_char *pb; 1586 int plen; 1587 1588 switch (sc->sc_state) { 1589 /* 1590 * if received message is the first of reselection 1591 * then first byte is selid, and then message 1592 */ 1593 case NCR_RESELECTED: 1594 pb = sc->sc_imess + 1; 1595 plen = sc->sc_imlen - 1; 1596 break; 1597 default: 1598 pb = sc->sc_imess; 1599 plen = sc->sc_imlen; 1600 break; 1601 } 1602 1603 if (__verify_msg_format(pb, plen)) 1604 goto gotit; 1605 } 1606 1607 /* Ack what we have so far */ 1608 NCRCMD(sc, NCRCMD_MSGOK); 1609 return; 1610 1611 gotit: 1612 NCR_MSGS(("gotmsg(%x) state %d", sc->sc_imess[0], sc->sc_state)); 1613 /* we got complete message, flush the imess, */ 1614 /* XXX nobody uses imlen below */ 1615 sc->sc_imlen = 0; 1616 /* 1617 * Now we should have a complete message (1 byte, 2 byte 1618 * and moderately long extended messages). We only handle 1619 * extended messages which total length is shorter than 1620 * NCR_MAX_MSG_LEN. Longer messages will be amputated. 1621 */ 1622 switch (sc->sc_state) { 1623 struct ncr53c9x_ecb *ecb; 1624 struct ncr53c9x_tinfo *ti; 1625 struct ncr53c9x_linfo *li; 1626 int lun; 1627 1628 case NCR_CONNECTED: 1629 ecb = sc->sc_nexus; 1630 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1631 1632 switch (sc->sc_imess[0]) { 1633 case MSG_CMDCOMPLETE: 1634 NCR_MSGS(("cmdcomplete ")); 1635 if (sc->sc_dleft < 0) { 1636 scsipi_printaddr(ecb->xs->xs_periph); 1637 printf("got %ld extra bytes\n", 1638 -(long)sc->sc_dleft); 1639 sc->sc_dleft = 0; 1640 } 1641 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) ? 1642 0 : sc->sc_dleft; 1643 if ((ecb->flags & ECB_SENSE) == 0) 1644 ecb->xs->resid = ecb->dleft; 1645 sc->sc_state = NCR_CMDCOMPLETE; 1646 break; 1647 1648 case MSG_MESSAGE_REJECT: 1649 NCR_MSGS(("msg reject (msgout=%x) ", sc->sc_msgout)); 1650 switch (sc->sc_msgout) { 1651 case SEND_TAG: 1652 /* 1653 * Target does not like tagged queuing. 1654 * - Flush the command queue 1655 * - Disable tagged queuing for the target 1656 * - Dequeue ecb from the queued array. 1657 */ 1658 printf("%s: tagged queuing rejected: " 1659 "target %d\n", 1660 sc->sc_dev.dv_xname, 1661 ecb->xs->xs_periph->periph_target); 1662 1663 NCR_MSGS(("(rejected sent tag)")); 1664 NCRCMD(sc, NCRCMD_FLUSH); 1665 DELAY(1); 1666 ti->flags &= ~T_TAG; 1667 lun = ecb->xs->xs_periph->periph_lun; 1668 li = TINFO_LUN(ti, lun); 1669 if (ecb->tag[0] && 1670 li->queued[ecb->tag[1]] != NULL) { 1671 li->queued[ecb->tag[1]] = NULL; 1672 li->used--; 1673 } 1674 ecb->tag[0] = ecb->tag[1] = 0; 1675 li->untagged = ecb; 1676 li->busy = 1; 1677 break; 1678 1679 case SEND_SDTR: 1680 printf("%s: sync transfer rejected: " 1681 "target %d\n", 1682 sc->sc_dev.dv_xname, 1683 ecb->xs->xs_periph->periph_target); 1684 1685 sc->sc_flags &= ~NCR_SYNCHNEGO; 1686 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 1687 ncr53c9x_setsync(sc, ti); 1688 ncr53c9x_update_xfer_mode(sc, 1689 ecb->xs->xs_periph->periph_target); 1690 break; 1691 1692 case SEND_WDTR: 1693 printf("%s: wide transfer rejected: " 1694 "target %d\n", 1695 sc->sc_dev.dv_xname, 1696 ecb->xs->xs_periph->periph_target); 1697 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1698 ti->width = 0; 1699 break; 1700 1701 case SEND_INIT_DET_ERR: 1702 goto abort; 1703 } 1704 break; 1705 1706 case MSG_NOOP: 1707 NCR_MSGS(("noop ")); 1708 break; 1709 1710 case MSG_HEAD_OF_Q_TAG: 1711 case MSG_SIMPLE_Q_TAG: 1712 case MSG_ORDERED_Q_TAG: 1713 NCR_MSGS(("TAG %x:%x", 1714 sc->sc_imess[0], sc->sc_imess[1])); 1715 break; 1716 1717 case MSG_DISCONNECT: 1718 NCR_MSGS(("disconnect ")); 1719 ti->dconns++; 1720 sc->sc_state = NCR_DISCONNECT; 1721 1722 /* 1723 * Mark the fact that all bytes have moved. The 1724 * target may not bother to do a SAVE POINTERS 1725 * at this stage. This flag will set the residual 1726 * count to zero on MSG COMPLETE. 1727 */ 1728 if (sc->sc_dleft == 0) 1729 ecb->flags |= ECB_TENTATIVE_DONE; 1730 1731 break; 1732 1733 case MSG_SAVEDATAPOINTER: 1734 NCR_MSGS(("save datapointer ")); 1735 ecb->daddr = sc->sc_dp; 1736 ecb->dleft = sc->sc_dleft; 1737 break; 1738 1739 case MSG_RESTOREPOINTERS: 1740 NCR_MSGS(("restore datapointer ")); 1741 sc->sc_dp = ecb->daddr; 1742 sc->sc_dleft = ecb->dleft; 1743 break; 1744 1745 case MSG_EXTENDED: 1746 NCR_MSGS(("extended(%x) ", sc->sc_imess[2])); 1747 switch (sc->sc_imess[2]) { 1748 case MSG_EXT_SDTR: 1749 NCR_MSGS(("SDTR period %d, offset %d ", 1750 sc->sc_imess[3], sc->sc_imess[4])); 1751 if (sc->sc_imess[1] != 3) 1752 goto reject; 1753 ti->period = sc->sc_imess[3]; 1754 ti->offset = sc->sc_imess[4]; 1755 ti->flags &= ~T_NEGOTIATE; 1756 if (sc->sc_minsync == 0 || 1757 ti->offset == 0 || 1758 ti->period > 124) { 1759 #if 0 1760 #ifdef NCR53C9X_DEBUG 1761 scsipi_printaddr(ecb->xs->xs_periph); 1762 printf("async mode\n"); 1763 #endif 1764 #endif 1765 ti->flags &= ~T_SYNCMODE; 1766 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1767 /* 1768 * target initiated negotiation 1769 */ 1770 ti->offset = 0; 1771 ncr53c9x_sched_msgout( 1772 SEND_SDTR); 1773 } 1774 } else { 1775 int p; 1776 1777 p = ncr53c9x_stp2cpb(sc, ti->period); 1778 ti->period = ncr53c9x_cpb2stp(sc, p); 1779 if ((sc->sc_flags&NCR_SYNCHNEGO) == 0) { 1780 /* 1781 * target initiated negotiation 1782 */ 1783 if (ti->period < 1784 sc->sc_minsync) 1785 ti->period = 1786 sc->sc_minsync; 1787 if (ti->offset > 15) 1788 ti->offset = 15; 1789 ti->flags &= ~T_SYNCMODE; 1790 ncr53c9x_sched_msgout( 1791 SEND_SDTR); 1792 } else { 1793 /* we are sync */ 1794 ti->flags |= T_SYNCMODE; 1795 } 1796 } 1797 ncr53c9x_update_xfer_mode(sc, 1798 ecb->xs->xs_periph->periph_target); 1799 sc->sc_flags &= ~NCR_SYNCHNEGO; 1800 ncr53c9x_setsync(sc, ti); 1801 break; 1802 1803 case MSG_EXT_WDTR: 1804 #ifdef NCR53C9X_DEBUG 1805 printf("%s: wide mode %d\n", 1806 sc->sc_dev.dv_xname, sc->sc_imess[3]); 1807 #endif 1808 if (sc->sc_imess[3] == 1) { 1809 ti->cfg3 |= NCRFASCFG3_EWIDE; 1810 ncr53c9x_setsync(sc, ti); 1811 } else 1812 ti->width = 0; 1813 /* 1814 * Device started width negotiation. 1815 */ 1816 if (!(ti->flags & T_WDTRSENT)) 1817 ncr53c9x_sched_msgout(SEND_WDTR); 1818 ti->flags &= ~(T_WIDE | T_WDTRSENT); 1819 break; 1820 default: 1821 scsipi_printaddr(ecb->xs->xs_periph); 1822 printf("unrecognized MESSAGE EXTENDED;" 1823 " sending REJECT\n"); 1824 goto reject; 1825 } 1826 break; 1827 1828 default: 1829 NCR_MSGS(("ident ")); 1830 scsipi_printaddr(ecb->xs->xs_periph); 1831 printf("unrecognized MESSAGE; sending REJECT\n"); 1832 reject: 1833 ncr53c9x_sched_msgout(SEND_REJECT); 1834 break; 1835 } 1836 break; 1837 1838 case NCR_IDENTIFIED: 1839 /* 1840 * IDENTIFY message was received and queue tag is expected now 1841 */ 1842 if ((sc->sc_imess[0] != MSG_SIMPLE_Q_TAG) || 1843 (sc->sc_msgify == 0)) { 1844 printf("%s: TAG reselect without IDENTIFY;" 1845 " MSG %x;" 1846 " sending DEVICE RESET\n", 1847 sc->sc_dev.dv_xname, 1848 sc->sc_imess[0]); 1849 goto reset; 1850 } 1851 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 1852 sc->sc_imess[0], sc->sc_imess[1]); 1853 break; 1854 1855 case NCR_RESELECTED: 1856 if (MSG_ISIDENTIFY(sc->sc_imess[1])) { 1857 sc->sc_msgify = sc->sc_imess[1]; 1858 } else { 1859 printf("%s: reselect without IDENTIFY;" 1860 " MSG %x;" 1861 " sending DEVICE RESET\n", 1862 sc->sc_dev.dv_xname, 1863 sc->sc_imess[1]); 1864 goto reset; 1865 } 1866 (void) ncr53c9x_reselect(sc, sc->sc_msgify, 0, 0); 1867 break; 1868 1869 default: 1870 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1871 sc->sc_dev.dv_xname); 1872 reset: 1873 ncr53c9x_sched_msgout(SEND_DEV_RESET); 1874 break; 1875 1876 abort: 1877 ncr53c9x_sched_msgout(SEND_ABORT); 1878 break; 1879 } 1880 1881 /* if we have more messages to send set ATN */ 1882 if (sc->sc_msgpriq) 1883 NCRCMD(sc, NCRCMD_SETATN); 1884 1885 /* Ack last message byte */ 1886 NCRCMD(sc, NCRCMD_MSGOK); 1887 1888 /* Done, reset message pointer. */ 1889 sc->sc_flags &= ~NCR_DROP_MSGI; 1890 sc->sc_imlen = 0; 1891 } 1892 1893 1894 /* 1895 * Send the highest priority, scheduled message 1896 */ 1897 void 1898 ncr53c9x_msgout(sc) 1899 struct ncr53c9x_softc *sc; 1900 { 1901 struct ncr53c9x_tinfo *ti; 1902 struct ncr53c9x_ecb *ecb; 1903 size_t size; 1904 1905 NCR_TRACE(("[ncr53c9x_msgout(priq:%x, prevphase:%x)]", 1906 sc->sc_msgpriq, sc->sc_prevphase)); 1907 1908 /* 1909 * XXX - the NCR_ATN flag is not in sync with the actual ATN 1910 * condition on the SCSI bus. The 53c9x chip 1911 * automatically turns off ATN before sending the 1912 * message byte. (see also the comment below in the 1913 * default case when picking out a message to send) 1914 */ 1915 if (sc->sc_flags & NCR_ATN) { 1916 if (sc->sc_prevphase != MESSAGE_OUT_PHASE) { 1917 new: 1918 NCRCMD(sc, NCRCMD_FLUSH); 1919 /* DELAY(1); */ 1920 sc->sc_msgoutq = 0; 1921 sc->sc_omlen = 0; 1922 } 1923 } else { 1924 if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 1925 ncr53c9x_sched_msgout(sc->sc_msgoutq); 1926 goto new; 1927 } else { 1928 printf("%s at line %d: unexpected MESSAGE OUT phase\n", 1929 sc->sc_dev.dv_xname, __LINE__); 1930 } 1931 } 1932 1933 if (sc->sc_omlen == 0) { 1934 /* Pick up highest priority message */ 1935 sc->sc_msgout = sc->sc_msgpriq & -sc->sc_msgpriq; 1936 sc->sc_msgoutq |= sc->sc_msgout; 1937 sc->sc_msgpriq &= ~sc->sc_msgout; 1938 sc->sc_omlen = 1; /* "Default" message len */ 1939 switch (sc->sc_msgout) { 1940 case SEND_SDTR: 1941 ecb = sc->sc_nexus; 1942 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1943 sc->sc_omess[0] = MSG_EXTENDED; 1944 sc->sc_omess[1] = MSG_EXT_SDTR_LEN; 1945 sc->sc_omess[2] = MSG_EXT_SDTR; 1946 sc->sc_omess[3] = ti->period; 1947 sc->sc_omess[4] = ti->offset; 1948 sc->sc_omlen = 5; 1949 if ((sc->sc_flags & NCR_SYNCHNEGO) == 0) { 1950 ti->flags |= T_SYNCMODE; 1951 ncr53c9x_setsync(sc, ti); 1952 } 1953 break; 1954 case SEND_WDTR: 1955 ecb = sc->sc_nexus; 1956 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1957 sc->sc_omess[0] = MSG_EXTENDED; 1958 sc->sc_omess[1] = MSG_EXT_WDTR_LEN; 1959 sc->sc_omess[2] = MSG_EXT_WDTR; 1960 sc->sc_omess[3] = ti->width; 1961 sc->sc_omlen = 4; 1962 break; 1963 case SEND_IDENTIFY: 1964 if (sc->sc_state != NCR_CONNECTED) { 1965 printf("%s at line %d: no nexus\n", 1966 sc->sc_dev.dv_xname, __LINE__); 1967 } 1968 ecb = sc->sc_nexus; 1969 sc->sc_omess[0] = 1970 MSG_IDENTIFY(ecb->xs->xs_periph->periph_lun, 0); 1971 break; 1972 case SEND_TAG: 1973 if (sc->sc_state != NCR_CONNECTED) { 1974 printf("%s at line %d: no nexus\n", 1975 sc->sc_dev.dv_xname, __LINE__); 1976 } 1977 ecb = sc->sc_nexus; 1978 sc->sc_omess[0] = ecb->tag[0]; 1979 sc->sc_omess[1] = ecb->tag[1]; 1980 sc->sc_omlen = 2; 1981 break; 1982 case SEND_DEV_RESET: 1983 sc->sc_flags |= NCR_ABORTING; 1984 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1985 ecb = sc->sc_nexus; 1986 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 1987 ti->flags &= ~T_SYNCMODE; 1988 ncr53c9x_update_xfer_mode(sc, 1989 ecb->xs->xs_periph->periph_target); 1990 if ((ti->flags & T_SYNCHOFF) == 0) 1991 /* We can re-start sync negotiation */ 1992 ti->flags |= T_NEGOTIATE; 1993 break; 1994 case SEND_PARITY_ERROR: 1995 sc->sc_omess[0] = MSG_PARITY_ERROR; 1996 break; 1997 case SEND_ABORT: 1998 sc->sc_flags |= NCR_ABORTING; 1999 sc->sc_omess[0] = MSG_ABORT; 2000 break; 2001 case SEND_INIT_DET_ERR: 2002 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 2003 break; 2004 case SEND_REJECT: 2005 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 2006 break; 2007 default: 2008 /* 2009 * We normally do not get here, since the chip 2010 * automatically turns off ATN before the last 2011 * byte of a message is sent to the target. 2012 * However, if the target rejects our (multi-byte) 2013 * message early by switching to MSG IN phase 2014 * ATN remains on, so the target may return to 2015 * MSG OUT phase. If there are no scheduled messages 2016 * left we send a NO-OP. 2017 * 2018 * XXX - Note that this leaves no useful purpose for 2019 * the NCR_ATN flag. 2020 */ 2021 sc->sc_flags &= ~NCR_ATN; 2022 sc->sc_omess[0] = MSG_NOOP; 2023 break; 2024 } 2025 sc->sc_omp = sc->sc_omess; 2026 } 2027 2028 #ifdef DEBUG 2029 if (ncr53c9x_debug & NCR_SHOWMSGS) { 2030 int i; 2031 2032 NCR_MSGS(("<msgout:")); 2033 for (i = 0; i < sc->sc_omlen; i++) 2034 NCR_MSGS((" %02x", sc->sc_omess[i])); 2035 NCR_MSGS(("> ")); 2036 } 2037 #endif 2038 if (sc->sc_rev == NCR_VARIANT_FAS366) { 2039 /* 2040 * XXX fifo size 2041 */ 2042 ncr53c9x_flushfifo(sc); 2043 ncr53c9x_wrfifo(sc, sc->sc_omp, sc->sc_omlen); 2044 NCRCMD(sc, NCRCMD_TRANS); 2045 } else { 2046 /* (re)send the message */ 2047 size = min(sc->sc_omlen, sc->sc_maxxfer); 2048 NCRDMA_SETUP(sc, &sc->sc_omp, &sc->sc_omlen, 0, &size); 2049 /* Program the SCSI counter */ 2050 NCR_SET_COUNT(sc, size); 2051 2052 /* Load the count in and start the message-out transfer */ 2053 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2054 NCRCMD(sc, NCRCMD_TRANS|NCRCMD_DMA); 2055 NCRDMA_GO(sc); 2056 } 2057 } 2058 2059 /* 2060 * This is the most critical part of the driver, and has to know 2061 * how to deal with *all* error conditions and phases from the SCSI 2062 * bus. If there are no errors and the DMA was active, then call the 2063 * DMA pseudo-interrupt handler. If this returns 1, then that was it 2064 * and we can return from here without further processing. 2065 * 2066 * Most of this needs verifying. 2067 */ 2068 int 2069 ncr53c9x_intr(arg) 2070 void *arg; 2071 { 2072 struct ncr53c9x_softc *sc = arg; 2073 struct ncr53c9x_ecb *ecb; 2074 struct scsipi_periph *periph; 2075 struct ncr53c9x_tinfo *ti; 2076 size_t size; 2077 int nfifo; 2078 2079 NCR_INTS(("[ncr53c9x_intr: state %d]", sc->sc_state)); 2080 2081 if (!NCRDMA_ISINTR(sc)) 2082 return (0); 2083 2084 simple_lock(&sc->sc_lock); 2085 again: 2086 /* and what do the registers say... */ 2087 ncr53c9x_readregs(sc); 2088 2089 sc->sc_intrcnt.ev_count++; 2090 2091 /* 2092 * At the moment, only a SCSI Bus Reset or Illegal 2093 * Command are classed as errors. A disconnect is a 2094 * valid condition, and we let the code check is the 2095 * "NCR_BUSFREE_OK" flag was set before declaring it 2096 * and error. 2097 * 2098 * Also, the status register tells us about "Gross 2099 * Errors" and "Parity errors". Only the Gross Error 2100 * is really bad, and the parity errors are dealt 2101 * with later 2102 * 2103 * TODO 2104 * If there are too many parity error, go to slow 2105 * cable mode ? 2106 */ 2107 2108 /* SCSI Reset */ 2109 if ((sc->sc_espintr & NCRINTR_SBR) != 0) { 2110 if ((NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) != 0) { 2111 NCRCMD(sc, NCRCMD_FLUSH); 2112 DELAY(1); 2113 } 2114 if (sc->sc_state != NCR_SBR) { 2115 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 2116 ncr53c9x_init(sc, 0); /* Restart everything */ 2117 goto out; 2118 } 2119 #if 0 2120 /*XXX*/ printf("<expected bus reset: " 2121 "[intr %x, stat %x, step %d]>\n", 2122 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2123 #endif 2124 if (sc->sc_nexus != NULL) 2125 panic("%s: nexus in reset state", 2126 sc->sc_dev.dv_xname); 2127 goto sched; 2128 } 2129 2130 ecb = sc->sc_nexus; 2131 2132 #define NCRINTR_ERR (NCRINTR_SBR|NCRINTR_ILL) 2133 if (sc->sc_espintr & NCRINTR_ERR || 2134 sc->sc_espstat & NCRSTAT_GE) { 2135 2136 if ((sc->sc_espstat & NCRSTAT_GE) != 0) { 2137 /* Gross Error; no target ? */ 2138 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2139 NCRCMD(sc, NCRCMD_FLUSH); 2140 DELAY(1); 2141 } 2142 if (sc->sc_state == NCR_CONNECTED || 2143 sc->sc_state == NCR_SELECTING) { 2144 ecb->xs->error = XS_TIMEOUT; 2145 ncr53c9x_done(sc, ecb); 2146 } 2147 goto out; 2148 } 2149 2150 if ((sc->sc_espintr & NCRINTR_ILL) != 0) { 2151 if ((sc->sc_flags & NCR_EXPECT_ILLCMD) != 0) { 2152 /* 2153 * Eat away "Illegal command" interrupt 2154 * on a ESP100 caused by a re-selection 2155 * while we were trying to select 2156 * another target. 2157 */ 2158 #ifdef DEBUG 2159 printf("%s: ESP100 work-around activated\n", 2160 sc->sc_dev.dv_xname); 2161 #endif 2162 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2163 goto out; 2164 } 2165 /* illegal command, out of sync ? */ 2166 printf("%s: illegal command: 0x%x " 2167 "(state %d, phase %x, prevphase %x)\n", 2168 sc->sc_dev.dv_xname, sc->sc_lastcmd, 2169 sc->sc_state, sc->sc_phase, sc->sc_prevphase); 2170 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2171 NCRCMD(sc, NCRCMD_FLUSH); 2172 DELAY(1); 2173 } 2174 ncr53c9x_init(sc, 1); /* Restart everything */ 2175 goto out; 2176 } 2177 } 2178 sc->sc_flags &= ~NCR_EXPECT_ILLCMD; 2179 2180 /* 2181 * Call if DMA is active. 2182 * 2183 * If DMA_INTR returns true, then maybe go 'round the loop 2184 * again in case there is no more DMA queued, but a phase 2185 * change is expected. 2186 */ 2187 if (NCRDMA_ISACTIVE(sc)) { 2188 int r = NCRDMA_INTR(sc); 2189 if (r == -1) { 2190 printf("%s: DMA error; resetting\n", 2191 sc->sc_dev.dv_xname); 2192 ncr53c9x_init(sc, 1); 2193 goto out; 2194 } 2195 /* If DMA active here, then go back to work... */ 2196 if (NCRDMA_ISACTIVE(sc)) 2197 goto out; 2198 2199 if ((sc->sc_espstat & NCRSTAT_TC) == 0) { 2200 /* 2201 * DMA not completed. If we can not find a 2202 * acceptable explanation, print a diagnostic. 2203 */ 2204 if (sc->sc_state == NCR_SELECTING) 2205 /* 2206 * This can happen if we are reselected 2207 * while using DMA to select a target. 2208 */ 2209 /*void*/; 2210 else if (sc->sc_prevphase == MESSAGE_OUT_PHASE) { 2211 /* 2212 * Our (multi-byte) message (eg SDTR) was 2213 * interrupted by the target to send 2214 * a MSG REJECT. 2215 * Print diagnostic if current phase 2216 * is not MESSAGE IN. 2217 */ 2218 if (sc->sc_phase != MESSAGE_IN_PHASE) 2219 printf("%s: !TC on MSG OUT" 2220 " [intr %x, stat %x, step %d]" 2221 " prevphase %x, resid %lx\n", 2222 sc->sc_dev.dv_xname, 2223 sc->sc_espintr, 2224 sc->sc_espstat, 2225 sc->sc_espstep, 2226 sc->sc_prevphase, 2227 (u_long)sc->sc_omlen); 2228 } else if (sc->sc_dleft == 0) { 2229 /* 2230 * The DMA operation was started for 2231 * a DATA transfer. Print a diagnostic 2232 * if the DMA counter and TC bit 2233 * appear to be out of sync. 2234 */ 2235 printf("%s: !TC on DATA XFER" 2236 " [intr %x, stat %x, step %d]" 2237 " prevphase %x, resid %x\n", 2238 sc->sc_dev.dv_xname, 2239 sc->sc_espintr, 2240 sc->sc_espstat, 2241 sc->sc_espstep, 2242 sc->sc_prevphase, 2243 ecb ? ecb->dleft : -1); 2244 } 2245 } 2246 } 2247 2248 /* 2249 * Check for less serious errors. 2250 */ 2251 if ((sc->sc_espstat & NCRSTAT_PE) != 0) { 2252 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 2253 if (sc->sc_prevphase == MESSAGE_IN_PHASE) 2254 ncr53c9x_sched_msgout(SEND_PARITY_ERROR); 2255 else 2256 ncr53c9x_sched_msgout(SEND_INIT_DET_ERR); 2257 } 2258 2259 if ((sc->sc_espintr & NCRINTR_DIS) != 0) { 2260 sc->sc_msgify = 0; 2261 NCR_INTS(("<DISC [intr %x, stat %x, step %d]>", 2262 sc->sc_espintr,sc->sc_espstat,sc->sc_espstep)); 2263 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2264 NCRCMD(sc, NCRCMD_FLUSH); 2265 /* DELAY(1); */ 2266 } 2267 /* 2268 * This command must (apparently) be issued within 2269 * 250mS of a disconnect. So here you are... 2270 */ 2271 NCRCMD(sc, NCRCMD_ENSEL); 2272 2273 switch (sc->sc_state) { 2274 case NCR_RESELECTED: 2275 goto sched; 2276 2277 case NCR_SELECTING: 2278 { 2279 struct ncr53c9x_linfo *li; 2280 2281 ecb->xs->error = XS_SELTIMEOUT; 2282 2283 /* Selection timeout -- discard all LUNs if empty */ 2284 periph = ecb->xs->xs_periph; 2285 ti = &sc->sc_tinfo[periph->periph_target]; 2286 li = LIST_FIRST(&ti->luns); 2287 while (li != NULL) { 2288 if (li->untagged == NULL && li->used == 0) { 2289 if (li->lun < NCR_NLUN) 2290 ti->lun[li->lun] = NULL; 2291 LIST_REMOVE(li, link); 2292 free(li, M_DEVBUF); 2293 /* 2294 * Restart the search at the beginning 2295 */ 2296 li = LIST_FIRST(&ti->luns); 2297 continue; 2298 } 2299 li = LIST_NEXT(li, link); 2300 } 2301 goto finish; 2302 } 2303 case NCR_CONNECTED: 2304 if ((sc->sc_flags & NCR_SYNCHNEGO) != 0) { 2305 #ifdef NCR53C9X_DEBUG 2306 if (ecb != NULL) 2307 scsipi_printaddr(ecb->xs->xs_periph); 2308 printf("sync nego not completed!\n"); 2309 #endif 2310 ti = &sc->sc_tinfo[ecb->xs->xs_periph->periph_target]; 2311 sc->sc_flags &= ~NCR_SYNCHNEGO; 2312 ti->flags &= ~(T_NEGOTIATE | T_SYNCMODE); 2313 } 2314 2315 /* it may be OK to disconnect */ 2316 if ((sc->sc_flags & NCR_ABORTING) == 0) { 2317 /* 2318 * Section 5.1.1 of the SCSI 2 spec 2319 * suggests issuing a REQUEST SENSE 2320 * following an unexpected disconnect. 2321 * Some devices go into a contingent 2322 * allegiance condition when 2323 * disconnecting, and this is necessary 2324 * to clean up their state. 2325 */ 2326 printf("%s: unexpected disconnect " 2327 "[state %d, intr %x, stat %x, phase(c %x, p %x)]; ", 2328 sc->sc_dev.dv_xname, sc->sc_state, 2329 sc->sc_espintr, sc->sc_espstat, 2330 sc->sc_phase, sc->sc_prevphase); 2331 2332 if ((ecb->flags & ECB_SENSE) != 0) { 2333 printf("resetting\n"); 2334 goto reset; 2335 } 2336 printf("sending REQUEST SENSE\n"); 2337 callout_stop(&ecb->xs->xs_callout); 2338 ncr53c9x_sense(sc, ecb); 2339 goto out; 2340 } 2341 2342 ecb->xs->error = XS_TIMEOUT; 2343 goto finish; 2344 2345 case NCR_DISCONNECT: 2346 sc->sc_nexus = NULL; 2347 goto sched; 2348 2349 case NCR_CMDCOMPLETE: 2350 goto finish; 2351 } 2352 } 2353 2354 switch (sc->sc_state) { 2355 2356 case NCR_SBR: 2357 printf("%s: waiting for SCSI Bus Reset to happen\n", 2358 sc->sc_dev.dv_xname); 2359 goto out; 2360 2361 case NCR_RESELECTED: 2362 /* 2363 * we must be continuing a message ? 2364 */ 2365 printf("%s: unhandled reselect continuation, " 2366 "state %d, intr %02x\n", 2367 sc->sc_dev.dv_xname, sc->sc_state, sc->sc_espintr); 2368 ncr53c9x_init(sc, 1); 2369 goto out; 2370 2371 case NCR_IDENTIFIED: 2372 ecb = sc->sc_nexus; 2373 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2374 int i = (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF); 2375 /* 2376 * Things are seriously screwed up. 2377 * Pull the brakes, i.e. reset 2378 */ 2379 printf("%s: target didn't send tag: %d bytes in fifo\n", 2380 sc->sc_dev.dv_xname, i); 2381 /* Drain and display fifo */ 2382 while (i-- > 0) 2383 printf("[%d] ", NCR_READ_REG(sc, NCR_FIFO)); 2384 2385 ncr53c9x_init(sc, 1); 2386 goto out; 2387 } else 2388 goto msgin; 2389 2390 case NCR_IDLE: 2391 case NCR_SELECTING: 2392 ecb = sc->sc_nexus; 2393 if (sc->sc_espintr & NCRINTR_RESEL) { 2394 sc->sc_msgpriq = sc->sc_msgout = sc->sc_msgoutq = 0; 2395 sc->sc_flags = 0; 2396 /* 2397 * If we're trying to select a 2398 * target ourselves, push our command 2399 * back into the ready list. 2400 */ 2401 if (sc->sc_state == NCR_SELECTING) { 2402 NCR_INTS(("backoff selector ")); 2403 callout_stop(&ecb->xs->xs_callout); 2404 ncr53c9x_dequeue(sc, ecb); 2405 TAILQ_INSERT_HEAD(&sc->ready_list, ecb, chain); 2406 ecb->flags |= ECB_READY; 2407 ecb = sc->sc_nexus = NULL; 2408 } 2409 sc->sc_state = NCR_RESELECTED; 2410 if (sc->sc_phase != MESSAGE_IN_PHASE) { 2411 /* 2412 * Things are seriously screwed up. 2413 * Pull the brakes, i.e. reset 2414 */ 2415 printf("%s: target didn't identify\n", 2416 sc->sc_dev.dv_xname); 2417 ncr53c9x_init(sc, 1); 2418 goto out; 2419 } 2420 /* 2421 * The C90 only inhibits FIFO writes until reselection 2422 * is complete, instead of waiting until the interrupt 2423 * status register has been read. So, if the reselect 2424 * happens while we were entering command bytes (for 2425 * another target) some of those bytes can appear in 2426 * the FIFO here, after the interrupt is taken. 2427 * 2428 * To remedy this situation, pull the Selection ID 2429 * and Identify message from the FIFO directly, and 2430 * ignore any extraneous fifo contents. Also, set 2431 * a flag that allows one Illegal Command Interrupt 2432 * to occur which the chip also generates as a result 2433 * of writing to the FIFO during a reselect. 2434 */ 2435 if (sc->sc_rev == NCR_VARIANT_ESP100) { 2436 nfifo = NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF; 2437 sc->sc_imess[0] = NCR_READ_REG(sc, NCR_FIFO); 2438 sc->sc_imess[1] = NCR_READ_REG(sc, NCR_FIFO); 2439 sc->sc_imlen = 2; 2440 if (nfifo != 2) { 2441 /* Flush the rest */ 2442 NCRCMD(sc, NCRCMD_FLUSH); 2443 } 2444 sc->sc_flags |= NCR_EXPECT_ILLCMD; 2445 if (nfifo > 2) 2446 nfifo = 2; /* We fixed it.. */ 2447 } else 2448 nfifo = ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2449 2450 if (nfifo != 2) { 2451 printf("%s: RESELECT: %d bytes in FIFO! " 2452 "[intr %x, stat %x, step %d, " 2453 "prevphase %x]\n", 2454 sc->sc_dev.dv_xname, 2455 nfifo, 2456 sc->sc_espintr, 2457 sc->sc_espstat, 2458 sc->sc_espstep, 2459 sc->sc_prevphase); 2460 ncr53c9x_init(sc, 1); 2461 goto out; 2462 } 2463 sc->sc_selid = sc->sc_imess[0]; 2464 NCR_INTS(("selid=%02x ", sc->sc_selid)); 2465 2466 /* Handle identify message */ 2467 ncr53c9x_msgin(sc); 2468 2469 if (sc->sc_state != NCR_CONNECTED && 2470 sc->sc_state != NCR_IDENTIFIED) { 2471 /* IDENTIFY fail?! */ 2472 printf("%s: identify failed, " 2473 "state %d, intr %02x\n", 2474 sc->sc_dev.dv_xname, sc->sc_state, 2475 sc->sc_espintr); 2476 ncr53c9x_init(sc, 1); 2477 goto out; 2478 } 2479 goto shortcut; /* ie. next phase expected soon */ 2480 } 2481 2482 #define NCRINTR_DONE (NCRINTR_FC|NCRINTR_BS) 2483 if ((sc->sc_espintr & NCRINTR_DONE) == NCRINTR_DONE) { 2484 /* 2485 * Arbitration won; examine the `step' register 2486 * to determine how far the selection could progress. 2487 */ 2488 ecb = sc->sc_nexus; 2489 if (ecb == NULL) 2490 panic("ncr53c9x: no nexus"); 2491 2492 periph = ecb->xs->xs_periph; 2493 ti = &sc->sc_tinfo[periph->periph_target]; 2494 2495 switch (sc->sc_espstep) { 2496 case 0: 2497 /* 2498 * The target did not respond with a 2499 * message out phase - probably an old 2500 * device that doesn't recognize ATN. 2501 * Clear ATN and just continue, the 2502 * target should be in the command 2503 * phase. 2504 * XXXX check for command phase? 2505 */ 2506 NCRCMD(sc, NCRCMD_RSTATN); 2507 break; 2508 case 1: 2509 if ((ti->flags & T_NEGOTIATE) == 0 && 2510 ecb->tag[0] == 0) { 2511 printf("%s: step 1 & !NEG\n", 2512 sc->sc_dev.dv_xname); 2513 goto reset; 2514 } 2515 if (sc->sc_phase != MESSAGE_OUT_PHASE) { 2516 printf("%s: !MSGOUT\n", 2517 sc->sc_dev.dv_xname); 2518 goto reset; 2519 } 2520 if (ti->flags & T_WIDE) { 2521 ti->flags |= T_WDTRSENT; 2522 ncr53c9x_sched_msgout(SEND_WDTR); 2523 } 2524 if (ti->flags & T_NEGOTIATE) { 2525 /* Start negotiating */ 2526 ti->period = sc->sc_minsync; 2527 ti->offset = 15; 2528 sc->sc_flags |= NCR_SYNCHNEGO; 2529 if (ecb->tag[0]) 2530 ncr53c9x_sched_msgout( 2531 SEND_TAG|SEND_SDTR); 2532 else 2533 ncr53c9x_sched_msgout( 2534 SEND_SDTR); 2535 } else { 2536 /* Could not do ATN3 so send TAG */ 2537 ncr53c9x_sched_msgout(SEND_TAG); 2538 } 2539 sc->sc_prevphase = MESSAGE_OUT_PHASE; /* XXXX */ 2540 break; 2541 case 3: 2542 /* 2543 * Grr, this is supposed to mean 2544 * "target left command phase prematurely". 2545 * It seems to happen regularly when 2546 * sync mode is on. 2547 * Look at FIFO to see if command went out. 2548 * (Timing problems?) 2549 */ 2550 if (sc->sc_features & NCR_F_DMASELECT) { 2551 if (sc->sc_cmdlen == 0) 2552 /* Hope for the best.. */ 2553 break; 2554 } else if ((NCR_READ_REG(sc, NCR_FFLAG) 2555 & NCRFIFO_FF) == 0) { 2556 /* Hope for the best.. */ 2557 break; 2558 } 2559 printf("(%s:%d:%d): selection failed;" 2560 " %d left in FIFO " 2561 "[intr %x, stat %x, step %d]\n", 2562 sc->sc_dev.dv_xname, 2563 periph->periph_target, 2564 periph->periph_lun, 2565 NCR_READ_REG(sc, NCR_FFLAG) 2566 & NCRFIFO_FF, 2567 sc->sc_espintr, sc->sc_espstat, 2568 sc->sc_espstep); 2569 NCRCMD(sc, NCRCMD_FLUSH); 2570 ncr53c9x_sched_msgout(SEND_ABORT); 2571 goto out; 2572 case 2: 2573 /* Select stuck at Command Phase */ 2574 NCRCMD(sc, NCRCMD_FLUSH); 2575 break; 2576 case 4: 2577 if (sc->sc_features & NCR_F_DMASELECT && 2578 sc->sc_cmdlen != 0) 2579 printf("(%s:%d:%d): select; " 2580 "%lu left in DMA buffer " 2581 "[intr %x, stat %x, step %d]\n", 2582 sc->sc_dev.dv_xname, 2583 periph->periph_target, 2584 periph->periph_lun, 2585 (u_long)sc->sc_cmdlen, 2586 sc->sc_espintr, 2587 sc->sc_espstat, 2588 sc->sc_espstep); 2589 /* So far, everything went fine */ 2590 break; 2591 } 2592 2593 sc->sc_prevphase = INVALID_PHASE; /* ?? */ 2594 /* Do an implicit RESTORE POINTERS. */ 2595 sc->sc_dp = ecb->daddr; 2596 sc->sc_dleft = ecb->dleft; 2597 sc->sc_state = NCR_CONNECTED; 2598 break; 2599 2600 } else { 2601 2602 printf("%s: unexpected status after select" 2603 ": [intr %x, stat %x, step %x]\n", 2604 sc->sc_dev.dv_xname, 2605 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2606 NCRCMD(sc, NCRCMD_FLUSH); 2607 DELAY(1); 2608 goto reset; 2609 } 2610 if (sc->sc_state == NCR_IDLE) { 2611 printf("%s: stray interrupt\n", sc->sc_dev.dv_xname); 2612 simple_unlock(&sc->sc_lock); 2613 return (0); 2614 } 2615 break; 2616 2617 case NCR_CONNECTED: 2618 if ((sc->sc_flags & NCR_ICCS) != 0) { 2619 /* "Initiate Command Complete Steps" in progress */ 2620 u_char msg; 2621 2622 sc->sc_flags &= ~NCR_ICCS; 2623 2624 if (!(sc->sc_espintr & NCRINTR_DONE)) { 2625 printf("%s: ICCS: " 2626 ": [intr %x, stat %x, step %x]\n", 2627 sc->sc_dev.dv_xname, 2628 sc->sc_espintr, sc->sc_espstat, 2629 sc->sc_espstep); 2630 } 2631 ncr53c9x_rdfifo(sc, NCR_RDFIFO_START); 2632 if (sc->sc_imlen < 2) 2633 printf("%s: can't get status, only %d bytes\n", 2634 sc->sc_dev.dv_xname, (int)sc->sc_imlen); 2635 ecb->stat = sc->sc_imess[sc->sc_imlen - 2]; 2636 msg = sc->sc_imess[sc->sc_imlen - 1]; 2637 NCR_PHASE(("<stat:(%x,%x)>", ecb->stat, msg)); 2638 if (msg == MSG_CMDCOMPLETE) { 2639 ecb->dleft = (ecb->flags & ECB_TENTATIVE_DONE) 2640 ? 0 : sc->sc_dleft; 2641 if ((ecb->flags & ECB_SENSE) == 0) 2642 ecb->xs->resid = ecb->dleft; 2643 sc->sc_state = NCR_CMDCOMPLETE; 2644 } else 2645 printf("%s: STATUS_PHASE: msg %d\n", 2646 sc->sc_dev.dv_xname, msg); 2647 sc->sc_imlen = 0; 2648 NCRCMD(sc, NCRCMD_MSGOK); 2649 goto shortcut; /* ie. wait for disconnect */ 2650 } 2651 break; 2652 2653 default: 2654 printf("%s: invalid state: %d [intr %x, phase(c %x, p %x)]\n", 2655 sc->sc_dev.dv_xname, sc->sc_state, 2656 sc->sc_espintr, sc->sc_phase, sc->sc_prevphase); 2657 goto reset; 2658 } 2659 2660 /* 2661 * Driver is now in state NCR_CONNECTED, i.e. we 2662 * have a current command working the SCSI bus. 2663 */ 2664 if (sc->sc_state != NCR_CONNECTED || ecb == NULL) { 2665 panic("ncr53c9x: no nexus"); 2666 } 2667 2668 switch (sc->sc_phase) { 2669 case MESSAGE_OUT_PHASE: 2670 NCR_PHASE(("MESSAGE_OUT_PHASE ")); 2671 ncr53c9x_msgout(sc); 2672 sc->sc_prevphase = MESSAGE_OUT_PHASE; 2673 break; 2674 2675 case MESSAGE_IN_PHASE: 2676 msgin: 2677 NCR_PHASE(("MESSAGE_IN_PHASE ")); 2678 if ((sc->sc_espintr & NCRINTR_BS) != 0) { 2679 if ((sc->sc_rev != NCR_VARIANT_FAS366) || 2680 !(sc->sc_espstat2 & NCRFAS_STAT2_EMPTY)) { 2681 NCRCMD(sc, NCRCMD_FLUSH); 2682 } 2683 sc->sc_flags |= NCR_WAITI; 2684 NCRCMD(sc, NCRCMD_TRANS); 2685 } else if ((sc->sc_espintr & NCRINTR_FC) != 0) { 2686 if ((sc->sc_flags & NCR_WAITI) == 0) { 2687 printf("%s: MSGIN: unexpected FC bit: " 2688 "[intr %x, stat %x, step %x]\n", 2689 sc->sc_dev.dv_xname, 2690 sc->sc_espintr, sc->sc_espstat, 2691 sc->sc_espstep); 2692 } 2693 sc->sc_flags &= ~NCR_WAITI; 2694 ncr53c9x_rdfifo(sc, 2695 (sc->sc_prevphase == sc->sc_phase) ? 2696 NCR_RDFIFO_CONTINUE : NCR_RDFIFO_START); 2697 ncr53c9x_msgin(sc); 2698 } else { 2699 printf("%s: MSGIN: weird bits: " 2700 "[intr %x, stat %x, step %x]\n", 2701 sc->sc_dev.dv_xname, 2702 sc->sc_espintr, sc->sc_espstat, sc->sc_espstep); 2703 } 2704 sc->sc_prevphase = MESSAGE_IN_PHASE; 2705 goto shortcut; /* i.e. expect data to be ready */ 2706 2707 case COMMAND_PHASE: 2708 /* 2709 * Send the command block. Normally we don't see this 2710 * phase because the SEL_ATN command takes care of 2711 * all this. However, we end up here if either the 2712 * target or we wanted to exchange some more messages 2713 * first (e.g. to start negotiations). 2714 */ 2715 2716 NCR_PHASE(("COMMAND_PHASE 0x%02x (%d) ", 2717 ecb->cmd.cmd.opcode, ecb->clen)); 2718 if (NCR_READ_REG(sc, NCR_FFLAG) & NCRFIFO_FF) { 2719 NCRCMD(sc, NCRCMD_FLUSH); 2720 /* DELAY(1);*/ 2721 } 2722 if (sc->sc_features & NCR_F_DMASELECT) { 2723 /* setup DMA transfer for command */ 2724 size = ecb->clen; 2725 sc->sc_cmdlen = size; 2726 sc->sc_cmdp = (caddr_t)&ecb->cmd.cmd; 2727 NCRDMA_SETUP(sc, &sc->sc_cmdp, &sc->sc_cmdlen, 2728 0, &size); 2729 /* Program the SCSI counter */ 2730 NCR_SET_COUNT(sc, size); 2731 2732 /* load the count in */ 2733 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2734 2735 /* start the command transfer */ 2736 NCRCMD(sc, NCRCMD_TRANS | NCRCMD_DMA); 2737 NCRDMA_GO(sc); 2738 } else { 2739 ncr53c9x_wrfifo(sc, (u_char *)&ecb->cmd.cmd, ecb->clen); 2740 NCRCMD(sc, NCRCMD_TRANS); 2741 } 2742 sc->sc_prevphase = COMMAND_PHASE; 2743 break; 2744 2745 case DATA_OUT_PHASE: 2746 NCR_PHASE(("DATA_OUT_PHASE [%ld] ",(long)sc->sc_dleft)); 2747 NCRCMD(sc, NCRCMD_FLUSH); 2748 size = min(sc->sc_dleft, sc->sc_maxxfer); 2749 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 0, &size); 2750 sc->sc_prevphase = DATA_OUT_PHASE; 2751 goto setup_xfer; 2752 2753 case DATA_IN_PHASE: 2754 NCR_PHASE(("DATA_IN_PHASE ")); 2755 if (sc->sc_rev == NCR_VARIANT_ESP100) 2756 NCRCMD(sc, NCRCMD_FLUSH); 2757 size = min(sc->sc_dleft, sc->sc_maxxfer); 2758 NCRDMA_SETUP(sc, &sc->sc_dp, &sc->sc_dleft, 1, &size); 2759 sc->sc_prevphase = DATA_IN_PHASE; 2760 setup_xfer: 2761 /* Target returned to data phase: wipe "done" memory */ 2762 ecb->flags &= ~ECB_TENTATIVE_DONE; 2763 2764 /* Program the SCSI counter */ 2765 NCR_SET_COUNT(sc, size); 2766 2767 /* load the count in */ 2768 NCRCMD(sc, NCRCMD_NOP|NCRCMD_DMA); 2769 2770 /* 2771 * Note that if `size' is 0, we've already transceived 2772 * all the bytes we want but we're still in DATA PHASE. 2773 * Apparently, the device needs padding. Also, a 2774 * transfer size of 0 means "maximum" to the chip 2775 * DMA logic. 2776 */ 2777 NCRCMD(sc, 2778 (size == 0 ? NCRCMD_TRPAD : NCRCMD_TRANS) | NCRCMD_DMA); 2779 NCRDMA_GO(sc); 2780 goto out; 2781 2782 case STATUS_PHASE: 2783 NCR_PHASE(("STATUS_PHASE ")); 2784 sc->sc_flags |= NCR_ICCS; 2785 NCRCMD(sc, NCRCMD_ICCS); 2786 sc->sc_prevphase = STATUS_PHASE; 2787 goto shortcut; /* i.e. expect status results soon */ 2788 2789 case INVALID_PHASE: 2790 break; 2791 2792 default: 2793 printf("%s: unexpected bus phase; resetting\n", 2794 sc->sc_dev.dv_xname); 2795 goto reset; 2796 } 2797 2798 out: 2799 simple_unlock(&sc->sc_lock); 2800 return (1); 2801 2802 reset: 2803 ncr53c9x_init(sc, 1); 2804 goto out; 2805 2806 finish: 2807 ncr53c9x_done(sc, ecb); 2808 goto out; 2809 2810 sched: 2811 sc->sc_state = NCR_IDLE; 2812 ncr53c9x_sched(sc); 2813 goto out; 2814 2815 shortcut: 2816 /* 2817 * The idea is that many of the SCSI operations take very little 2818 * time, and going away and getting interrupted is too high an 2819 * overhead to pay. For example, selecting, sending a message 2820 * and command and then doing some work can be done in one "pass". 2821 * 2822 * The delay is a heuristic. It is 2 when at 20MHz, 2 at 25MHz and 1 2823 * at 40MHz. This needs testing. 2824 */ 2825 { 2826 struct timeval wait, cur; 2827 2828 microtime(&wait); 2829 wait.tv_usec += 50 / sc->sc_freq; 2830 if (wait.tv_usec > 1000000) { 2831 wait.tv_sec++; 2832 wait.tv_usec -= 1000000; 2833 } 2834 do { 2835 if (NCRDMA_ISINTR(sc)) 2836 goto again; 2837 microtime(&cur); 2838 } while (cur.tv_sec <= wait.tv_sec && 2839 cur.tv_usec <= wait.tv_usec); 2840 } 2841 goto out; 2842 } 2843 2844 void 2845 ncr53c9x_abort(sc, ecb) 2846 struct ncr53c9x_softc *sc; 2847 struct ncr53c9x_ecb *ecb; 2848 { 2849 2850 /* 2 secs for the abort */ 2851 ecb->timeout = NCR_ABORT_TIMEOUT; 2852 ecb->flags |= ECB_ABORT; 2853 2854 if (ecb == sc->sc_nexus) { 2855 /* 2856 * If we're still selecting, the message will be scheduled 2857 * after selection is complete. 2858 */ 2859 if (sc->sc_state == NCR_CONNECTED) 2860 ncr53c9x_sched_msgout(SEND_ABORT); 2861 2862 /* 2863 * Reschedule timeout. 2864 */ 2865 callout_reset(&ecb->xs->xs_callout, mstohz(ecb->timeout), 2866 ncr53c9x_timeout, ecb); 2867 } else { 2868 /* 2869 * Just leave the command where it is. 2870 * XXX - what choice do we have but to reset the SCSI 2871 * eventually? 2872 */ 2873 if (sc->sc_state == NCR_IDLE) 2874 ncr53c9x_sched(sc); 2875 } 2876 } 2877 2878 void 2879 ncr53c9x_timeout(arg) 2880 void *arg; 2881 { 2882 struct ncr53c9x_ecb *ecb = arg; 2883 struct scsipi_xfer *xs = ecb->xs; 2884 struct scsipi_periph *periph = xs->xs_periph; 2885 struct ncr53c9x_softc *sc = 2886 (void *)periph->periph_channel->chan_adapter->adapt_dev; 2887 struct ncr53c9x_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 2888 int s; 2889 2890 scsipi_printaddr(periph); 2891 printf("%s: timed out [ecb %p (flags 0x%x, dleft %x, stat %x)], " 2892 "<state %d, nexus %p, phase(l %x, c %x, p %x), resid %lx, " 2893 "msg(q %x,o %x) %s>", 2894 sc->sc_dev.dv_xname, 2895 ecb, ecb->flags, ecb->dleft, ecb->stat, 2896 sc->sc_state, sc->sc_nexus, 2897 NCR_READ_REG(sc, NCR_STAT), 2898 sc->sc_phase, sc->sc_prevphase, 2899 (long)sc->sc_dleft, sc->sc_msgpriq, sc->sc_msgout, 2900 NCRDMA_ISACTIVE(sc) ? "DMA active" : ""); 2901 #if NCR53C9X_DEBUG > 1 2902 printf("TRACE: %s.", ecb->trace); 2903 #endif 2904 2905 s = splbio(); 2906 simple_lock(&sc->sc_lock); 2907 2908 if (ecb->flags & ECB_ABORT) { 2909 /* abort timed out */ 2910 printf(" AGAIN\n"); 2911 2912 ncr53c9x_init(sc, 1); 2913 } else { 2914 /* abort the operation that has timed out */ 2915 printf("\n"); 2916 xs->error = XS_TIMEOUT; 2917 ncr53c9x_abort(sc, ecb); 2918 2919 /* Disable sync mode if stuck in a data phase */ 2920 if (ecb == sc->sc_nexus && 2921 (ti->flags & T_SYNCMODE) != 0 && 2922 (sc->sc_phase & (MSGI|CDI)) == 0) { 2923 /* XXX ASYNC CALLBACK! */ 2924 scsipi_printaddr(periph); 2925 printf("sync negotiation disabled\n"); 2926 sc->sc_cfflags |= 2927 (1 << ((periph->periph_target & 7) + 8)); 2928 ncr53c9x_update_xfer_mode(sc, periph->periph_target); 2929 } 2930 } 2931 2932 simple_unlock(&sc->sc_lock); 2933 splx(s); 2934 } 2935 2936 void 2937 ncr53c9x_watch(arg) 2938 void *arg; 2939 { 2940 struct ncr53c9x_softc *sc = (struct ncr53c9x_softc *)arg; 2941 struct ncr53c9x_tinfo *ti; 2942 struct ncr53c9x_linfo *li; 2943 int t, s; 2944 /* Delete any structures that have not been used in 10min. */ 2945 time_t old = time_second - (10 * 60); 2946 2947 s = splbio(); 2948 simple_lock(&sc->sc_lock); 2949 for (t = 0; t < sc->sc_ntarg; t++) { 2950 ti = &sc->sc_tinfo[t]; 2951 li = LIST_FIRST(&ti->luns); 2952 while (li) { 2953 if (li->last_used < old && 2954 li->untagged == NULL && 2955 li->used == 0) { 2956 if (li->lun < NCR_NLUN) 2957 ti->lun[li->lun] = NULL; 2958 LIST_REMOVE(li, link); 2959 free(li, M_DEVBUF); 2960 /* Restart the search at the beginning */ 2961 li = LIST_FIRST(&ti->luns); 2962 continue; 2963 } 2964 li = LIST_NEXT(li, link); 2965 } 2966 } 2967 simple_unlock(&sc->sc_lock); 2968 splx(s); 2969 callout_reset(&sc->sc_watchdog, 60 * hz, ncr53c9x_watch, sc); 2970 } 2971
Cache object: d686adf1cada32aa80847484f080dad2
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