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sys/dev/ic/ne2000.c
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1 /* $NetBSD: ne2000.c,v 1.42.2.1 2004/07/05 21:40:16 he Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 42 * adapters. 43 * 44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 45 * 46 * Copyright (C) 1993, David Greenman. This software may be used, modified, 47 * copied, distributed, and sold, in both source and binary form provided that 48 * the above copyright and these terms are retained. Under no circumstances is 49 * the author responsible for the proper functioning of this software, nor does 50 * the author assume any responsibility for damages incurred with its use. 51 */ 52 53 /* 54 * Common code shared by all NE2000-compatible Ethernet interfaces. 55 */ 56 57 #include <sys/cdefs.h> 58 __KERNEL_RCSID(0, "$NetBSD: ne2000.c,v 1.42.2.1 2004/07/05 21:40:16 he Exp $"); 59 60 #include "opt_ipkdb.h" 61 62 #include <sys/param.h> 63 #include <sys/systm.h> 64 #include <sys/device.h> 65 #include <sys/socket.h> 66 #include <sys/mbuf.h> 67 #include <sys/syslog.h> 68 69 #include <net/if.h> 70 #include <net/if_dl.h> 71 #include <net/if_types.h> 72 #include <net/if_media.h> 73 74 #include <net/if_ether.h> 75 76 #include <machine/bswap.h> 77 #include <machine/bus.h> 78 79 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 80 #define bus_space_write_stream_2 bus_space_write_2 81 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 82 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 83 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 84 85 #ifdef IPKDB_NE 86 #include <ipkdb/ipkdb.h> 87 #endif 88 89 #include <dev/ic/dp8390reg.h> 90 #include <dev/ic/dp8390var.h> 91 92 #include <dev/ic/ne2000reg.h> 93 #include <dev/ic/ne2000var.h> 94 95 #include <dev/ic/ax88190reg.h> 96 97 #if BYTE_ORDER == BIG_ENDIAN 98 #include <machine/bswap.h> 99 #endif 100 101 int ne2000_write_mbuf __P((struct dp8390_softc *, struct mbuf *, int)); 102 int ne2000_ring_copy __P((struct dp8390_softc *, int, caddr_t, u_short)); 103 void ne2000_read_hdr __P((struct dp8390_softc *, int, struct dp8390_ring *)); 104 int ne2000_test_mem __P((struct dp8390_softc *)); 105 106 void ne2000_writemem __P((bus_space_tag_t, bus_space_handle_t, 107 bus_space_tag_t, bus_space_handle_t, u_int8_t *, int, size_t, 108 int, int)); 109 void ne2000_readmem __P((bus_space_tag_t, bus_space_handle_t, 110 bus_space_tag_t, bus_space_handle_t, int, u_int8_t *, size_t, int)); 111 112 int 113 ne2000_attach(nsc, myea) 114 struct ne2000_softc *nsc; 115 u_int8_t *myea; 116 { 117 struct dp8390_softc *dsc = &nsc->sc_dp8390; 118 bus_space_tag_t nict = dsc->sc_regt; 119 bus_space_handle_t nich = dsc->sc_regh; 120 bus_space_tag_t asict = nsc->sc_asict; 121 bus_space_handle_t asich = nsc->sc_asich; 122 u_int8_t romdata[16]; 123 int memsize, i, useword; 124 125 /* 126 * Detect it again unless caller specified it; this gives us 127 * the memory size. 128 */ 129 if (nsc->sc_type == NE2000_TYPE_UNKNOWN) 130 nsc->sc_type = ne2000_detect(nict, nich, asict, asich); 131 132 /* 133 * 8k of memory for NE1000, 16k for NE2000 and 24k for the 134 * card uses DL10019. 135 */ 136 switch (nsc->sc_type) { 137 case NE2000_TYPE_UNKNOWN: 138 default: 139 printf("%s: where did the card go?\n", dsc->sc_dev.dv_xname); 140 return (1); 141 case NE2000_TYPE_NE1000: 142 memsize = 8192; 143 useword = 0; 144 break; 145 case NE2000_TYPE_NE2000: 146 case NE2000_TYPE_AX88190: /* XXX really? */ 147 case NE2000_TYPE_AX88790: 148 memsize = 8192 * 2; 149 useword = 1; 150 break; 151 case NE2000_TYPE_DL10019: 152 case NE2000_TYPE_DL10022: 153 memsize = 8192 * 3; 154 useword = 1; 155 break; 156 } 157 158 nsc->sc_useword = useword; 159 160 dsc->cr_proto = ED_CR_RD2; 161 if (nsc->sc_type == NE2000_TYPE_AX88190 || 162 nsc->sc_type == NE2000_TYPE_AX88790) { 163 dsc->rcr_proto = ED_RCR_INTT; 164 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 165 } else 166 dsc->rcr_proto = 0; 167 168 /* 169 * DCR gets: 170 * 171 * FIFO threshold to 8, No auto-init Remote DMA, 172 * byte order=80x86. 173 * 174 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA. 175 */ 176 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 177 178 dsc->test_mem = ne2000_test_mem; 179 dsc->ring_copy = ne2000_ring_copy; 180 dsc->write_mbuf = ne2000_write_mbuf; 181 dsc->read_hdr = ne2000_read_hdr; 182 183 /* Registers are linear. */ 184 for (i = 0; i < 16; i++) 185 dsc->sc_reg_map[i] = i; 186 187 /* 188 * NIC memory doens't start at zero on an NE board. 189 * The start address is tied to the bus width. 190 * (It happens to be computed the same way as mem size.) 191 */ 192 dsc->mem_start = memsize; 193 194 #ifdef GWETHER 195 { 196 int x, mstart = 0; 197 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], 198 tbuf[ED_PAGE_SIZE]; 199 200 for (i = 0; i < ED_PAGE_SIZE; i++) 201 pbuf0[i] = 0; 202 203 /* Search for the start of RAM. */ 204 for (x = 1; x < 256; x++) { 205 ne2000_writemem(nict, nich, asict, asich, pbuf0, 206 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 207 ne2000_readmem(nict, nich, asict, asich, 208 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 209 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 210 for (i = 0; i < ED_PAGE_SIZE; i++) 211 pbuf[i] = 255 - x; 212 ne2000_writemem(nict, nich, asict, asich, 213 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 214 useword, 0); 215 ne2000_readmem(nict, nich, asict, asich, 216 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 217 useword); 218 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { 219 mstart = x << ED_PAGE_SHIFT; 220 memsize = ED_PAGE_SIZE; 221 break; 222 } 223 } 224 } 225 226 if (mstart == 0) { 227 printf("%s: cannot find start of RAM\n", 228 dsc->sc_dev.dv_xname); 229 return (1); 230 } 231 232 /* Search for the end of RAM. */ 233 for (++x; x < 256; x++) { 234 ne2000_writemem(nict, nich, asict, asich, pbuf0, 235 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 236 ne2000_readmem(nict, nich, asict, asich, 237 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 238 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 239 for (i = 0; i < ED_PAGE_SIZE; i++) 240 pbuf[i] = 255 - x; 241 ne2000_writemem(nict, nich, asict, asich, 242 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 243 useword, 0); 244 ne2000_readmem(nict, nich, asict, asich, 245 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 246 useword); 247 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) 248 memsize += ED_PAGE_SIZE; 249 else 250 break; 251 } else 252 break; 253 } 254 255 printf("%s: RAM start 0x%x, size %d\n", 256 dsc->sc_dev.dv_xname, mstart, memsize); 257 258 dsc->mem_start = mstart; 259 } 260 #endif /* GWETHER */ 261 262 dsc->mem_size = memsize; 263 264 if (myea == NULL) { 265 /* Read the station address. */ 266 if (nsc->sc_type == NE2000_TYPE_AX88190 || 267 nsc->sc_type == NE2000_TYPE_AX88790) { 268 /* Select page 0 registers. */ 269 NIC_BARRIER(nict, nich); 270 bus_space_write_1(nict, nich, ED_P0_CR, 271 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 272 NIC_BARRIER(nict, nich); 273 /* Select word transfer. */ 274 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS); 275 NIC_BARRIER(nict, nich); 276 ne2000_readmem(nict, nich, asict, asich, 277 AX88190_NODEID_OFFSET, dsc->sc_enaddr, 278 ETHER_ADDR_LEN, useword); 279 } else { 280 ne2000_readmem(nict, nich, asict, asich, 0, romdata, 281 sizeof(romdata), useword); 282 for (i = 0; i < ETHER_ADDR_LEN; i++) 283 dsc->sc_enaddr[i] = 284 romdata[i * (useword ? 2 : 1)]; 285 } 286 } else 287 memcpy(dsc->sc_enaddr, myea, sizeof(dsc->sc_enaddr)); 288 289 /* Clear any pending interrupts that might have occurred above. */ 290 NIC_BARRIER(nict, nich); 291 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 292 NIC_BARRIER(nict, nich); 293 294 if (dsc->sc_media_init == NULL) 295 dsc->sc_media_init = dp8390_media_init; 296 297 if (dp8390_config(dsc)) { 298 printf("%s: setup failed\n", dsc->sc_dev.dv_xname); 299 return (1); 300 } 301 302 /* 303 * We need to compute mem_ring a bit differently; override the 304 * value set up in dp8390_config(). 305 */ 306 dsc->mem_ring = 307 dsc->mem_start + ((dsc->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT); 308 309 return (0); 310 } 311 312 /* 313 * Detect an NE-2000 or compatible. Returns a model code. 314 */ 315 int 316 ne2000_detect(nict, nich, asict, asich) 317 bus_space_tag_t nict; 318 bus_space_handle_t nich; 319 bus_space_tag_t asict; 320 bus_space_handle_t asich; 321 { 322 static u_int8_t test_pattern[32] = "THIS is A memory TEST pattern"; 323 u_int8_t test_buffer[32], tmp; 324 int i, rv = 0; 325 326 /* Reset the board. */ 327 #ifdef GWETHER 328 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0); 329 bus_space_barrier(nict, nich, 0, NE2000_NPORTS, 330 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 331 delay(200); 332 #endif /* GWETHER */ 333 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET); 334 bus_space_barrier(nict, nich, 0, NE2000_NPORTS, 335 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 336 delay(10000); 337 338 /* 339 * I don't know if this is necessary; probably cruft leftover from 340 * Clarkson packet driver code. Doesn't do a thing on the boards I've 341 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is 342 * non-invasive...but some boards don't seem to reset and I don't have 343 * complete documentation on what the 'right' thing to do is...so we do 344 * the invasive thing for now. Yuck.] 345 */ 346 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp); 347 bus_space_barrier(nict, nich, 0, NE2000_NPORTS, 348 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 349 delay(5000); 350 351 /* 352 * This is needed because some NE clones apparently don't reset the 353 * NIC properly (or the NIC chip doesn't reset fully on power-up). 354 * XXX - this makes the probe invasive! Done against my better 355 * judgement. -DLG 356 */ 357 bus_space_write_1(nict, nich, ED_P0_CR, 358 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP); 359 NIC_BARRIER(nict, nich); 360 361 delay(5000); 362 363 /* 364 * Generic probe routine for testing for the existence of a DS8390. 365 * Must be performed after the NIC has just been reset. This 366 * works by looking at certain register values that are guaranteed 367 * to be initialized a certain way after power-up or reset. 368 * 369 * Specifically: 370 * 371 * Register reset bits set bits 372 * -------- ---------- -------- 373 * CR TXP, STA RD2, STP 374 * ISR RST 375 * IMR <all> 376 * DCR LAS 377 * TCR LB1, LB0 378 * 379 * We only look at CR and ISR, however, since looking at the others 380 * would require changing register pages, which would be intrusive 381 * if this isn't an 8390. 382 */ 383 384 tmp = bus_space_read_1(nict, nich, ED_P0_CR); 385 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 386 (ED_CR_RD2 | ED_CR_STP)) 387 goto out; 388 389 tmp = bus_space_read_1(nict, nich, ED_P0_ISR); 390 if ((tmp & ED_ISR_RST) != ED_ISR_RST) 391 goto out; 392 393 bus_space_write_1(nict, nich, 394 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 395 NIC_BARRIER(nict, nich); 396 397 for (i = 0; i < 100; i++) { 398 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) == 399 ED_ISR_RST) { 400 /* Ack the reset bit. */ 401 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST); 402 NIC_BARRIER(nict, nich); 403 break; 404 } 405 delay(100); 406 } 407 408 #if 0 409 /* XXX */ 410 if (i == 100) 411 goto out; 412 #endif 413 414 /* 415 * Test the ability to read and write to the NIC memory. This has 416 * the side effect of determining if this is an NE1000 or an NE2000. 417 */ 418 419 /* 420 * This prevents packets from being stored in the NIC memory when 421 * the readmem routine turns on the start bit in the CR. 422 */ 423 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON); 424 NIC_BARRIER(nict, nich); 425 426 /* Temporarily initialize DCR for byte operations. */ 427 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 428 429 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT); 430 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT); 431 432 /* 433 * Write a test pattern in byte mode. If this fails, then there 434 * probably isn't any memory at 8k - which likely means that the 435 * board is an NE2000. 436 */ 437 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192, 438 sizeof(test_pattern), 0, 1); 439 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer, 440 sizeof(test_buffer), 0); 441 442 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 443 /* not an NE1000 - try NE2000 */ 444 bus_space_write_1(nict, nich, ED_P0_DCR, 445 ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 446 bus_space_write_1(nict, nich, ED_P0_PSTART, 447 16384 >> ED_PAGE_SHIFT); 448 bus_space_write_1(nict, nich, ED_P0_PSTOP, 449 32768 >> ED_PAGE_SHIFT); 450 451 /* 452 * Write the test pattern in word mode. If this also fails, 453 * then we don't know what this board is. 454 */ 455 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384, 456 sizeof(test_pattern), 1, 0); 457 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer, 458 sizeof(test_buffer), 1); 459 460 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern))) 461 goto out; /* not an NE2000 either */ 462 463 rv = NE2000_TYPE_NE2000; 464 } else { 465 /* We're an NE1000. */ 466 rv = NE2000_TYPE_NE1000; 467 } 468 469 /* Clear any pending interrupts that might have occurred above. */ 470 NIC_BARRIER(nict, nich); 471 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 472 473 out: 474 return (rv); 475 } 476 477 /* 478 * Write an mbuf chain to the destination NIC memory address using programmed 479 * I/O. 480 */ 481 int 482 ne2000_write_mbuf(sc, m, buf) 483 struct dp8390_softc *sc; 484 struct mbuf *m; 485 int buf; 486 { 487 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 488 bus_space_tag_t nict = sc->sc_regt; 489 bus_space_handle_t nich = sc->sc_regh; 490 bus_space_tag_t asict = nsc->sc_asict; 491 bus_space_handle_t asich = nsc->sc_asich; 492 int savelen, padlen; 493 int maxwait = 100; /* about 120us */ 494 495 savelen = m->m_pkthdr.len; 496 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) { 497 padlen = ETHER_MIN_LEN - ETHER_CRC_LEN - savelen; 498 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN; 499 } else 500 padlen = 0; 501 502 503 /* Select page 0 registers. */ 504 NIC_BARRIER(nict, nich); 505 bus_space_write_1(nict, nich, ED_P0_CR, 506 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 507 NIC_BARRIER(nict, nich); 508 509 /* Reset remote DMA complete flag. */ 510 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 511 NIC_BARRIER(nict, nich); 512 513 /* Set up DMA byte count. */ 514 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen); 515 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8); 516 517 /* Set up destination address in NIC mem. */ 518 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 519 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 520 521 /* Set remote DMA write. */ 522 NIC_BARRIER(nict, nich); 523 bus_space_write_1(nict, nich, 524 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 525 NIC_BARRIER(nict, nich); 526 527 /* 528 * Transfer the mbuf chain to the NIC memory. NE2000 cards 529 * require that data be transferred as words, and only words, 530 * so that case requires some extra code to patch over odd-length 531 * mbufs. 532 */ 533 if (nsc->sc_type == NE2000_TYPE_NE1000) { 534 /* NE1000s are easy. */ 535 for (; m != 0; m = m->m_next) { 536 if (m->m_len) { 537 bus_space_write_multi_1(asict, asich, 538 NE2000_ASIC_DATA, mtod(m, u_int8_t *), 539 m->m_len); 540 } 541 } 542 if (padlen) { 543 for(; padlen > 0; padlen--) 544 bus_space_write_1(asict, asich, 545 NE2000_ASIC_DATA, 0); 546 } 547 } else { 548 /* NE2000s are a bit trickier. */ 549 u_int8_t *data, savebyte[2]; 550 int l, leftover; 551 #ifdef DIAGNOSTIC 552 u_int8_t *lim; 553 #endif 554 /* Start out with no leftover data. */ 555 leftover = 0; 556 savebyte[0] = savebyte[1] = 0; 557 558 for (; m != 0; m = m->m_next) { 559 l = m->m_len; 560 if (l == 0) 561 continue; 562 data = mtod(m, u_int8_t *); 563 #ifdef DIAGNOSTIC 564 lim = data + l; 565 #endif 566 while (l > 0) { 567 if (leftover) { 568 /* 569 * Data left over (from mbuf or 570 * realignment). Buffer the next 571 * byte, and write it and the 572 * leftover data out. 573 */ 574 savebyte[1] = *data++; 575 l--; 576 bus_space_write_stream_2(asict, asich, 577 NE2000_ASIC_DATA, 578 *(u_int16_t *)savebyte); 579 leftover = 0; 580 } else if (BUS_SPACE_ALIGNED_POINTER(data, 581 u_int16_t) == 0) { 582 /* 583 * Unaligned data; buffer the next 584 * byte. 585 */ 586 savebyte[0] = *data++; 587 l--; 588 leftover = 1; 589 } else { 590 /* 591 * Aligned data; output contiguous 592 * words as much as we can, then 593 * buffer the remaining byte, if any. 594 */ 595 leftover = l & 1; 596 l &= ~1; 597 bus_space_write_multi_stream_2(asict, 598 asich, NE2000_ASIC_DATA, 599 (u_int16_t *)data, l >> 1); 600 data += l; 601 if (leftover) 602 savebyte[0] = *data++; 603 l = 0; 604 } 605 } 606 if (l < 0) 607 panic("ne2000_write_mbuf: negative len"); 608 #ifdef DIAGNOSTIC 609 if (data != lim) 610 panic("ne2000_write_mbuf: data != lim"); 611 #endif 612 } 613 if (leftover) { 614 savebyte[1] = 0; 615 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA, 616 *(u_int16_t *)savebyte); 617 } 618 if (padlen) { 619 for(; padlen > 1; padlen -= 2) 620 bus_space_write_stream_2(asict, asich, 621 NE2000_ASIC_DATA, 0); 622 } 623 } 624 NIC_BARRIER(nict, nich); 625 626 /* 627 * Wait for remote DMA to complete. This is necessary because on the 628 * transmit side, data is handled internally by the NIC in bursts, and 629 * we can't start another remote DMA until this one completes. Not 630 * waiting causes really bad things to happen - like the NIC wedging 631 * the bus. 632 */ 633 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 634 ED_ISR_RDC) && --maxwait) { 635 bus_space_read_1(nict, nich, ED_P0_CRDA1); 636 bus_space_read_1(nict, nich, ED_P0_CRDA0); 637 NIC_BARRIER(nict, nich); 638 DELAY(1); 639 } 640 641 if (maxwait == 0) { 642 log(LOG_WARNING, 643 "%s: remote transmit DMA failed to complete\n", 644 sc->sc_dev.dv_xname); 645 dp8390_reset(sc); 646 } 647 648 return (savelen); 649 } 650 651 /* 652 * Given a source and destination address, copy 'amout' of a packet from 653 * the ring buffer into a linear destination buffer. Takes into account 654 * ring-wrap. 655 */ 656 int 657 ne2000_ring_copy(sc, src, dst, amount) 658 struct dp8390_softc *sc; 659 int src; 660 caddr_t dst; 661 u_short amount; 662 { 663 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 664 bus_space_tag_t nict = sc->sc_regt; 665 bus_space_handle_t nich = sc->sc_regh; 666 bus_space_tag_t asict = nsc->sc_asict; 667 bus_space_handle_t asich = nsc->sc_asich; 668 u_short tmp_amount; 669 int useword = nsc->sc_useword; 670 671 /* Does copy wrap to lower addr in ring buffer? */ 672 if (src + amount > sc->mem_end) { 673 tmp_amount = sc->mem_end - src; 674 675 /* Copy amount up to end of NIC memory. */ 676 ne2000_readmem(nict, nich, asict, asich, src, 677 (u_int8_t *)dst, tmp_amount, useword); 678 679 amount -= tmp_amount; 680 src = sc->mem_ring; 681 dst += tmp_amount; 682 } 683 684 ne2000_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst, 685 amount, useword); 686 687 return (src + amount); 688 } 689 690 void 691 ne2000_read_hdr(sc, buf, hdr) 692 struct dp8390_softc *sc; 693 int buf; 694 struct dp8390_ring *hdr; 695 { 696 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 697 698 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich, 699 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring), 700 nsc->sc_useword); 701 #if BYTE_ORDER == BIG_ENDIAN 702 hdr->count = bswap16(hdr->count); 703 #endif 704 } 705 706 int 707 ne2000_test_mem(sc) 708 struct dp8390_softc *sc; 709 { 710 711 /* Noop. */ 712 return (0); 713 } 714 715 /* 716 * Given a NIC memory source address and a host memory destination address, 717 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is 718 * rounded up to a word - ok as long as mbufs are word sized. 719 */ 720 void 721 ne2000_readmem(nict, nich, asict, asich, src, dst, amount, useword) 722 bus_space_tag_t nict; 723 bus_space_handle_t nich; 724 bus_space_tag_t asict; 725 bus_space_handle_t asich; 726 int src; 727 u_int8_t *dst; 728 size_t amount; 729 int useword; 730 { 731 732 /* Select page 0 registers. */ 733 NIC_BARRIER(nict, nich); 734 bus_space_write_1(nict, nich, ED_P0_CR, 735 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 736 NIC_BARRIER(nict, nich); 737 738 /* Round up to a word. */ 739 if (amount & 1) 740 ++amount; 741 742 /* Set up DMA byte count. */ 743 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount); 744 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8); 745 746 /* Set up source address in NIC mem. */ 747 bus_space_write_1(nict, nich, ED_P0_RSAR0, src); 748 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8); 749 750 NIC_BARRIER(nict, nich); 751 bus_space_write_1(nict, nich, ED_P0_CR, 752 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA); 753 754 bus_space_barrier(nict, nich, 0, NE2000_NPORTS, 755 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 756 if (useword) 757 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 758 (u_int16_t *)dst, amount >> 1); 759 else 760 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA, 761 dst, amount); 762 } 763 764 /* 765 * Stripped down routine for writing a linear buffer to NIC memory. Only 766 * used in the probe routine to test the memory. 'len' must be even. 767 */ 768 void 769 ne2000_writemem(nict, nich, asict, asich, src, dst, len, useword, quiet) 770 bus_space_tag_t nict; 771 bus_space_handle_t nich; 772 bus_space_tag_t asict; 773 bus_space_handle_t asich; 774 u_int8_t *src; 775 int dst; 776 size_t len; 777 int useword; 778 int quiet; 779 { 780 int maxwait = 100; /* about 120us */ 781 782 /* Select page 0 registers. */ 783 NIC_BARRIER(nict, nich); 784 bus_space_write_1(nict, nich, ED_P0_CR, 785 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 786 NIC_BARRIER(nict, nich); 787 788 /* Reset remote DMA complete flag. */ 789 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 790 NIC_BARRIER(nict, nich); 791 792 /* Set up DMA byte count. */ 793 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 794 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 795 796 /* Set up destination address in NIC mem. */ 797 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst); 798 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8); 799 800 /* Set remote DMA write. */ 801 NIC_BARRIER(nict, nich); 802 bus_space_write_1(nict, nich, ED_P0_CR, 803 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 804 805 bus_space_barrier(nict, nich, 0, NE2000_NPORTS, 806 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 807 if (useword) 808 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 809 (u_int16_t *)src, len >> 1); 810 else 811 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA, 812 src, len); 813 814 /* 815 * Wait for remote DMA to complete. This is necessary because on the 816 * transmit side, data is handled internally by the NIC in bursts, and 817 * we can't start another remote DMA until this one completes. Not 818 * waiting causes really bad things to happen - like the NIC wedging 819 * the bus. 820 */ 821 bus_space_barrier(nict, nich, 0, NE2000_NPORTS, 822 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE); 823 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 824 ED_ISR_RDC) && --maxwait) 825 DELAY(1); 826 827 if (!quiet && maxwait == 0) 828 printf("ne2000_writemem: failed to complete\n"); 829 } 830 831 int 832 ne2000_detach(sc, flags) 833 struct ne2000_softc *sc; 834 int flags; 835 { 836 837 return (dp8390_detach(&sc->sc_dp8390, flags)); 838 } 839 840 #ifdef IPKDB_NE 841 /* 842 * This code is essentially the same as ne2000_attach above. 843 */ 844 int 845 ne2000_ipkdb_attach(kip) 846 struct ipkdb_if *kip; 847 { 848 struct ne2000_softc *np = kip->port; 849 struct dp8390_softc *dp = &np->sc_dp8390; 850 bus_space_tag_t nict = dp->sc_regt; 851 bus_space_handle_t nich = dp->sc_regh; 852 int i, useword; 853 854 #ifdef GWETHER 855 /* Not supported (yet?) */ 856 return -1; 857 #endif 858 859 if (np->sc_type == 0) 860 np->sc_type = ne2000_detect(nict, nich, 861 np->sc_asict, np->sc_asich); 862 if (np->sc_type == 0) 863 return -1; 864 865 useword = np->sc_useword; 866 867 dp->cr_proto = ED_CR_RD2; 868 dp->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 869 dp->rcr_proto = 0; 870 871 dp->test_mem = ne2000_test_mem; 872 dp->ring_copy = ne2000_ring_copy; 873 dp->write_mbuf = ne2000_write_mbuf; 874 dp->read_hdr = ne2000_read_hdr; 875 876 for (i = 0; i < 16; i++) 877 dp->sc_reg_map[i] = i; 878 879 switch (np->sc_type) { 880 case NE2000_TYPE_NE1000: 881 dp->mem_start = dp->mem_size = 8192; 882 kip->name = "ne1000"; 883 break; 884 case NE2000_TYPE_NE2000: 885 dp->mem_start = dp->mem_size = 8192 * 2; 886 kip->name = "ne2000"; 887 break; 888 case NE2000_TYPE_DL10019: 889 case NE2000_TYPE_DL10022: 890 dp->mem_start = dp->mem_size = 8192 * 3; 891 kip->name = (np->sc_type == NE2000_TYPE_DL10019) ? 892 "dl10022" : "dl10019"; 893 break; 894 case NE2000_TYPE_AX88190: 895 case NE2000_TYPE_AX88790: 896 dp->rcr_proto = ED_RCR_INTT; 897 dp->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 898 dp->mem_start = dp->mem_size = 8192 * 2; 899 kip->name = "ax88190"; 900 break; 901 } 902 903 if (dp8390_ipkdb_attach(kip)) 904 return -1; 905 906 dp->mem_ring = dp->mem_start 907 + ((dp->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT); 908 909 if (!(kip->flags & IPKDB_MYHW)) { 910 char romdata[16]; 911 912 /* Read the station address. */ 913 if (np->sc_type == NE2000_TYPE_AX88190 || 914 np->sc_type == NE2000_TYPE_AX88790) { 915 /* Select page 0 registers. */ 916 NIC_BARRIER(nict, nich); 917 bus_space_write_1(nict, nich, ED_P0_CR, 918 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 919 NIC_BARRIER(nict, nich); 920 /* Select word transfer */ 921 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS); 922 ne2000_readmem(nict, nich, np->sc_asict, np->sc_asich, 923 AX88190_NODEID_OFFSET, kip->myenetaddr, 924 ETHER_ADDR_LEN, useword); 925 } else { 926 ne2000_readmem(nict, nich, np->sc_asict, np->sc_asich, 927 0, romdata, sizeof romdata, useword); 928 for (i = 0; i < ETHER_ADDR_LEN; i++) 929 kip->myenetaddr[i] = romdata[i << useword]; 930 } 931 kip->flags |= IPKDB_MYHW; 932 933 } 934 dp8390_stop(dp); 935 936 return 0; 937 } 938 #endif
Cache object: 30c24bfd6d3d97beed40ad34396ee803
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