FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/ne2000.c
1 /* $NetBSD: ne2000.c,v 1.46 2005/02/26 10:29:20 bsh Exp $ */
2
3 /*-
4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
42 * adapters.
43 *
44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved.
45 *
46 * Copyright (C) 1993, David Greenman. This software may be used, modified,
47 * copied, distributed, and sold, in both source and binary form provided that
48 * the above copyright and these terms are retained. Under no circumstances is
49 * the author responsible for the proper functioning of this software, nor does
50 * the author assume any responsibility for damages incurred with its use.
51 */
52
53 /*
54 * Common code shared by all NE2000-compatible Ethernet interfaces.
55 */
56
57 #include <sys/cdefs.h>
58 __KERNEL_RCSID(0, "$NetBSD: ne2000.c,v 1.46 2005/02/26 10:29:20 bsh Exp $");
59
60 #include "opt_ipkdb.h"
61
62 #include <sys/param.h>
63 #include <sys/systm.h>
64 #include <sys/device.h>
65 #include <sys/socket.h>
66 #include <sys/mbuf.h>
67 #include <sys/syslog.h>
68
69 #include <net/if.h>
70 #include <net/if_dl.h>
71 #include <net/if_types.h>
72 #include <net/if_media.h>
73
74 #include <net/if_ether.h>
75
76 #include <machine/bswap.h>
77 #include <machine/bus.h>
78
79 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
80 #define bus_space_write_stream_2 bus_space_write_2
81 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
82 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
83 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
84
85 #ifdef IPKDB_NE
86 #include <ipkdb/ipkdb.h>
87 #endif
88
89 #include <dev/ic/dp8390reg.h>
90 #include <dev/ic/dp8390var.h>
91
92 #include <dev/ic/ne2000reg.h>
93 #include <dev/ic/ne2000var.h>
94
95 #include <dev/ic/ax88190reg.h>
96
97 #if BYTE_ORDER == BIG_ENDIAN
98 #include <machine/bswap.h>
99 #endif
100
101 int ne2000_write_mbuf(struct dp8390_softc *, struct mbuf *, int);
102 int ne2000_ring_copy(struct dp8390_softc *, int, caddr_t, u_short);
103 void ne2000_read_hdr(struct dp8390_softc *, int, struct dp8390_ring *);
104 int ne2000_test_mem(struct dp8390_softc *);
105
106 void ne2000_writemem(bus_space_tag_t, bus_space_handle_t,
107 bus_space_tag_t, bus_space_handle_t, u_int8_t *, int, size_t,
108 int, int);
109 void ne2000_readmem(bus_space_tag_t, bus_space_handle_t,
110 bus_space_tag_t, bus_space_handle_t, int, u_int8_t *, size_t, int);
111
112 #define ASIC_BARRIER(asict, asich) \
113 bus_space_barrier((asict), (asich), 0, 0x10, \
114 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE)
115
116 int
117 ne2000_attach(nsc, myea)
118 struct ne2000_softc *nsc;
119 u_int8_t *myea;
120 {
121 struct dp8390_softc *dsc = &nsc->sc_dp8390;
122 bus_space_tag_t nict = dsc->sc_regt;
123 bus_space_handle_t nich = dsc->sc_regh;
124 bus_space_tag_t asict = nsc->sc_asict;
125 bus_space_handle_t asich = nsc->sc_asich;
126 u_int8_t romdata[16];
127 int memsize, i, useword;
128
129 /*
130 * Detect it again unless caller specified it; this gives us
131 * the memory size.
132 */
133 if (nsc->sc_type == NE2000_TYPE_UNKNOWN)
134 nsc->sc_type = ne2000_detect(nict, nich, asict, asich);
135
136 /*
137 * 8k of memory for NE1000, 16k for NE2000 and 24k for the
138 * card uses DL10019.
139 */
140 switch (nsc->sc_type) {
141 case NE2000_TYPE_UNKNOWN:
142 default:
143 printf("%s: where did the card go?\n", dsc->sc_dev.dv_xname);
144 return (1);
145 case NE2000_TYPE_NE1000:
146 memsize = 8192;
147 useword = 0;
148 break;
149 case NE2000_TYPE_NE2000:
150 case NE2000_TYPE_AX88190: /* XXX really? */
151 case NE2000_TYPE_AX88790:
152 memsize = 8192 * 2;
153 useword = 1;
154 break;
155 case NE2000_TYPE_DL10019:
156 case NE2000_TYPE_DL10022:
157 memsize = 8192 * 3;
158 useword = 1;
159 break;
160 }
161
162 nsc->sc_useword = useword;
163
164 dsc->cr_proto = ED_CR_RD2;
165 if (nsc->sc_type == NE2000_TYPE_AX88190 ||
166 nsc->sc_type == NE2000_TYPE_AX88790) {
167 dsc->rcr_proto = ED_RCR_INTT;
168 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND;
169 } else
170 dsc->rcr_proto = 0;
171
172 /*
173 * DCR gets:
174 *
175 * FIFO threshold to 8, No auto-init Remote DMA,
176 * byte order=80x86.
177 *
178 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA.
179 */
180 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0);
181
182 dsc->test_mem = ne2000_test_mem;
183 dsc->ring_copy = ne2000_ring_copy;
184 dsc->write_mbuf = ne2000_write_mbuf;
185 dsc->read_hdr = ne2000_read_hdr;
186
187 /* Registers are linear. */
188 for (i = 0; i < 16; i++)
189 dsc->sc_reg_map[i] = i;
190
191 /*
192 * NIC memory doens't start at zero on an NE board.
193 * The start address is tied to the bus width.
194 * (It happens to be computed the same way as mem size.)
195 */
196 dsc->mem_start = memsize;
197
198 #ifdef GWETHER
199 {
200 int x, mstart = 0;
201 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE],
202 tbuf[ED_PAGE_SIZE];
203
204 for (i = 0; i < ED_PAGE_SIZE; i++)
205 pbuf0[i] = 0;
206
207 /* Search for the start of RAM. */
208 for (x = 1; x < 256; x++) {
209 ne2000_writemem(nict, nich, asict, asich, pbuf0,
210 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
211 ne2000_readmem(nict, nich, asict, asich,
212 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
213 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
214 for (i = 0; i < ED_PAGE_SIZE; i++)
215 pbuf[i] = 255 - x;
216 ne2000_writemem(nict, nich, asict, asich,
217 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
218 useword, 0);
219 ne2000_readmem(nict, nich, asict, asich,
220 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
221 useword);
222 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) {
223 mstart = x << ED_PAGE_SHIFT;
224 memsize = ED_PAGE_SIZE;
225 break;
226 }
227 }
228 }
229
230 if (mstart == 0) {
231 printf("%s: cannot find start of RAM\n",
232 dsc->sc_dev.dv_xname);
233 return (1);
234 }
235
236 /* Search for the end of RAM. */
237 for (++x; x < 256; x++) {
238 ne2000_writemem(nict, nich, asict, asich, pbuf0,
239 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0);
240 ne2000_readmem(nict, nich, asict, asich,
241 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword);
242 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) {
243 for (i = 0; i < ED_PAGE_SIZE; i++)
244 pbuf[i] = 255 - x;
245 ne2000_writemem(nict, nich, asict, asich,
246 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE,
247 useword, 0);
248 ne2000_readmem(nict, nich, asict, asich,
249 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE,
250 useword);
251 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0)
252 memsize += ED_PAGE_SIZE;
253 else
254 break;
255 } else
256 break;
257 }
258
259 printf("%s: RAM start 0x%x, size %d\n",
260 dsc->sc_dev.dv_xname, mstart, memsize);
261
262 dsc->mem_start = mstart;
263 }
264 #endif /* GWETHER */
265
266 dsc->mem_size = memsize;
267
268 if (myea == NULL) {
269 /* Read the station address. */
270 if (nsc->sc_type == NE2000_TYPE_AX88190 ||
271 nsc->sc_type == NE2000_TYPE_AX88790) {
272 /* Select page 0 registers. */
273 NIC_BARRIER(nict, nich);
274 bus_space_write_1(nict, nich, ED_P0_CR,
275 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
276 NIC_BARRIER(nict, nich);
277 /* Select word transfer. */
278 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS);
279 NIC_BARRIER(nict, nich);
280 ne2000_readmem(nict, nich, asict, asich,
281 AX88190_NODEID_OFFSET, dsc->sc_enaddr,
282 ETHER_ADDR_LEN, useword);
283 } else {
284 ne2000_readmem(nict, nich, asict, asich, 0, romdata,
285 sizeof(romdata), useword);
286 for (i = 0; i < ETHER_ADDR_LEN; i++)
287 dsc->sc_enaddr[i] =
288 romdata[i * (useword ? 2 : 1)];
289 }
290 } else
291 memcpy(dsc->sc_enaddr, myea, sizeof(dsc->sc_enaddr));
292
293 /* Clear any pending interrupts that might have occurred above. */
294 NIC_BARRIER(nict, nich);
295 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
296 NIC_BARRIER(nict, nich);
297
298 if (dsc->sc_media_init == NULL)
299 dsc->sc_media_init = dp8390_media_init;
300
301 if (dp8390_config(dsc)) {
302 printf("%s: setup failed\n", dsc->sc_dev.dv_xname);
303 return (1);
304 }
305
306 /*
307 * We need to compute mem_ring a bit differently; override the
308 * value set up in dp8390_config().
309 */
310 dsc->mem_ring =
311 dsc->mem_start + ((dsc->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT);
312
313 return (0);
314 }
315
316 /*
317 * Detect an NE-2000 or compatible. Returns a model code.
318 */
319 int
320 ne2000_detect(nict, nich, asict, asich)
321 bus_space_tag_t nict;
322 bus_space_handle_t nich;
323 bus_space_tag_t asict;
324 bus_space_handle_t asich;
325 {
326 static u_int8_t test_pattern[32] = "THIS is A memory TEST pattern";
327 u_int8_t test_buffer[32], tmp;
328 int i, rv = 0;
329
330 /* Reset the board. */
331 #ifdef GWETHER
332 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0);
333 ASIC_BARRIER(asict, asich);
334 delay(200);
335 #endif /* GWETHER */
336 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET);
337 ASIC_BARRIER(asict, asich);
338 delay(10000);
339
340 /*
341 * I don't know if this is necessary; probably cruft leftover from
342 * Clarkson packet driver code. Doesn't do a thing on the boards I've
343 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is
344 * non-invasive...but some boards don't seem to reset and I don't have
345 * complete documentation on what the 'right' thing to do is...so we do
346 * the invasive thing for now. Yuck.]
347 */
348 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp);
349 ASIC_BARRIER(asict, asich);
350 delay(5000);
351
352 /*
353 * This is needed because some NE clones apparently don't reset the
354 * NIC properly (or the NIC chip doesn't reset fully on power-up).
355 * XXX - this makes the probe invasive! Done against my better
356 * judgement. -DLG
357 */
358 bus_space_write_1(nict, nich, ED_P0_CR,
359 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP);
360 NIC_BARRIER(nict, nich);
361
362 delay(5000);
363
364 /*
365 * Generic probe routine for testing for the existence of a DS8390.
366 * Must be performed after the NIC has just been reset. This
367 * works by looking at certain register values that are guaranteed
368 * to be initialized a certain way after power-up or reset.
369 *
370 * Specifically:
371 *
372 * Register reset bits set bits
373 * -------- ---------- --------
374 * CR TXP, STA RD2, STP
375 * ISR RST
376 * IMR <all>
377 * DCR LAS
378 * TCR LB1, LB0
379 *
380 * We only look at CR and ISR, however, since looking at the others
381 * would require changing register pages, which would be intrusive
382 * if this isn't an 8390.
383 */
384
385 tmp = bus_space_read_1(nict, nich, ED_P0_CR);
386 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) !=
387 (ED_CR_RD2 | ED_CR_STP))
388 goto out;
389
390 tmp = bus_space_read_1(nict, nich, ED_P0_ISR);
391 if ((tmp & ED_ISR_RST) != ED_ISR_RST)
392 goto out;
393
394 bus_space_write_1(nict, nich,
395 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
396 NIC_BARRIER(nict, nich);
397
398 for (i = 0; i < 100; i++) {
399 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) ==
400 ED_ISR_RST) {
401 /* Ack the reset bit. */
402 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST);
403 NIC_BARRIER(nict, nich);
404 break;
405 }
406 delay(100);
407 }
408
409 #if 0
410 /* XXX */
411 if (i == 100)
412 goto out;
413 #endif
414
415 /*
416 * Test the ability to read and write to the NIC memory. This has
417 * the side effect of determining if this is an NE1000 or an NE2000.
418 */
419
420 /*
421 * This prevents packets from being stored in the NIC memory when
422 * the readmem routine turns on the start bit in the CR.
423 */
424 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON);
425 NIC_BARRIER(nict, nich);
426
427 /* Temporarily initialize DCR for byte operations. */
428 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS);
429
430 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT);
431 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT);
432
433 /*
434 * Write a test pattern in byte mode. If this fails, then there
435 * probably isn't any memory at 8k - which likely means that the
436 * board is an NE2000.
437 */
438 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192,
439 sizeof(test_pattern), 0, 1);
440 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer,
441 sizeof(test_buffer), 0);
442
443 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern))) {
444 /* not an NE1000 - try NE2000 */
445 bus_space_write_1(nict, nich, ED_P0_DCR,
446 ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS);
447 bus_space_write_1(nict, nich, ED_P0_PSTART,
448 16384 >> ED_PAGE_SHIFT);
449 bus_space_write_1(nict, nich, ED_P0_PSTOP,
450 32768 >> ED_PAGE_SHIFT);
451
452 /*
453 * Write the test pattern in word mode. If this also fails,
454 * then we don't know what this board is.
455 */
456 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384,
457 sizeof(test_pattern), 1, 0);
458 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer,
459 sizeof(test_buffer), 1);
460
461 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern)))
462 goto out; /* not an NE2000 either */
463
464 rv = NE2000_TYPE_NE2000;
465 } else {
466 /* We're an NE1000. */
467 rv = NE2000_TYPE_NE1000;
468 }
469
470 /* Clear any pending interrupts that might have occurred above. */
471 NIC_BARRIER(nict, nich);
472 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff);
473
474 out:
475 return (rv);
476 }
477
478 /*
479 * Write an mbuf chain to the destination NIC memory address using programmed
480 * I/O.
481 */
482 int
483 ne2000_write_mbuf(sc, m, buf)
484 struct dp8390_softc *sc;
485 struct mbuf *m;
486 int buf;
487 {
488 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
489 bus_space_tag_t nict = sc->sc_regt;
490 bus_space_handle_t nich = sc->sc_regh;
491 bus_space_tag_t asict = nsc->sc_asict;
492 bus_space_handle_t asich = nsc->sc_asich;
493 int savelen, padlen;
494 int maxwait = 100; /* about 120us */
495
496 savelen = m->m_pkthdr.len;
497 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) {
498 padlen = ETHER_MIN_LEN - ETHER_CRC_LEN - savelen;
499 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN;
500 } else
501 padlen = 0;
502
503
504 /* Select page 0 registers. */
505 NIC_BARRIER(nict, nich);
506 bus_space_write_1(nict, nich, ED_P0_CR,
507 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
508 NIC_BARRIER(nict, nich);
509
510 /* Reset remote DMA complete flag. */
511 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
512 NIC_BARRIER(nict, nich);
513
514 /* Set up DMA byte count. */
515 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen);
516 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8);
517
518 /* Set up destination address in NIC mem. */
519 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf);
520 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8);
521
522 /* Set remote DMA write. */
523 NIC_BARRIER(nict, nich);
524 bus_space_write_1(nict, nich,
525 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
526 NIC_BARRIER(nict, nich);
527
528 /*
529 * Transfer the mbuf chain to the NIC memory. NE2000 cards
530 * require that data be transferred as words, and only words,
531 * so that case requires some extra code to patch over odd-length
532 * mbufs.
533 */
534 if (nsc->sc_type == NE2000_TYPE_NE1000) {
535 /* NE1000s are easy. */
536 for (; m != 0; m = m->m_next) {
537 if (m->m_len) {
538 bus_space_write_multi_1(asict, asich,
539 NE2000_ASIC_DATA, mtod(m, u_int8_t *),
540 m->m_len);
541 }
542 }
543 if (padlen) {
544 for(; padlen > 0; padlen--)
545 bus_space_write_1(asict, asich,
546 NE2000_ASIC_DATA, 0);
547 }
548 } else {
549 /* NE2000s are a bit trickier. */
550 u_int8_t *data, savebyte[2];
551 int l, leftover;
552 #ifdef DIAGNOSTIC
553 u_int8_t *lim;
554 #endif
555 /* Start out with no leftover data. */
556 leftover = 0;
557 savebyte[0] = savebyte[1] = 0;
558
559 for (; m != 0; m = m->m_next) {
560 l = m->m_len;
561 if (l == 0)
562 continue;
563 data = mtod(m, u_int8_t *);
564 #ifdef DIAGNOSTIC
565 lim = data + l;
566 #endif
567 while (l > 0) {
568 if (leftover) {
569 /*
570 * Data left over (from mbuf or
571 * realignment). Buffer the next
572 * byte, and write it and the
573 * leftover data out.
574 */
575 savebyte[1] = *data++;
576 l--;
577 bus_space_write_stream_2(asict, asich,
578 NE2000_ASIC_DATA,
579 *(u_int16_t *)savebyte);
580 leftover = 0;
581 } else if (BUS_SPACE_ALIGNED_POINTER(data,
582 u_int16_t) == 0) {
583 /*
584 * Unaligned data; buffer the next
585 * byte.
586 */
587 savebyte[0] = *data++;
588 l--;
589 leftover = 1;
590 } else {
591 /*
592 * Aligned data; output contiguous
593 * words as much as we can, then
594 * buffer the remaining byte, if any.
595 */
596 leftover = l & 1;
597 l &= ~1;
598 bus_space_write_multi_stream_2(asict,
599 asich, NE2000_ASIC_DATA,
600 (u_int16_t *)data, l >> 1);
601 data += l;
602 if (leftover)
603 savebyte[0] = *data++;
604 l = 0;
605 }
606 }
607 if (l < 0)
608 panic("ne2000_write_mbuf: negative len");
609 #ifdef DIAGNOSTIC
610 if (data != lim)
611 panic("ne2000_write_mbuf: data != lim");
612 #endif
613 }
614 if (leftover) {
615 savebyte[1] = 0;
616 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA,
617 *(u_int16_t *)savebyte);
618 }
619 if (padlen) {
620 for(; padlen > 1; padlen -= 2)
621 bus_space_write_stream_2(asict, asich,
622 NE2000_ASIC_DATA, 0);
623 }
624 }
625 NIC_BARRIER(nict, nich);
626
627 /* AX88796 doesn't seem to have remote DMA complete */
628 if (sc->sc_flags & DP8390_NO_REMOTE_DMA_COMPLETE)
629 return(savelen);
630
631 /*
632 * Wait for remote DMA to complete. This is necessary because on the
633 * transmit side, data is handled internally by the NIC in bursts, and
634 * we can't start another remote DMA until this one completes. Not
635 * waiting causes really bad things to happen - like the NIC wedging
636 * the bus.
637 */
638 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
639 ED_ISR_RDC) && --maxwait) {
640 bus_space_read_1(nict, nich, ED_P0_CRDA1);
641 bus_space_read_1(nict, nich, ED_P0_CRDA0);
642 NIC_BARRIER(nict, nich);
643 DELAY(1);
644 }
645
646 if (maxwait == 0) {
647 log(LOG_WARNING,
648 "%s: remote transmit DMA failed to complete\n",
649 sc->sc_dev.dv_xname);
650 dp8390_reset(sc);
651 }
652
653 return (savelen);
654 }
655
656 /*
657 * Given a source and destination address, copy 'amout' of a packet from
658 * the ring buffer into a linear destination buffer. Takes into account
659 * ring-wrap.
660 */
661 int
662 ne2000_ring_copy(sc, src, dst, amount)
663 struct dp8390_softc *sc;
664 int src;
665 caddr_t dst;
666 u_short amount;
667 {
668 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
669 bus_space_tag_t nict = sc->sc_regt;
670 bus_space_handle_t nich = sc->sc_regh;
671 bus_space_tag_t asict = nsc->sc_asict;
672 bus_space_handle_t asich = nsc->sc_asich;
673 u_short tmp_amount;
674 int useword = nsc->sc_useword;
675
676 /* Does copy wrap to lower addr in ring buffer? */
677 if (src + amount > sc->mem_end) {
678 tmp_amount = sc->mem_end - src;
679
680 /* Copy amount up to end of NIC memory. */
681 ne2000_readmem(nict, nich, asict, asich, src,
682 (u_int8_t *)dst, tmp_amount, useword);
683
684 amount -= tmp_amount;
685 src = sc->mem_ring;
686 dst += tmp_amount;
687 }
688
689 ne2000_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst,
690 amount, useword);
691
692 return (src + amount);
693 }
694
695 void
696 ne2000_read_hdr(sc, buf, hdr)
697 struct dp8390_softc *sc;
698 int buf;
699 struct dp8390_ring *hdr;
700 {
701 struct ne2000_softc *nsc = (struct ne2000_softc *)sc;
702
703 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich,
704 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring),
705 nsc->sc_useword);
706 #if BYTE_ORDER == BIG_ENDIAN
707 hdr->count = bswap16(hdr->count);
708 #endif
709 }
710
711 int
712 ne2000_test_mem(sc)
713 struct dp8390_softc *sc;
714 {
715
716 /* Noop. */
717 return (0);
718 }
719
720 /*
721 * Given a NIC memory source address and a host memory destination address,
722 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is
723 * rounded up to a word - ok as long as mbufs are word sized.
724 */
725 void
726 ne2000_readmem(nict, nich, asict, asich, src, dst, amount, useword)
727 bus_space_tag_t nict;
728 bus_space_handle_t nich;
729 bus_space_tag_t asict;
730 bus_space_handle_t asich;
731 int src;
732 u_int8_t *dst;
733 size_t amount;
734 int useword;
735 {
736
737 /* Select page 0 registers. */
738 NIC_BARRIER(nict, nich);
739 bus_space_write_1(nict, nich, ED_P0_CR,
740 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
741 NIC_BARRIER(nict, nich);
742
743 /* Round up to a word. */
744 if (amount & 1)
745 ++amount;
746
747 /* Set up DMA byte count. */
748 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount);
749 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8);
750
751 /* Set up source address in NIC mem. */
752 bus_space_write_1(nict, nich, ED_P0_RSAR0, src);
753 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8);
754
755 NIC_BARRIER(nict, nich);
756 bus_space_write_1(nict, nich, ED_P0_CR,
757 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA);
758
759 ASIC_BARRIER(asict, asich);
760 if (useword)
761 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
762 (u_int16_t *)dst, amount >> 1);
763 else
764 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA,
765 dst, amount);
766 }
767
768 /*
769 * Stripped down routine for writing a linear buffer to NIC memory. Only
770 * used in the probe routine to test the memory. 'len' must be even.
771 */
772 void
773 ne2000_writemem(nict, nich, asict, asich, src, dst, len, useword, quiet)
774 bus_space_tag_t nict;
775 bus_space_handle_t nich;
776 bus_space_tag_t asict;
777 bus_space_handle_t asich;
778 u_int8_t *src;
779 int dst;
780 size_t len;
781 int useword;
782 int quiet;
783 {
784 int maxwait = 100; /* about 120us */
785
786 /* Select page 0 registers. */
787 NIC_BARRIER(nict, nich);
788 bus_space_write_1(nict, nich, ED_P0_CR,
789 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
790 NIC_BARRIER(nict, nich);
791
792 /* Reset remote DMA complete flag. */
793 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC);
794 NIC_BARRIER(nict, nich);
795
796 /* Set up DMA byte count. */
797 bus_space_write_1(nict, nich, ED_P0_RBCR0, len);
798 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8);
799
800 /* Set up destination address in NIC mem. */
801 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst);
802 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8);
803
804 /* Set remote DMA write. */
805 NIC_BARRIER(nict, nich);
806 bus_space_write_1(nict, nich, ED_P0_CR,
807 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA);
808 NIC_BARRIER(nict, nich);
809
810 ASIC_BARRIER(asict, asich);
811 if (useword)
812 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA,
813 (u_int16_t *)src, len >> 1);
814 else
815 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA,
816 src, len);
817 ASIC_BARRIER(asict, asich);
818
819 /*
820 * Wait for remote DMA to complete. This is necessary because on the
821 * transmit side, data is handled internally by the NIC in bursts, and
822 * we can't start another remote DMA until this one completes. Not
823 * waiting causes really bad things to happen - like the NIC wedging
824 * the bus.
825 */
826 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) !=
827 ED_ISR_RDC) && --maxwait)
828 DELAY(1);
829
830 if (!quiet && maxwait == 0)
831 printf("ne2000_writemem: failed to complete\n");
832 }
833
834 int
835 ne2000_detach(sc, flags)
836 struct ne2000_softc *sc;
837 int flags;
838 {
839
840 return (dp8390_detach(&sc->sc_dp8390, flags));
841 }
842
843 #ifdef IPKDB_NE
844 /*
845 * This code is essentially the same as ne2000_attach above.
846 */
847 int
848 ne2000_ipkdb_attach(kip)
849 struct ipkdb_if *kip;
850 {
851 struct ne2000_softc *np = kip->port;
852 struct dp8390_softc *dp = &np->sc_dp8390;
853 bus_space_tag_t nict = dp->sc_regt;
854 bus_space_handle_t nich = dp->sc_regh;
855 int i, useword;
856
857 #ifdef GWETHER
858 /* Not supported (yet?) */
859 return -1;
860 #endif
861
862 if (np->sc_type == 0)
863 np->sc_type = ne2000_detect(nict, nich,
864 np->sc_asict, np->sc_asich);
865 if (np->sc_type == 0)
866 return -1;
867
868 useword = np->sc_useword;
869
870 dp->cr_proto = ED_CR_RD2;
871 dp->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0);
872 dp->rcr_proto = 0;
873
874 dp->test_mem = ne2000_test_mem;
875 dp->ring_copy = ne2000_ring_copy;
876 dp->write_mbuf = ne2000_write_mbuf;
877 dp->read_hdr = ne2000_read_hdr;
878
879 for (i = 0; i < 16; i++)
880 dp->sc_reg_map[i] = i;
881
882 switch (np->sc_type) {
883 case NE2000_TYPE_NE1000:
884 dp->mem_start = dp->mem_size = 8192;
885 kip->name = "ne1000";
886 break;
887 case NE2000_TYPE_NE2000:
888 dp->mem_start = dp->mem_size = 8192 * 2;
889 kip->name = "ne2000";
890 break;
891 case NE2000_TYPE_DL10019:
892 case NE2000_TYPE_DL10022:
893 dp->mem_start = dp->mem_size = 8192 * 3;
894 kip->name = (np->sc_type == NE2000_TYPE_DL10019) ?
895 "dl10022" : "dl10019";
896 break;
897 case NE2000_TYPE_AX88190:
898 case NE2000_TYPE_AX88790:
899 dp->rcr_proto = ED_RCR_INTT;
900 dp->sc_flags |= DP8390_DO_AX88190_WORKAROUND;
901 dp->mem_start = dp->mem_size = 8192 * 2;
902 kip->name = "ax88190";
903 break;
904 }
905
906 if (dp8390_ipkdb_attach(kip))
907 return -1;
908
909 dp->mem_ring = dp->mem_start
910 + ((dp->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT);
911
912 if (!(kip->flags & IPKDB_MYHW)) {
913 char romdata[16];
914
915 /* Read the station address. */
916 if (np->sc_type == NE2000_TYPE_AX88190 ||
917 np->sc_type == NE2000_TYPE_AX88790) {
918 /* Select page 0 registers. */
919 NIC_BARRIER(nict, nich);
920 bus_space_write_1(nict, nich, ED_P0_CR,
921 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA);
922 NIC_BARRIER(nict, nich);
923 /* Select word transfer */
924 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS);
925 ne2000_readmem(nict, nich, np->sc_asict, np->sc_asich,
926 AX88190_NODEID_OFFSET, kip->myenetaddr,
927 ETHER_ADDR_LEN, useword);
928 } else {
929 ne2000_readmem(nict, nich, np->sc_asict, np->sc_asich,
930 0, romdata, sizeof romdata, useword);
931 for (i = 0; i < ETHER_ADDR_LEN; i++)
932 kip->myenetaddr[i] = romdata[i << useword];
933 }
934 kip->flags |= IPKDB_MYHW;
935
936 }
937 dp8390_stop(dp);
938
939 return 0;
940 }
941 #endif
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