The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/nslm7xvar.h

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    1 /*      $NetBSD: nslm7xvar.h,v 1.18.12.1 2007/04/20 21:09:02 bouyer Exp $ */
    2 
    3 /*-
    4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
    5  * All rights reserved.
    6  *
    7  * This code is derived from software contributed to The NetBSD Foundation
    8  * by Bill Squier.
    9  *
   10  * Redistribution and use in source and binary forms, with or without
   11  * modification, are permitted provided that the following conditions
   12  * are met:
   13  * 1. Redistributions of source code must retain the above copyright
   14  *    notice, this list of conditions and the following disclaimer.
   15  * 2. Redistributions in binary form must reproduce the above copyright
   16  *    notice, this list of conditions and the following disclaimer in the
   17  *    documentation and/or other materials provided with the distribution.
   18  * 3. All advertising materials mentioning features or use of this software
   19  *    must display the following acknowledgement:
   20  *        This product includes software developed by the NetBSD
   21  *        Foundation, Inc. and its contributors.
   22  * 4. Neither the name of The NetBSD Foundation nor the names of its
   23  *    contributors may be used to endorse or promote products derived
   24  *    from this software without specific prior written permission.
   25  *
   26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
   27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
   28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
   29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
   30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
   31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
   32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
   33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
   34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
   35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
   36  * POSSIBILITY OF SUCH DAMAGE.
   37  */
   38 
   39 #ifndef _DEV_ISA_NSLM7XVAR_H_
   40 #define _DEV_ISA_NSLM7XVAR_H_
   41 
   42 /*
   43  * National Semiconductor LM78/79/81 registers.
   44  */
   45 
   46 /* Control registers */
   47 
   48 #define LMC_ADDR        0x05
   49 #define LMC_DATA        0x06
   50 
   51 /* Data registers */
   52 
   53 #define LMD_POST_RAM    0x00    /* POST RAM occupies 0x00 -- 0x1f */
   54 #define LMD_VALUE_RAM   0x20    /* Value RAM occupies 0x20 -- 0x3f */
   55 #define LMD_FAN1        0x28    /* FAN1 reading */
   56 #define LMD_FAN2        0x29    /* FAN2 reading */
   57 #define LMD_FAN3        0x2a    /* FAN3 reading */
   58 
   59 #define LMD_CONFIG      0x40    /* Configuration */
   60 #define LMD_ISR1        0x41    /* Interrupt Status 1 */
   61 #define LMD_ISR2        0x42    /* Interrupt Status 2 */
   62 #define LMD_SMI1        0x43    /* SMI Mask 1 */
   63 #define LMD_SMI2        0x44    /* SMI Mask 2 */
   64 #define LMD_NMI1        0x45    /* NMI Mask 1 */
   65 #define LMD_NMI2        0x46    /* NMI Mask 2 */
   66 #define LMD_VIDFAN      0x47    /* VID/Fan Divisor */
   67 #define LMD_SBUSADDR    0x48    /* Serial Bus Address */
   68 #define LMD_CHIPID      0x49    /* Chip Reset/ID */
   69 
   70 /* Chip IDs */
   71 
   72 #define LM_NUM_SENSORS  11
   73 #define LM_ID_LM78      0x00
   74 #define LM_ID_LM78J     0x40
   75 #define LM_ID_LM79      0xC0
   76 #define LM_ID_LM81      0x80
   77 #define LM_ID_MASK      0xFE
   78 
   79 
   80 /*
   81  * Winbond registers
   82  *
   83  * Several models exists.  The W83781D is mostly compatible with the
   84  * LM78, but has two extra temperatures.  Later models add extra
   85  * voltage sensors, fans and bigger fan divisors to accomodate slow
   86  * running fans.  To accomodate the extra sensors some models have
   87  * different memory banks.
   88  */
   89 
   90 #define WB_T23ADDR      0x4a    /* Temperature 2 and 3 Serial Bus Address */
   91 #define WB_PIN          0x4b    /* Pin Control */
   92 #define WB_BANKSEL      0x4e    /* Bank Select */
   93 #define WB_VENDID       0x4f    /* Vendor ID */
   94 
   95 /* Bank 0 regs */
   96 #define WB_BANK0_CHIPID 0x58    /* Chip ID */
   97 #define WB_BANK0_FAN45  0x5c    /* Fan 4/5 Divisor Control (W83791D only) */
   98 #define WB_BANK0_VBAT   0x5d    /* VBAT Monitor Control */
   99 #define WB_BANK0_FAN4   0xba    /* Fan 4 reading (W83791D only) */
  100 #define WB_BANK0_FAN5   0xbb    /* Fan 5 reading (W83791D only) */
  101 
  102 #define WB_BANK0_CONFIG 0x18    /* VRM & OVT Config (W83627THF/W83637HF) */
  103 
  104 /* Bank 1 registers */
  105 #define WB_BANK1_T2H    0x50    /* Temperature 2 High Byte */
  106 #define WB_BANK1_T2L    0x51    /* Temperature 2 Low Byte */
  107 
  108 /* Bank 2 registers */
  109 #define WB_BANK2_T3H    0x50    /* Temperature 3 High Byte */
  110 #define WB_BANK2_T3L    0x51    /* Temperature 3 Low Byte */
  111 
  112 /* Bank 4 registers (W83782D/W83627HF and later models only) */
  113 #define WB_BANK4_T1OFF  0x54    /* Temperature 1 Offset */
  114 #define WB_BANK4_T2OFF  0x55    /* Temperature 2 Offset */
  115 #define WB_BANK4_T3OFF  0x56    /* Temperature 3 Offset */
  116 
  117 /* Bank 5 registers (W83782D/W83627HF and later models only) */
  118 #define WB_BANK5_5VSB   0x50    /* 5VSB reading */
  119 #define WB_BANK5_VBAT   0x51    /* VBAT reading */
  120 
  121 /* Bank selection */
  122 #define WB_BANKSEL_B0   0x00    /* Bank 0 */
  123 #define WB_BANKSEL_B1   0x01    /* Bank 1 */
  124 #define WB_BANKSEL_B2   0x02    /* Bank 2 */
  125 #define WB_BANKSEL_B3   0x03    /* Bank 3 */
  126 #define WB_BANKSEL_B4   0x04    /* Bank 4 */
  127 #define WB_BANKSEL_B5   0x05    /* Bank 5 */
  128 #define WB_BANKSEL_HBAC 0x80    /* Register 0x4f High Byte Access */
  129 
  130 /* Vendor IDs */
  131 #define WB_VENDID_WINBOND       0x5ca3  /* Winbond */
  132 #define WB_VENDID_ASUS          0x12c3  /* ASUS */
  133 
  134 /* Chip IDs */
  135 #define WB_CHIPID_W83781D       0x10
  136 #define WB_CHIPID_W83781D_2     0x11
  137 #define WB_CHIPID_W83627HF      0x21
  138 #define WB_CHIPID_AS99127F      0x31    /* Asus W83781D clone */
  139 #define WB_CHIPID_W83782D       0x30
  140 #define WB_CHIPID_W83783S       0x40
  141 #define WB_CHIPID_W83697HF      0x60
  142 #define WB_CHIPID_W83791D       0x71
  143 #define WB_CHIPID_W83791SD      0x72
  144 #define WB_CHIPID_W83792D       0x7a
  145 #define WB_CHIPID_W83637HF      0x80
  146 #define WB_CHIPID_W83627THF     0x90
  147 #define WB_CHIPID_W83627EHF     0xa1
  148 #define WB_CHIPID_W83627DHG     0xc1
  149 
  150 /* Config bits */
  151 #define WB_CONFIG_VMR9          0x01
  152 
  153 /* Reference voltage (mV) */
  154 #define WB_VREF                 3600
  155 #define WB_W83627EHF_VREF       2048
  156 
  157 #define WB_MAX_SENSORS          19
  158 
  159 struct lm_softc {
  160         struct  device sc_dev;
  161 
  162         bus_space_tag_t lm_iot;
  163         bus_space_handle_t lm_ioh;
  164 
  165         int     sc_flags;
  166         struct  timeval lastread; /* only allow reads every 1.5 seconds */
  167 
  168         struct envsys_tre_data sensors[WB_MAX_SENSORS];
  169         struct envsys_basic_info info[WB_MAX_SENSORS];
  170         struct sysmon_envsys sc_sysmon;
  171         uint8_t numsensors;
  172 
  173         void (*refresh_sensor_data)(struct lm_softc *);
  174 
  175         uint8_t (*lm_readreg)(struct lm_softc *, int);
  176         void (*lm_writereg)(struct lm_softc *, int, int);
  177 
  178         struct lm_sensor *lm_sensors;
  179         uint8_t chipid;
  180         uint8_t vrm9;
  181 };
  182 
  183 struct lm_sensor {
  184         const char *desc;
  185         enum envsys_units type;
  186         uint8_t bank;
  187         uint8_t reg;
  188         void (*refresh)(struct lm_softc *, int);
  189         int rfact;
  190 };
  191 
  192 void lm_attach(struct lm_softc *);
  193 int lm_probe(bus_space_tag_t, bus_space_handle_t);
  194 
  195 #endif /* _DEV_ISA_NSLM7XVAR_H_ */

Cache object: 45f6c4bb451573f8ff59a177b7c848ed


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