The Design and Implementation of the FreeBSD Operating System, Second Edition
Now available: The Design and Implementation of the FreeBSD Operating System (Second Edition)


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FreeBSD/Linux Kernel Cross Reference
sys/dev/ic/rf3000reg.h

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    1 /* $NetBSD */
    2 
    3 /*
    4  * Copyright (c) 2005 David Young.  All rights reserved.
    5  *
    6  * This code was written by David Young.
    7  *
    8  * Redistribution and use in source and binary forms, with or without
    9  * modification, are permitted provided that the following conditions
   10  * are met:
   11  * 1. Redistributions of source code must retain the above copyright
   12  *    notice, this list of conditions and the following disclaimer.
   13  * 2. Redistributions in binary form must reproduce the above copyright
   14  *    notice, this list of conditions and the following disclaimer in the
   15  *    documentation and/or other materials provided with the distribution.
   16  * 3. Neither the name of the author nor the names of any co-contributors
   17  *    may be used to endorse or promote products derived from this software
   18  *    without specific prior written permission.
   19  *
   20  * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
   21  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
   22  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
   23  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL David
   24  * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
   25  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
   26  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
   27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
   28  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
   29  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
   30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
   31  * OF SUCH DAMAGE.
   32  */
   33 
   34 #ifndef _DEV_IC_RF3000REG_H_
   35 #define _DEV_IC_RF3000REG_H_
   36 
   37 /*
   38  * Registers for RF Microdevices RF3000 spread-spectrum baseband modem.
   39  */
   40 #define RF3000_CTL              0x01            /* modem control */
   41 #define RF3000_RXSTAT           RF3000_CTL      /* RX status */
   42 #define         RF3000_CTL_MODE_MASK            BITS(7, 4)
   43 #define         RF3000_RXSTAT_ACQ               BIT(2)
   44 #define         RF3000_RXSTAT_SFD               BIT(1)
   45 #define         RF3000_RXSTAT_CRC               BIT(0)
   46 #define RF3000_CCACTL           0x02            /* CCA control */
   47 /* CCA mode */
   48 #define         RF3000_CCACTL_MODE_MASK         BITS(7, 6)
   49 #define         RF3000_CCACTL_MODE_RSSIT        0       /* RSSI threshold */
   50 #define         RF3000_CCACTL_MODE_ACQ          1       /* acquisition */
   51 #define         RF3000_CCACTL_MODE_BOTH         2       /* threshold or acq. */
   52 /* RSSI threshold for CCA */
   53 #define         RF3000_CCACTL_RSSIT_MASK        BITS(5, 0)
   54 #define RF3000_DIVCTL           0x03            /* diversity control */
   55 #define         RF3000_DIVCTL_ENABLE            BIT(7)  /* enable diversity */
   56 #define         RF3000_DIVCTL_ANTSEL            BIT(6)  /* if ENABLE = 0, set
   57                                                          * ANT SEL
   58                                                          */
   59 #define RF3000_RSSI             RF3000_DIVCTL   /* RSSI value */
   60 #define         RF3000_RSSI_MASK                BITS(5, 0)
   61 #define RF3000_GAINCTL          0x11            /* TX variable gain control */
   62 #define         RF3000_GAINCTL_TXVGC_MASK       BITS(7, 2)
   63 #define         RF3000_GAINCTL_SCRAMBLER        BIT(1)
   64 #define RF3000_LOGAINCAL        0x14            /* low gain calibration */
   65 #define         RF3000_LOGAINCAL_CAL_MASK       BITS(5, 0)
   66 #define RF3000_HIGAINCAL        0x15            /* high gain calibration */
   67 #define         RF3000_HIGAINCAL_CAL_MASK       BITS(5, 0)
   68 #define         RF3000_HIGAINCAL_DSSSPAD        BIT(6)  /* 6dB gain pad for DSSS
   69                                                          * modes (meaning?)
   70                                                          */
   71 #define RF3000_OPTIONS1         0x1C            /* Options Register 1 */
   72 /* Saturation threshold is 4 + offset, where -3 <= offset <= 3.
   73  * SAT_THRESH is the absolute value, SAT_THRESH_SIGN is the sign.
   74  */
   75 #define         RF3000_OPTIONS1_SAT_THRESH_SIGN BIT(7)
   76 #define         RF3000_OPTIONS1_SAT_THRESH      BITS(6,5)
   77 #define         RF3000_OPTIONS1_ALTAGC          BIT(4)  /* 1: retrigger AGC
   78                                                          * algorithm on ADC
   79                                                          * saturation
   80                                                          */
   81 #define         RF3000_OPTIONS1_ALTBUS          BIT(3)  /* 1: enable alternate
   82                                                          * Tx/Rx data bus
   83                                                          * interface.
   84                                                          */
   85 #define         RF3000_OPTIONS1_RESERVED0_MASK  BITS(2,0)/* 0 */
   86 
   87 #define RF3000_OPTIONS2         0x1D            /* Options Register 2 */
   88 /* 1: delay next AGC 2us instead of 1us after a 1->0 LNAGS-pin transition. */
   89 #define         RF3000_OPTIONS2_LNAGS_DELAY     BIT(7)
   90 #define         RF3000_OPTIONS2_RESERVED0_MASK  BITS(6,3)       /* 0 */
   91 /* Threshold for AGC re-trigger. 0: high count, 1: low count. */
   92 #define         RF3000_OPTIONS2_RTG_THRESH      BIT(2)
   93 #define         RF3000_OPTIONS2_RESERVED1_MASK  BITS(1,0)       /* 0 */
   94 
   95 #endif /* _DEV_IC_RF3000REG_H_ */

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